From 00f3ca740a9c2692a58e629d92a1c8666e394c26 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Wed, 3 Sep 2008 20:47:25 -0400 Subject: powerpc/40x: AMCC PowerPC 405EZ Acadia DTS Add the base DTS for the AMCC PowerPC 405EZ Acadia evalution board. In addition to some of the normal PPC 40x peripherals, the Acadia board has: - 64 MiB PSRAM - NOR and NAND flash - Two USB 1.1 host ports - Two CAN 2.0 ports - ADC and DAC connectors - LCD display This adds the basic platform support to build from. Signed-off-by: Josh Boyer --- arch/powerpc/boot/dts/acadia.dts | 224 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 224 insertions(+) create mode 100644 arch/powerpc/boot/dts/acadia.dts (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/acadia.dts b/arch/powerpc/boot/dts/acadia.dts new file mode 100644 index 00000000000..57291f61ffe --- /dev/null +++ b/arch/powerpc/boot/dts/acadia.dts @@ -0,0 +1,224 @@ +/* + * Device Tree Source for AMCC Acadia (405EZ) + * + * Copyright IBM Corp. 2008 + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; + +/ { + #address-cells = <1>; + #size-cells = <1>; + model = "amcc,acadia"; + compatible = "amcc,acadia"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + serial0 = &UART0; + serial1 = &UART1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,405EZ"; + reg = <0x0>; + clock-frequency = <0>; /* Filled in by wrapper */ + timebase-frequency = <0>; /* Filled in by wrapper */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <16384>; + d-cache-size = <16384>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0>; /* Filled in by wrapper */ + }; + + UIC0: interrupt-controller { + compatible = "ibm,uic-405ez", "ibm,uic"; + interrupt-controller; + dcr-reg = <0x0c0 0x009>; + cell-index = <0>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + plb { + compatible = "ibm,plb-405ez", "ibm,plb3"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by wrapper */ + + MAL0: mcmal { + compatible = "ibm,mcmal-405ez", "ibm,mcmal"; + dcr-reg = <0x380 0x62>; + num-tx-chans = <1>; + num-rx-chans = <1>; + interrupt-parent = <&UIC0>; + /* 405EZ has only 3 interrupts to the UIC, as + * SERR, TXDE, and RXDE are or'd together into + * one UIC bit + */ + interrupts = < + 0x13 0x4 /* TXEOB */ + 0x15 0x4 /* RXEOB */ + 0x12 0x4 /* SERR, TXDE, RXDE */>; + }; + + POB0: opb { + compatible = "ibm,opb-405ez", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + dcr-reg = <0x0a 0x05>; + clock-frequency = <0>; /* Filled in by wrapper */ + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 0x8>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by wrapper */ + current-speed = <115200>; + interrupt-parent = <&UIC0>; + interrupts = <0x5 0x4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600400 0x8>; + clock-frequency = <0>; /* Filled in by wrapper */ + current-speed = <115200>; + interrupt-parent = <&UIC0>; + interrupts = <0x6 0x4>; + }; + + IIC: i2c@ef600500 { + compatible = "ibm,iic-405ez", "ibm,iic"; + reg = <0xef600500 0x11>; + interrupt-parent = <&UIC0>; + interrupts = <0xa 0x4>; + }; + + GPIO0: gpio@ef600700 { + compatible = "ibm,gpio-405ez"; + reg = <0xef600700 0x20>; + }; + + GPIO1: gpio@ef600800 { + compatible = "ibm,gpio-405ez"; + reg = <0xef600800 0x20>; + }; + + EMAC0: ethernet@ef600900 { + device_type = "network"; + compatible = "ibm,emac-405ez", "ibm,emac"; + interrupt-parent = <&UIC0>; + interrupts = < + 0x10 0x4 /* Ethernet */ + 0x11 0x4 /* Ethernet Wake up */>; + local-mac-address = [000000000000]; /* Filled in by wrapper */ + reg = <0xef600900 0x70>; + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <1500>; + rx-fifo-size = <4096>; + tx-fifo-size = <2048>; + phy-mode = "mii"; + phy-map = <0x0>; + }; + + CAN0: can@ef601000 { + compatible = "amcc,can-405ez"; + reg = <0xef601000 0x620>; + interrupt-parent = <&UIC0>; + interrupts = <0x7 0x4>; + }; + + CAN1: can@ef601800 { + compatible = "amcc,can-405ez"; + reg = <0xef601800 0x620>; + interrupt-parent = <&UIC0>; + interrupts = <0x8 0x4>; + }; + + cameleon@ef602000 { + compatible = "amcc,cameleon-405ez"; + reg = <0xef602000 0x800>; + interrupt-parent = <&UIC0>; + interrupts = <0xb 0x4 0xc 0x4>; + }; + + ieee1588@ef602800 { + compatible = "amcc,ieee1588-405ez"; + reg = <0xef602800 0x60>; + interrupt-parent = <&UIC0>; + interrupts = <0x4 0x4>; + /* This thing is a bit weird. It has it's own UIC + * that it uses to generate snapshot triggers. We + * don't really support this device yet, and it needs + * work to figure this out. + */ + dcr-reg = <0xe0 0x9>; + }; + + usb@ef603000 { + compatible = "ohci-be"; + reg = <0xef603000 0x80>; + interrupts-parent = <&UIC0>; + interrupts = <0xd 0x4 0xe 0x4>; + }; + + dac@ef603300 { + compatible = "amcc,dac-405ez"; + reg = <0xef603300 0x40>; + interrupt-parent = <&UIC0>; + interrupts = <0x18 0x4>; + }; + + adc@ef603400 { + compatible = "amcc,adc-405ez"; + reg = <0xef603400 0x40>; + interrupt-parent = <&UIC0>; + interrupts = <0x17 0x4>; + }; + + spi@ef603500 { + compatible = "amcc,spi-405ez"; + reg = <0xef603500 0x100>; + interrupt-parent = <&UIC0>; + interrupts = <0x9 0x4>; + }; + }; + + EBC0: ebc { + compatible = "ibm,ebc-405ez", "ibm,ebc"; + dcr-reg = <0x12 0x2>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by wrapper */ + }; + }; + + chosen { + linux,stdout-path = "/plb/opb/serial@ef600300"; + }; +}; -- cgit v1.2.3 From 9fa126da4a9addec77db4663933ed592188a0741 Mon Sep 17 00:00:00 2001 From: Niklaus Giger Date: Wed, 1 Oct 2008 19:23:23 +0000 Subject: powerpc/40x: Add support for Netstal HCU4 board Adds support for a HCU4 PPC405GPr based board from Netstal Maschinen AG. Signed-off-by: Niklaus Giger Signed-off-by: Josh Boyer --- arch/powerpc/boot/dts/hcu4.dts | 168 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 168 insertions(+) create mode 100644 arch/powerpc/boot/dts/hcu4.dts (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/hcu4.dts b/arch/powerpc/boot/dts/hcu4.dts new file mode 100644 index 00000000000..7988598da4c --- /dev/null +++ b/arch/powerpc/boot/dts/hcu4.dts @@ -0,0 +1,168 @@ +/* +* Device Tree Source for Netstal Maschinen HCU4 +* based on the IBM Walnut +* +* Copyright 2008 +* Niklaus Giger +* +* Copyright 2007 IBM Corp. +* Josh Boyer +* +* This file is licensed under the terms of the GNU General Public +* License version 2. This program is licensed "as is" without +* any warranty of any kind, whether express or implied. +*/ + +/dts-v1/; + +/ { + #address-cells = <0x1>; + #size-cells = <0x1>; + model = "netstal,hcu4"; + compatible = "netstal,hcu4"; + dcr-parent = <0x1>; + + aliases { + ethernet0 = "/plb/opb/ethernet@ef600800"; + serial0 = "/plb/opb/serial@ef600300"; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,405GPr"; + reg = <0x0>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0x0>; /* Filled in by U-Boot */ + i-cache-line-size = <0x20>; + d-cache-line-size = <0x20>; + i-cache-size = <0x4000>; + d-cache-size = <0x4000>; + dcr-controller; + dcr-access-method = "native"; + linux,phandle = <0x1>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x0>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller { + compatible = "ibm,uic"; + interrupt-controller; + cell-index = <0x0>; + dcr-reg = <0xc0 0x9>; + #address-cells = <0x0>; + #size-cells = <0x0>; + #interrupt-cells = <0x2>; + linux,phandle = <0x2>; + }; + + plb { + compatible = "ibm,plb3"; + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; + clock-frequency = <0x0>; /* Filled in by U-Boot */ + + SDRAM0: memory-controller { + compatible = "ibm,sdram-405gp"; + dcr-reg = <0x10 0x2>; + }; + + MAL: mcmal { + compatible = "ibm,mcmal-405gp", "ibm,mcmal"; + dcr-reg = <0x180 0x62>; + num-tx-chans = <0x1>; + num-rx-chans = <0x1>; + interrupt-parent = <0x2>; + interrupts = <0xb 0x4 0xc 0x4 0xa 0x4 0xd 0x4 0xe 0x4>; + linux,phandle = <0x3>; + }; + + POB0: opb { + compatible = "ibm,opb-405gp", "ibm,opb"; + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges = <0xef600000 0xef600000 0xa00000>; + dcr-reg = <0xa0 0x5>; + clock-frequency = <0x0>; /* Filled in by U-Boot */ + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 0x8>; + virtual-reg = <0xef600300>; + clock-frequency = <0x0>;/* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <0x2>; + interrupts = <0x0 0x4>; + }; + + IIC: i2c@ef600500 { + compatible = "ibm,iic-405gp", "ibm,iic"; + reg = <0xef600500 0x11>; + interrupt-parent = <0x2>; + interrupts = <0x2 0x4>; + }; + + GPIO: gpio@ef600700 { + compatible = "ibm,gpio-405gp"; + reg = <0xef600700 0x20>; + }; + + EMAC: ethernet@ef600800 { + device_type = "network"; + compatible = "ibm,emac-405gp", "ibm,emac"; + interrupt-parent = <0x2>; + interrupts = <0xf 0x4 0x9 0x4>; + local-mac-address = [00 00 00 00 00 00]; + reg = <0xef600800 0x70>; + mal-device = <0x3>; + mal-tx-channel = <0x0>; + mal-rx-channel = <0x0>; + cell-index = <0x0>; + max-frame-size = <0x5dc>; + rx-fifo-size = <0x1000>; + tx-fifo-size = <0x800>; + phy-mode = "rmii"; + phy-map = <0x1>; + }; + }; + + EBC0: ebc { + compatible = "ibm,ebc-405gp", "ibm,ebc"; + dcr-reg = <0x12 0x2>; + #address-cells = <0x2>; + #size-cells = <0x1>; + clock-frequency = <0x0>; /* Filled in by U-Boot */ + + sram@0,0 { + reg = <0x0 0x0 0x80000>; + }; + + flash@0,80000 { + compatible = "jedec-flash"; + bank-width = <0x1>; + reg = <0x0 0x80000 0x80000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + + partition@0 { + label = "OpenBIOS"; + reg = <0x0 0x80000>; + read-only; + }; + }; + }; + }; + + chosen { + linux,stdout-path = "/plb/opb/serial@ef600300"; + }; +}; -- cgit v1.2.3 From ba556ed23c73796efd58ac348cc33773935bb3b9 Mon Sep 17 00:00:00 2001 From: Jason Jin Date: Thu, 16 Oct 2008 17:31:32 +0800 Subject: powerpc/85xx: Enable enhanced functions for 8536 TSEC Signed-off-by: Jason Jin Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8536ds.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts index 93fdd99901b..dce2f65bf92 100644 --- a/arch/powerpc/boot/dts/mpc8536ds.dts +++ b/arch/powerpc/boot/dts/mpc8536ds.dts @@ -180,7 +180,7 @@ enet0: ethernet@24000 { cell-index = <0>; device_type = "network"; - model = "TSEC"; + model = "eTSEC"; compatible = "gianfar"; reg = <0x24000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; @@ -193,7 +193,7 @@ enet1: ethernet@26000 { cell-index = <1>; device_type = "network"; - model = "TSEC"; + model = "eTSEC"; compatible = "gianfar"; reg = <0x26000 0x1000>; local-mac-address = [ 00 00 00 00 00 00 ]; -- cgit v1.2.3 From 13690332a315128ba8936297137d33aff5b2ad7b Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Fri, 17 Oct 2008 00:41:32 -0500 Subject: powerpc/85xx: Fix mpc8536ds dma interrupt numbers Signed-off-by: Ed Swarthout Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8536ds.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts index dce2f65bf92..35db1e5440c 100644 --- a/arch/powerpc/boot/dts/mpc8536ds.dts +++ b/arch/powerpc/boot/dts/mpc8536ds.dts @@ -109,7 +109,7 @@ reg = <0x0 0x80>; cell-index = <0>; interrupt-parent = <&mpic>; - interrupts = <14 0x2>; + interrupts = <20 2>; }; dma-channel@80 { compatible = "fsl,mpc8536-dma-channel", @@ -117,7 +117,7 @@ reg = <0x80 0x80>; cell-index = <1>; interrupt-parent = <&mpic>; - interrupts = <15 0x2>; + interrupts = <21 2>; }; dma-channel@100 { compatible = "fsl,mpc8536-dma-channel", @@ -125,7 +125,7 @@ reg = <0x100 0x80>; cell-index = <2>; interrupt-parent = <&mpic>; - interrupts = <16 0x2>; + interrupts = <22 2>; }; dma-channel@180 { compatible = "fsl,mpc8536-dma-channel", @@ -133,7 +133,7 @@ reg = <0x180 0x80>; cell-index = <3>; interrupt-parent = <&mpic>; - interrupts = <17 0x2>; + interrupts = <23 2>; }; }; -- cgit v1.2.3 From fd657efc67dbd70f422285101a50c2e84d03463d Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Sat, 18 Oct 2008 04:23:52 +0400 Subject: powerpc: Remove device_type = "board_control" properties in .dts files We don't want to encourage the bogus device_type usage. The device type isn't used in the code, so we can simply remove it from the documentation and dts files. Boards should specify proper compatible entries instead. Signed-off-by: Anton Vorontsov Acked-by: David Gibson Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc832x_mds.dts | 2 +- arch/powerpc/boot/dts/mpc834x_mds.dts | 2 +- arch/powerpc/boot/dts/mpc836x_mds.dts | 2 +- arch/powerpc/boot/dts/mpc8568mds.dts | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index e4cc1768f24..57c595bf107 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts @@ -60,7 +60,7 @@ }; bcsr@f8000000 { - device_type = "board-control"; + compatible = "fsl,mpc8323mds-bcsr"; reg = <0xf8000000 0x8000>; }; diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index 04bfde3ea60..c986c541e9b 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts @@ -49,7 +49,7 @@ }; bcsr@e2400000 { - device_type = "board-control"; + compatible = "fsl,mpc8349mds-bcsr"; reg = <0xe2400000 0x8000>; }; diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 66a12d2631f..14534d04e4d 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts @@ -69,7 +69,7 @@ }; bcsr@1,0 { - device_type = "board-control"; + compatible = "fsl,mpc8360mds-bcsr"; reg = <1 0 0x8000>; }; }; diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index a15f10343f5..c80158f7741 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts @@ -52,7 +52,7 @@ }; bcsr@f8000000 { - device_type = "board-control"; + compatible = "fsl,mpc8568mds-bcsr"; reg = <0xf8000000 0x8000>; }; -- cgit v1.2.3 From 66eb988406df0f675c3133aedaf2773ba68866ff Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 20 Oct 2008 23:02:26 -0500 Subject: powerpc/85xx: Move mpc8572ds.dts to address-cells/size-cells = <2> Change the top-level #address-cells and #size-cells to <2> so the mpc8572ds.dts is easier to deal with both a true 32-bit physical or 36-bit physical address space. Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8572ds.dts | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index e124dd18fb5..cadd4652a69 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts @@ -13,8 +13,8 @@ / { model = "fsl,MPC8572DS"; compatible = "fsl,MPC8572DS"; - #address-cells = <1>; - #size-cells = <1>; + #address-cells = <2>; + #size-cells = <2>; aliases { ethernet0 = &enet0; @@ -61,7 +61,6 @@ memory { device_type = "memory"; - reg = <0x0 0x0>; // Filled by U-Boot }; soc8572@ffe00000 { @@ -69,8 +68,8 @@ #size-cells = <1>; device_type = "soc"; compatible = "simple-bus"; - ranges = <0x0 0xffe00000 0x100000>; - reg = <0xffe00000 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed + ranges = <0x0 0 0xffe00000 0x100000>; + reg = <0 0xffe00000 0 0x1000>; // CCSRBAR & soc regs, remove once parse code for immrbase fixed bus-frequency = <0>; // Filled out by uboot. memory-controller@2000 { @@ -351,10 +350,10 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xffe08000 0x1000>; + reg = <0 0xffe08000 0 0x1000>; bus-range = <0 255>; - ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xffc00000 0x0 0x10000>; + ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupts = <24 2>; @@ -561,10 +560,10 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xffe09000 0x1000>; + reg = <0 0xffe09000 0 0x1000>; bus-range = <0 255>; - ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xffc10000 0x0 0x10000>; + ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupts = <26 2>; @@ -598,10 +597,10 @@ #interrupt-cells = <1>; #size-cells = <2>; #address-cells = <3>; - reg = <0xffe0a000 0x1000>; + reg = <0 0xffe0a000 0 0x1000>; bus-range = <0 255>; - ranges = <0x2000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000 - 0x1000000 0x0 0x0 0xffc20000 0x0 0x10000>; + ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000 + 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>; clock-frequency = <33333333>; interrupt-parent = <&mpic>; interrupts = <27 2>; -- cgit v1.2.3 From 442746989d92afc125040e0f29b33602ad94da99 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 17 Oct 2008 22:57:09 +0400 Subject: powerpc/83xx: Add support for MCU microcontroller in .dts files MCU is an external Freescale MC9S08QG8 microcontroller, mainly used to provide soft power-off function, but also exports two GPIOs (wired to the LEDs and also available from the external headers). Added the MCU on mpc8349emitx, mpc837xrdb and mpc8315erdb boards. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8315erdb.dts | 8 ++++++++ arch/powerpc/boot/dts/mpc8349emitx.dts | 8 ++++++++ arch/powerpc/boot/dts/mpc8377_rdb.dts | 8 ++++++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 8 ++++++++ arch/powerpc/boot/dts/mpc8379_rdb.dts | 8 ++++++++ 5 files changed, 40 insertions(+) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 7449e54c1a9..6b850670de1 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -121,6 +121,14 @@ compatible = "dallas,ds1339"; reg = <0x68>; }; + + mcu_pio: mcu@a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8315erdb", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; + }; }; spi@7000 { diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 5cedf373a1d..87cd8b7b5a2 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -131,6 +131,14 @@ interrupt-parent = <&ipic>; interrupts = <71 8>; }; + + mcu_pio: mcu@a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8349emitx", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; + }; }; usb@22000 { diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 53191ba67aa..435ef3dd022 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -121,6 +121,14 @@ compatible = "dallas,ds1339"; reg = <0x68>; }; + + mcu_pio: mcu@a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8377erdb", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; + }; }; i2c@3100 { diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 4a09153d160..b11e68f56a0 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -121,6 +121,14 @@ compatible = "dallas,ds1339"; reg = <0x68>; }; + + mcu_pio: mcu@a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8378erdb", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; + }; }; i2c@3100 { diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index bbd884ac9dc..337af6ea26d 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -121,6 +121,14 @@ compatible = "dallas,ds1339"; reg = <0x68>; }; + + mcu_pio: mcu@a { + #gpio-cells = <2>; + compatible = "fsl,mc9s08qg8-mpc8379erdb", + "fsl,mcu-mpc8349emitx"; + reg = <0x0a>; + gpio-controller; + }; }; i2c@3100 { -- cgit v1.2.3 From 672e806ee103c1709bcdcafabe65ba9c8ab5a63d Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Fri, 17 Oct 2008 22:56:59 +0400 Subject: powerpc/83xx: Add DS1339 RTC support for MPC8349E-mITX boards .dts The RTC is sitting on the I2C2 bus at address 0x68. RTC interrupt signal is connected to the IPIC's EXT2 interrupt line, the line is shared with Vitesse 8201 Ethernet PHY. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8349emitx.dts | 8 ++++++++ arch/powerpc/boot/dts/mpc8349emitxgp.dts | 8 ++++++++ 2 files changed, 16 insertions(+) (limited to 'arch/powerpc/boot/dts') diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 87cd8b7b5a2..2c9d54a35bc 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts @@ -83,6 +83,14 @@ interrupts = <15 0x8>; interrupt-parent = <&ipic>; dfsrr; + + rtc@68 { + device_type = "rtc"; + compatible = "dallas,ds1339"; + reg = <0x68>; + interrupts = <18 0x8>; + interrupt-parent = <&ipic>; + }; }; spi@7000 { diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index 81ae1d3e944..fa40647ee62 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts @@ -81,6 +81,14 @@ interrupts = <15 0x8>; interrupt-parent = <&ipic>; dfsrr; + + rtc@68 { + device_type = "rtc"; + compatible = "dallas,ds1339"; + reg = <0x68>; + interrupts = <18 0x8>; + interrupt-parent = <&ipic>; + }; }; spi@7000 { -- cgit v1.2.3