From 0585a155a7318e69d43ef20636c2f072ad17d03f Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 8 Jan 2009 04:31:41 +0300 Subject: powerpc/83xx: Add PCI-E support for all MPC83xx boards with PCI-E This patch adds pcie nodes to the appropriate dts files, plus adds some probing code for the boards. Also, remove of_device_is_avaliable() check from the mpc837x_mds.c board file, as mpc83xx_add_bridge() has the same check now. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8315erdb.dts | 64 +++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8377_mds.dts | 64 +++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8377_rdb.dts | 64 +++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8378_mds.dts | 64 +++++++++++++++++++++++++++++++++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 64 +++++++++++++++++++++++++++++++++++ 5 files changed, 320 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index 71784165b77..88d691cccb3 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts @@ -22,6 +22,8 @@ serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; }; cpus { @@ -349,4 +351,66 @@ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb1000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xa0000000 + 0x02000000 0 0xa0000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8315-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd1000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xc0000000 + 0x02000000 0 0xc0000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 1d14d7052e6..a519e8571e8 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -23,6 +23,8 @@ serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; }; cpus { @@ -409,4 +411,66 @@ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xa8000000 + 0x02000000 0 0xa8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xc8000000 + 0x02000000 0 0xc8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 9413af3b992..b4ab3d091e6 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -22,6 +22,8 @@ serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; }; cpus { @@ -350,4 +352,66 @@ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xa8000000 + 0x02000000 0 0xa8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8377-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xc8000000 + 0x02000000 0 0xc8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index b85fc02682d..6bbee4989fb 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -23,6 +23,8 @@ serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; }; cpus { @@ -395,4 +397,66 @@ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xa8000000 + 0x02000000 0 0xa8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xc8000000 + 0x02000000 0 0xc8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 23c10ce22c2..1b05fb0bf38 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -22,6 +22,8 @@ serial0 = &serial0; serial1 = &serial1; pci0 = &pci0; + pci1 = &pci1; + pci2 = &pci2; }; cpus { @@ -334,4 +336,66 @@ compatible = "fsl,mpc8349-pci"; device_type = "pci"; }; + + pci1: pcie@e0009000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; + reg = <0xe0009000 0x00001000>; + ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 1 8 + 0 0 0 2 &ipic 1 8 + 0 0 0 3 &ipic 1 8 + 0 0 0 4 &ipic 1 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xa8000000 + 0x02000000 0 0xa8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; + + pci2: pcie@e000a000 { + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; + reg = <0xe000a000 0x00001000>; + ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 + 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; + bus-range = <0 255>; + interrupt-map-mask = <0xf800 0 0 7>; + interrupt-map = <0 0 0 1 &ipic 2 8 + 0 0 0 2 &ipic 2 8 + 0 0 0 3 &ipic 2 8 + 0 0 0 4 &ipic 2 8>; + clock-frequency = <0>; + + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + device_type = "pci"; + reg = <0 0 0 0 0>; + ranges = <0x02000000 0 0xc8000000 + 0x02000000 0 0xc8000000 + 0 0x10000000 + 0x01000000 0 0x00000000 + 0x01000000 0 0x00000000 + 0 0x00800000>; + }; + }; }; -- cgit v1.2.3 From f7a0be456f1bdcb6dec81c1e4e47e2b7205eba95 Mon Sep 17 00:00:00 2001 From: Reynes Philippe Date: Wed, 28 Jan 2009 11:07:44 +0100 Subject: powerpc/83xx: Add i2c eeprom to dts for MPC837x RDB Signed-off-by: Philippe Reynes Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8377_rdb.dts | 6 ++++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 6 ++++++ arch/powerpc/boot/dts/mpc8379_rdb.dts | 6 ++++++ 3 files changed, 18 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index b4ab3d091e6..165463f7784 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -118,6 +118,12 @@ interrupts = <14 0x8>; interrupt-parent = <&ipic>; dfsrr; + + at24@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 1b05fb0bf38..f9830aebe94 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -118,6 +118,12 @@ interrupts = <14 0x8>; interrupt-parent = <&ipic>; dfsrr; + + at24@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 72cdc3c4c7e..2c06d39dbe9 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -116,6 +116,12 @@ interrupts = <14 0x8>; interrupt-parent = <&ipic>; dfsrr; + + at24@50 { + compatible = "at24,24c256"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1339"; reg = <0x68>; -- cgit v1.2.3 From bb2b66dca1c4cbe16d8208d4b2910cf0eb6e9f75 Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Mon, 19 Jan 2009 11:33:24 +0000 Subject: powerpc/86xx: Board support for GE Fanuc SBC310 Support for the SBC310 VPX Single Board Computer from GE Fanuc (PowerPC MPC8641D). This is the basic board support for GE Fanuc's SBC310, a 3U single board computer, based on Freescale's MPC8641D. Signed-off-by: Martyn Welch Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/gef_sbc310.dts | 364 +++++++++++++++++++++++++++++++++++ 1 file changed, 364 insertions(+) create mode 100644 arch/powerpc/boot/dts/gef_sbc310.dts (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/gef_sbc310.dts b/arch/powerpc/boot/dts/gef_sbc310.dts new file mode 100644 index 00000000000..09eeb438216 --- /dev/null +++ b/arch/powerpc/boot/dts/gef_sbc310.dts @@ -0,0 +1,364 @@ +/* + * GE Fanuc SBC310 Device Tree Source + * + * Copyright 2008 GE Fanuc Intelligent Platforms Embedded Systems, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * Based on: SBS CM6 Device Tree Source + * Copyright 2007 SBS Technologies GmbH & Co. KG + * And: mpc8641_hpcn.dts (MPC8641 HPCN Device Tree Source) + * Copyright 2006 Freescale Semiconductor Inc. + */ + +/* + * Compiled with dtc -I dts -O dtb -o gef_sbc310.dtb gef_sbc310.dts + */ + +/dts-v1/; + +/ { + model = "GEF_SBC310"; + compatible = "gef,sbc310"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + serial0 = &serial0; + serial1 = &serial1; + pci0 = &pci0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8641@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <32768>; // L1, 32K + i-cache-size = <32768>; // L1, 32K + timebase-frequency = <0>; // From uboot + bus-frequency = <0>; // From uboot + clock-frequency = <0>; // From uboot + }; + PowerPC,8641@1 { + device_type = "cpu"; + reg = <1>; + d-cache-line-size = <32>; // 32 bytes + i-cache-line-size = <32>; // 32 bytes + d-cache-size = <32768>; // L1, 32K + i-cache-size = <32768>; // L1, 32K + timebase-frequency = <0>; // From uboot + bus-frequency = <0>; // From uboot + clock-frequency = <0>; // From uboot + }; + }; + + memory { + device_type = "memory"; + reg = <0x0 0x40000000>; // set by uboot + }; + + localbus@fef05000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8641-localbus", "simple-bus"; + reg = <0xfef05000 0x1000>; + interrupts = <19 2>; + interrupt-parent = <&mpic>; + + ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash + 1 0 0xe0000000 0x08000000 // Paged Flash 0 + 2 0 0xe8000000 0x08000000 // Paged Flash 1 + 3 0 0xfc100000 0x00020000 // NVRAM + 4 0 0xfc000000 0x00010000>; // FPGA + + /* flash@0,0 is a mirror of part of the memory in flash@1,0 + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 0x01000000>; + bank-width = <2>; + device-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "firmware"; + reg = <0x00000000 0x01000000>; + read-only; + }; + }; + */ + + flash@1,0 { + compatible = "cfi-flash"; + reg = <1 0 0x8000000>; + bank-width = <2>; + device-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "user"; + reg = <0x00000000 0x07800000>; + }; + partition@7800000 { + label = "firmware"; + reg = <0x07800000 0x00800000>; + read-only; + }; + }; + + fpga@4,0 { + compatible = "gef,fpga-regs"; + reg = <0x4 0x0 0x40>; + }; + + wdt@4,2000 { + #interrupt-cells = <2>; + device_type = "watchdog"; + compatible = "gef,fpga-wdt"; + reg = <0x4 0x2000 0x8>; + interrupts = <0x1a 0x4>; + interrupt-parent = <&gef_pic>; + }; +/* + wdt@4,2010 { + #interrupt-cells = <2>; + device_type = "watchdog"; + compatible = "gef,fpga-wdt"; + reg = <0x4 0x2010 0x8>; + interrupts = <0x1b 0x4>; + interrupt-parent = <&gef_pic>; + }; +*/ + gef_pic: pic@4,4000 { + #interrupt-cells = <1>; + interrupt-controller; + compatible = "gef,fpga-pic"; + reg = <0x4 0x4000 0x20>; + interrupts = <0x8 + 0x9>; + interrupt-parent = <&mpic>; + + }; + gef_gpio: gpio@4,8000 { + #gpio-cells = <2>; + compatible = "gef,sbc310-gpio"; + reg = <0x4 0x8000 0x24>; + gpio-controller; + }; + }; + + soc@fef00000 { + #address-cells = <1>; + #size-cells = <1>; + #interrupt-cells = <2>; + device_type = "soc"; + compatible = "simple-bus"; + ranges = <0x0 0xfef00000 0x00100000>; + reg = <0xfef00000 0x100000>; // CCSRBAR 1M + bus-frequency = <33333333>; + + i2c1: i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <0x2b 0x2>; + interrupt-parent = <&mpic>; + dfsrr; + + rtc@51 { + compatible = "epson,rx8581"; + reg = <0x00000051>; + }; + }; + + i2c2: i2c@3100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl-i2c"; + reg = <0x3100 0x100>; + interrupts = <0x2b 0x2>; + interrupt-parent = <&mpic>; + dfsrr; + + hwmon@48 { + compatible = "national,lm92"; + reg = <0x48>; + }; + + hwmon@4c { + compatible = "adi,adt7461"; + reg = <0x4c>; + }; + + eti@6b { + compatible = "dallas,ds1682"; + reg = <0x6b>; + }; + }; + + dma@21300 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; + reg = <0x21300 0x4>; + ranges = <0x0 0x21100 0x200>; + cell-index = <0>; + dma-channel@0 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x0 0x80>; + cell-index = <0>; + interrupt-parent = <&mpic>; + interrupts = <20 2>; + }; + dma-channel@80 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x80 0x80>; + cell-index = <1>; + interrupt-parent = <&mpic>; + interrupts = <21 2>; + }; + dma-channel@100 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x100 0x80>; + cell-index = <2>; + interrupt-parent = <&mpic>; + interrupts = <22 2>; + }; + dma-channel@180 { + compatible = "fsl,mpc8641-dma-channel", + "fsl,eloplus-dma-channel"; + reg = <0x180 0x80>; + cell-index = <3>; + interrupt-parent = <&mpic>; + interrupts = <23 2>; + }; + }; + + mdio@24520 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + phy0: ethernet-phy@0 { + interrupt-parent = <&gef_pic>; + interrupts = <0x9 0x4>; + reg = <1>; + }; + phy2: ethernet-phy@2 { + interrupt-parent = <&gef_pic>; + interrupts = <0x8 0x4>; + reg = <3>; + }; + }; + + enet0: ethernet@24000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy0>; + phy-connection-type = "gmii"; + }; + + enet1: ethernet@26000 { + device_type = "network"; + model = "eTSEC"; + compatible = "gianfar"; + reg = <0x26000 0x1000>; + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x1f 0x2 0x20 0x2 0x21 0x2>; + interrupt-parent = <&mpic>; + phy-handle = <&phy2>; + phy-connection-type = "gmii"; + }; + + serial0: serial@4500 { + cell-index = <0>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4500 0x100>; + clock-frequency = <0>; + interrupts = <0x2a 0x2>; + interrupt-parent = <&mpic>; + }; + + serial1: serial@4600 { + cell-index = <1>; + device_type = "serial"; + compatible = "ns16550"; + reg = <0x4600 0x100>; + clock-frequency = <0>; + interrupts = <0x1c 0x2>; + interrupt-parent = <&mpic>; + }; + + mpic: pic@40000 { + clock-frequency = <0>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + reg = <0x40000 0x40000>; + compatible = "chrp,open-pic"; + device_type = "open-pic"; + }; + + global-utilities@e0000 { + compatible = "fsl,mpc8641-guts"; + reg = <0xe0000 0x1000>; + fsl,has-rstcr; + }; + }; + + pci0: pcie@fef08000 { + compatible = "fsl,mpc8641-pcie"; + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + reg = <0xfef08000 0x1000>; + bus-range = <0x0 0xff>; + ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x40000000 + 0x01000000 0x0 0x00000000 0xfe000000 0x0 0x00400000>; + clock-frequency = <33333333>; + interrupt-parent = <&mpic>; + interrupts = <0x18 0x2>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + 0x0000 0x0 0x0 0x1 &mpic 0x0 0x2 + 0x0000 0x0 0x0 0x2 &mpic 0x1 0x2 + 0x0000 0x0 0x0 0x3 &mpic 0x2 0x2 + 0x0000 0x0 0x0 0x4 &mpic 0x3 0x2 + >; + + pcie@0 { + reg = <0 0 0 0 0>; + #size-cells = <2>; + #address-cells = <3>; + device_type = "pci"; + ranges = <0x02000000 0x0 0x80000000 + 0x02000000 0x0 0x80000000 + 0x0 0x40000000 + + 0x01000000 0x0 0x00000000 + 0x01000000 0x0 0x00000000 + 0x0 0x00400000>; + }; + }; +}; -- cgit v1.2.3 From 9e7d95c1976fddfb4a3cf82a170a49e6fb0e8440 Mon Sep 17 00:00:00 2001 From: Reynes Philippe Date: Mon, 2 Feb 2009 15:52:39 +0100 Subject: powerpc/83xx: Add gpio to MPC837x RDB Signed-off-by: Philippe Reynes Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8377_rdb.dts | 18 ++++++++++++++++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 18 ++++++++++++++++++ arch/powerpc/boot/dts/mpc8379_rdb.dts | 18 ++++++++++++++++++ 3 files changed, 54 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 165463f7784..e747486f477 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -109,6 +109,24 @@ reg = <0x200 0x100>; }; + gpio1: gpio-controller@c00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + + gpio2: gpio-controller@d00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8377-gpio", "fsl,mpc8349-gpio"; + reg = <0xd00 0x100>; + interrupts = <75 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + i2c@3000 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index f9830aebe94..f4c86822bd3 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -109,6 +109,24 @@ reg = <0x200 0x100>; }; + gpio1: gpio-controller@c00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + + gpio2: gpio-controller@d00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8378-gpio", "fsl,mpc8349-gpio"; + reg = <0xd00 0x100>; + interrupts = <75 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + i2c@3000 { #address-cells = <1>; #size-cells = <0>; diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 2c06d39dbe9..1985cef32db 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -107,6 +107,24 @@ reg = <0x200 0x100>; }; + gpio1: gpio-controller@c00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; + reg = <0xc00 0x100>; + interrupts = <74 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + + gpio2: gpio-controller@d00 { + #gpio-cells = <2>; + compatible = "fsl,mpc8379-gpio", "fsl,mpc8349-gpio"; + reg = <0xd00 0x100>; + interrupts = <75 0x8>; + interrupt-parent = <&ipic>; + gpio-controller; + }; + i2c@3000 { #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3 From 7a3852417c0c9bdfebc1b37bf43d4798883867e0 Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Thu, 29 Jan 2009 14:23:21 +0100 Subject: powerpc/85xx: TQM85xx - fix sensitivity of CAN interrupts Signed-off-by: Wolfgang Grandegger Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/tqm8548-bigflash.dts | 4 ++-- arch/powerpc/boot/dts/tqm8548.dts | 4 ++-- arch/powerpc/boot/dts/tqm8560.dts | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 15086eb65c5..86ebbe9ca74 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -365,14 +365,14 @@ can0@2,0 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x0 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; can1@2,100 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x100 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index b7b65f5e79b..c7eb9216609 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -365,14 +365,14 @@ can0@2,0 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x0 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; can1@2,100 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x100 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index 9e1ab2d2f66..fe83d22118c 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts @@ -335,14 +335,14 @@ can0@2,0 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x0 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; can1@2,100 { compatible = "intel,82527"; // Bosch CC770 reg = <2 0x100 0x100>; - interrupts = <4 0>; + interrupts = <4 1>; interrupt-parent = <&mpic>; }; }; -- cgit v1.2.3 From 0f73a449a649acfca91404a98a35353a618b9555 Mon Sep 17 00:00:00 2001 From: Wolfgang Grandegger Date: Thu, 29 Jan 2009 13:49:17 +0100 Subject: powerpc/85xx: TQM85xx - add i2c device nodes for LM75 Automatic I2C device probing is not done any more. Therefore we need proper DTS device node definitions for the I2C LM75 thermal sensor on the TQM85xx modules. Signed-off-by: Wolfgang Grandegger Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/tqm8540.dts | 5 +++++ arch/powerpc/boot/dts/tqm8541.dts | 5 +++++ arch/powerpc/boot/dts/tqm8548-bigflash.dts | 5 +++++ arch/powerpc/boot/dts/tqm8548.dts | 5 +++++ arch/powerpc/boot/dts/tqm8555.dts | 5 +++++ arch/powerpc/boot/dts/tqm8560.dts | 5 +++++ 6 files changed, 30 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index a693f01c21a..39e55ab82b8 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts @@ -84,6 +84,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 9e3f5f0dde2..58ae8bc5881 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts @@ -83,6 +83,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts index 86ebbe9ca74..bff380a25aa 100644 --- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts @@ -85,6 +85,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts index c7eb9216609..112ac90f2ea 100644 --- a/arch/powerpc/boot/dts/tqm8548.dts +++ b/arch/powerpc/boot/dts/tqm8548.dts @@ -85,6 +85,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index cf92b4e7945..4b7da890c03 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts @@ -83,6 +83,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index fe83d22118c..3fa552f31ed 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts @@ -85,6 +85,11 @@ interrupt-parent = <&mpic>; dfsrr; + dtt@50 { + compatible = "national,lm75"; + reg = <0x50>; + }; + rtc@68 { compatible = "dallas,ds1337"; reg = <0x68>; -- cgit v1.2.3 From 960d82aa5ba971aa9da86a41881cb8dc8f96e397 Mon Sep 17 00:00:00 2001 From: Reynes Philippe Date: Mon, 2 Feb 2009 16:59:01 +0100 Subject: powerpc/83xx: Add lm75 to MPC837x RDB dts Signed-off-by: Philippe Reynes Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8377_rdb.dts | 5 +++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 5 +++++ arch/powerpc/boot/dts/mpc8379_rdb.dts | 5 +++++ 3 files changed, 15 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index e747486f477..54b452063ea 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -137,6 +137,11 @@ interrupt-parent = <&ipic>; dfsrr; + dtt@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + at24@50 { compatible = "at24,24c256"; reg = <0x50>; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index f4c86822bd3..7243374f502 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -137,6 +137,11 @@ interrupt-parent = <&ipic>; dfsrr; + dtt@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + at24@50 { compatible = "at24,24c256"; reg = <0x50>; diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 1985cef32db..6dac476a415 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -135,6 +135,11 @@ interrupt-parent = <&ipic>; dfsrr; + dtt@48 { + compatible = "national,lm75"; + reg = <0x48>; + }; + at24@50 { compatible = "at24,24c256"; reg = <0x50>; -- cgit v1.2.3 From 766d2826728e7233ce6728ee8a8b822ac655af3a Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 5 Feb 2009 22:04:51 +0300 Subject: powerpc/83xx: Convert existing sdhc nodes to new bindings - sdhc node renamed to sdhci ("sdhc" name is confusing since SDHC is used to name Secure Digital High Capacity cards, while SDHCI is an interface). - Get rid of "fsl,esdhc" compatible entry, it's replaced by the "fsl,-esdhc" scheme; - Get rid of `model' property. Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8377_mds.dts | 7 ++++--- arch/powerpc/boot/dts/mpc8378_mds.dts | 7 ++++--- arch/powerpc/boot/dts/mpc8379_mds.dts | 7 ++++--- 3 files changed, 12 insertions(+), 9 deletions(-) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index a519e8571e8..3e3ec8fdef4 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -313,12 +313,13 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; - sdhc@2e000 { - model = "eSDHC"; - compatible = "fsl,esdhc"; + sdhci@2e000 { + compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; reg = <0x2e000 0x1000>; interrupts = <42 0x8>; interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; }; sata@18000 { diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index 6bbee4989fb..c3b212cf902 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts @@ -313,12 +313,13 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; - sdhc@2e000 { - model = "eSDHC"; - compatible = "fsl,esdhc"; + sdhci@2e000 { + compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; reg = <0x2e000 0x1000>; interrupts = <42 0x8>; interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; }; /* IPIC diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index acf06c438db..1b61cda1eb4 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -310,12 +310,13 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; - sdhc@2e000 { - model = "eSDHC"; - compatible = "fsl,esdhc"; + sdhci@2e000 { + compatible = "fsl,mpc8379-esdhc"; reg = <0x2e000 0x1000>; interrupts = <42 0x8>; interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; }; sata@18000 { -- cgit v1.2.3 From a0e8618c71b9b685977c1407dee928d86c5bdc2c Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 5 Feb 2009 22:04:59 +0300 Subject: powerpc/83xx: Add FSL eSDHC support for MPC837x-RDB boards Simply add appropriate sdhci nodes. Note that U-Boot should configure pin multiplexing for eSDHC prior to Linux could use it. U-Boot should also fill-in the clock-frequency property (eSDHC clock depends on board-specific SCCR[ESDHCCM] bits). Signed-off-by: Anton Vorontsov Signed-off-by: Kumar Gala --- arch/powerpc/boot/dts/mpc8377_rdb.dts | 9 +++++++++ arch/powerpc/boot/dts/mpc8378_rdb.dts | 9 +++++++++ arch/powerpc/boot/dts/mpc8379_rdb.dts | 9 +++++++++ 3 files changed, 27 insertions(+) (limited to 'arch/powerpc/boot') diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 54b452063ea..fb1d884348e 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -320,6 +320,15 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; + sdhci@2e000 { + compatible = "fsl,mpc8377-esdhc", "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + sata@18000 { compatible = "fsl,mpc8377-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 7243374f502..37c8555cc8d 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -318,6 +318,15 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; + sdhci@2e000 { + compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + /* IPIC * interrupts cell = * sense values match linux IORESOURCE_IRQ_* defines: diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 6dac476a415..e2f98e6a51a 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -317,6 +317,15 @@ fsl,descriptor-types-mask = <0x3ab0ebf>; }; + sdhci@2e000 { + compatible = "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + }; + sata@18000 { compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; -- cgit v1.2.3