From 23f510bcd3a886a8a0b04ad0528006f5c309fcb8 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Sat, 17 Feb 2007 16:29:36 -0600 Subject: [POWERPC] 85xx: Renamed MPC8568 MDS board code to match other boards Renamed the MPC8568 MDS platform code to follow other 85xx boards. There isn't anything specific about the 8568 MDS code that wouldn't apply to another 85xx MDS system at this point. Signed-off-by: Kumar Gala --- arch/powerpc/platforms/85xx/Kconfig | 8 +- arch/powerpc/platforms/85xx/Makefile | 2 +- arch/powerpc/platforms/85xx/mpc8568_mds.c | 234 ------------------------------ arch/powerpc/platforms/85xx/mpc85xx_mds.c | 234 ++++++++++++++++++++++++++++++ 4 files changed, 239 insertions(+), 239 deletions(-) delete mode 100644 arch/powerpc/platforms/85xx/mpc8568_mds.c create mode 100644 arch/powerpc/platforms/85xx/mpc85xx_mds.c (limited to 'arch/powerpc/platforms/85xx') diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index 0efdd2f1bab..eb661ccf2da 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig @@ -23,12 +23,12 @@ config MPC85xx_CDS help This option enables support for the MPC85xx CDS board -config MPC8568_MDS - bool "Freescale MPC8568 MDS" +config MPC85xx_MDS + bool "Freescale MPC85xx MDS" select DEFAULT_UIMAGE # select QUICC_ENGINE help - This option enables support for the MPC8568 MDS board + This option enables support for the MPC85xx MDS board endchoice @@ -47,7 +47,7 @@ config MPC85xx bool select PPC_UDBG_16550 select PPC_INDIRECT_PCI - default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS + default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC85xx_MDS config PPC_INDIRECT_PCI_BE bool diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile index e40e521816b..4e63917ada9 100644 --- a/arch/powerpc/platforms/85xx/Makefile +++ b/arch/powerpc/platforms/85xx/Makefile @@ -5,4 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o -obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o +obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o diff --git a/arch/powerpc/platforms/85xx/mpc8568_mds.c b/arch/powerpc/platforms/85xx/mpc8568_mds.c deleted file mode 100644 index 0ba22a42f8d..00000000000 --- a/arch/powerpc/platforms/85xx/mpc8568_mds.c +++ /dev/null @@ -1,234 +0,0 @@ -/* - * Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved. - * - * Author: Andy Fleming - * - * Based on 83xx/mpc8360e_pb.c by: - * Li Yang - * Yin Olivia - * - * Description: - * MPC8568E MDS PB board specific routines. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation; either version 2 of the License, or (at your - * option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "mpc85xx.h" - -#undef DEBUG -#ifdef DEBUG -#define DBG(fmt...) udbg_printf(fmt) -#else -#define DBG(fmt...) -#endif - -#ifndef CONFIG_PCI -unsigned long isa_io_base = 0; -unsigned long isa_mem_base = 0; -#endif - -/* ************************************************************************ - * - * Setup the architecture - * - */ -static void __init mpc8568_mds_setup_arch(void) -{ - struct device_node *np; - static u8 *bcsr_regs = NULL; - - if (ppc_md.progress) - ppc_md.progress("mpc8568_mds_setup_arch()", 0); - - np = of_find_node_by_type(NULL, "cpu"); - if (np != NULL) { - const unsigned int *fp = - get_property(np, "clock-frequency", NULL); - if (fp != NULL) - loops_per_jiffy = *fp / HZ; - else - loops_per_jiffy = 50000000 / HZ; - of_node_put(np); - } - - /* Map BCSR area */ - np = of_find_node_by_name(NULL, "bcsr"); - if (np != NULL) { - struct resource res; - - of_address_to_resource(np, 0, &res); - bcsr_regs = ioremap(res.start, res.end - res.start +1); - of_node_put(np); - } - -#ifdef CONFIG_PCI - for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) { - add_bridge(np); - } - of_node_put(np); -#endif - -#ifdef CONFIG_QUICC_ENGINE - if ((np = of_find_node_by_name(NULL, "qe")) != NULL) { - qe_reset(); - of_node_put(np); - } - - if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { - struct device_node *ucc = NULL; - - par_io_init(np); - of_node_put(np); - - for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;) - par_io_of_config(ucc); - - of_node_put(ucc); - } - - if (bcsr_regs) { - u8 bcsr_phy; - - /* Reset the Ethernet PHY */ - bcsr_phy = in_be8(&bcsr_regs[9]); - bcsr_phy &= ~0x20; - out_be8(&bcsr_regs[9], bcsr_phy); - - udelay(1000); - - bcsr_phy = in_be8(&bcsr_regs[9]); - bcsr_phy |= 0x20; - out_be8(&bcsr_regs[9], bcsr_phy); - - iounmap(bcsr_regs); - } - -#endif /* CONFIG_QUICC_ENGINE */ -} - -static struct of_device_id mpc8568_ids[] = { - { .type = "soc", }, - { .compatible = "soc", }, - { .type = "qe", }, - {}, -}; - -static int __init mpc8568_publish_devices(void) -{ - if (!machine_is(mpc8568_mds)) - return 0; - - /* Publish the QE devices */ - of_platform_bus_probe(NULL,mpc8568_ids,NULL); - - return 0; -} -device_initcall(mpc8568_publish_devices); - -static void __init mpc8568_mds_pic_init(void) -{ - struct mpic *mpic; - struct resource r; - struct device_node *np = NULL; - - np = of_find_node_by_type(NULL, "open-pic"); - if (!np) - return; - - if (of_address_to_resource(np, 0, &r)) { - printk(KERN_ERR "Failed to map mpic register space\n"); - of_node_put(np); - return; - } - - mpic = mpic_alloc(np, r.start, - MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, - 4, 0, " OpenPIC "); - BUG_ON(mpic == NULL); - of_node_put(np); - - /* Internal Interrupts */ - mpic_assign_isu(mpic, 0, r.start + 0x10200); - mpic_assign_isu(mpic, 1, r.start + 0x10280); - mpic_assign_isu(mpic, 2, r.start + 0x10300); - mpic_assign_isu(mpic, 3, r.start + 0x10380); - mpic_assign_isu(mpic, 4, r.start + 0x10400); - mpic_assign_isu(mpic, 5, r.start + 0x10480); - mpic_assign_isu(mpic, 6, r.start + 0x10500); - mpic_assign_isu(mpic, 7, r.start + 0x10580); - mpic_assign_isu(mpic, 8, r.start + 0x10600); - mpic_assign_isu(mpic, 9, r.start + 0x10680); - mpic_assign_isu(mpic, 10, r.start + 0x10700); - mpic_assign_isu(mpic, 11, r.start + 0x10780); - - /* External Interrupts */ - mpic_assign_isu(mpic, 12, r.start + 0x10000); - mpic_assign_isu(mpic, 13, r.start + 0x10080); - mpic_assign_isu(mpic, 14, r.start + 0x10100); - - mpic_init(mpic); - -#ifdef CONFIG_QUICC_ENGINE - np = of_find_node_by_type(NULL, "qeic"); - if (!np) - return; - - qe_ic_init(np, 0); - of_node_put(np); -#endif /* CONFIG_QUICC_ENGINE */ -} - -static int __init mpc8568_mds_probe(void) -{ - unsigned long root = of_get_flat_dt_root(); - - return of_flat_dt_is_compatible(root, "MPC85xxMDS"); -} - -define_machine(mpc8568_mds) { - .name = "MPC85xx MDS", - .probe = mpc8568_mds_probe, - .setup_arch = mpc8568_mds_setup_arch, - .init_IRQ = mpc8568_mds_pic_init, - .get_irq = mpic_get_irq, - .restart = mpc85xx_restart, - .calibrate_decr = generic_calibrate_decr, - .progress = udbg_progress, -}; diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c new file mode 100644 index 00000000000..81144d2ae45 --- /dev/null +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -0,0 +1,234 @@ +/* + * Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved. + * + * Author: Andy Fleming + * + * Based on 83xx/mpc8360e_pb.c by: + * Li Yang + * Yin Olivia + * + * Description: + * MPC85xx MDS board specific routines. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mpc85xx.h" + +#undef DEBUG +#ifdef DEBUG +#define DBG(fmt...) udbg_printf(fmt) +#else +#define DBG(fmt...) +#endif + +#ifndef CONFIG_PCI +unsigned long isa_io_base = 0; +unsigned long isa_mem_base = 0; +#endif + +/* ************************************************************************ + * + * Setup the architecture + * + */ +static void __init mpc85xx_mds_setup_arch(void) +{ + struct device_node *np; + static u8 *bcsr_regs = NULL; + + if (ppc_md.progress) + ppc_md.progress("mpc85xx_mds_setup_arch()", 0); + + np = of_find_node_by_type(NULL, "cpu"); + if (np != NULL) { + const unsigned int *fp = + get_property(np, "clock-frequency", NULL); + if (fp != NULL) + loops_per_jiffy = *fp / HZ; + else + loops_per_jiffy = 50000000 / HZ; + of_node_put(np); + } + + /* Map BCSR area */ + np = of_find_node_by_name(NULL, "bcsr"); + if (np != NULL) { + struct resource res; + + of_address_to_resource(np, 0, &res); + bcsr_regs = ioremap(res.start, res.end - res.start +1); + of_node_put(np); + } + +#ifdef CONFIG_PCI + for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) { + add_bridge(np); + } + of_node_put(np); +#endif + +#ifdef CONFIG_QUICC_ENGINE + if ((np = of_find_node_by_name(NULL, "qe")) != NULL) { + qe_reset(); + of_node_put(np); + } + + if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) { + struct device_node *ucc = NULL; + + par_io_init(np); + of_node_put(np); + + for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;) + par_io_of_config(ucc); + + of_node_put(ucc); + } + + if (bcsr_regs) { + u8 bcsr_phy; + + /* Reset the Ethernet PHY */ + bcsr_phy = in_be8(&bcsr_regs[9]); + bcsr_phy &= ~0x20; + out_be8(&bcsr_regs[9], bcsr_phy); + + udelay(1000); + + bcsr_phy = in_be8(&bcsr_regs[9]); + bcsr_phy |= 0x20; + out_be8(&bcsr_regs[9], bcsr_phy); + + iounmap(bcsr_regs); + } + +#endif /* CONFIG_QUICC_ENGINE */ +} + +static struct of_device_id mpc85xx_ids[] = { + { .type = "soc", }, + { .compatible = "soc", }, + { .type = "qe", }, + {}, +}; + +static int __init mpc85xx_publish_devices(void) +{ + if (!machine_is(mpc85xx_mds)) + return 0; + + /* Publish the QE devices */ + of_platform_bus_probe(NULL,mpc85xx_ids,NULL); + + return 0; +} +device_initcall(mpc85xx_publish_devices); + +static void __init mpc85xx_mds_pic_init(void) +{ + struct mpic *mpic; + struct resource r; + struct device_node *np = NULL; + + np = of_find_node_by_type(NULL, "open-pic"); + if (!np) + return; + + if (of_address_to_resource(np, 0, &r)) { + printk(KERN_ERR "Failed to map mpic register space\n"); + of_node_put(np); + return; + } + + mpic = mpic_alloc(np, r.start, + MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, + 4, 0, " OpenPIC "); + BUG_ON(mpic == NULL); + of_node_put(np); + + /* Internal Interrupts */ + mpic_assign_isu(mpic, 0, r.start + 0x10200); + mpic_assign_isu(mpic, 1, r.start + 0x10280); + mpic_assign_isu(mpic, 2, r.start + 0x10300); + mpic_assign_isu(mpic, 3, r.start + 0x10380); + mpic_assign_isu(mpic, 4, r.start + 0x10400); + mpic_assign_isu(mpic, 5, r.start + 0x10480); + mpic_assign_isu(mpic, 6, r.start + 0x10500); + mpic_assign_isu(mpic, 7, r.start + 0x10580); + mpic_assign_isu(mpic, 8, r.start + 0x10600); + mpic_assign_isu(mpic, 9, r.start + 0x10680); + mpic_assign_isu(mpic, 10, r.start + 0x10700); + mpic_assign_isu(mpic, 11, r.start + 0x10780); + + /* External Interrupts */ + mpic_assign_isu(mpic, 12, r.start + 0x10000); + mpic_assign_isu(mpic, 13, r.start + 0x10080); + mpic_assign_isu(mpic, 14, r.start + 0x10100); + + mpic_init(mpic); + +#ifdef CONFIG_QUICC_ENGINE + np = of_find_node_by_type(NULL, "qeic"); + if (!np) + return; + + qe_ic_init(np, 0); + of_node_put(np); +#endif /* CONFIG_QUICC_ENGINE */ +} + +static int __init mpc85xx_mds_probe(void) +{ + unsigned long root = of_get_flat_dt_root(); + + return of_flat_dt_is_compatible(root, "MPC85xxMDS"); +} + +define_machine(mpc85xx_mds) { + .name = "MPC85xx MDS", + .probe = mpc85xx_mds_probe, + .setup_arch = mpc85xx_mds_setup_arch, + .init_IRQ = mpc85xx_mds_pic_init, + .get_irq = mpic_get_irq, + .restart = mpc85xx_restart, + .calibrate_decr = generic_calibrate_decr, + .progress = udbg_progress, +}; -- cgit v1.2.3