From 7dffb72028bfd909ac51a1546d182de2df4d2426 Mon Sep 17 00:00:00 2001
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Mon, 17 Oct 2005 11:50:32 +1000
Subject: ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES

instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
 arch/ppc/platforms/pmac_sleep.S | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'arch/ppc/platforms/pmac_sleep.S')

diff --git a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S
index 88419c77ac4..22b113d19b2 100644
--- a/arch/ppc/platforms/pmac_sleep.S
+++ b/arch/ppc/platforms/pmac_sleep.S
@@ -387,10 +387,10 @@ turn_on_mmu:
 #endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */
 
 	.section .data
-	.balign	L1_CACHE_LINE_SIZE
+	.balign	L1_CACHE_BYTES
 sleep_storage:
 	.long 0
-	.balign	L1_CACHE_LINE_SIZE, 0
+	.balign	L1_CACHE_BYTES, 0
 
 #endif /* CONFIG_6xx */
 	.section .text
-- 
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