From 314ef6859750b6539eac48d78059bb7986f29cb1 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 4 Feb 2006 00:10:01 -0800 Subject: [SPARC64]: Refine register window trap handling. When saving and restoing trap state, do the window spill/fill handling inline so that we never trap deeper than 2 trap levels. This is important for chips like Niagara. The window fixup code is massively simplified, and many more improvements are now possible. Signed-off-by: David S. Miller --- arch/sparc64/kernel/tsb.S | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/sparc64/kernel/tsb.S') diff --git a/arch/sparc64/kernel/tsb.S b/arch/sparc64/kernel/tsb.S index 28e38b168dd..3b45db98005 100644 --- a/arch/sparc64/kernel/tsb.S +++ b/arch/sparc64/kernel/tsb.S @@ -115,7 +115,6 @@ sparc64_realfault_common: ba,pt %xcc, rtrap_clr_l6 ! Restore cpu state nop ! Delay slot (fill me) - .globl winfix_trampoline winfix_trampoline: rdpr %tpc, %g3 ! Prepare winfixup TNPC or %g3, 0x7c, %g3 ! Compute branch offset -- cgit v1.2.3