From 39a51109dd14001185b0cd122ca46cce1d0795bf Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 29 Jan 2008 10:14:59 +0000 Subject: [MIPS] Extend performance counter event field. The latest draft version of the MIPS Architecture Specification extends the 6 bit event field by adding a directly adjacent 4-bit EventExt field for a total of 10 bits. Signed-off-by: Ralf Baechle --- arch/mips/oprofile/op_model_mipsxx.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index bdfa07aecd9..ccbea229a0e 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -19,7 +19,7 @@ #define M_PERFCTL_SUPERVISOR (1UL << 2) #define M_PERFCTL_USER (1UL << 3) #define M_PERFCTL_INTERRUPT_ENABLE (1UL << 4) -#define M_PERFCTL_EVENT(event) (((event) & 0x3f) << 5) +#define M_PERFCTL_EVENT(event) (((event) & 0x3ff) << 5) #define M_PERFCTL_VPEID(vpe) ((vpe) << 16) #define M_PERFCTL_MT_EN(filter) ((filter) << 20) #define M_TC_EN_ALL M_PERFCTL_MT_EN(0) -- cgit v1.2.3