From c4982887cacf2122bc256e901598b58caf4a34be Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 24 Jun 2005 20:54:35 +0100 Subject: [PATCH] ARM: 2744/1: ixp2000 gpio irq support Patch from Lennert Buytenhek This patch cleans up the ixp2000 gpio irq code and implements the set_irq_type method for gpio irqs so that users can select for which events (falling edge/rising edge/level low/level high) on the gpio pin they want the corresponding gpio irq to be triggered. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- arch/arm/mach-ixp2000/core.c | 85 ++++++++++++++++++++++++++++++++++---------- 1 file changed, 67 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ixp2000/core.c b/arch/arm/mach-ixp2000/core.c index fc0555596d6..0ee34acb8d7 100644 --- a/arch/arm/mach-ixp2000/core.c +++ b/arch/arm/mach-ixp2000/core.c @@ -40,6 +40,8 @@ #include #include +#include + static DEFINE_SPINLOCK(ixp2000_slowport_lock); static unsigned long ixp2000_slowport_irq_flags; @@ -179,7 +181,7 @@ static int ixp2000_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) /* clear timer 1 */ ixp2000_reg_write(IXP2000_T1_CLR, 1); - + while ((next_jiffy_time - *missing_jiffy_timer_csr) > ticks_per_jiffy) { timer_tick(regs); next_jiffy_time -= ticks_per_jiffy; @@ -238,35 +240,40 @@ void __init ixp2000_init_time(unsigned long tick_rate) /************************************************************************* * GPIO helpers *************************************************************************/ -static unsigned long GPIO_IRQ_rising_edge; static unsigned long GPIO_IRQ_falling_edge; +static unsigned long GPIO_IRQ_rising_edge; static unsigned long GPIO_IRQ_level_low; static unsigned long GPIO_IRQ_level_high; -void gpio_line_config(int line, int style) +static void update_gpio_int_csrs(void) +{ + ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge); + ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge); + ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low); + ixp2000_reg_write(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high); +} + +void gpio_line_config(int line, int direction) { unsigned long flags; local_irq_save(flags); + if (direction == GPIO_OUT) { + irq_desc[line + IRQ_IXP2000_GPIO0].valid = 0; - if(style == GPIO_OUT) { /* if it's an output, it ain't an interrupt anymore */ - ixp2000_reg_write(IXP2000_GPIO_PDSR, (1 << line)); GPIO_IRQ_falling_edge &= ~(1 << line); GPIO_IRQ_rising_edge &= ~(1 << line); GPIO_IRQ_level_low &= ~(1 << line); GPIO_IRQ_level_high &= ~(1 << line); - ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge); - ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge); - ixp2000_reg_write(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high); - ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low); - irq_desc[line+IRQ_IXP2000_GPIO0].valid = 0; - } else if(style == GPIO_IN) { - ixp2000_reg_write(IXP2000_GPIO_PDCR, (1 << line)); + update_gpio_int_csrs(); + + ixp2000_reg_write(IXP2000_GPIO_PDSR, 1 << line); + } else if (direction == GPIO_IN) { + ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line); } - local_irq_restore(flags); -} +} /************************************************************************* @@ -285,9 +292,50 @@ static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irqdesc *desc, str } } +static int ixp2000_GPIO_irq_type(unsigned int irq, unsigned int type) +{ + int line = irq - IRQ_IXP2000_GPIO0; + + /* + * First, configure this GPIO line as an input. + */ + ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line); + + /* + * Then, set the proper trigger type. + */ + if (type & IRQT_FALLING) + GPIO_IRQ_falling_edge |= 1 << line; + else + GPIO_IRQ_falling_edge &= ~(1 << line); + if (type & IRQT_RISING) + GPIO_IRQ_rising_edge |= 1 << line; + else + GPIO_IRQ_rising_edge &= ~(1 << line); + if (type & IRQT_LOW) + GPIO_IRQ_level_low |= 1 << line; + else + GPIO_IRQ_level_low &= ~(1 << line); + if (type & IRQT_HIGH) + GPIO_IRQ_level_high |= 1 << line; + else + GPIO_IRQ_level_high &= ~(1 << line); + update_gpio_int_csrs(); + + /* + * Finally, mark the corresponding IRQ as valid. + */ + irq_desc[irq].valid = 1; + + return 0; +} + static void ixp2000_GPIO_irq_mask_ack(unsigned int irq) { ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); + + ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); + ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); ixp2000_reg_write(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0))); } @@ -302,6 +350,7 @@ static void ixp2000_GPIO_irq_unmask(unsigned int irq) } static struct irqchip ixp2000_GPIO_irq_chip = { + .type = ixp2000_GPIO_irq_type, .ack = ixp2000_GPIO_irq_mask_ack, .mask = ixp2000_GPIO_irq_mask, .unmask = ixp2000_GPIO_irq_unmask @@ -338,7 +387,7 @@ static void ixp2000_irq_mask(unsigned int irq) static void ixp2000_irq_unmask(unsigned int irq) { - ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq)); + ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << irq)); } static struct irqchip ixp2000_irq_chip = { @@ -375,16 +424,16 @@ void __init ixp2000_init_irq(void) * our mask/unmask code much simpler. */ for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { - if((1 << irq) & IXP2000_VALID_IRQ_MASK) { + if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { set_irq_chip(irq, &ixp2000_irq_chip); set_irq_handler(irq, do_level_IRQ); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } - + /* * GPIO IRQs are invalid until someone sets the interrupt mode - * by calling gpio_line_set(); + * by calling set_irq_type(). */ for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { set_irq_chip(irq, &ixp2000_GPIO_irq_chip); -- cgit v1.2.3 From 5932ae3f5d610fd8d047ef4693bab9f084e5c56d Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Fri, 24 Jun 2005 20:54:35 +0100 Subject: [PATCH] ARM: 2745/1: Fix IXP4xx debug macros Patch from Deepak Saxena Current IXP4xx debug macros do not work in the small window between the MMU being enabled and the call to map_io() b/c the standard peripheral mapping is not properly setup for use with the low-level debug code. This patch creates a new section-aligned mapping for the UART specifically for use with the debug macros. Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- arch/arm/mach-ixp4xx/common.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 267ba02d77d..f39e8408488 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -141,7 +141,15 @@ static struct map_desc ixp4xx_io_desc[] __initdata = { .physical = IXP4XX_PCI_CFG_BASE_PHYS, .length = IXP4XX_PCI_CFG_REGION_SIZE, .type = MT_DEVICE + }, +#ifdef CONFIG_DEBUG_LL + { /* Debug UART mapping */ + .virtual = IXP4XX_DEBUG_UART_BASE_VIRT, + .physical = IXP4XX_DEBUG_UART_BASE_PHYS, + .length = IXP4XX_DEBUG_UART_REGION_SIZE, + .type = MT_DEVICE } +#endif }; void __init ixp4xx_map_io(void) -- cgit v1.2.3 From 79042f087b5ac7bba819de03dc3e7462bab8aad9 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Fri, 24 Jun 2005 21:27:39 +0100 Subject: [PATCH] ARM: 2698/1: Enable kernel r/w access to user pages on ARMv6 Patch from Catalin Marinas cpu_v6_set_pte() sets the kernel access rights to r/o for user pages (L_PTE_USER) when neither L_PTE_WRITE nor L_PTE_DIRTY are set. This causes a kernel data abort when writing the TLS value in the 0xffff0000 page. This patch enables the kernel r/w access. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/mm/proc-v6.S | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 0aa73d41478..e3d8510f434 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -132,8 +132,8 @@ ENTRY(cpu_v6_switch_mm) * 100x 1 0 1 r/o no acc * 10x0 1 0 1 r/o no acc * 1011 0 0 1 r/w no acc - * 110x 1 1 0 r/o r/o - * 11x0 1 1 0 r/o r/o + * 110x 0 1 0 r/w r/o + * 11x0 0 1 0 r/w r/o * 1111 0 1 1 r/w r/w */ ENTRY(cpu_v6_set_pte) @@ -150,7 +150,7 @@ ENTRY(cpu_v6_set_pte) tst r1, #L_PTE_USER orrne r2, r2, #AP1 | nG tstne r2, #APX - eorne r2, r2, #AP0 + bicne r2, r2, #APX | AP0 tst r1, #L_PTE_YOUNG biceq r2, r2, #APX | AP1 | AP0 -- cgit v1.2.3