From 0695de32579edefd137f7e9fa056e6d204011d70 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 7 May 2007 18:24:14 -0700 Subject: ARM: OMAP: Fix warning in dma.c Fix warning: 'offset' might be uninitialized Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 2d86b106ff3..55a4d3be16b 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -747,7 +747,7 @@ int omap_set_dma_callback(int lch, */ dma_addr_t omap_get_dma_src_pos(int lch) { - dma_addr_t offset; + dma_addr_t offset = 0; if (cpu_class_is_omap1()) offset = (dma_addr_t) (OMAP1_DMA_CSSA_L_REG(lch) | @@ -769,7 +769,7 @@ dma_addr_t omap_get_dma_src_pos(int lch) */ dma_addr_t omap_get_dma_dst_pos(int lch) { - dma_addr_t offset; + dma_addr_t offset = 0; if (cpu_class_is_omap1()) offset = (dma_addr_t) (OMAP1_DMA_CDSA_L_REG(lch) | -- cgit v1.2.3 From d30c7369666ff1687f668ea5a65b99d1f7e06144 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 10 May 2007 15:50:16 -0700 Subject: ARM: OMAP: Remove old PM_SUSPEND_DISK Remove old PM_SUSPEND_DISK. Also some minor cosmetic clean-up. Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/pm.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 6f4ea4bda5e..8caee68aa09 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c @@ -1,4 +1,3 @@ -//kernel/linux-omap-fsample/arch/arm/mach-omap1/pm.c#3 - integrate change 4545 (text) /* * linux/arch/arm/mach-omap1/pm.c * @@ -377,7 +376,7 @@ void omap_pm_suspend(void) * Jump to assembly code. The processor will stay there * until wake up. */ - omap_sram_suspend(arg0, arg1); + omap_sram_suspend(arg0, arg1); /* * If we are here, processor is woken up! @@ -631,10 +630,6 @@ static int omap_pm_prepare(suspend_state_t state) case PM_SUSPEND_STANDBY: case PM_SUSPEND_MEM: break; - - case PM_SUSPEND_DISK: - return -ENOTSUPP; - default: return -EINVAL; } @@ -657,10 +652,6 @@ static int omap_pm_enter(suspend_state_t state) case PM_SUSPEND_MEM: omap_pm_suspend(); break; - - case PM_SUSPEND_DISK: - return -ENOTSUPP; - default: return -EINVAL; } -- cgit v1.2.3 From 7bbb3cc5c816fc167601ce9519adae5eced3ea6d Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Wed, 6 Dec 2006 17:13:54 -0800 Subject: ARM: OMAP: 24xx pinmux updates Add some OMAP 24xx pin mux declarations to support: - TUSB 6010 EVM (on H4) - All three full speed USB ports - GPIOs used with USB0 on Apollon and H4 For OMAP2, issue MUX_WARNINGS and debug messages correctly; and make the message look more like the OMAP1 message. Signed-off-by: Kyungmin Park Signed-off-by: David Brownell Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/mux.c | 33 +++++++++++++++++++++++++++++++-- arch/arm/plat-omap/mux.c | 19 +++++++++++++++---- 2 files changed, 46 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c index f538d0fdb13..0439906d5da 100644 --- a/arch/arm/mach-omap2/mux.c +++ b/arch/arm/mach-omap2/mux.c @@ -43,7 +43,7 @@ struct pin_config __initdata_or_module omap24xx_pins[] = { /* 24xx I2C */ MUX_CFG_24XX("M19_24XX_I2C1_SCL", 0x111, 0, 0, 0, 1) MUX_CFG_24XX("L15_24XX_I2C1_SDA", 0x112, 0, 0, 0, 1) -MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 0, 1) +MUX_CFG_24XX("J15_24XX_I2C2_SCL", 0x113, 0, 0, 1, 1) MUX_CFG_24XX("H19_24XX_I2C2_SDA", 0x114, 0, 0, 0, 1) /* Menelaus interrupt */ @@ -52,7 +52,9 @@ MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) /* 24xx clocks */ MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) -/* 24xx GPMC wait pin monitoring */ +/* 24xx GPMC chipselects, wait pin monitoring */ +MUX_CFG_24XX("E2_GPMC_NCS2", 0x08e, 0, 1, 1, 1) +MUX_CFG_24XX("L2_GPMC_NCS7", 0x093, 0, 1, 1, 1) MUX_CFG_24XX("L3_GPMC_WAIT0", 0x09a, 0, 1, 1, 1) MUX_CFG_24XX("N7_GPMC_WAIT1", 0x09b, 0, 1, 1, 1) MUX_CFG_24XX("M1_GPMC_WAIT2", 0x09c, 0, 1, 1, 1) @@ -66,6 +68,7 @@ MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) /* 24xx GPIO */ MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) +MUX_CFG_24XX("P21_242X_GPIO12", 0x0ca, 3, 0, 0, 1) MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) @@ -75,7 +78,9 @@ MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) +MUX_CFG_24XX("J15_24XX_GPIO99", 0x113, 3, 1, 1, 1) MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) +MUX_CFG_24XX("P14_24XX_GPIO125", 0x140, 3, 1, 1, 1) /* 242x DBG GPIO */ MUX_CFG_24XX("V4_242X_GPIO49", 0xd3, 3, 0, 0, 1) @@ -118,6 +123,30 @@ MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1) MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1) MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1) +/* Full speed USB */ +MUX_CFG_24XX("J20_24XX_USB0_PUEN", 0x11d, 0, 0, 0, 1) +MUX_CFG_24XX("J19_24XX_USB0_VP", 0x11e, 0, 0, 0, 1) +MUX_CFG_24XX("K20_24XX_USB0_VM", 0x11f, 0, 0, 0, 1) +MUX_CFG_24XX("J18_24XX_USB0_RCV", 0x120, 0, 0, 0, 1) +MUX_CFG_24XX("K19_24XX_USB0_TXEN", 0x121, 0, 0, 0, 1) +MUX_CFG_24XX("J14_24XX_USB0_SE0", 0x122, 0, 0, 0, 1) +MUX_CFG_24XX("K18_24XX_USB0_DAT", 0x123, 0, 0, 0, 1) + +MUX_CFG_24XX("N14_24XX_USB1_SE0", 0x0ed, 2, 0, 0, 1) +MUX_CFG_24XX("W12_24XX_USB1_SE0", 0x0dd, 3, 0, 0, 1) +MUX_CFG_24XX("P15_24XX_USB1_DAT", 0x0ee, 2, 0, 0, 1) +MUX_CFG_24XX("R13_24XX_USB1_DAT", 0x0e0, 3, 0, 0, 1) +MUX_CFG_24XX("W20_24XX_USB1_TXEN", 0x0ec, 2, 0, 0, 1) +MUX_CFG_24XX("P13_24XX_USB1_TXEN", 0x0df, 3, 0, 0, 1) +MUX_CFG_24XX("V19_24XX_USB1_RCV", 0x0eb, 2, 0, 0, 1) +MUX_CFG_24XX("V12_24XX_USB1_RCV", 0x0de, 3, 0, 0, 1) + +MUX_CFG_24XX("AA10_24XX_USB2_SE0", 0x0e5, 2, 0, 0, 1) +MUX_CFG_24XX("Y11_24XX_USB2_DAT", 0x0e8, 2, 0, 0, 1) +MUX_CFG_24XX("AA12_24XX_USB2_TXEN", 0x0e9, 2, 0, 0, 1) +MUX_CFG_24XX("AA6_24XX_USB2_RCV", 0x0e6, 2, 0, 0, 1) +MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0", 0x0e7, 2, 0, 0, 1) + /* Keypad GPIO*/ MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1) MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1) diff --git a/arch/arm/plat-omap/mux.c b/arch/arm/plat-omap/mux.c index 6c798d28868..75211f20ccb 100644 --- a/arch/arm/plat-omap/mux.c +++ b/arch/arm/plat-omap/mux.c @@ -83,10 +83,21 @@ int __init_or_module omap_cfg_reg(const unsigned long index) reg |= OMAP24XX_PULL_ENA; if(cfg->pu_pd_val) reg |= OMAP24XX_PULL_UP; -#ifdef CONFIG_OMAP_MUX_DEBUG - printk("Muxing %s (0x%08x): 0x%02x -> 0x%02x\n", - cfg->name, OMAP24XX_L4_BASE + cfg->mux_reg, - omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg), reg); +#if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS) + { + u8 orig = omap_readb(OMAP24XX_L4_BASE + cfg->mux_reg); + u8 debug = 0; + +#ifdef CONFIG_OMAP_MUX_DEBUG + debug = cfg->debug; +#endif + warn = (orig != reg); + if (debug || warn) + printk("MUX: setup %s (0x%08x): 0x%02x -> 0x%02x\n", + cfg->name, + OMAP24XX_L4_BASE + cfg->mux_reg, + orig, reg); + } #endif omap_writeb(reg, OMAP24XX_L4_BASE + cfg->mux_reg); -- cgit v1.2.3 From e3318fb40092fecbf5069e7a5daa0040a427d1b4 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 10 May 2007 16:32:54 -0700 Subject: ARM: OMAP: Fix section mismatch warning Fix section mismatch warning Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/board-h2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c index ad519390dd5..48c8c9195dc 100644 --- a/arch/arm/mach-omap1/board-h2.c +++ b/arch/arm/mach-omap1/board-h2.c @@ -326,7 +326,7 @@ static struct omap_lcd_config h2_lcd_config __initdata = { .ctrl_name = "internal", }; -static struct omap_board_config_kernel h2_config[] = { +static struct omap_board_config_kernel h2_config[] __initdata = { { OMAP_TAG_USB, &h2_usb_config }, { OMAP_TAG_MMC, &h2_mmc_config }, { OMAP_TAG_UART, &h2_uart_config }, -- cgit v1.2.3 From c7b87f3d5037a35b5c7bb916ffc826be3fcb208d Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 10 May 2007 16:46:13 +0100 Subject: [ARM] ecard: add helper function for setting ecard irq ops Rather than having every driver fiddle about setting its private IRQ operations and data, provide a helper function to contain this functionality in one place. Arrange to remove the driver-private IRQ operations and data when the device is removed from the driver, and remove the driver private code to do this. This fixes potential problems caused by drivers forgetting to remove these hooks. Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'arch') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index bdbd7da9928..65f1398723a 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -958,6 +958,14 @@ void ecard_release_resources(struct expansion_card *ec) } EXPORT_SYMBOL(ecard_release_resources); +void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *ops, void *irq_data) +{ + ec->irq_data = irq_data; + barrier(); + ec->ops = ops; +} +EXPORT_SYMBOL(ecard_setirq); + /* * Probe for an expansion card. * @@ -1133,6 +1141,14 @@ static int ecard_drv_remove(struct device *dev) drv->remove(ec); ecard_release(ec); + /* + * Restore the default operations. We ensure that the + * ops are set before we change the data. + */ + ec->ops = &ecard_default_ops; + barrier(); + ec->irq_data = NULL; + return 0; } -- cgit v1.2.3 From 10bdaaa0fad620145cf10e2b573266b2d80b44de Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 10 May 2007 18:40:51 +0100 Subject: [ARM] ecard: add ecardm_iomap() / ecardm_iounmap() Add devres ecardm_iomap() and ecardm_iounmap() for Acorn expansion cards. Convert all expansion card drivers to use them. Signed-off-by: Russell King --- arch/arm/kernel/ecard.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/kernel/ecard.c b/arch/arm/kernel/ecard.c index 65f1398723a..f56d48c451e 100644 --- a/arch/arm/kernel/ecard.c +++ b/arch/arm/kernel/ecard.c @@ -41,11 +41,11 @@ #include #include #include +#include #include #include #include -#include #include #include #include @@ -966,6 +966,23 @@ void ecard_setirq(struct expansion_card *ec, const struct expansion_card_ops *op } EXPORT_SYMBOL(ecard_setirq); +void __iomem *ecardm_iomap(struct expansion_card *ec, unsigned int res, + unsigned long offset, unsigned long maxsize) +{ + unsigned long start = ecard_resource_start(ec, res); + unsigned long end = ecard_resource_end(ec, res); + + if (offset > (end - start)) + return NULL; + + start += offset; + if (maxsize && end - start > maxsize) + end = start + maxsize; + + return devm_ioremap(&ec->dev, start, end - start); +} +EXPORT_SYMBOL(ecardm_iomap); + /* * Probe for an expansion card. * -- cgit v1.2.3 From c9184f58cac9efa5d7d90a0e979f398a99d91641 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=BCrgen=20Schindele?= Date: Mon, 7 May 2007 19:48:44 +0100 Subject: [ARM] 4362/1: trizeps4 update This update for trizeps4 SoM contains: - support for new TFT on more recent ConXS evalboard - correct partition of flash device - update of "trizeps4_defconfig" Signed-off-by: Jrgen Schindele (linux@schindele.name) Signed-off-by: Russell King --- arch/arm/configs/trizeps4_defconfig | 532 ++++++++++++++++++++++-------------- arch/arm/mach-pxa/trizeps4.c | 62 ++++- 2 files changed, 378 insertions(+), 216 deletions(-) (limited to 'arch') diff --git a/arch/arm/configs/trizeps4_defconfig b/arch/arm/configs/trizeps4_defconfig index a6698dc4f6b..6db6392806f 100644 --- a/arch/arm/configs/trizeps4_defconfig +++ b/arch/arm/configs/trizeps4_defconfig @@ -1,15 +1,27 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.17 -# Sat Jun 24 22:45:14 2006 +# Linux kernel version: 2.6.21 +# Mon Apr 30 21:23:20 2007 # CONFIG_ARM=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_GENERIC_GPIO=y +CONFIG_GENERIC_TIME=y CONFIG_MMU=y +# CONFIG_NO_IOPORT is not set +CONFIG_GENERIC_HARDIRQS=y +CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_GENERIC_IRQ_PROBE=y CONFIG_RWSEM_GENERIC_SPINLOCK=y +# CONFIG_ARCH_HAS_ILOG2_U32 is not set +# CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y CONFIG_ARCH_MTD_XIP=y CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # # Code maturity level options @@ -26,18 +38,25 @@ CONFIG_LOCALVERSION="" CONFIG_LOCALVERSION_AUTO=y CONFIG_SWAP=y CONFIG_SYSVIPC=y +# CONFIG_IPC_NS is not set +CONFIG_SYSVIPC_SYSCTL=y CONFIG_POSIX_MQUEUE=y CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_SYSCTL=y -CONFIG_AUDIT=y +# CONFIG_TASKSTATS is not set +# CONFIG_UTS_NS is not set +# CONFIG_AUDIT is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y +CONFIG_SYSFS_DEPRECATED=y # CONFIG_RELAY is not set +CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" -CONFIG_UID16=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_SYSCTL=y CONFIG_EMBEDDED=y +CONFIG_UID16=y +CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_EXTRA_PASS=y CONFIG_HOTPLUG=y @@ -49,10 +68,11 @@ CONFIG_FUTEX=y CONFIG_EPOLL=y CONFIG_SHMEM=y CONFIG_SLAB=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_RT_MUTEXES=y # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 # CONFIG_SLOB is not set -CONFIG_OBSOLETE_INTERMODULE=y # # Loadable module support @@ -60,14 +80,17 @@ CONFIG_OBSOLETE_INTERMODULE=y CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MODVERSIONS is not set +CONFIG_MODVERSIONS=y CONFIG_MODULE_SRCVERSION_ALL=y CONFIG_KMOD=y # # Block layer # +CONFIG_BLOCK=y +CONFIG_LBD=y # CONFIG_BLK_DEV_IO_TRACE is not set +CONFIG_LSF=y # # IO Schedulers @@ -85,18 +108,29 @@ CONFIG_DEFAULT_IOSCHED="anticipatory" # # System Type # +# CONFIG_ARCH_AAEC2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_REALVIEW is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_AT91 is not set # CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_IOP3XX is not set +# CONFIG_ARCH_NETX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_IOP32X is not set +# CONFIG_ARCH_IOP33X is not set +# CONFIG_ARCH_IOP13XX is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP23XX is not set # CONFIG_ARCH_L7200 is not set +# CONFIG_ARCH_NS9XXX is not set +# CONFIG_ARCH_PNX4008 is not set CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set @@ -104,12 +138,6 @@ CONFIG_ARCH_PXA=y # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_AT91RM9200 is not set # # Intel PXA2xx Implementations @@ -133,11 +161,16 @@ CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y # # Processor Features # CONFIG_ARM_THUMB=y +# CONFIG_CPU_DCACHE_DISABLE is not set +# CONFIG_OUTER_CACHE is not set +CONFIG_IWMMXT=y CONFIG_XSCALE_PMU=y # @@ -147,16 +180,16 @@ CONFIG_XSCALE_PMU=y # # PCCARD (PCMCIA/CardBus) support # -CONFIG_PCCARD=m +CONFIG_PCCARD=y # CONFIG_PCMCIA_DEBUG is not set -CONFIG_PCMCIA=m -CONFIG_PCMCIA_LOAD_CIS=y +CONFIG_PCMCIA=y +# CONFIG_PCMCIA_LOAD_CIS is not set CONFIG_PCMCIA_IOCTL=y # # PC-card bridges # -CONFIG_PCMCIA_PXA2XX=m +CONFIG_PCMCIA_PXA2XX=y # # Kernel Features @@ -164,7 +197,8 @@ CONFIG_PCMCIA_PXA2XX=m CONFIG_PREEMPT=y # CONFIG_NO_IDLE_HZ is not set CONFIG_HZ=100 -# CONFIG_AEABI is not set +CONFIG_AEABI=y +CONFIG_OABI_COMPAT=y # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y @@ -174,6 +208,8 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y # CONFIG_SPARSEMEM_STATIC is not set CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 CONFIG_LEDS=y CONFIG_LEDS_TIMER=y CONFIG_LEDS_CPU=y @@ -184,8 +220,9 @@ CONFIG_ALIGNMENT_TRAP=y # CONFIG_ZBOOT_ROM_TEXT=0 CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_CMDLINE="root=/dev/nfs ip=bootp console=ttyS0,115200n8" +CONFIG_CMDLINE="root=fe01 console=ttyS0,38400n8 loglevel=5" # CONFIG_XIP_KERNEL is not set +# CONFIG_KEXEC is not set # # Floating point emulation @@ -203,16 +240,16 @@ CONFIG_FPE_NWFPE_XP=y # CONFIG_BINFMT_ELF=y # CONFIG_BINFMT_AOUT is not set -CONFIG_BINFMT_MISC=m -# CONFIG_ARTHUR is not set +# CONFIG_BINFMT_MISC is not set # # Power management options # CONFIG_PM=y -CONFIG_PM_LEGACY=y +# CONFIG_PM_LEGACY is not set # CONFIG_PM_DEBUG is not set -CONFIG_APM=y +# CONFIG_PM_SYSFS_DEPRECATED is not set +# CONFIG_APM_EMULATION is not set # # Networking @@ -222,13 +259,15 @@ CONFIG_NET=y # # Networking options # -# CONFIG_NETDEBUG is not set CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y CONFIG_XFRM=y CONFIG_XFRM_USER=m +# CONFIG_XFRM_SUB_POLICY is not set +# CONFIG_XFRM_MIGRATE is not set CONFIG_NET_KEY=y +# CONFIG_NET_KEY_MIGRATE is not set CONFIG_INET=y # CONFIG_IP_MULTICAST is not set # CONFIG_IP_ADVANCED_ROUTER is not set @@ -246,24 +285,25 @@ CONFIG_IP_PNP_BOOTP=y # CONFIG_INET_IPCOMP is not set # CONFIG_INET_XFRM_TUNNEL is not set # CONFIG_INET_TUNNEL is not set +CONFIG_INET_XFRM_MODE_TRANSPORT=y +CONFIG_INET_XFRM_MODE_TUNNEL=y +CONFIG_INET_XFRM_MODE_BEET=y CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y # CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_BIC=y +CONFIG_TCP_CONG_CUBIC=y +CONFIG_DEFAULT_TCP_CONG="cubic" +# CONFIG_TCP_MD5SIG is not set # # IP: Virtual Server Configuration # # CONFIG_IP_VS is not set -CONFIG_IPV6=m -# CONFIG_IPV6_PRIVACY is not set -# CONFIG_IPV6_ROUTER_PREF is not set -# CONFIG_INET6_AH is not set -# CONFIG_INET6_ESP is not set -# CONFIG_INET6_IPCOMP is not set +# CONFIG_IPV6 is not set # CONFIG_INET6_XFRM_TUNNEL is not set # CONFIG_INET6_TUNNEL is not set -# CONFIG_IPV6_TUNNEL is not set +# CONFIG_NETLABEL is not set +# CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set @@ -271,29 +311,16 @@ CONFIG_NETFILTER=y # Core Netfilter Configuration # # CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NF_CONNTRACK_ENABLED is not set +# CONFIG_NF_CONNTRACK is not set # CONFIG_NETFILTER_XTABLES is not set # # IP: Netfilter Configuration # -CONFIG_IP_NF_CONNTRACK=m -CONFIG_IP_NF_CT_ACCT=y -CONFIG_IP_NF_CONNTRACK_MARK=y -# CONFIG_IP_NF_CONNTRACK_EVENTS is not set -# CONFIG_IP_NF_CT_PROTO_SCTP is not set -CONFIG_IP_NF_FTP=m -CONFIG_IP_NF_IRC=m -# CONFIG_IP_NF_NETBIOS_NS is not set -CONFIG_IP_NF_TFTP=m -CONFIG_IP_NF_AMANDA=m -# CONFIG_IP_NF_PPTP is not set -# CONFIG_IP_NF_H323 is not set CONFIG_IP_NF_QUEUE=m - -# -# IPv6: Netfilter Configuration (EXPERIMENTAL) -# -# CONFIG_IP6_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set # # DCCP Configuration (EXPERIMENTAL) @@ -318,7 +345,6 @@ CONFIG_VLAN_8021Q=m # CONFIG_ATALK is not set # CONFIG_X25 is not set # CONFIG_LAPB is not set -# CONFIG_NET_DIVERT is not set # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set @@ -378,6 +404,7 @@ CONFIG_IRTTY_SIR=m # CONFIG_USB_IRDA is not set # CONFIG_SIGMATEL_FIR is not set # CONFIG_PXA_FICP is not set +# CONFIG_MCS_FIR is not set CONFIG_BT=m CONFIG_BT_L2CAP=m CONFIG_BT_SCO=m @@ -401,14 +428,20 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HCIBLUECARD is not set # CONFIG_BT_HCIBTUART is not set # CONFIG_BT_HCIVHCI is not set -CONFIG_IEEE80211=m +# CONFIG_AF_RXRPC is not set + +# +# Wireless +# +CONFIG_CFG80211=y +CONFIG_WIRELESS_EXT=y +CONFIG_IEEE80211=y # CONFIG_IEEE80211_DEBUG is not set -CONFIG_IEEE80211_CRYPT_WEP=m +CONFIG_IEEE80211_CRYPT_WEP=y CONFIG_IEEE80211_CRYPT_CCMP=m CONFIG_IEEE80211_CRYPT_TKIP=m CONFIG_IEEE80211_SOFTMAC=m # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set -CONFIG_WIRELESS_EXT=y # # Device Drivers @@ -420,16 +453,13 @@ CONFIG_WIRELESS_EXT=y CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y +# CONFIG_SYS_HYPERVISOR is not set # # Connector - unified userspace <-> kernelspace linker # CONFIG_CONNECTOR=y CONFIG_PROC_EVENTS=y - -# -# Memory Technology Devices (MTD) -# CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set CONFIG_MTD_CONCAT=y @@ -445,12 +475,13 @@ CONFIG_MTD_REDBOOT_PARTS_READONLY=y # User Modules And Translation Layers # CONFIG_MTD_CHAR=y +CONFIG_MTD_BLKDEVS=y CONFIG_MTD_BLOCK=y # CONFIG_FTL is not set -CONFIG_NFTL=y -CONFIG_NFTL_RW=y -CONFIG_INFTL=y +# CONFIG_NFTL is not set +# CONFIG_INFTL is not set # CONFIG_RFD_FTL is not set +# CONFIG_SSFDC is not set # # RAM/ROM/Flash chip drivers @@ -490,9 +521,8 @@ CONFIG_MTD_CFI_UTIL=y CONFIG_MTD_COMPLEX_MAPPINGS=y CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_START=0x0 -CONFIG_MTD_PHYSMAP_LEN=0x4000000 +CONFIG_MTD_PHYSMAP_LEN=0x0 CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_TRIZEPS4 is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_IMPA7 is not set # CONFIG_MTD_SHARP_SL is not set @@ -501,42 +531,45 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # # Self-contained MTD device drivers # -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set +CONFIG_MTD_BLOCK2MTD=y # # Disk-On-Chip Device Drivers # -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set +CONFIG_MTD_DOC2000=y +CONFIG_MTD_DOC2001=y CONFIG_MTD_DOC2001PLUS=y CONFIG_MTD_DOCPROBE=y CONFIG_MTD_DOCECC=y -# CONFIG_MTD_DOCPROBE_ADVANCED is not set -CONFIG_MTD_DOCPROBE_ADDRESS=0 - -# -# NAND Flash Device Drivers -# +CONFIG_MTD_DOCPROBE_ADVANCED=y +CONFIG_MTD_DOCPROBE_ADDRESS=0x4000000 +CONFIG_MTD_DOCPROBE_HIGH=y +# CONFIG_MTD_DOCPROBE_55AA is not set CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set +# CONFIG_MTD_NAND_ECC_SMC is not set +# CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_H1900 is not set CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_DISKONCHIP=y -# CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED is not set -CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 -# CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE is not set +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADVANCED=y +CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0x4000000 +CONFIG_MTD_NAND_DISKONCHIP_PROBE_HIGH=y +CONFIG_MTD_NAND_DISKONCHIP_BBTWRITE=y # CONFIG_MTD_NAND_SHARPSL is not set # CONFIG_MTD_NAND_NANDSIM is not set +CONFIG_MTD_ONENAND=y +# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set +# CONFIG_MTD_ONENAND_GENERIC is not set +# CONFIG_MTD_ONENAND_OTP is not set # -# OneNAND Flash Device Drivers +# UBI - Unsorted block images # -# CONFIG_MTD_ONENAND is not set +# CONFIG_MTD_UBI is not set # # Parallel port support @@ -546,6 +579,7 @@ CONFIG_MTD_NAND_DISKONCHIP_PROBE_ADDRESS=0 # # Plug and Play support # +# CONFIG_PNPACPI is not set # # Block devices @@ -556,9 +590,9 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m CONFIG_BLK_DEV_NBD=y # CONFIG_BLK_DEV_UB is not set CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=4 +CONFIG_BLK_DEV_RAM_COUNT=8 CONFIG_BLK_DEV_RAM_SIZE=4096 -CONFIG_BLK_DEV_INITRD=y +CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set @@ -566,6 +600,7 @@ CONFIG_BLK_DEV_INITRD=y # ATA/ATAPI/MFM/RLL support # CONFIG_IDE=y +CONFIG_IDE_MAX_HWIFS=4 CONFIG_BLK_DEV_IDE=y # @@ -585,27 +620,27 @@ CONFIG_BLK_DEV_IDECS=m # IDE chipset support/bugfixes # CONFIG_IDE_GENERIC=y -CONFIG_IDE_PXA_CF=y -CONFIG_IDE_ARM=y +# CONFIG_IDE_ARM is not set # CONFIG_BLK_DEV_IDEDMA is not set -# CONFIG_IDEDMA_AUTO is not set # CONFIG_BLK_DEV_HD is not set # # SCSI device support # # CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=m +CONFIG_SCSI=y +# CONFIG_SCSI_TGT is not set +# CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # # SCSI support type (disk, tape, CD-ROM) # -CONFIG_BLK_DEV_SD=m +CONFIG_BLK_DEV_SD=y # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set -CONFIG_CHR_DEV_SG=m +CONFIG_CHR_DEV_SG=y # CONFIG_CHR_DEV_SCH is not set # @@ -614,21 +649,23 @@ CONFIG_CHR_DEV_SG=m CONFIG_SCSI_MULTI_LUN=y # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set +# CONFIG_SCSI_SCAN_ASYNC is not set # -# SCSI Transport Attributes +# SCSI Transports # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set # CONFIG_SCSI_SAS_ATTRS is not set +# CONFIG_SCSI_SAS_LIBSAS is not set # # SCSI low-level drivers # # CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_SATA is not set # CONFIG_SCSI_DEBUG is not set +# CONFIG_SCSI_ESP_CORE is not set # # PCMCIA SCSI adapter support @@ -639,6 +676,14 @@ CONFIG_SCSI_MULTI_LUN=y # CONFIG_PCMCIA_QLOGIC is not set # CONFIG_PCMCIA_SYM53C500 is not set +# +# Serial ATA (prod) and Parallel ATA (experimental) drivers +# +CONFIG_ATA=m +# CONFIG_ATA_NONSTANDARD is not set +CONFIG_PATA_PCMCIA=m +CONFIG_PATA_PLATFORM=m + # # Multi-device support (RAID and LVM) # @@ -675,10 +720,14 @@ CONFIG_PHYLIB=y # MII PHY device drivers # # CONFIG_MARVELL_PHY is not set -CONFIG_DAVICOM_PHY=y +# CONFIG_DAVICOM_PHY is not set # CONFIG_QSEMI_PHY is not set # CONFIG_LXT_PHY is not set # CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set +# CONFIG_FIXED_PHY is not set # # Ethernet (10 or 100Mbit) @@ -687,6 +736,7 @@ CONFIG_NET_ETHERNET=y CONFIG_MII=y # CONFIG_SMC91X is not set CONFIG_DM9000=y +# CONFIG_SMC911X is not set # # Ethernet (1000 Mbit) @@ -701,41 +751,23 @@ CONFIG_DM9000=y # # -# Wireless LAN (non-hamradio) -# -CONFIG_NET_RADIO=y -# CONFIG_NET_WIRELESS_RTNETLINK is not set - -# -# Obsolete Wireless cards support (pre-802.11) -# -# CONFIG_STRIP is not set -# CONFIG_PCMCIA_WAVELAN is not set -# CONFIG_PCMCIA_NETWAVE is not set - -# -# Wireless 802.11 Frequency Hopping cards support +# Wireless LAN # +# CONFIG_WLAN_PRE80211 is not set +CONFIG_WLAN_80211=y # CONFIG_PCMCIA_RAYCS is not set - -# -# Wireless 802.11b ISA/PCI cards support -# -CONFIG_HERMES=m +CONFIG_HERMES=y # CONFIG_ATMEL is not set - -# -# Wireless 802.11b Pcmcia/Cardbus cards support -# -CONFIG_PCMCIA_HERMES=m -# CONFIG_PCMCIA_SPECTRUM is not set -CONFIG_AIRO_CS=m +CONFIG_PCMCIA_HERMES=y +CONFIG_PCMCIA_SPECTRUM=y +# CONFIG_AIRO_CS is not set # CONFIG_PCMCIA_WL3501 is not set -CONFIG_HOSTAP=m +# CONFIG_USB_ZD1201 is not set +CONFIG_HOSTAP=y CONFIG_HOSTAP_FIRMWARE=y CONFIG_HOSTAP_FIRMWARE_NVRAM=y -CONFIG_HOSTAP_CS=m -CONFIG_NET_WIRELESS=y +CONFIG_HOSTAP_CS=y +# CONFIG_ZD1211RW is not set # # PCMCIA network device support @@ -756,6 +788,7 @@ CONFIG_PPP_BSDCOMP=m CONFIG_PPP_MPPE=m # CONFIG_PPPOE is not set # CONFIG_SLIP is not set +CONFIG_SLHC=m # CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set # CONFIG_NETPOLL is not set @@ -770,6 +803,7 @@ CONFIG_PPP_MPPE=m # Input device support # CONFIG_INPUT=y +# CONFIG_INPUT_FF_MEMLESS is not set # # Userland interfaces @@ -789,22 +823,27 @@ CONFIG_INPUT_EVDEV=y # Input Device Drivers # CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y +CONFIG_KEYBOARD_ATKBD=m # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set +# CONFIG_KEYBOARD_STOWAWAY is not set +# CONFIG_KEYBOARD_GPIO is not set CONFIG_INPUT_MOUSE=y # CONFIG_MOUSE_PS2 is not set -CONFIG_MOUSE_SERIAL=y +CONFIG_MOUSE_SERIAL=m # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_INPUT_JOYSTICK is not set CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_MK712 is not set +# CONFIG_TOUCHSCREEN_PENMOUNT is not set +# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set +# CONFIG_TOUCHSCREEN_TOUCHWIN is not set +CONFIG_TOUCHSCREEN_UCB1400=y CONFIG_INPUT_MISC=y CONFIG_INPUT_UINPUT=m @@ -823,6 +862,7 @@ CONFIG_SERIO_LIBPS2=y CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y +# CONFIG_VT_HW_CONSOLE_BINDING is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -862,14 +902,11 @@ CONFIG_SA1100_WATCHDOG=y # USB-based Watchdog Cards # # CONFIG_USBPCWATCHDOG is not set +CONFIG_HW_RANDOM=y # CONFIG_NVRAM is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set -# -# Ftape, the floppy tape device driver -# - # # PCMCIA character devices # @@ -882,7 +919,6 @@ CONFIG_SA1100_WATCHDOG=y # TPM devices # # CONFIG_TCG_TPM is not set -# CONFIG_TELCLOCK is not set # # I2C support @@ -902,6 +938,7 @@ CONFIG_I2C_CHARDEV=y # CONFIG_I2C_PXA=y CONFIG_I2C_PXA_SLAVE=y +# CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT_LIGHT is not set # CONFIG_I2C_STUB is not set # CONFIG_I2C_PCA_ISA is not set @@ -911,7 +948,7 @@ CONFIG_I2C_PXA_SLAVE=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_SENSORS_EEPROM=m +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -924,18 +961,8 @@ CONFIG_SENSORS_EEPROM=m # # SPI support # -CONFIG_SPI=y -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -CONFIG_SPI_PXA2XX=m - -# -# SPI Protocol Masters -# +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set # # Dallas's 1-wire bus @@ -947,9 +974,11 @@ CONFIG_SPI_PXA2XX=m # CONFIG_HWMON=y # CONFIG_HWMON_VID is not set +# CONFIG_SENSORS_ABITUGURU is not set # CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set +# CONFIG_SENSORS_ADM1029 is not set # CONFIG_SENSORS_ADM1031 is not set # CONFIG_SENSORS_ADM9240 is not set # CONFIG_SENSORS_ASB100 is not set @@ -973,10 +1002,15 @@ CONFIG_HWMON=y # CONFIG_SENSORS_LM92 is not set # CONFIG_SENSORS_MAX1619 is not set # CONFIG_SENSORS_PC87360 is not set +# CONFIG_SENSORS_PC87427 is not set # CONFIG_SENSORS_SMSC47M1 is not set +# CONFIG_SENSORS_SMSC47M192 is not set # CONFIG_SENSORS_SMSC47B397 is not set +# CONFIG_SENSORS_VT1211 is not set # CONFIG_SENSORS_W83781D is not set +# CONFIG_SENSORS_W83791D is not set # CONFIG_SENSORS_W83792D is not set +# CONFIG_SENSORS_W83793 is not set # CONFIG_SENSORS_W83L785TS is not set # CONFIG_SENSORS_W83627HF is not set # CONFIG_SENSORS_W83627EHF is not set @@ -987,16 +1021,15 @@ CONFIG_HWMON=y # # -# Multimedia Capabilities Port drivers +# Multifunction device drivers # -CONFIG_UCB1400=y -CONFIG_UCB1400_TS=y +# CONFIG_MFD_SM501 is not set # # LED devices # CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS is not set # # LED drivers @@ -1007,13 +1040,13 @@ CONFIG_LEDS_CLASS=y # CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_IDE_DISK=y +# CONFIG_LEDS_TRIGGER_IDE_DISK is not set +CONFIG_LEDS_TRIGGER_HEARTBEAT=y # # Multimedia devices # # CONFIG_VIDEO_DEV is not set -CONFIG_VIDEO_V4L2=y # # Digital Video Broadcasting Devices @@ -1024,17 +1057,28 @@ CONFIG_VIDEO_V4L2=y # # Graphics support # +CONFIG_BACKLIGHT_LCD_SUPPORT=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_LCD_CLASS_DEVICE=y CONFIG_FB=y +CONFIG_FIRMWARE_EDID=y +# CONFIG_FB_DDC is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y +# CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set -CONFIG_FB_FIRMWARE_EDID=y +# CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set + +# +# Frame buffer hardware drivers +# # CONFIG_FB_S1D13XXX is not set CONFIG_FB_PXA=y # CONFIG_FB_PXA_PARAMETERS is not set +# CONFIG_FB_MBX is not set # CONFIG_FB_VIRTUAL is not set # @@ -1063,11 +1107,6 @@ CONFIG_LOGO=y CONFIG_LOGO_LINUX_MONO=y CONFIG_LOGO_LINUX_VGA16=y CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_DEVICE=y -CONFIG_LCD_CLASS_DEVICE=y -CONFIG_LCD_DEVICE=y # # Sound @@ -1082,7 +1121,7 @@ CONFIG_SND_TIMER=y CONFIG_SND_PCM=y CONFIG_SND_HWDEP=m CONFIG_SND_RAWMIDI=m -CONFIG_SND_SEQUENCER=m +CONFIG_SND_SEQUENCER=y # CONFIG_SND_SEQ_DUMMY is not set CONFIG_SND_OSSEMUL=y CONFIG_SND_MIXER_OSS=y @@ -1093,13 +1132,14 @@ CONFIG_SND_PCM_OSS_PLUGINS=y CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y CONFIG_SND_VERBOSE_PRINTK=y -# CONFIG_SND_DEBUG is not set +CONFIG_SND_DEBUG=y +CONFIG_SND_DEBUG_DETECT=y +# CONFIG_SND_PCM_XRUN_DEBUG is not set # # Generic devices # CONFIG_SND_AC97_CODEC=y -CONFIG_SND_AC97_BUS=y # CONFIG_SND_DUMMY is not set # CONFIG_SND_VIRMIDI is not set # CONFIG_SND_MTPAV is not set @@ -1123,10 +1163,33 @@ CONFIG_SND_USB_AUDIO=m # CONFIG_SND_VXPOCKET is not set # CONFIG_SND_PDAUDIOCF is not set +# +# SoC audio support +# +# CONFIG_SND_SOC is not set + # # Open Sound System # # CONFIG_SOUND_PRIME is not set +CONFIG_AC97_BUS=y + +# +# HID Devices +# +CONFIG_HID=y +# CONFIG_HID_DEBUG is not set + +# +# USB Input Devices +# +# CONFIG_USB_HID is not set + +# +# USB HID Boot Protocol drivers +# +# CONFIG_USB_KBD is not set +# CONFIG_USB_MOUSE is not set # # USB support @@ -1141,7 +1204,7 @@ CONFIG_USB=y # Miscellaneous USB options # CONFIG_USB_DEVICEFS=y -# CONFIG_USB_BANDWIDTH is not set +# CONFIG_USB_DEVICE_CLASS is not set # CONFIG_USB_DYNAMIC_MINORS is not set # CONFIG_USB_SUSPEND is not set # CONFIG_USB_OTG is not set @@ -1151,7 +1214,8 @@ CONFIG_USB_DEVICEFS=y # # CONFIG_USB_ISP116X_HCD is not set CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_SL811_HCD is not set @@ -1179,38 +1243,25 @@ CONFIG_USB_STORAGE=m # CONFIG_USB_STORAGE_SDDR55 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_STORAGE_ALAUDA is not set +# CONFIG_USB_STORAGE_KARMA is not set # CONFIG_USB_LIBUSUAL is not set # # USB Input Devices # -CONFIG_USB_HID=m -CONFIG_USB_HIDINPUT=y -# CONFIG_USB_HIDINPUT_POWERBOOK is not set -# CONFIG_HID_FF is not set -# CONFIG_USB_HIDDEV is not set - -# -# USB HID Boot Protocol drivers -# -# CONFIG_USB_KBD is not set -# CONFIG_USB_MOUSE is not set # CONFIG_USB_AIPTEK is not set # CONFIG_USB_WACOM is not set # CONFIG_USB_ACECAD is not set # CONFIG_USB_KBTAB is not set # CONFIG_USB_POWERMATE is not set -CONFIG_USB_TOUCHSCREEN=m -# CONFIG_USB_TOUCHSCREEN_EGALAX is not set -# CONFIG_USB_TOUCHSCREEN_PANJIT is not set -# CONFIG_USB_TOUCHSCREEN_3M is not set -# CONFIG_USB_TOUCHSCREEN_ITM is not set +# CONFIG_USB_TOUCHSCREEN is not set # CONFIG_USB_YEALINK is not set # CONFIG_USB_XPAD is not set # CONFIG_USB_ATI_REMOTE is not set # CONFIG_USB_ATI_REMOTE2 is not set # CONFIG_USB_KEYSPAN_REMOTE is not set # CONFIG_USB_APPLETOUCH is not set +# CONFIG_USB_GTCO is not set # # USB Imaging devices @@ -1225,9 +1276,9 @@ CONFIG_USB_TOUCHSCREEN=m # CONFIG_USB_KAWETH is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_RTL8150 is not set +# CONFIG_USB_USBNET_MII is not set # CONFIG_USB_USBNET is not set -# CONFIG_USB_ZD1201 is not set -CONFIG_USB_MON=y +# CONFIG_USB_MON is not set # # USB port drivers @@ -1236,23 +1287,66 @@ CONFIG_USB_MON=y # # USB Serial Converter support # -# CONFIG_USB_SERIAL is not set +CONFIG_USB_SERIAL=m +# CONFIG_USB_SERIAL_GENERIC is not set +# CONFIG_USB_SERIAL_AIRCABLE is not set +# CONFIG_USB_SERIAL_AIRPRIME is not set +# CONFIG_USB_SERIAL_ARK3116 is not set +# CONFIG_USB_SERIAL_BELKIN is not set +# CONFIG_USB_SERIAL_WHITEHEAT is not set +# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set +# CONFIG_USB_SERIAL_CP2101 is not set +# CONFIG_USB_SERIAL_CYPRESS_M8 is not set +# CONFIG_USB_SERIAL_EMPEG is not set +# CONFIG_USB_SERIAL_FTDI_SIO is not set +# CONFIG_USB_SERIAL_FUNSOFT is not set +# CONFIG_USB_SERIAL_VISOR is not set +# CONFIG_USB_SERIAL_IPAQ is not set +# CONFIG_USB_SERIAL_IR is not set +# CONFIG_USB_SERIAL_EDGEPORT is not set +# CONFIG_USB_SERIAL_EDGEPORT_TI is not set +# CONFIG_USB_SERIAL_GARMIN is not set +# CONFIG_USB_SERIAL_IPW is not set +# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set +# CONFIG_USB_SERIAL_KEYSPAN is not set +# CONFIG_USB_SERIAL_KLSI is not set +# CONFIG_USB_SERIAL_KOBIL_SCT is not set +# CONFIG_USB_SERIAL_MCT_U232 is not set +# CONFIG_USB_SERIAL_MOS7720 is not set +# CONFIG_USB_SERIAL_MOS7840 is not set +# CONFIG_USB_SERIAL_NAVMAN is not set +# CONFIG_USB_SERIAL_PL2303 is not set +# CONFIG_USB_SERIAL_HP4X is not set +# CONFIG_USB_SERIAL_SAFE is not set +# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set +# CONFIG_USB_SERIAL_TI is not set +# CONFIG_USB_SERIAL_CYBERJACK is not set +# CONFIG_USB_SERIAL_XIRCOM is not set +# CONFIG_USB_SERIAL_OPTION is not set +# CONFIG_USB_SERIAL_OMNINET is not set +# CONFIG_USB_SERIAL_DEBUG is not set # # USB Miscellaneous drivers # # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set +# CONFIG_USB_ADUTUX is not set # CONFIG_USB_AUERSWALD is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set +# CONFIG_USB_BERRY_CHARGE is not set # CONFIG_USB_LED is not set +# CONFIG_USB_CYPRESS_CY7C63 is not set # CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGETKIT is not set -# CONFIG_USB_PHIDGETSERVO is not set +# CONFIG_USB_PHIDGET is not set # CONFIG_USB_IDMOUSE is not set +# CONFIG_USB_FTDI_ELAN is not set +# CONFIG_USB_APPLEDISPLAY is not set # CONFIG_USB_LD is not set +# CONFIG_USB_TRANCEVIBRATOR is not set +# CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # @@ -1262,9 +1356,10 @@ CONFIG_USB_MON=y # # USB Gadget Support # -CONFIG_USB_GADGET=y +CONFIG_USB_GADGET=m # CONFIG_USB_GADGET_DEBUG_FILES is not set CONFIG_USB_GADGET_SELECTED=y +# CONFIG_USB_GADGET_FSL_USB2 is not set # CONFIG_USB_GADGET_NET2280 is not set # CONFIG_USB_GADGET_PXA2XX is not set # CONFIG_USB_GADGET_GOKU is not set @@ -1272,15 +1367,14 @@ CONFIG_USB_GADGET_SELECTED=y # CONFIG_USB_GADGET_OMAP is not set # CONFIG_USB_GADGET_AT91 is not set CONFIG_USB_GADGET_DUMMY_HCD=y -CONFIG_USB_DUMMY_HCD=y +CONFIG_USB_DUMMY_HCD=m CONFIG_USB_GADGET_DUALSPEED=y # CONFIG_USB_ZERO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -CONFIG_USB_G_SERIAL=m +# CONFIG_USB_ETH is not set +# CONFIG_USB_GADGETFS is not set +# CONFIG_USB_FILE_STORAGE is not set +# CONFIG_USB_G_SERIAL is not set +# CONFIG_USB_MIDI_GADGET is not set # # MMC/SD Card support @@ -1295,8 +1389,8 @@ CONFIG_MMC_PXA=y # CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_HCTOSYS is not set +# CONFIG_RTC_DEBUG is not set # # RTC interfaces @@ -1304,17 +1398,25 @@ CONFIG_RTC_HCTOSYS_DEVICE="rtc0" CONFIG_RTC_INTF_SYSFS=y CONFIG_RTC_INTF_PROC=y CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set # # RTC drivers # +# CONFIG_RTC_DRV_CMOS is not set # CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_DS1307 is not set +# CONFIG_RTC_DRV_DS1553 is not set +# CONFIG_RTC_DRV_ISL1208 is not set # CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_PCF8563 is not set +CONFIG_RTC_DRV_PCF8583=m # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_M48T86 is not set CONFIG_RTC_DRV_SA1100=y # CONFIG_RTC_DRV_TEST is not set +# CONFIG_RTC_DRV_V3020 is not set # # File systems @@ -1328,6 +1430,7 @@ CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y CONFIG_EXT3_FS_POSIX_ACL=y CONFIG_EXT3_FS_SECURITY=y +# CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y # CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y @@ -1335,10 +1438,12 @@ CONFIG_FS_MBCACHE=y # CONFIG_JFS_FS is not set CONFIG_FS_POSIX_ACL=y # CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set CONFIG_INOTIFY=y +CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set @@ -1365,8 +1470,10 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-15" # Pseudo filesystems # CONFIG_PROC_FS=y +CONFIG_PROC_SYSCTL=y CONFIG_SYSFS=y CONFIG_TMPFS=y +# CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set CONFIG_RAMFS=y # CONFIG_CONFIGFS_FS is not set @@ -1376,18 +1483,17 @@ CONFIG_RAMFS=y # # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set +# CONFIG_ECRYPT_FS is not set # CONFIG_HFS_FS is not set # CONFIG_HFSPLUS_FS is not set # CONFIG_BEFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EFS_FS is not set -CONFIG_JFFS_FS=y -CONFIG_JFFS_FS_VERBOSE=0 -CONFIG_JFFS_PROC_FS=y CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_DEBUG=0 CONFIG_JFFS2_FS_WRITEBUFFER=y # CONFIG_JFFS2_SUMMARY is not set +# CONFIG_JFFS2_FS_XATTR is not set CONFIG_JFFS2_COMPRESSION_OPTIONS=y CONFIG_JFFS2_ZLIB=y CONFIG_JFFS2_RTIME=y @@ -1407,20 +1513,18 @@ CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_NFS_FS=y CONFIG_NFS_V3=y -CONFIG_NFS_V3_ACL=y +# CONFIG_NFS_V3_ACL is not set CONFIG_NFS_V4=y # CONFIG_NFS_DIRECTIO is not set CONFIG_NFSD=y -CONFIG_NFSD_V2_ACL=y CONFIG_NFSD_V3=y -CONFIG_NFSD_V3_ACL=y +# CONFIG_NFSD_V3_ACL is not set CONFIG_NFSD_V4=y CONFIG_NFSD_TCP=y CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_EXPORTFS=y -CONFIG_NFS_ACL_SUPPORT=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y CONFIG_SUNRPC_GSS=y @@ -1430,7 +1534,9 @@ CONFIG_SMB_FS=m # CONFIG_SMB_NLS_DEFAULT is not set CONFIG_CIFS=m # CONFIG_CIFS_STATS is not set +# CONFIG_CIFS_WEAK_PW_HASH is not set # CONFIG_CIFS_XATTR is not set +# CONFIG_CIFS_DEBUG2 is not set # CONFIG_CIFS_EXPERIMENTAL is not set # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set @@ -1503,23 +1609,29 @@ CONFIG_NLS_ISO8859_15=m # CONFIG_NLS_KOI8_U is not set CONFIG_NLS_UTF8=m +# +# Distributed Lock Manager +# +# CONFIG_DLM is not set + # # Profiling support # -CONFIG_PROFILING=y -CONFIG_OPROFILE=y +# CONFIG_PROFILING is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set +CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y +# CONFIG_UNUSED_SYMBOLS is not set +CONFIG_DEBUG_FS=y +# CONFIG_HEADERS_CHECK is not set # CONFIG_DEBUG_KERNEL is not set CONFIG_LOG_BUF_SHIFT=14 # CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_FS is not set CONFIG_FRAME_POINTER=y -# CONFIG_UNWIND_INFO is not set CONFIG_DEBUG_USER=y # @@ -1531,22 +1643,31 @@ CONFIG_SECURITY=y # CONFIG_SECURITY_NETWORK is not set CONFIG_SECURITY_CAPABILITIES=y # CONFIG_SECURITY_ROOTPLUG is not set -# CONFIG_SECURITY_SECLVL is not set # # Cryptographic options # CONFIG_CRYPTO=y +CONFIG_CRYPTO_ALGAPI=y +CONFIG_CRYPTO_BLKCIPHER=y +CONFIG_CRYPTO_MANAGER=y # CONFIG_CRYPTO_HMAC is not set +# CONFIG_CRYPTO_XCBC is not set # CONFIG_CRYPTO_NULL is not set -CONFIG_CRYPTO_MD4=y +# CONFIG_CRYPTO_MD4 is not set CONFIG_CRYPTO_MD5=y CONFIG_CRYPTO_SHA1=m CONFIG_CRYPTO_SHA256=m CONFIG_CRYPTO_SHA512=m # CONFIG_CRYPTO_WP512 is not set # CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set CONFIG_CRYPTO_DES=y +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_TWOFISH is not set # CONFIG_CRYPTO_SERPENT is not set @@ -1554,12 +1675,13 @@ CONFIG_CRYPTO_AES=m # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set # CONFIG_CRYPTO_TEA is not set -CONFIG_CRYPTO_ARC4=m +CONFIG_CRYPTO_ARC4=y # CONFIG_CRYPTO_KHAZAD is not set # CONFIG_CRYPTO_ANUBIS is not set CONFIG_CRYPTO_DEFLATE=m CONFIG_CRYPTO_MICHAEL_MIC=m CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_TEST is not set # @@ -1569,6 +1691,7 @@ CONFIG_CRYPTO_CRC32C=y # # Library routines # +CONFIG_BITREVERSE=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y CONFIG_CRC32=y @@ -1577,3 +1700,6 @@ CONFIG_ZLIB_INFLATE=y CONFIG_ZLIB_DEFLATE=y CONFIG_REED_SOLOMON=y CONFIG_REED_SOLOMON_DEC16=y +CONFIG_PLIST=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT=y diff --git a/arch/arm/mach-pxa/trizeps4.c b/arch/arm/mach-pxa/trizeps4.c index 119c64b7223..28c79bd0a3a 100644 --- a/arch/arm/mach-pxa/trizeps4.c +++ b/arch/arm/mach-pxa/trizeps4.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include @@ -55,23 +56,31 @@ static struct mtd_partition trizeps4_partitions[] = { { .name = "Bootloader", + .offset = 0x00000000, .size = 0x00040000, - .offset = 0, .mask_flags = MTD_WRITEABLE /* force read-only */ },{ - .name = "Kernel", - .size = 0x00400000, - .offset = 0x00040000 + .name = "Backup", + .offset = 0x00040000, + .size = 0x00040000, + },{ + .name = "Image", + .offset = 0x00080000, + .size = 0x01080000, + },{ + .name = "IPSM", + .offset = 0x01100000, + .size = 0x00e00000, },{ - .name = "Filesystem", + .name = "Registry", + .offset = 0x01f00000, .size = MTDPART_SIZ_FULL, - .offset = 0x00440000 } }; -static struct flash_platform_data trizeps4_flash_data[] = { +static struct physmap_flash_data trizeps4_flash_data[] = { { - .map_name = "cfi_probe", + .width = 4, /* bankwidth in bytes */ .parts = trizeps4_partitions, .nr_parts = ARRAY_SIZE(trizeps4_partitions) } @@ -79,15 +88,15 @@ static struct flash_platform_data trizeps4_flash_data[] = { static struct resource flash_resource = { .start = PXA_CS0_PHYS, - .end = PXA_CS0_PHYS + SZ_64M - 1, + .end = PXA_CS0_PHYS + SZ_32M - 1, .flags = IORESOURCE_MEM, }; static struct platform_device flash_device = { - .name = "pxa2xx-flash", + .name = "physmap-flash", .id = 0, .dev = { - .platform_data = &trizeps4_flash_data, + .platform_data = trizeps4_flash_data, }, .resource = &flash_resource, .num_resources = 1, @@ -393,11 +402,37 @@ static struct pxafb_mach_info sharp_lcd = { .pxafb_backlight_power = board_backlight_power, }; +static struct pxafb_mode_info toshiba_lcd_mode = { + .pixclock = 39720, + .xres = 640, + .yres = 480, + .bpp = 8, + .hsync_len = 63, + .left_margin = 12, + .right_margin = 12, + .vsync_len = 4, + .upper_margin = 32, + .lower_margin = 10, + .sync = 0, + .cmap_greyscale = 0, +}; + +static struct pxafb_mach_info toshiba_lcd = { + .modes = &toshiba_lcd_mode, + .num_modes = 1, + .cmap_inverse = 0, + .cmap_static = 0, + .lccr0 = LCCR0_Color | LCCR0_Act, + .lccr3 = 0x03400002, + .pxafb_backlight_power = board_backlight_power, +}; + static void __init trizeps4_init(void) { platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); - set_pxa_fb_info(&sharp_lcd); +/* set_pxa_fb_info(&sharp_lcd); */ + set_pxa_fb_info(&toshiba_lcd); pxa_set_mci_info(&trizeps4_mci_platform_data); pxa_set_ficp_info(&trizeps4_ficp_platform_data); @@ -436,9 +471,10 @@ static void __init trizeps4_map_io(void) /* whats that for ??? */ pxa_gpio_mode(GPIO79_nCS_3_MD); +#ifdef CONFIG_LEDS pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */ pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */ - +#endif #ifdef CONFIG_MACH_TRIZEPS4_CONXS #ifdef CONFIG_IDE_PXA_CF /* if boot direct from compact flash dont disable power */ -- cgit v1.2.3 From b8b6970b4fe08397554295b0c5169bec7575f7c9 Mon Sep 17 00:00:00 2001 From: Graeme Gregory Date: Wed, 9 May 2007 15:55:24 +0100 Subject: [ARM] 4365/1: Add AC97 clock to s3c2443 machine This adds the ac97 clock to the s3c2443 machine files. It seems to have been simply missed out previously. Signed-off-by: Graeme Gregory Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2443/clock.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index dd2272fb113..0b6e360aeae 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c @@ -791,6 +791,10 @@ static struct clk init_clocks[] = { .name = "usb-bus-host", .id = -1, .parent = &clk_usb_bus_host, + }, { .name = "ac97", + .id = -1, + .parent = &clk_p, + .ctrlbit = S3C2443_PCLKCON_AC97, } }; -- cgit v1.2.3 From 7fdc7849d2f9f926cbaec224bbcbacb164b07b23 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Wed, 9 May 2007 21:41:03 +0100 Subject: [ARM] 4359/3: H1940: Add bluetooth support This patch adds a small driver responsible for configuring the UART used for the bluetooth chip and for enabling the bluetooth chipset. Additionnaly, can trigger a led if the H1940 led driver is enabled. Signed-off-by: Arnaud Patard Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/Makefile | 2 +- arch/arm/mach-s3c2410/h1940-bluetooth.c | 142 ++++++++++++++++++++++++++++++++ arch/arm/mach-s3c2410/mach-h1940.c | 6 ++ 3 files changed, 149 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-s3c2410/h1940-bluetooth.c (limited to 'arch') diff --git a/arch/arm/mach-s3c2410/Makefile b/arch/arm/mach-s3c2410/Makefile index 9a3d3d24c08..3e7a85594d9 100644 --- a/arch/arm/mach-s3c2410/Makefile +++ b/arch/arm/mach-s3c2410/Makefile @@ -20,7 +20,7 @@ obj-$(CONFIG_S3C2410_CLOCK) += clock.o # Machine support obj-$(CONFIG_ARCH_SMDK2410) += mach-smdk2410.o -obj-$(CONFIG_ARCH_H1940) += mach-h1940.o +obj-$(CONFIG_ARCH_H1940) += mach-h1940.o h1940-bluetooth.o obj-$(CONFIG_PM_H1940) += pm-h1940.o obj-$(CONFIG_MACH_N30) += mach-n30.o obj-$(CONFIG_ARCH_BAST) += mach-bast.o usb-simtec.o diff --git a/arch/arm/mach-s3c2410/h1940-bluetooth.c b/arch/arm/mach-s3c2410/h1940-bluetooth.c new file mode 100644 index 00000000000..3c48886521e --- /dev/null +++ b/arch/arm/mach-s3c2410/h1940-bluetooth.c @@ -0,0 +1,142 @@ +/* + * arch/arm/mach-s3c2410/h1940-bluetooth.c + * Copyright (c) Arnaud Patard + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + * + * S3C2410 bluetooth "driver" + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DRV_NAME "h1940-bt" + +#ifdef CONFIG_LEDS_H1940 +DEFINE_LED_TRIGGER(bt_led_trigger); +#endif + +static int state; + +/* Bluetooth control */ +static void h1940bt_enable(int on) +{ + if (on) { +#ifdef CONFIG_LEDS_H1940 + /* flashing Blue */ + led_trigger_event(bt_led_trigger, LED_HALF); +#endif + + /* Power on the chip */ + h1940_latch_control(0, H1940_LATCH_BLUETOOTH_POWER); + /* Reset the chip */ + mdelay(10); + s3c2410_gpio_setpin(S3C2410_GPH1, 1); + mdelay(10); + s3c2410_gpio_setpin(S3C2410_GPH1, 0); + + state = 1; + } + else { +#ifdef CONFIG_LEDS_H1940 + led_trigger_event(bt_led_trigger, 0); +#endif + + s3c2410_gpio_setpin(S3C2410_GPH1, 1); + mdelay(10); + s3c2410_gpio_setpin(S3C2410_GPH1, 0); + mdelay(10); + h1940_latch_control(H1940_LATCH_BLUETOOTH_POWER, 0); + + state = 0; + } +} + +static ssize_t h1940bt_show(struct device *dev, struct device_attribute *attr, char *buf) +{ + return snprintf(buf, PAGE_SIZE, "%d\n", state); +} + +static ssize_t h1940bt_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) +{ + int new_state; + char *endp; + + new_state = simple_strtoul(buf, &endp, 0); + if (*endp && !isspace(*endp)) + return -EINVAL; + + h1940bt_enable(new_state); + + return count; +} +static DEVICE_ATTR(enable, 0644, + h1940bt_show, + h1940bt_store); + +static int __init h1940bt_probe(struct platform_device *pdev) +{ + /* Configures BT serial port GPIOs */ + s3c2410_gpio_cfgpin(S3C2410_GPH0, S3C2410_GPH0_nCTS0); + s3c2410_gpio_pullup(S3C2410_GPH0, 1); + s3c2410_gpio_cfgpin(S3C2410_GPH1, S3C2410_GPH1_OUTP); + s3c2410_gpio_pullup(S3C2410_GPH1, 1); + s3c2410_gpio_cfgpin(S3C2410_GPH2, S3C2410_GPH2_TXD0); + s3c2410_gpio_pullup(S3C2410_GPH2, 1); + s3c2410_gpio_cfgpin(S3C2410_GPH3, S3C2410_GPH3_RXD0); + s3c2410_gpio_pullup(S3C2410_GPH3, 1); + +#ifdef CONFIG_LEDS_H1940 + led_trigger_register_simple("h1940-bluetooth", &bt_led_trigger); +#endif + + /* disable BT by default */ + h1940bt_enable(0); + + return device_create_file(&pdev->dev, &dev_attr_enable); +} + +static int h1940bt_remove(struct platform_device *pdev) +{ +#ifdef CONFIG_LEDS_H1940 + led_trigger_unregister_simple(bt_led_trigger); +#endif + return 0; +} + + +static struct platform_driver h1940bt_driver = { + .driver = { + .name = DRV_NAME, + }, + .probe = h1940bt_probe, + .remove = h1940bt_remove, +}; + + +static int __init h1940bt_init(void) +{ + return platform_driver_register(&h1940bt_driver); +} + +static void __exit h1940bt_exit(void) +{ + platform_driver_unregister(&h1940bt_driver); +} + +module_init(h1940bt_init); +module_exit(h1940bt_exit); + +MODULE_AUTHOR("Arnaud Patard "); +MODULE_DESCRIPTION("Driver for the iPAQ H1940 bluetooth chip"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-s3c2410/mach-h1940.c b/arch/arm/mach-s3c2410/mach-h1940.c index 5d5f00e9c46..5ccd0be23a3 100644 --- a/arch/arm/mach-s3c2410/mach-h1940.c +++ b/arch/arm/mach-s3c2410/mach-h1940.c @@ -177,6 +177,11 @@ static struct platform_device s3c_device_leds = { .id = -1, }; +static struct platform_device s3c_device_bluetooth = { + .name = "h1940-bt", + .id = -1, +}; + static struct platform_device *h1940_devices[] __initdata = { &s3c_device_usb, &s3c_device_lcd, @@ -185,6 +190,7 @@ static struct platform_device *h1940_devices[] __initdata = { &s3c_device_iis, &s3c_device_usbgadget, &s3c_device_leds, + &s3c_device_bluetooth, }; static void __init h1940_map_io(void) -- cgit v1.2.3 From 3b11e449b3a8d9b912d80e28f62985f22a70e87f Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 9 May 2007 20:18:05 +0100 Subject: [ARM] EBSA110: fix build errors caused by missing "const" arch/arm/mach-ebsa110/io.c:106: error: conflicting types for 'readsw' arch/arm/mach-ebsa110/io.c:116: error: conflicting types for 'readsl' arch/arm/mach-ebsa110/io.c:161: error: conflicting types for 'writesw' arch/arm/mach-ebsa110/io.c:171: error: conflicting types for 'writesl' Signed-off-by: Russell King --- arch/arm/mach-ebsa110/io.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ebsa110/io.c b/arch/arm/mach-ebsa110/io.c index bbf0d332407..6b2380e153e 100644 --- a/arch/arm/mach-ebsa110/io.c +++ b/arch/arm/mach-ebsa110/io.c @@ -102,7 +102,7 @@ EXPORT_SYMBOL(__readb); EXPORT_SYMBOL(__readw); EXPORT_SYMBOL(__readl); -void readsw(void __iomem *addr, void *data, int len) +void readsw(const void __iomem *addr, void *data, int len) { void __iomem *a = __isamem_convert_addr(addr); @@ -112,7 +112,7 @@ void readsw(void __iomem *addr, void *data, int len) } EXPORT_SYMBOL(readsw); -void readsl(void __iomem *addr, void *data, int len) +void readsl(const void __iomem *addr, void *data, int len) { void __iomem *a = __isamem_convert_addr(addr); @@ -157,7 +157,7 @@ EXPORT_SYMBOL(__writeb); EXPORT_SYMBOL(__writew); EXPORT_SYMBOL(__writel); -void writesw(void __iomem *addr, void *data, int len) +void writesw(void __iomem *addr, const void *data, int len) { void __iomem *a = __isamem_convert_addr(addr); @@ -167,7 +167,7 @@ void writesw(void __iomem *addr, void *data, int len) } EXPORT_SYMBOL(writesw); -void writesl(void __iomem *addr, void *data, int len) +void writesl(void __iomem *addr, const void *data, int len) { void __iomem *a = __isamem_convert_addr(addr); -- cgit v1.2.3 From 302c0ef7317ddd49c0ae82004cfe308b5a2b6ab3 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Wed, 9 May 2007 11:42:53 +0100 Subject: [ARM] 4364/1: AT91: LEDS on AT91SAM9261-EK Attached you can find a patch needed to make the LEDS for 'CPU-Idle' and 'Timer' work on the AT91SAM9261-EK board. The kernel configuration options are already there, but the implementation is not available. Signed-off-by: Remy Bohmer Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/Makefile | 1 + arch/arm/mach-at91/board-sam9261ek.c | 3 +++ 2 files changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a412ae18a42..cd1bc541f28 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -39,6 +39,7 @@ obj-$(CONFIG_MACH_AT91SAM9263EK) += board-sam9263ek.o # LEDs support led-$(CONFIG_ARCH_AT91RM9200DK) += leds.o led-$(CONFIG_MACH_AT91RM9200EK) += leds.o +led-$(CONFIG_MACH_AT91SAM9261EK)+= leds.o led-$(CONFIG_MACH_CSB337) += leds.o led-$(CONFIG_MACH_CSB637) += leds.o led-$(CONFIG_MACH_KB9200) += leds.o diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c index bcf71536cc6..1f0c8a400b3 100644 --- a/arch/arm/mach-at91/board-sam9261ek.c +++ b/arch/arm/mach-at91/board-sam9261ek.c @@ -60,6 +60,9 @@ static void __init ek_map_io(void) /* Initialize processor: 18.432 MHz crystal */ at91sam9261_initialize(18432000); + /* Setup the LEDs */ + at91_init_leds(AT91_PIN_PA13, AT91_PIN_PA14); + /* Setup the serial ports and console */ at91_init_serial(&ek_uart_config); } -- cgit v1.2.3 From f7538ac95200fd122fd84c8f85ff1130ee7645b5 Mon Sep 17 00:00:00 2001 From: Arnaud Patard Date: Thu, 10 May 2007 20:38:53 +0100 Subject: [ARM] 4368/1: S3C24xx: build fix Trying to build current git tree fails. The failure is due to commit 25ff0a653067eec56efc730dbed664d5cc77e9f3. The patch title say it's for OMAP board while it's applied on S3C2410 Kconfig entry. Moreover, the OMAP entry is already selecting GENERIC_TIME. This patch reverts the offending commit. Signed-off-by: Arnaud Patard Signed-off-by: Russell King --- arch/arm/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7c0984d4a8..0d8fac3b037 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -354,7 +354,6 @@ config ARCH_SA1100 config ARCH_S3C2410 bool "Samsung S3C2410, S3C2412, S3C2413, S3C2440, S3C2442, S3C2443" select GENERIC_GPIO - select GENERIC_TIME help Samsung S3C2410X CPU based systems, such as the Simtec Electronics BAST (), the IPAQ 1940 or -- cgit v1.2.3 From 7c6337e225364870e9bf02a3ae277d9fdea483f8 Mon Sep 17 00:00:00 2001 From: Kevin Hilman Date: Mon, 30 Apr 2007 19:37:19 +0100 Subject: [ARM] 4303/3: base kernel support for TI DaVinci Add base kernel support for the TI DaVinci platform. This patch only includes interrupts, timers, CPU identification, serial support and basic power and sleep controller init. More drivers to come. Signed-off-by: Kevin Hilman Signed-off-by: Russell King --- arch/arm/Kconfig | 11 +- arch/arm/Makefile | 1 + arch/arm/mach-davinci/Kconfig | 23 +++ arch/arm/mach-davinci/Makefile | 10 + arch/arm/mach-davinci/Makefile.boot | 3 + arch/arm/mach-davinci/board-evm.c | 131 +++++++++++++ arch/arm/mach-davinci/id.c | 94 +++++++++ arch/arm/mach-davinci/io.c | 51 +++++ arch/arm/mach-davinci/irq.c | 226 ++++++++++++++++++++++ arch/arm/mach-davinci/psc.c | 113 +++++++++++ arch/arm/mach-davinci/serial.c | 96 ++++++++++ arch/arm/mach-davinci/time.c | 372 ++++++++++++++++++++++++++++++++++++ arch/arm/mm/Kconfig | 4 +- 13 files changed, 1132 insertions(+), 3 deletions(-) create mode 100644 arch/arm/mach-davinci/Kconfig create mode 100644 arch/arm/mach-davinci/Makefile create mode 100644 arch/arm/mach-davinci/Makefile.boot create mode 100644 arch/arm/mach-davinci/board-evm.c create mode 100644 arch/arm/mach-davinci/id.c create mode 100644 arch/arm/mach-davinci/io.c create mode 100644 arch/arm/mach-davinci/irq.c create mode 100644 arch/arm/mach-davinci/psc.c create mode 100644 arch/arm/mach-davinci/serial.c create mode 100644 arch/arm/mach-davinci/time.c (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index d7c0984d4a8..34d1462e434 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -384,6 +384,13 @@ config ARCH_OMAP help Support for TI's OMAP platform (OMAP1 and OMAP2). +config ARCH_DAVINCI + bool "TI DaVinci" + select GENERIC_TIME + select GENERIC_CLOCKEVENTS + help + Support for TI's DaVinci platform. + endchoice source "arch/arm/mach-clps711x/Kconfig" @@ -445,6 +452,8 @@ source "arch/arm/mach-netx/Kconfig" source "arch/arm/mach-ns9xxx/Kconfig" +source "arch/arm/mach-davinci/Kconfig" + # Definitions to make life easier config ARCH_ACORN bool @@ -674,7 +683,7 @@ config LEDS ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \ ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \ ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \ - ARCH_AT91 || MACH_TRIZEPS4 + ARCH_AT91 || MACH_TRIZEPS4 || ARCH_DAVINCI help If you say Y here, the LEDs on your machine will be used to provide useful information about your current system status. diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 00ea4305ad5..d568d86b072 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -135,6 +135,7 @@ endif machine-$(CONFIG_ARCH_NETX) := netx machine-$(CONFIG_ARCH_NS9XXX) := ns9xxx textofs-$(CONFIG_ARCH_NS9XXX) := 0x00108000 + machine-$(CONFIG_ARCH_DAVINCI) := davinci ifeq ($(CONFIG_ARCH_EBSA110),y) # This is what happens if you forget the IOCS16 line. diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig new file mode 100644 index 00000000000..bac988e7a4c --- /dev/null +++ b/arch/arm/mach-davinci/Kconfig @@ -0,0 +1,23 @@ +if ARCH_DAVINCI + +menu "TI DaVinci Implementations" + +comment "DaVinci Core Type" + +config ARCH_DAVINCI644x + default y + bool "DaVinci 644x based system" + +comment "DaVinci Board Type" + +config MACH_DAVINCI_EVM + bool "TI DaVinci EVM" + default y + depends on ARCH_DAVINCI644x + help + Configure this option to specify the whether the board used + for development is a DaVinci EVM + +endmenu + +endif diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile new file mode 100644 index 00000000000..a8f88cd2990 --- /dev/null +++ b/arch/arm/mach-davinci/Makefile @@ -0,0 +1,10 @@ +# +# Makefile for the linux kernel. +# +# + +# Common objects +obj-y := time.o irq.o serial.o io.o id.o psc.o + +# Board specific +obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o diff --git a/arch/arm/mach-davinci/Makefile.boot b/arch/arm/mach-davinci/Makefile.boot new file mode 100644 index 00000000000..e1dd366f836 --- /dev/null +++ b/arch/arm/mach-davinci/Makefile.boot @@ -0,0 +1,3 @@ + zreladdr-y := 0x80008000 +params_phys-y := 0x80000100 +initrd_phys-y := 0x80800000 diff --git a/arch/arm/mach-davinci/board-evm.c b/arch/arm/mach-davinci/board-evm.c new file mode 100644 index 00000000000..633c12e4304 --- /dev/null +++ b/arch/arm/mach-davinci/board-evm.c @@ -0,0 +1,131 @@ +/* + * TI DaVinci EVM board support + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include +#include +#include + +#include + +/* other misc. init functions */ +void __init davinci_psc_init(void); +void __init davinci_irq_init(void); +void __init davinci_map_common_io(void); + +/* NOR Flash base address set to CS0 by default */ +#define NOR_FLASH_PHYS 0x02000000 + +static struct mtd_partition davinci_evm_partitions[] = { + /* bootloader (U-Boot, etc) in first 4 sectors */ + { + .name = "bootloader", + .offset = 0, + .size = 4 * SZ_64K, + .mask_flags = MTD_WRITEABLE, /* force read-only */ + }, + /* bootloader params in the next 1 sectors */ + { + .name = "params", + .offset = MTDPART_OFS_APPEND, + .size = SZ_64K, + .mask_flags = 0, + }, + /* kernel */ + { + .name = "kernel", + .offset = MTDPART_OFS_APPEND, + .size = SZ_2M, + .mask_flags = 0 + }, + /* file system */ + { + .name = "filesystem", + .offset = MTDPART_OFS_APPEND, + .size = MTDPART_SIZ_FULL, + .mask_flags = 0 + } +}; + +static struct physmap_flash_data davinci_evm_flash_data = { + .width = 2, + .parts = davinci_evm_partitions, + .nr_parts = ARRAY_SIZE(davinci_evm_partitions), +}; + +/* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF + * limits addresses to 16M, so using addresses past 16M will wrap */ +static struct resource davinci_evm_flash_resource = { + .start = NOR_FLASH_PHYS, + .end = NOR_FLASH_PHYS + SZ_16M - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device davinci_evm_flash_device = { + .name = "physmap-flash", + .id = 0, + .dev = { + .platform_data = &davinci_evm_flash_data, + }, + .num_resources = 1, + .resource = &davinci_evm_flash_resource, +}; + +static struct platform_device *davinci_evm_devices[] __initdata = { + &davinci_evm_flash_device, +}; + +static void __init +davinci_evm_map_io(void) +{ + davinci_map_common_io(); +} + +static __init void davinci_evm_init(void) +{ + davinci_psc_init(); + +#if defined(CONFIG_BLK_DEV_DAVINCI) || defined(CONFIG_BLK_DEV_DAVINCI_MODULE) + printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, " + "but share pins.\n\t Disable IDE for NOR support.\n"); +#endif + + platform_add_devices(davinci_evm_devices, + ARRAY_SIZE(davinci_evm_devices)); +} + +static __init void davinci_evm_irq_init(void) +{ + davinci_irq_init(); +} + +MACHINE_START(DAVINCI_EVM, "DaVinci EVM") + /* Maintainer: MontaVista Software */ + .phys_io = IO_PHYS, + .io_pg_offst = (io_p2v(IO_PHYS) >> 18) & 0xfffc, + .boot_params = (DAVINCI_DDR_BASE + 0x100), + .map_io = davinci_evm_map_io, + .init_irq = davinci_evm_irq_init, + .timer = &davinci_timer, + .init_machine = davinci_evm_init, +MACHINE_END diff --git a/arch/arm/mach-davinci/id.c b/arch/arm/mach-davinci/id.c new file mode 100644 index 00000000000..70608f76aed --- /dev/null +++ b/arch/arm/mach-davinci/id.c @@ -0,0 +1,94 @@ +/* + * Davinci CPU identification code + * + * Copyright (C) 2006 Komal Shah + * + * Derived from OMAP1 CPU identification code. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#define JTAG_ID_BASE 0x01c40028 + +struct davinci_id { + u8 variant; /* JTAG ID bits 31:28 */ + u16 part_no; /* JTAG ID bits 27:12 */ + u32 manufacturer; /* JTAG ID bits 11:1 */ + u32 type; /* Cpu id bits [31:8], cpu class bits [7:0] */ +}; + +/* Register values to detect the DaVinci version */ +static struct davinci_id davinci_ids[] __initdata = { + { + /* DM6446 */ + .part_no = 0xb700, + .variant = 0x0, + .manufacturer = 0x017, + .type = 0x64460000, + }, +}; + +/* + * Get Device Part No. from JTAG ID register + */ +static u16 __init davinci_get_part_no(void) +{ + u32 dev_id, part_no; + + dev_id = davinci_readl(JTAG_ID_BASE); + + part_no = ((dev_id >> 12) & 0xffff); + + return part_no; +} + +/* + * Get Device Revision from JTAG ID register + */ +static u8 __init davinci_get_variant(void) +{ + u32 variant; + + variant = davinci_readl(JTAG_ID_BASE); + + variant = (variant >> 28) & 0xf; + + return variant; +} + +void __init davinci_check_revision(void) +{ + int i; + u16 part_no; + u8 variant; + + part_no = davinci_get_part_no(); + variant = davinci_get_variant(); + + /* First check only the major version in a safe way */ + for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { + if (part_no == (davinci_ids[i].part_no)) { + system_rev = davinci_ids[i].type; + break; + } + } + + /* Check if we can find the dev revision */ + for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) { + if (part_no == davinci_ids[i].part_no && + variant == davinci_ids[i].variant) { + system_rev = davinci_ids[i].type; + break; + } + } + + printk("DaVinci DM%04x variant 0x%x\n", system_rev >> 16, variant); +} diff --git a/arch/arm/mach-davinci/io.c b/arch/arm/mach-davinci/io.c new file mode 100644 index 00000000000..87fae6fb6ec --- /dev/null +++ b/arch/arm/mach-davinci/io.c @@ -0,0 +1,51 @@ +/* + * DaVinci I/O mapping code + * + * Copyright (C) 2005-2006 Texas Instruments + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include +#include + +#include + +extern void davinci_check_revision(void); + +/* + * The machine specific code may provide the extra mapping besides the + * default mapping provided here. + */ +static struct map_desc davinci_io_desc[] __initdata = { + { + .virtual = IO_VIRT, + .pfn = __phys_to_pfn(IO_PHYS), + .length = IO_SIZE, + .type = MT_DEVICE + }, +}; + +void __init davinci_map_common_io(void) +{ + iotable_init(davinci_io_desc, ARRAY_SIZE(davinci_io_desc)); + + /* Normally devicemaps_init() would flush caches and tlb after + * mdesc->map_io(), but we must also do it here because of the CPU + * revision check below. + */ + local_flush_tlb_all(); + flush_cache_all(); + + /* We want to check CPU revision early for cpu_is_xxxx() macros. + * IO space mapping must be initialized before we can do that. + */ + davinci_check_revision(); +} diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c new file mode 100644 index 00000000000..1333d84d2e4 --- /dev/null +++ b/arch/arm/mach-davinci/irq.c @@ -0,0 +1,226 @@ +/* + * Interrupt handler for DaVinci boards. + * + * Copyright (C) 2006 Texas Instruments. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include +#include + +#include +#include +#include + +#define IRQ_BIT(irq) ((irq) & 0x1f) + +#define FIQ_REG0_OFFSET 0x0000 +#define FIQ_REG1_OFFSET 0x0004 +#define IRQ_REG0_OFFSET 0x0008 +#define IRQ_REG1_OFFSET 0x000C +#define IRQ_ENT_REG0_OFFSET 0x0018 +#define IRQ_ENT_REG1_OFFSET 0x001C +#define IRQ_INCTL_REG_OFFSET 0x0020 +#define IRQ_EABASE_REG_OFFSET 0x0024 +#define IRQ_INTPRI0_REG_OFFSET 0x0030 +#define IRQ_INTPRI7_REG_OFFSET 0x004C + +static inline unsigned int davinci_irq_readl(int offset) +{ + return davinci_readl(DAVINCI_ARM_INTC_BASE + offset); +} + +static inline void davinci_irq_writel(unsigned long value, int offset) +{ + davinci_writel(value, DAVINCI_ARM_INTC_BASE + offset); +} + +/* Disable interrupt */ +static void davinci_mask_irq(unsigned int irq) +{ + unsigned int mask; + u32 l; + + mask = 1 << IRQ_BIT(irq); + + if (irq > 31) { + l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); + l &= ~mask; + davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); + } else { + l = davinci_irq_readl(IRQ_ENT_REG0_OFFSET); + l &= ~mask; + davinci_irq_writel(l, IRQ_ENT_REG0_OFFSET); + } +} + +/* Enable interrupt */ +static void davinci_unmask_irq(unsigned int irq) +{ + unsigned int mask; + u32 l; + + mask = 1 << IRQ_BIT(irq); + + if (irq > 31) { + l = davinci_irq_readl(IRQ_ENT_REG1_OFFSET); + l |= mask; + davinci_irq_writel(l, IRQ_ENT_REG1_OFFSET); + } else { + l = davinci_irq_readl(IRQ_ENT_REG0_OFFSET); + l |= mask; + davinci_irq_writel(l, IRQ_ENT_REG0_OFFSET); + } +} + +/* EOI interrupt */ +static void davinci_ack_irq(unsigned int irq) +{ + unsigned int mask; + + mask = 1 << IRQ_BIT(irq); + + if (irq > 31) + davinci_irq_writel(mask, IRQ_REG1_OFFSET); + else + davinci_irq_writel(mask, IRQ_REG0_OFFSET); +} + +static struct irq_chip davinci_irq_chip_0 = { + .name = "AINTC", + .ack = davinci_ack_irq, + .mask = davinci_mask_irq, + .unmask = davinci_unmask_irq, +}; + + +/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */ +static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = { + [IRQ_VDINT0] = 2, + [IRQ_VDINT1] = 6, + [IRQ_VDINT2] = 6, + [IRQ_HISTINT] = 6, + [IRQ_H3AINT] = 6, + [IRQ_PRVUINT] = 6, + [IRQ_RSZINT] = 6, + [7] = 7, + [IRQ_VENCINT] = 6, + [IRQ_ASQINT] = 6, + [IRQ_IMXINT] = 6, + [IRQ_VLCDINT] = 6, + [IRQ_USBINT] = 4, + [IRQ_EMACINT] = 4, + [14] = 7, + [15] = 7, + [IRQ_CCINT0] = 5, /* dma */ + [IRQ_CCERRINT] = 5, /* dma */ + [IRQ_TCERRINT0] = 5, /* dma */ + [IRQ_TCERRINT] = 5, /* dma */ + [IRQ_PSCIN] = 7, + [21] = 7, + [IRQ_IDE] = 4, + [23] = 7, + [IRQ_MBXINT] = 7, + [IRQ_MBRINT] = 7, + [IRQ_MMCINT] = 7, + [IRQ_SDIOINT] = 7, + [28] = 7, + [IRQ_DDRINT] = 7, + [IRQ_AEMIFINT] = 7, + [IRQ_VLQINT] = 4, + [IRQ_TINT0_TINT12] = 2, /* clockevent */ + [IRQ_TINT0_TINT34] = 2, /* clocksource */ + [IRQ_TINT1_TINT12] = 7, /* DSP timer */ + [IRQ_TINT1_TINT34] = 7, /* system tick */ + [IRQ_PWMINT0] = 7, + [IRQ_PWMINT1] = 7, + [IRQ_PWMINT2] = 7, + [IRQ_I2C] = 3, + [IRQ_UARTINT0] = 3, + [IRQ_UARTINT1] = 3, + [IRQ_UARTINT2] = 3, + [IRQ_SPINT0] = 3, + [IRQ_SPINT1] = 3, + [45] = 7, + [IRQ_DSP2ARM0] = 4, + [IRQ_DSP2ARM1] = 4, + [IRQ_GPIO0] = 7, + [IRQ_GPIO1] = 7, + [IRQ_GPIO2] = 7, + [IRQ_GPIO3] = 7, + [IRQ_GPIO4] = 7, + [IRQ_GPIO5] = 7, + [IRQ_GPIO6] = 7, + [IRQ_GPIO7] = 7, + [IRQ_GPIOBNK0] = 7, + [IRQ_GPIOBNK1] = 7, + [IRQ_GPIOBNK2] = 7, + [IRQ_GPIOBNK3] = 7, + [IRQ_GPIOBNK4] = 7, + [IRQ_COMMTX] = 7, + [IRQ_COMMRX] = 7, + [IRQ_EMUINT] = 7, +}; + +/* ARM Interrupt Controller Initialization */ +void __init davinci_irq_init(void) +{ + unsigned i; + const u8 *priority = default_priorities; + + /* Clear all interrupt requests */ + davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); + davinci_irq_writel(~0x0, FIQ_REG1_OFFSET); + davinci_irq_writel(~0x0, IRQ_REG0_OFFSET); + davinci_irq_writel(~0x0, IRQ_REG1_OFFSET); + + /* Disable all interrupts */ + davinci_irq_writel(0x0, IRQ_ENT_REG0_OFFSET); + davinci_irq_writel(0x0, IRQ_ENT_REG1_OFFSET); + + /* Interrupts disabled immediately, IRQ entry reflects all */ + davinci_irq_writel(0x0, IRQ_INCTL_REG_OFFSET); + + /* we don't use the hardware vector table, just its entry addresses */ + davinci_irq_writel(0, IRQ_EABASE_REG_OFFSET); + + /* Clear all interrupt requests */ + davinci_irq_writel(~0x0, FIQ_REG0_OFFSET); + davinci_irq_writel(~0x0, FIQ_REG1_OFFSET); + davinci_irq_writel(~0x0, IRQ_REG0_OFFSET); + davinci_irq_writel(~0x0, IRQ_REG1_OFFSET); + + for (i = IRQ_INTPRI0_REG_OFFSET; i <= IRQ_INTPRI7_REG_OFFSET; i += 4) { + unsigned j; + u32 pri; + + for (j = 0, pri = 0; j < 32; j += 4, priority++) + pri |= (*priority & 0x07) << j; + davinci_irq_writel(pri, i); + } + + /* set up genirq dispatch for ARM INTC */ + for (i = 0; i < DAVINCI_N_AINTC_IRQ; i++) { + set_irq_chip(i, &davinci_irq_chip_0); + set_irq_flags(i, IRQF_VALID | IRQF_PROBE); + if (i != IRQ_TINT1_TINT34) + set_irq_handler(i, handle_edge_irq); + else + set_irq_handler(i, handle_level_irq); + } +} diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c new file mode 100644 index 00000000000..e1b0050283a --- /dev/null +++ b/arch/arm/mach-davinci/psc.c @@ -0,0 +1,113 @@ +/* + * TI DaVinci Power and Sleep Controller (PSC) + * + * Copyright (C) 2006 Texas Instruments. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ +#include +#include +#include + +#include +#include +#include + +#define PTCMD __REG(0x01C41120) +#define PDSTAT __REG(0x01C41200) +#define PDCTL1 __REG(0x01C41304) +#define EPCPR __REG(0x01C41070) +#define PTSTAT __REG(0x01C41128) + +#define MDSTAT IO_ADDRESS(0x01C41800) +#define MDCTL IO_ADDRESS(0x01C41A00) + +#define PINMUX0 __REG(0x01c40000) +#define PINMUX1 __REG(0x01c40004) +#define VDD3P3V_PWDN __REG(0x01C40048) + +static void davinci_psc_mux(unsigned int id) +{ + switch (id) { + case DAVINCI_LPSC_ATA: + PINMUX0 |= (1 << 17) | (1 << 16); + break; + case DAVINCI_LPSC_MMC_SD: + /* VDD power manupulations are done in U-Boot for CPMAC + * so applies to MMC as well + */ + /*Set up the pull regiter for MMC */ + VDD3P3V_PWDN = 0x0; + PINMUX1 &= (~(1 << 9)); + break; + case DAVINCI_LPSC_I2C: + PINMUX1 |= (1 << 7); + break; + case DAVINCI_LPSC_McBSP: + PINMUX1 |= (1 << 10); + break; + default: + break; + } +} + +/* Enable or disable a PSC domain */ +void davinci_psc_config(unsigned int domain, unsigned int id, char enable) +{ + volatile unsigned int *mdstat = (unsigned int *)((int)MDSTAT + 4 * id); + volatile unsigned int *mdctl = (unsigned int *)((int)MDCTL + 4 * id); + + if (id < 0) + return; + + if (enable) + *mdctl |= 0x00000003; /* Enable Module */ + else + *mdctl &= 0xFFFFFFF2; /* Disable Module */ + + if ((PDSTAT & 0x00000001) == 0) { + PDCTL1 |= 0x1; + PTCMD = (1 << domain); + while ((((EPCPR >> domain) & 1) == 0)); + + PDCTL1 |= 0x100; + while (!(((PTSTAT >> domain) & 1) == 0)); + } else { + PTCMD = (1 << domain); + while (!(((PTSTAT >> domain) & 1) == 0)); + } + + if (enable) + while (!((*mdstat & 0x0000001F) == 0x3)); + else + while (!((*mdstat & 0x0000001F) == 0x2)); + + if (enable) + davinci_psc_mux(id); +} + +void __init davinci_psc_init(void) +{ + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1); + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1); + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1); + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1); + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1); + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1); + + /* Turn on WatchDog timer LPSC. Needed for RESET to work */ + davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1); +} diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c new file mode 100644 index 00000000000..8368c93c788 --- /dev/null +++ b/arch/arm/mach-davinci/serial.c @@ -0,0 +1,96 @@ +/* + * TI DaVinci serial driver + * + * Copyright (C) 2006 Texas Instruments. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + * + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include + +#define UART_DAVINCI_PWREMU 0x0c + +static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up, + int offset) +{ + offset <<= up->regshift; + return (unsigned int)__raw_readb(up->membase + offset); +} + +static inline void davinci_serial_outp(struct plat_serial8250_port *p, + int offset, int value) +{ + offset <<= p->regshift; + __raw_writeb(value, p->membase + offset); +} + +static struct plat_serial8250_port serial_platform_data[] = { + { + .membase = (char *)IO_ADDRESS(DAVINCI_UART0_BASE), + .mapbase = (unsigned long)DAVINCI_UART0_BASE, + .irq = IRQ_UARTINT0, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = 27000000, + }, + { + .flags = 0 + }, +}; + +static struct platform_device serial_device = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev = { + .platform_data = serial_platform_data, + }, +}; + +static void __init davinci_serial_reset(struct plat_serial8250_port *p) +{ + /* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */ + unsigned int pwremu = 0; + + davinci_serial_outp(p, UART_IER, 0); /* disable all interrupts */ + + davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu); + mdelay(10); + + pwremu |= (0x3 << 13); + pwremu |= 0x1; + davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu); +} + +static int __init davinci_init(void) +{ + davinci_serial_reset(&serial_platform_data[0]); + return platform_device_register(&serial_device); +} + +arch_initcall(davinci_init); diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c new file mode 100644 index 00000000000..4d8425de692 --- /dev/null +++ b/arch/arm/mach-davinci/time.c @@ -0,0 +1,372 @@ +/* + * DaVinci timer subsystem + * + * Author: Kevin Hilman, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +static struct clock_event_device clockevent_davinci; + +#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400) +#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800) +#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00) + +enum { + T0_BOT = 0, T0_TOP, T1_BOT, T1_TOP, NUM_TIMERS, +}; + +#define IS_TIMER1(id) (id & 0x2) +#define IS_TIMER0(id) (!IS_TIMER1(id)) +#define IS_TIMER_TOP(id) ((id & 0x1)) +#define IS_TIMER_BOT(id) (!IS_TIMER_TOP(id)) + +static int timer_irqs[NUM_TIMERS] = { + IRQ_TINT0_TINT12, + IRQ_TINT0_TINT34, + IRQ_TINT1_TINT12, + IRQ_TINT1_TINT34, +}; + +/* + * This driver configures the 2 64-bit count-up timers as 4 independent + * 32-bit count-up timers used as follows: + * + * T0_BOT: Timer 0, bottom: clockevent source for hrtimers + * T0_TOP: Timer 0, top : clocksource for generic timekeeping + * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code) + * T1_TOP: Timer 1, top : + */ +#define TID_CLOCKEVENT T0_BOT +#define TID_CLOCKSOURCE T0_TOP + +/* Timer register offsets */ +#define PID12 0x0 +#define TIM12 0x10 +#define TIM34 0x14 +#define PRD12 0x18 +#define PRD34 0x1c +#define TCR 0x20 +#define TGCR 0x24 +#define WDTCR 0x28 + +/* Timer register bitfields */ +#define TCR_ENAMODE_DISABLE 0x0 +#define TCR_ENAMODE_ONESHOT 0x1 +#define TCR_ENAMODE_PERIODIC 0x2 +#define TCR_ENAMODE_MASK 0x3 + +#define TGCR_TIMMODE_SHIFT 2 +#define TGCR_TIMMODE_64BIT_GP 0x0 +#define TGCR_TIMMODE_32BIT_UNCHAINED 0x1 +#define TGCR_TIMMODE_64BIT_WDOG 0x2 +#define TGCR_TIMMODE_32BIT_CHAINED 0x3 + +#define TGCR_TIM12RS_SHIFT 0 +#define TGCR_TIM34RS_SHIFT 1 +#define TGCR_RESET 0x0 +#define TGCR_UNRESET 0x1 +#define TGCR_RESET_MASK 0x3 + +#define WDTCR_WDEN_SHIFT 14 +#define WDTCR_WDEN_DISABLE 0x0 +#define WDTCR_WDEN_ENABLE 0x1 +#define WDTCR_WDKEY_SHIFT 16 +#define WDTCR_WDKEY_SEQ0 0xa5c6 +#define WDTCR_WDKEY_SEQ1 0xda7e + +struct timer_s { + char *name; + unsigned int id; + unsigned long period; + unsigned long opts; + unsigned long reg_base; + unsigned long tim_reg; + unsigned long prd_reg; + unsigned long enamode_shift; + struct irqaction irqaction; +}; +static struct timer_s timers[]; + +/* values for 'opts' field of struct timer_s */ +#define TIMER_OPTS_DISABLED 0x00 +#define TIMER_OPTS_ONESHOT 0x01 +#define TIMER_OPTS_PERIODIC 0x02 + +static int timer32_config(struct timer_s *t) +{ + u32 tcr = davinci_readl(t->reg_base + TCR); + + /* disable timer */ + tcr &= ~(TCR_ENAMODE_MASK << t->enamode_shift); + davinci_writel(tcr, t->reg_base + TCR); + + /* reset counter to zero, set new period */ + davinci_writel(0, t->tim_reg); + davinci_writel(t->period, t->prd_reg); + + /* Set enable mode */ + if (t->opts & TIMER_OPTS_ONESHOT) { + tcr |= TCR_ENAMODE_ONESHOT << t->enamode_shift; + } else if (t->opts & TIMER_OPTS_PERIODIC) { + tcr |= TCR_ENAMODE_PERIODIC << t->enamode_shift; + } + + davinci_writel(tcr, t->reg_base + TCR); + return 0; +} + +static inline u32 timer32_read(struct timer_s *t) +{ + return davinci_readl(t->tim_reg); +} + +static irqreturn_t timer_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = &clockevent_davinci; + + evt->event_handler(evt); + return IRQ_HANDLED; +} + +/* called when 32-bit counter wraps */ +static irqreturn_t freerun_interrupt(int irq, void *dev_id) +{ + return IRQ_HANDLED; +} + +static struct timer_s timers[] = { + [TID_CLOCKEVENT] = { + .name = "clockevent", + .opts = TIMER_OPTS_DISABLED, + .irqaction = { + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = timer_interrupt, + } + }, + [TID_CLOCKSOURCE] = { + .name = "free-run counter", + .period = ~0, + .opts = TIMER_OPTS_PERIODIC, + .irqaction = { + .flags = IRQF_DISABLED | IRQF_TIMER, + .handler = freerun_interrupt, + } + }, +}; + +static void __init timer_init(void) +{ + u32 bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE}; + int i; + + /* Global init of each 64-bit timer as a whole */ + for(i=0; i<2; i++) { + u32 tgcr, base = bases[i]; + + /* Disabled, Internal clock source */ + davinci_writel(0, base + TCR); + + /* reset both timers, no pre-scaler for timer34 */ + tgcr = 0; + davinci_writel(tgcr, base + TGCR); + + /* Set both timers to unchained 32-bit */ + tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT; + davinci_writel(tgcr, base + TGCR); + + /* Unreset timers */ + tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | + (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); + davinci_writel(tgcr, base + TGCR); + + /* Init both counters to zero */ + davinci_writel(0, base + TIM12); + davinci_writel(0, base + TIM34); + } + + /* Init of each timer as a 32-bit timer */ + for (i=0; i< ARRAY_SIZE(timers); i++) { + struct timer_s *t = &timers[i]; + + if (t->name) { + t->id = i; + t->reg_base = (IS_TIMER1(t->id) ? + DAVINCI_TIMER1_BASE : DAVINCI_TIMER0_BASE); + + if (IS_TIMER_BOT(t->id)) { + t->enamode_shift = 6; + t->tim_reg = t->reg_base + TIM12; + t->prd_reg = t->reg_base + PRD12; + } else { + t->enamode_shift = 22; + t->tim_reg = t->reg_base + TIM34; + t->prd_reg = t->reg_base + PRD34; + } + + /* Register interrupt */ + t->irqaction.name = t->name; + t->irqaction.dev_id = (void *)t; + if (t->irqaction.handler != NULL) { + setup_irq(timer_irqs[t->id], &t->irqaction); + } + + timer32_config(&timers[i]); + } + } +} + +/* + * clocksource + */ +static cycle_t read_cycles(void) +{ + struct timer_s *t = &timers[TID_CLOCKSOURCE]; + + return (cycles_t)timer32_read(t); +} + +static struct clocksource clocksource_davinci = { + .name = "timer0_1", + .rating = 300, + .read = read_cycles, + .mask = CLOCKSOURCE_MASK(32), + .shift = 24, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + +/* + * clockevent + */ +static int davinci_set_next_event(unsigned long cycles, + struct clock_event_device *evt) +{ + struct timer_s *t = &timers[TID_CLOCKEVENT]; + + t->period = cycles; + timer32_config(t); + return 0; +} + +static void davinci_set_mode(enum clock_event_mode mode, + struct clock_event_device *evt) +{ + struct timer_s *t = &timers[TID_CLOCKEVENT]; + + switch (mode) { + case CLOCK_EVT_MODE_PERIODIC: + t->period = CLOCK_TICK_RATE / (HZ); + t->opts = TIMER_OPTS_PERIODIC; + timer32_config(t); + break; + case CLOCK_EVT_MODE_ONESHOT: + t->opts = TIMER_OPTS_ONESHOT; + break; + case CLOCK_EVT_MODE_UNUSED: + case CLOCK_EVT_MODE_SHUTDOWN: + t->opts = TIMER_OPTS_DISABLED; + break; + } +} + +static struct clock_event_device clockevent_davinci = { + .name = "timer0_0", + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, + .shift = 32, + .set_next_event = davinci_set_next_event, + .set_mode = davinci_set_mode, +}; + + +static void __init davinci_timer_init(void) +{ + static char err[] __initdata = KERN_ERR + "%s: can't register clocksource!\n"; + + /* init timer hw */ + timer_init(); + + /* setup clocksource */ + clocksource_davinci.mult = + clocksource_khz2mult(CLOCK_TICK_RATE/1000, + clocksource_davinci.shift); + if (clocksource_register(&clocksource_davinci)) + printk(err, clocksource_davinci.name); + + /* setup clockevent */ + clockevent_davinci.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC, + clockevent_davinci.shift); + clockevent_davinci.max_delta_ns = + clockevent_delta2ns(0xfffffffe, &clockevent_davinci); + clockevent_davinci.min_delta_ns = + clockevent_delta2ns(1, &clockevent_davinci); + + clockevent_davinci.cpumask = cpumask_of_cpu(0); + clockevents_register_device(&clockevent_davinci); +} + +struct sys_timer davinci_timer = { + .init = davinci_timer_init, +}; + + +/* reset board using watchdog timer */ +void davinci_watchdog_reset(void) { + u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE; + + /* disable, internal clock source */ + davinci_writel(0, base + TCR); + + /* reset timer, set mode to 64-bit watchdog, and unreset */ + tgcr = 0; + davinci_writel(tgcr, base + TCR); + tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT; + tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) | + (TGCR_UNRESET << TGCR_TIM34RS_SHIFT); + davinci_writel(tgcr, base + TCR); + + /* clear counter and period regs */ + davinci_writel(0, base + TIM12); + davinci_writel(0, base + TIM34); + davinci_writel(0, base + PRD12); + davinci_writel(0, base + PRD34); + + /* enable */ + wdtcr = davinci_readl(base + WDTCR); + wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT; + davinci_writel(wdtcr, base + WDTCR); + + /* put watchdog in pre-active state */ + wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) | + (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); + davinci_writel(wdtcr, base + WDTCR); + + /* put watchdog in active state */ + wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) | + (WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT); + davinci_writel(wdtcr, base + WDTCR); + + /* write an invalid value to the WDKEY field to trigger + * a watchdog reset */ + wdtcr = 0x00004000; + davinci_writel(wdtcr, base + WDTCR); +} diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index b81391a4e37..2900e59395a 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -171,8 +171,8 @@ config CPU_ARM925T # ARM926T config CPU_ARM926T bool "Support ARM926T processor" - depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX - default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX + depends on ARCH_INTEGRATOR || ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || MACH_REALVIEW_EB || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX || ARCH_DAVINCI + default y if ARCH_VERSATILE_PB || MACH_VERSATILE_AB || ARCH_OMAP730 || ARCH_OMAP16XX || ARCH_PNX4008 || ARCH_NETX || CPU_S3C2412 || ARCH_AT91SAM9260 || ARCH_AT91SAM9261 || ARCH_AT91SAM9263 || ARCH_NS9XXX || ARCH_DAVINCI select CPU_32v5 select CPU_ABRT_EV5TJ select CPU_CACHE_VIVT -- cgit v1.2.3 From a0d6333742c68b321043e4982ec413951ee9afb0 Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Thu, 10 May 2007 22:33:03 -0700 Subject: [ARM] remove useless config option GENERIC_BUST_SPINLOCK Remove the apparently useless config option GENERIC_BUST_SPINLOCK, since nothing in the source tree refers to it. Signed-off-by: Robert P. J. Day Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/Kconfig | 3 --- 1 file changed, 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 34d1462e434..52c209ef58b 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -114,9 +114,6 @@ config GENERIC_CALIBRATE_DELAY bool default y -config GENERIC_BUST_SPINLOCK - bool - config ARCH_MAY_HAVE_PC_FDC bool -- cgit v1.2.3 From 87b247c41674e29f90bf4938799ab079951ccc6b Mon Sep 17 00:00:00 2001 From: Thomas Gleixner Date: Thu, 10 May 2007 22:33:04 -0700 Subject: [ARM] Spinlock initializer cleanup Signed-off-by: Thomas Gleixner Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/kernel/time.c | 2 +- arch/arm/mach-omap2/gpmc.c | 2 +- arch/arm/mach-pnx4008/dma.c | 4 ++-- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index d0540e4eaf5..1533d3ecd7a 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c @@ -512,7 +512,7 @@ void __init time_init(void) #ifdef CONFIG_NO_IDLE_HZ if (system_timer->dyn_tick) - system_timer->dyn_tick->lock = SPIN_LOCK_UNLOCKED; + spin_lock_init(&system_timer->dyn_tick->lock); #endif } diff --git a/arch/arm/mach-omap2/gpmc.c b/arch/arm/mach-omap2/gpmc.c index 54c836a9845..e290b989aa9 100644 --- a/arch/arm/mach-omap2/gpmc.c +++ b/arch/arm/mach-omap2/gpmc.c @@ -54,7 +54,7 @@ static struct resource gpmc_mem_root; static struct resource gpmc_cs_mem[GPMC_CS_NUM]; -static spinlock_t gpmc_mem_lock = SPIN_LOCK_UNLOCKED; +static DEFINE_SPINLOCK(gpmc_mem_lock); static unsigned gpmc_cs_map; static void __iomem *gpmc_base = diff --git a/arch/arm/mach-pnx4008/dma.c b/arch/arm/mach-pnx4008/dma.c index d6a279e4b52..f7009d845be 100644 --- a/arch/arm/mach-pnx4008/dma.c +++ b/arch/arm/mach-pnx4008/dma.c @@ -47,7 +47,7 @@ static struct ll_pool { int count; } ll_pool; -static spinlock_t ll_lock = SPIN_LOCK_UNLOCKED; +static DEFINE_SPINLOCK(ll_lock); struct pnx4008_dma_ll *pnx4008_alloc_ll_entry(dma_addr_t * ll_dma) { @@ -135,7 +135,7 @@ static inline void dma_decrement_usage(void) } } -static spinlock_t dma_lock = SPIN_LOCK_UNLOCKED; +static DEFINE_SPINLOCK(dma_lock); static inline void pnx4008_dma_lock(void) { -- cgit v1.2.3 From fac0779029749dfe8d77a35c26606ebda7a8e176 Mon Sep 17 00:00:00 2001 From: Andrew Morton Date: Thu, 10 May 2007 22:33:05 -0700 Subject: [ARM] stacktrace fix ab1b6f03a10ba1f5638188ab06bf46e33ac3a160 said - remove the unused task argument to save_stack_trace, it's always current then broke arm: arch/arm/kernel/stacktrace.c:56: error: conflicting types for 'save_stack_trace' include/linux/stacktrace.h:11: error: previous declaration of 'save_stack_trace' was here arch/arm/kernel/stacktrace.c:56: error: conflicting types for 'save_stack_trace' include/linux/stacktrace.h:11: error: previous declaration of 'save_stack_trace' was here Cc: Christoph Hellwig Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/kernel/stacktrace.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 77ef35efaa8..398d0c0511e 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -52,21 +52,15 @@ static int save_trace(struct stackframe *frame, void *d) return trace->nr_entries >= trace->max_entries; } -void save_stack_trace(struct stack_trace *trace, struct task_struct *task) +void save_stack_trace(struct stack_trace *trace) { struct stack_trace_data data; unsigned long fp, base; data.trace = trace; data.skip = trace->skip; - - if (task) { - base = (unsigned long)task_stack_page(task); - fp = 0; /* FIXME */ - } else { - base = (unsigned long)task_stack_page(current); - asm("mov %0, fp" : "=r" (fp)); - } + base = (unsigned long)task_stack_page(current); + asm("mov %0, fp" : "=r" (fp)); walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); } -- cgit v1.2.3 From 2fd0237538480c8d704c385b6f9abc3f6c46b760 Mon Sep 17 00:00:00 2001 From: Daniel Wolstenholme Date: Thu, 10 May 2007 22:33:02 -0700 Subject: [ARM] iop13xx: msi support Enable devices to signal interrupts via PCI memory cycles. rev6: * fix enable/disable typo, Michael Ellerman rev5: * fix up ack, enable, and disable for iop13xx_msi_chip rev4: * move smp compile fix to separate patch * use dynamic_irq_init in create_irq() * hookup mask/unmask routines in iop13xx_msi_chip rev3: * change msi.c to use linux/smp.h instead of asm/smp.h * call dynamic_irq_cleanup at destroy_irq time rev2: * destroy_irq did not take the full 128 bits of msi_irq_in_use into account * added missing '&' for calls to test_and_set_bit and clear_bit [ebiederm@xmission.com: review comments/suggestions] [dan.j.williams@intel.com: cleanups/forward port to 2.6-git] Signed-off-by: Daniel Wolstenholme Signed-off-by: Dan Williams Acked-by: Eric W. Biederman Signed-off-by: Andrew Morton Signed-off-by: Russell King --- arch/arm/mach-iop13xx/Makefile | 1 + arch/arm/mach-iop13xx/irq.c | 5 +- arch/arm/mach-iop13xx/msi.c | 194 +++++++++++++++++++++++++++++++++++++++++ arch/arm/mach-iop13xx/pci.c | 16 ++++ 4 files changed, 215 insertions(+), 1 deletion(-) create mode 100644 arch/arm/mach-iop13xx/msi.c (limited to 'arch') diff --git a/arch/arm/mach-iop13xx/Makefile b/arch/arm/mach-iop13xx/Makefile index da1609dc0de..cad015fee12 100644 --- a/arch/arm/mach-iop13xx/Makefile +++ b/arch/arm/mach-iop13xx/Makefile @@ -10,3 +10,4 @@ obj-$(CONFIG_ARCH_IOP13XX) += io.o obj-$(CONFIG_ARCH_IOP13XX) += tpmi.o obj-$(CONFIG_MACH_IQ81340SC) += iq81340sc.o obj-$(CONFIG_MACH_IQ81340MC) += iq81340mc.o +obj-$(CONFIG_PCI_MSI) += msi.o diff --git a/arch/arm/mach-iop13xx/irq.c b/arch/arm/mach-iop13xx/irq.c index b2eb0b96103..5791addd436 100644 --- a/arch/arm/mach-iop13xx/irq.c +++ b/arch/arm/mach-iop13xx/irq.c @@ -26,6 +26,7 @@ #include #include #include +#include /* INTCTL0 CP6 R0 Page 4 */ @@ -258,7 +259,7 @@ void __init iop13xx_init_irq(void) write_intbase(INTBASE); write_intsize(INTSIZE_4); - for(i = 0; i < NR_IOP13XX_IRQS; i++) { + for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { if (i < 32) set_irq_chip(i, &iop13xx_irqchip1); else if (i < 64) @@ -271,4 +272,6 @@ void __init iop13xx_init_irq(void) set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } + + iop13xx_msi_init(); } diff --git a/arch/arm/mach-iop13xx/msi.c b/arch/arm/mach-iop13xx/msi.c new file mode 100644 index 00000000000..2d236930222 --- /dev/null +++ b/arch/arm/mach-iop13xx/msi.c @@ -0,0 +1,194 @@ +/* + * arch/arm/mach-iop13xx/msi.c + * + * PCI MSI support for the iop13xx processor + * + * Copyright (c) 2006, Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program; if not, write to the Free Software Foundation, Inc., 59 Temple + * Place - Suite 330, Boston, MA 02111-1307 USA. + * + */ +#include +#include +#include +#include + + +#define IOP13XX_NUM_MSI_IRQS 128 +static DECLARE_BITMAP(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS); + +/* IMIPR0 CP6 R8 Page 1 + */ +static inline u32 read_imipr_0(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c8, c1, 0":"=r" (val)); + return val; +} +static inline void write_imipr_0(u32 val) +{ + asm volatile("mcr p6, 0, %0, c8, c1, 0"::"r" (val)); +} + +/* IMIPR1 CP6 R9 Page 1 + */ +static inline u32 read_imipr_1(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c9, c1, 0":"=r" (val)); + return val; +} +static inline void write_imipr_1(u32 val) +{ + asm volatile("mcr p6, 0, %0, c9, c1, 0"::"r" (val)); +} + +/* IMIPR2 CP6 R10 Page 1 + */ +static inline u32 read_imipr_2(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c10, c1, 0":"=r" (val)); + return val; +} +static inline void write_imipr_2(u32 val) +{ + asm volatile("mcr p6, 0, %0, c10, c1, 0"::"r" (val)); +} + +/* IMIPR3 CP6 R11 Page 1 + */ +static inline u32 read_imipr_3(void) +{ + u32 val; + asm volatile("mrc p6, 0, %0, c11, c1, 0":"=r" (val)); + return val; +} +static inline void write_imipr_3(u32 val) +{ + asm volatile("mcr p6, 0, %0, c11, c1, 0"::"r" (val)); +} + +static u32 (*read_imipr[])(void) = { + read_imipr_0, + read_imipr_1, + read_imipr_2, + read_imipr_3, +}; + +static void (*write_imipr[])(u32) = { + write_imipr_0, + write_imipr_1, + write_imipr_2, + write_imipr_3, +}; + +static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) +{ + int i, j; + unsigned long status; + + /* read IMIPR registers and find any active interrupts, + * then call ISR for each active interrupt + */ + for (i = 0; i < ARRAY_SIZE(read_imipr); i++) { + status = (read_imipr[i])(); + if (!status) + continue; + + do { + j = find_first_bit(&status, 32); + (write_imipr[i])(1 << j); /* write back to clear bit */ + desc = irq_desc + IRQ_IOP13XX_MSI_0 + j + (32*i); + desc_handle_irq(IRQ_IOP13XX_MSI_0 + j + (32*i), desc); + status = (read_imipr[i])(); + } while (status); + } +} + +void __init iop13xx_msi_init(void) +{ + set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); +} + +/* + * Dynamic irq allocate and deallocation + */ +int create_irq(void) +{ + int irq, pos; + +again: + pos = find_first_zero_bit(msi_irq_in_use, IOP13XX_NUM_MSI_IRQS); + irq = IRQ_IOP13XX_MSI_0 + pos; + if (irq > NR_IRQS) + return -ENOSPC; + /* test_and_set_bit operates on 32-bits at a time */ + if (test_and_set_bit(pos, msi_irq_in_use)) + goto again; + + dynamic_irq_init(irq); + + return irq; +} + +void destroy_irq(unsigned int irq) +{ + int pos = irq - IRQ_IOP13XX_MSI_0; + + dynamic_irq_cleanup(irq); + + clear_bit(pos, msi_irq_in_use); +} + +void arch_teardown_msi_irq(unsigned int irq) +{ + destroy_irq(irq); +} + +static void iop13xx_msi_nop(unsigned int irq) +{ + return; +} + +static struct irq_chip iop13xx_msi_chip = { + .name = "PCI-MSI", + .ack = iop13xx_msi_nop, + .enable = unmask_msi_irq, + .disable = mask_msi_irq, + .mask = mask_msi_irq, + .unmask = unmask_msi_irq, +}; + +int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) +{ + int id, irq = create_irq(); + struct msi_msg msg; + + if (irq < 0) + return irq; + + set_irq_msi(irq, desc); + + msg.address_hi = 0x0; + msg.address_lo = IOP13XX_MU_MIMR_PCI; + + id = iop13xx_cpu_id(); + msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f); + + write_msi_msg(irq, &msg); + set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); + + return irq; +} diff --git a/arch/arm/mach-iop13xx/pci.c b/arch/arm/mach-iop13xx/pci.c index d1d0d32ca77..1c9e94c38b7 100644 --- a/arch/arm/mach-iop13xx/pci.c +++ b/arch/arm/mach-iop13xx/pci.c @@ -559,6 +559,14 @@ void __init iop13xx_atue_setup(void) int func = iop13xx_atu_function(IOP13XX_INIT_ATU_ATUE); u32 reg_val; +#ifdef CONFIG_PCI_MSI + /* BAR 0 (inbound msi window) */ + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR); + __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUE_IALR0); + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUE_IATVR0); + __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUE_IABAR0); +#endif + /* BAR 1 (1:1 mapping with Physical RAM) */ /* Set limit and enable */ __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, @@ -720,6 +728,14 @@ void __init iop13xx_atux_setup(void) else atux_trhfa_timeout = jiffies; +#ifdef CONFIG_PCI_MSI + /* BAR 0 (inbound msi window) */ + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_MU_MUBAR); + __raw_writel(~(IOP13XX_MU_WINDOW_SIZE - 1), IOP13XX_ATUX_IALR0); + __raw_writel(IOP13XX_MU_BASE_PHYS, IOP13XX_ATUX_IATVR0); + __raw_writel(IOP13XX_MU_BASE_PCI, IOP13XX_ATUX_IABAR0); +#endif + /* BAR 1 (1:1 mapping with Physical RAM) */ /* Set limit and enable */ __raw_writel(~(IOP13XX_MAX_RAM_SIZE - PHYS_OFFSET - 1) & ~0x1, -- cgit v1.2.3 From 487194a19d2069bfcc9791c3ab2204bed59b136a Mon Sep 17 00:00:00 2001 From: Frederik Deweerdt Date: Fri, 11 May 2007 19:10:52 +0200 Subject: [ARM] export symbol csum_partial_copy_from_user I've got the following linking error when building 2.6.21-mm2 on ARM: ERROR: "csum_partial_copy_from_user" [net/rxrpc/af-rxrpc.ko] undefined! Linking fails because "csum_partial_copy_from_user" is not exported to modules. This patch adds it to the list of exported symbols. Signed-off-by: Frederik Deweerdt Signed-off-by: Russell King --- arch/arm/kernel/armksyms.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/kernel/armksyms.c b/arch/arm/kernel/armksyms.c index 4779f474f91..9179e822031 100644 --- a/arch/arm/kernel/armksyms.c +++ b/arch/arm/kernel/armksyms.c @@ -76,6 +76,7 @@ EXPORT_SYMBOL(__const_udelay); /* networking */ EXPORT_SYMBOL(csum_partial); +EXPORT_SYMBOL(csum_partial_copy_from_user); EXPORT_SYMBOL(csum_partial_copy_nocheck); EXPORT_SYMBOL(__csum_ipv6_magic); -- cgit v1.2.3 From 9da7cf23a4f9690ceecfd0184cd050be564416f1 Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 11 May 2007 19:54:39 +0100 Subject: [ARM] Update mach-types Signed-off-by: Russell King --- arch/arm/tools/mach-types | 34 +++++++++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index b1142ce4ac4..0a9a5e7f62e 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types @@ -12,7 +12,7 @@ # # http://www.arm.linux.org.uk/developer/machines/?action=new # -# Last update: Mon Apr 16 21:01:04 2007 +# Last update: Fri May 11 19:53:41 2007 # # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number # @@ -1335,3 +1335,35 @@ at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326 comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327 sbc2410x MACH_SBC2410X SBC2410X 1328 at4x0bd MACH_AT4X0BD AT4X0BD 1329 +cbifr MACH_CBIFR CBIFR 1330 +arcom_quantum MACH_ARCOM_QUANTUM ARCOM_QUANTUM 1331 +matrix520 MACH_MATRIX520 MATRIX520 1332 +matrix510 MACH_MATRIX510 MATRIX510 1333 +matrix500 MACH_MATRIX500 MATRIX500 1334 +m501 MACH_M501 M501 1335 +aaeon1270 MACH_AAEON1270 AAEON1270 1336 +matrix500ev MACH_MATRIX500EV MATRIX500EV 1337 +pac500 MACH_PAC500 PAC500 1338 +pnx8181 MACH_PNX8181 PNX8181 1339 +colibri320 MACH_COLIBRI320 COLIBRI320 1340 +aztoolbb MACH_AZTOOLBB AZTOOLBB 1341 +aztoolg2 MACH_AZTOOLG2 AZTOOLG2 1342 +dvlhost MACH_DVLHOST DVLHOST 1343 +zir9200 MACH_ZIR9200 ZIR9200 1344 +zir9260 MACH_ZIR9260 ZIR9260 1345 +cocopah MACH_COCOPAH COCOPAH 1346 +nds MACH_NDS NDS 1347 +rosencrantz MACH_ROSENCRANTZ ROSENCRANTZ 1348 +fttx_odsc MACH_FTTX_ODSC FTTX_ODSC 1349 +classe_r6904 MACH_CLASSE_R6904 CLASSE_R6904 1350 +cam60 MACH_CAM60 CAM60 1351 +mxc30031ads MACH_MXC30031ADS MXC30031ADS 1352 +datacall MACH_DATACALL DATACALL 1353 +at91eb01 MACH_AT91EB01 AT91EB01 1354 +rty MACH_RTY RTY 1355 +dwl2100 MACH_DWL2100 DWL2100 1356 +vinsi MACH_VINSI VINSI 1357 +db88f5281 MACH_DB88F5281 DB88F5281 1358 +csb726 MACH_CSB726 CSB726 1359 +tik27 MACH_TIK27 TIK27 1360 +mx_uc7420 MACH_MX_UC7420 MX_UC7420 1361 -- cgit v1.2.3 From 877d7720f5f67793b9b6027840d2c88ea25dc4c8 Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Fri, 11 May 2007 20:49:56 +0100 Subject: [ARM] 4370/3: AT91: Support for Atmel AT91SAM9RL processors. Add support for Atmel's new AT91SAM9RL range of processors. Includes similar peripherals as other AT91SAM9 processors, but with a High-speed USB controller and various sizes of internal SRAM. Signed-off-by: Nicolas Ferre Signed-off-by: Andrew Victor Signed-off-by: Russell King --- arch/arm/mach-at91/Kconfig | 3 + arch/arm/mach-at91/Makefile | 1 + arch/arm/mach-at91/at91sam9rl.c | 341 +++++++++++++++++ arch/arm/mach-at91/at91sam9rl_devices.c | 634 ++++++++++++++++++++++++++++++++ arch/arm/mach-at91/generic.h | 2 + arch/arm/mm/Kconfig | 4 +- 6 files changed, 983 insertions(+), 2 deletions(-) create mode 100644 arch/arm/mach-at91/at91sam9rl.c create mode 100644 arch/arm/mach-at91/at91sam9rl_devices.c (limited to 'arch') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 018d637f87f..1ba120c5cd0 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -17,6 +17,9 @@ config ARCH_AT91SAM9261 config ARCH_AT91SAM9263 bool "AT91SAM9263" +config ARCH_AT91SAM9RL + bool "AT91SAM9RL" + endchoice # ---------------------------------------------------------- diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index a412ae18a42..66d79e6c68a 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devic obj-$(CONFIG_ARCH_AT91SAM9260) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o +obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o # AT91RM9200 board-specific support obj-$(CONFIG_MACH_ONEARM) += board-1arm.o diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c new file mode 100644 index 00000000000..4813a35f6cf --- /dev/null +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -0,0 +1,341 @@ +/* + * arch/arm/mach-at91/at91sam9rl.c + * + * Copyright (C) 2005 SAN People + * Copyright (C) 2007 Atmel Corporation + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include "generic.h" +#include "clock.h" + +static struct map_desc at91sam9rl_io_desc[] __initdata = { + { + .virtual = AT91_VA_BASE_SYS, + .pfn = __phys_to_pfn(AT91_BASE_SYS), + .length = SZ_16K, + .type = MT_DEVICE, + }, +}; + +static struct map_desc at91sam9rl_sram_desc[] __initdata = { + { + .pfn = __phys_to_pfn(AT91SAM9RL_SRAM_BASE), + .type = MT_DEVICE, + } +}; + +/* -------------------------------------------------------------------- + * Clocks + * -------------------------------------------------------------------- */ + +/* + * The peripheral clocks. + */ +static struct clk pioA_clk = { + .name = "pioA_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_PIOA, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioB_clk = { + .name = "pioB_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_PIOB, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioC_clk = { + .name = "pioC_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_PIOC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pioD_clk = { + .name = "pioD_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_PIOD, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart0_clk = { + .name = "usart0_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_US0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart1_clk = { + .name = "usart1_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_US1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart2_clk = { + .name = "usart2_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_US2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk usart3_clk = { + .name = "usart3_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_US3, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk mmc_clk = { + .name = "mci_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_MCI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi0_clk = { + .name = "twi0_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TWI0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk twi1_clk = { + .name = "twi1_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TWI1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk spi_clk = { + .name = "spi_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_SPI, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc0_clk = { + .name = "ssc0_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_SSC0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ssc1_clk = { + .name = "ssc1_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_SSC1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tc0_clk = { + .name = "tc0_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TC0, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tc1_clk = { + .name = "tc1_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TC1, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tc2_clk = { + .name = "tc2_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TC2, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk pwmc_clk = { + .name = "pwmc_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_PWMC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk tsc_clk = { + .name = "tsc_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_TSC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk dma_clk = { + .name = "dma_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_DMA, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk udphs_clk = { + .name = "udphs_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_UDPHS, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk lcdc_clk = { + .name = "lcdc_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_LCDC, + .type = CLK_TYPE_PERIPHERAL, +}; +static struct clk ac97_clk = { + .name = "ac97_clk", + .pmc_mask = 1 << AT91SAM9RL_ID_AC97C, + .type = CLK_TYPE_PERIPHERAL, +}; + +static struct clk *periph_clocks[] __initdata = { + &pioA_clk, + &pioB_clk, + &pioC_clk, + &pioD_clk, + &usart0_clk, + &usart1_clk, + &usart2_clk, + &usart3_clk, + &mmc_clk, + &twi0_clk, + &twi1_clk, + &spi_clk, + &ssc0_clk, + &ssc1_clk, + &tc0_clk, + &tc1_clk, + &tc2_clk, + &pwmc_clk, + &tsc_clk, + &dma_clk, + &udphs_clk, + &lcdc_clk, + &ac97_clk, + // irq0 +}; + +/* + * The two programmable clocks. + * You must configure pin multiplexing to bring these signals out. + */ +static struct clk pck0 = { + .name = "pck0", + .pmc_mask = AT91_PMC_PCK0, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 0, +}; +static struct clk pck1 = { + .name = "pck1", + .pmc_mask = AT91_PMC_PCK1, + .type = CLK_TYPE_PROGRAMMABLE, + .id = 1, +}; + +static void __init at91sam9rl_register_clocks(void) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) + clk_register(periph_clocks[i]); + + clk_register(&pck0); + clk_register(&pck1); +} + +/* -------------------------------------------------------------------- + * GPIO + * -------------------------------------------------------------------- */ + +static struct at91_gpio_bank at91sam9rl_gpio[] = { + { + .id = AT91SAM9RL_ID_PIOA, + .offset = AT91_PIOA, + .clock = &pioA_clk, + }, { + .id = AT91SAM9RL_ID_PIOB, + .offset = AT91_PIOB, + .clock = &pioB_clk, + }, { + .id = AT91SAM9RL_ID_PIOC, + .offset = AT91_PIOC, + .clock = &pioC_clk, + }, { + .id = AT91SAM9RL_ID_PIOD, + .offset = AT91_PIOD, + .clock = &pioD_clk, + } +}; + +static void at91sam9rl_reset(void) +{ + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); +} + + +/* -------------------------------------------------------------------- + * AT91SAM9RL processor initialization + * -------------------------------------------------------------------- */ + +void __init at91sam9rl_initialize(unsigned long main_clock) +{ + unsigned long cidr, sram_size; + + /* Map peripherals */ + iotable_init(at91sam9rl_io_desc, ARRAY_SIZE(at91sam9rl_io_desc)); + + cidr = at91_sys_read(AT91_DBGU_CIDR); + + switch (cidr & AT91_CIDR_SRAMSIZ) { + case AT91_CIDR_SRAMSIZ_32K: + sram_size = 2 * SZ_16K; + break; + case AT91_CIDR_SRAMSIZ_16K: + default: + sram_size = SZ_16K; + } + + at91sam9rl_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size; + at91sam9rl_sram_desc->length = sram_size; + + /* Map SRAM */ + iotable_init(at91sam9rl_sram_desc, ARRAY_SIZE(at91sam9rl_sram_desc)); + + at91_arch_reset = at91sam9rl_reset; + at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); + + /* Init clock subsystem */ + at91_clock_init(main_clock); + + /* Register the processor-specific clocks */ + at91sam9rl_register_clocks(); + + /* Register GPIO subsystem */ + at91_gpio_init(at91sam9rl_gpio, 4); +} + +/* -------------------------------------------------------------------- + * Interrupt initialization + * -------------------------------------------------------------------- */ + +/* + * The default interrupt priority levels (0 = lowest, 7 = highest). + */ +static unsigned int at91sam9rl_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller */ + 7, /* System Peripherals */ + 1, /* Parallel IO Controller A */ + 1, /* Parallel IO Controller B */ + 1, /* Parallel IO Controller C */ + 1, /* Parallel IO Controller D */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ + 5, /* USART 3 */ + 0, /* Multimedia Card Interface */ + 6, /* Two-Wire Interface 0 */ + 6, /* Two-Wire Interface 1 */ + 5, /* Serial Peripheral Interface */ + 4, /* Serial Synchronous Controller 0 */ + 4, /* Serial Synchronous Controller 1 */ + 0, /* Timer Counter 0 */ + 0, /* Timer Counter 1 */ + 0, /* Timer Counter 2 */ + 0, + 0, /* Touch Screen Controller */ + 0, /* DMA Controller */ + 2, /* USB Device High speed port */ + 2, /* LCD Controller */ + 6, /* AC97 Controller */ + 0, + 0, + 0, + 0, + 0, + 0, + 0, /* Advanced Interrupt Controller */ +}; + +void __init at91sam9rl_init_interrupts(unsigned int priority[NR_AIC_IRQS]) +{ + if (!priority) + priority = at91sam9rl_default_irq_priority; + + /* Initialize the AIC interrupt controller */ + at91_aic_init(priority); + + /* Enable GPIO interrupts */ + at91_gpio_irq_setup(); +} diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c new file mode 100644 index 00000000000..e775aa65bb6 --- /dev/null +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -0,0 +1,634 @@ +/* + * Copyright (C) 2007 Atmel Corporation + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive for + * more details. + */ + +#include +#include + +#include +#include + +#include