From c9c1b834c7b6e00badfd9a775682644f192f0357 Mon Sep 17 00:00:00 2001 From: Jeff Kirsher Date: Wed, 16 Aug 2006 13:38:54 -0700 Subject: e1000: Allow NVM to setup LPLU for IGP2 and IGP3 Allow NVM to setup LPLU for IGP2 and IGP3. Only IGP needs LPLU D3 disabled during init here. Signed-off-by: Jeff Kirsher Signed-off-by: Auke Kok --- drivers/net/e1000/e1000_hw.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) (limited to 'drivers/net/e1000/e1000_hw.c') diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 583518ae49c..3728f33045c 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c @@ -1324,11 +1324,14 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) E1000_WRITE_REG(hw, LEDCTL, led_ctrl); } - /* disable lplu d3 during driver init */ - ret_val = e1000_set_d3_lplu_state(hw, FALSE); - if (ret_val) { - DEBUGOUT("Error Disabling LPLU D3\n"); - return ret_val; + /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */ + if (hw->phy_type == e1000_phy_igp) { + /* disable lplu d3 during driver init */ + ret_val = e1000_set_d3_lplu_state(hw, FALSE); + if (ret_val) { + DEBUGOUT("Error Disabling LPLU D3\n"); + return ret_val; + } } /* disable lplu d0 during driver init */ -- cgit v1.2.3 From 7820d4281a0d746a92992a9117aec007628ae3fe Mon Sep 17 00:00:00 2001 From: Jeff Kirsher Date: Wed, 16 Aug 2006 13:39:00 -0700 Subject: e1000: Force full DMA clocking for 10/100 speed Signed-off-by: Jeff Kirsher Signed-off-by: Auke Kok --- drivers/net/e1000/e1000_hw.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'drivers/net/e1000/e1000_hw.c') diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 3728f33045c..8eddfdf62f5 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c @@ -718,6 +718,17 @@ e1000_init_hw(struct e1000_hw *hw) DEBUGFUNC("e1000_init_hw"); + /* force full DMA clock frequency for 10/100 on ICH8 A0-B0 */ + if (hw->mac_type == e1000_ich8lan) { + reg_data = E1000_READ_REG(hw, TARC0); + reg_data |= 0x30000000; + E1000_WRITE_REG(hw, TARC0, reg_data); + + reg_data = E1000_READ_REG(hw, STATUS); + reg_data &= ~0x80000000; + E1000_WRITE_REG(hw, STATUS, reg_data); + } + /* Initialize Identification LED */ ret_val = e1000_id_led_init(hw); if(ret_val) { -- cgit v1.2.3