From 5f1377d42bb89988fd9c86a92d1985320ff5053e Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Tue, 6 Oct 2009 15:47:55 +0100 Subject: Staging: et131x: PHY loopback cannot be set (and isn't useful for us anyway) Remove the stuff that falls out from this always being zero. Signed-off-by: Alan Cox Signed-off-by: Greg Kroah-Hartman --- drivers/staging/et131x/et131x_initpci.c | 66 ++++++++++++--------------------- 1 file changed, 24 insertions(+), 42 deletions(-) (limited to 'drivers/staging/et131x/et131x_initpci.c') diff --git a/drivers/staging/et131x/et131x_initpci.c b/drivers/staging/et131x/et131x_initpci.c index db1ce58ba6a..b76fa73395e 100644 --- a/drivers/staging/et131x/et131x_initpci.c +++ b/drivers/staging/et131x/et131x_initpci.c @@ -329,52 +329,34 @@ void ConfigGlobalRegs(struct et131x_adapter *etdev) { struct _GLOBAL_t __iomem *regs = &etdev->regs->global; - if (etdev->RegistryPhyLoopbk == false) { - if (etdev->RegistryJumboPacket < 2048) { - /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word - * block of RAM that the driver can split between Tx - * and Rx as it desires. Our default is to split it - * 50/50: - */ - writel(0, ®s->rxq_start_addr); - writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr); - writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr); - writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); - } else if (etdev->RegistryJumboPacket < 8192) { - /* For jumbo packets > 2k but < 8k, split 50-50. */ - writel(0, ®s->rxq_start_addr); - writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr); - writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr); - writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); - } else { - /* 9216 is the only packet size greater than 8k that - * is available. The Tx buffer has to be big enough - * for one whole packet on the Tx side. We'll make - * the Tx 9408, and give the rest to Rx - */ - writel(0x0000, ®s->rxq_start_addr); - writel(0x01b3, ®s->rxq_end_addr); - writel(0x01b4, ®s->txq_start_addr); - writel(INTERNAL_MEM_SIZE - 1,®s->txq_end_addr); - } - - /* Initialize the loopback register. Disable all loopbacks. */ - writel(0, ®s->loopback); + writel(0, ®s->rxq_start_addr); + writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); + + if (etdev->RegistryJumboPacket < 2048) { + /* Tx / RxDMA and Tx/Rx MAC interfaces have a 1k word + * block of RAM that the driver can split between Tx + * and Rx as it desires. Our default is to split it + * 50/50: + */ + writel(PARM_RX_MEM_END_DEF, ®s->rxq_end_addr); + writel(PARM_RX_MEM_END_DEF + 1, ®s->txq_start_addr); + } else if (etdev->RegistryJumboPacket < 8192) { + /* For jumbo packets > 2k but < 8k, split 50-50. */ + writel(INTERNAL_MEM_RX_OFFSET, ®s->rxq_end_addr); + writel(INTERNAL_MEM_RX_OFFSET + 1, ®s->txq_start_addr); } else { - /* For PHY Line loopback, the memory is configured as if Tx - * and Rx both have all the memory. This is because the - * RxMAC will write data into the space, and the TxMAC will - * read it out. + /* 9216 is the only packet size greater than 8k that + * is available. The Tx buffer has to be big enough + * for one whole packet on the Tx side. We'll make + * the Tx 9408, and give the rest to Rx */ - writel(0, ®s->rxq_start_addr); - writel(INTERNAL_MEM_SIZE - 1, ®s->rxq_end_addr); - writel(0, ®s->txq_start_addr); - writel(INTERNAL_MEM_SIZE - 1, ®s->txq_end_addr); - - /* Initialize the loopback register (MAC loopback). */ - writel(ET_LOOP_MAC, ®s->loopback); + writel(0x01b3, ®s->rxq_end_addr); + writel(0x01b4, ®s->txq_start_addr); } + /* Initialize the loopback register. Disable all loopbacks. */ + writel(0, ®s->loopback); + /* MSI Register */ writel(0, ®s->msi_config); -- cgit v1.2.3