From c1450f156fda8921a55e3f4fe596274278010f31 Mon Sep 17 00:00:00 2001 From: Stefan Schmidt Date: Wed, 9 Jul 2008 08:06:32 +0100 Subject: [ARM] 5164/1: pxafb: Support for RGB666, RGBT666, RGB888 and RGBT888 Add the .depth field to pxafb_mode_info and use it to set pixel data format as 18(RGB666), 19(RGBT666), 24(RGB888) or 25(RGBT888) Signed-off-by: Daniel Ribeiro Acked-by: Eric Miao Signed-off-by: Russell King --- drivers/video/pxafb.c | 64 ++++++++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 61 insertions(+), 3 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 3682bbd7e50..295ff4e1955 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -227,6 +227,22 @@ static int pxafb_bpp_to_lccr3(struct fb_var_screeninfo *var) case 4: ret = LCCR3_4BPP; break; case 8: ret = LCCR3_8BPP; break; case 16: ret = LCCR3_16BPP; break; + case 24: + switch (var->red.length + var->green.length + + var->blue.length + var->transp.length) { + case 18: ret = LCCR3_18BPP_P | LCCR3_PDFOR_3; break; + case 19: ret = LCCR3_19BPP_P; break; + } + break; + case 32: + switch (var->red.length + var->green.length + + var->blue.length + var->transp.length) { + case 18: ret = LCCR3_18BPP | LCCR3_PDFOR_3; break; + case 19: ret = LCCR3_19BPP; break; + case 24: ret = LCCR3_24BPP | LCCR3_PDFOR_3; break; + case 25: ret = LCCR3_25BPP; break; + } + break; } return ret; } @@ -345,6 +361,41 @@ static int pxafb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) var->green.offset = 5; var->green.length = 6; var->blue.offset = 0; var->blue.length = 5; var->transp.offset = var->transp.length = 0; + } else if (var->bits_per_pixel > 16) { + struct pxafb_mode_info *mode; + + mode = pxafb_getmode(inf, var); + if (!mode) + return -EINVAL; + + switch (mode->depth) { + case 18: /* RGB666 */ + var->transp.offset = var->transp.length = 0; + var->red.offset = 12; var->red.length = 6; + var->green.offset = 6; var->green.length = 6; + var->blue.offset = 0; var->blue.length = 6; + break; + case 19: /* RGBT666 */ + var->transp.offset = 18; var->transp.length = 1; + var->red.offset = 12; var->red.length = 6; + var->green.offset = 6; var->green.length = 6; + var->blue.offset = 0; var->blue.length = 6; + break; + case 24: /* RGB888 */ + var->transp.offset = var->transp.length = 0; + var->red.offset = 16; var->red.length = 8; + var->green.offset = 8; var->green.length = 8; + var->blue.offset = 0; var->blue.length = 8; + break; + case 25: /* RGBT888 */ + var->transp.offset = 24; var->transp.length = 1; + var->red.offset = 16; var->red.length = 8; + var->green.offset = 8; var->green.length = 8; + var->blue.offset = 0; var->blue.length = 8; + break; + default: + return -EINVAL; + } } else { var->red.offset = var->green.offset = 0; var->blue.offset = var->transp.offset = 0; @@ -376,7 +427,7 @@ static int pxafb_set_par(struct fb_info *info) struct pxafb_info *fbi = (struct pxafb_info *)info; struct fb_var_screeninfo *var = &info->var; - if (var->bits_per_pixel == 16) + if (var->bits_per_pixel >= 16) fbi->fb.fix.visual = FB_VISUAL_TRUECOLOR; else if (!fbi->cmap_static) fbi->fb.fix.visual = FB_VISUAL_PSEUDOCOLOR; @@ -391,7 +442,7 @@ static int pxafb_set_par(struct fb_info *info) fbi->fb.fix.line_length = var->xres_virtual * var->bits_per_pixel / 8; - if (var->bits_per_pixel == 16) + if (var->bits_per_pixel >= 16) fbi->palette_size = 0; else fbi->palette_size = var->bits_per_pixel == 1 ? @@ -404,7 +455,7 @@ static int pxafb_set_par(struct fb_info *info) */ pxafb_set_truecolor(fbi->fb.fix.visual == FB_VISUAL_TRUECOLOR); - if (fbi->fb.var.bits_per_pixel == 16) + if (fbi->fb.var.bits_per_pixel >= 16) fb_dealloc_cmap(&fbi->fb.cmap); else fb_alloc_cmap(&fbi->fb.cmap, 1<fb.var.bits_per_pixel, 0); @@ -831,6 +882,8 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var, case 4: case 8: case 16: + case 24: + case 32: break; default: printk(KERN_ERR "%s: invalid bit depth %d\n", @@ -968,6 +1021,11 @@ static void pxafb_setup_gpio(struct pxafb_info *fbi) for (gpio = 58; ldd_bits; gpio++, ldd_bits--) pxa_gpio_mode(gpio | GPIO_ALT_FN_2_OUT); + /* 18 bit interface */ + if (fbi->fb.var.bits_per_pixel > 16) { + pxa_gpio_mode(86 | GPIO_ALT_FN_2_OUT); + pxa_gpio_mode(87 | GPIO_ALT_FN_2_OUT); + } pxa_gpio_mode(GPIO74_LCD_FCLK_MD); pxa_gpio_mode(GPIO75_LCD_LCLK_MD); pxa_gpio_mode(GPIO76_LCD_PCLK_MD); -- cgit v1.2.3 From e945b568e28b42de893ef24989372f0219501d32 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 17 Jul 2008 21:16:10 +0200 Subject: m68k: Return -ENODEV if no device is found According to the tests in do_initcalls(), the proper error code in case no device is found is -ENODEV, not -ENXIO or -EIO. Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- drivers/video/atafb.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/video') diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index dff35474b85..c8605730a1b 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c @@ -3110,7 +3110,7 @@ int __init atafb_init(void) printk("atafb_init: start\n"); if (!MACH_IS_ATARI) - return -ENXIO; + return -ENODEV; do { #ifdef ATAFB_EXT -- cgit v1.2.3 From db3e5289f51b5d02767fa2951d5f0375efdba35c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 17 Jul 2008 21:16:18 +0200 Subject: amifb: Register Amiga-specific video modes with sysfs Register the Amiga-specific video modes with sysfs, so you can see them in /sys/class/graphics/fb0/modes and change the video mode by writing to /sys/class/graphics/fb0/mode. Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- drivers/video/amifb.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/video') diff --git a/drivers/video/amifb.c b/drivers/video/amifb.c index 05a328c11a8..45c154ade9c 100644 --- a/drivers/video/amifb.c +++ b/drivers/video/amifb.c @@ -2383,6 +2383,9 @@ default_chipset: goto amifb_error; } + fb_videomode_to_modelist(ami_modedb, NUM_TOTAL_MODES, + &fb_info.modelist); + round_down_bpp = 0; chipptr = chipalloc(fb_info.fix.smem_len+ SPRITEMEMSIZE+ -- cgit v1.2.3 From da8513c9b84317d1a2071644b6ccf734463d4849 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 17 Jul 2008 21:16:19 +0200 Subject: atafb: Register Atari-specific video modes with sysfs Register the Atari-specific video modes with sysfs, so you can see them in /sys/class/graphics/fb0/modes and change the video mode by writing to /sys/class/graphics/fb0/mode. Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- drivers/video/atafb.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'drivers/video') diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index c8605730a1b..fa55d356b53 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c @@ -3230,6 +3230,9 @@ int __init atafb_init(void) return -EINVAL; } + fb_videomode_to_modelist(atafb_modedb, NUM_TOTAL_MODES, + &fb_info.modelist); + atafb_set_disp(&fb_info); fb_alloc_cmap(&(fb_info.cmap), 1 << fb_info.var.bits_per_pixel, 0); -- cgit v1.2.3 From 8b54b6135a3e6d6e7c7967de7b408fd89afb0333 Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Thu, 17 Jul 2008 21:16:20 +0200 Subject: drivers/video/c2p.c: add MODULE_LICENSE This patch adds the missing MODULE_LICENSE("GPL"). Reported-by: Adrian Bunk Signed-off-by: Adrian Bunk Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- drivers/video/c2p.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/video') diff --git a/drivers/video/c2p.c b/drivers/video/c2p.c index 5c30bbd3305..03ceb1a5743 100644 --- a/drivers/video/c2p.c +++ b/drivers/video/c2p.c @@ -12,6 +12,7 @@ * for more details. */ +#include #include #include "c2p.h" @@ -227,3 +228,4 @@ void c2p(u8 *dst, const u8 *src, u32 dx, u32 dy, u32 width, u32 height, } } +MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 880e5e212ec5ab12411e40c78bd5ac501e9caeed Mon Sep 17 00:00:00 2001 From: Adrian Bunk Date: Thu, 17 Jul 2008 21:16:22 +0200 Subject: export c2p This patch fixes the following build error: <-- snip --> .. Building modules, stage 2. MODPOST 1203 modules ERROR: "c2p" [drivers/video/amifb.ko] undefined! .. make[2]: *** [__modpost] Error 1 <-- snip --> Reported-by: Adrian Bunk Signed-off-by: Adrian Bunk Signed-off-by: Geert Uytterhoeven Signed-off-by: Linus Torvalds --- drivers/video/c2p.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/video') diff --git a/drivers/video/c2p.c b/drivers/video/c2p.c index 03ceb1a5743..376bc07ff95 100644 --- a/drivers/video/c2p.c +++ b/drivers/video/c2p.c @@ -227,5 +227,6 @@ void c2p(u8 *dst, const u8 *src, u32 dx, u32 dy, u32 width, u32 height, dst += dst_nextline; } } +EXPORT_SYMBOL_GPL(c2p); MODULE_LICENSE("GPL"); -- cgit v1.2.3 From 059e4938f8b060b10c4352e6c45739473bc73267 Mon Sep 17 00:00:00 2001 From: Masakazu Mokuno Date: Thu, 17 Jul 2008 07:22:19 +1000 Subject: powerpc/ps3: Add a sub-match id to ps3_system_bus Add sub match id for ps3 system bus so that two different system bus devices can be connected to a shared device. Signed-off-by: Masakazu Mokuno Signed-off-by: Geoff Levand Signed-off-by: Benjamin Herrenschmidt --- drivers/video/ps3fb.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/video') diff --git a/drivers/video/ps3fb.c b/drivers/video/ps3fb.c index dc3af1c78c5..4b5d8077190 100644 --- a/drivers/video/ps3fb.c +++ b/drivers/video/ps3fb.c @@ -1297,6 +1297,7 @@ static int ps3fb_shutdown(struct ps3_system_bus_device *dev) static struct ps3_system_bus_driver ps3fb_driver = { .match_id = PS3_MATCH_ID_GRAPHICS, + .match_sub_id = PS3_MATCH_SUB_ID_FB, .core.name = DEVICE_NAME, .core.owner = THIS_MODULE, .probe = ps3fb_probe, -- cgit v1.2.3 From 57a20d8fb0d2a05abe40abd6bb29e3f923721f1b Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Thu, 17 Jul 2008 15:05:22 +1000 Subject: fbdev: Teaches offb about palette on radeon r5xx/r6xx The offb driver already has a collection of hacks to be able to set the palette on various chips. This adds support for r5xx/r6xx radeons. This is needed as offb is the only console solution on these currently and the firmware in some cases sets a really bad color palette. This fixes using some Radeon X16xx on the Powerstation for example. Signed-off-by: Benjamin Herrenschmidt --- drivers/video/offb.c | 192 +++++++++++++++++++++++++++++++++++++-------------- 1 file changed, 142 insertions(+), 50 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/offb.c b/drivers/video/offb.c index d7b3dcc0dc4..e1d9eeb1aea 100644 --- a/drivers/video/offb.c +++ b/drivers/video/offb.c @@ -47,6 +47,7 @@ enum { cmap_M3B, /* ATI Rage Mobility M3 Head B */ cmap_radeon, /* ATI Radeon */ cmap_gxt2000, /* IBM GXT2000 */ + cmap_avivo, /* ATI R5xx */ }; struct offb_par { @@ -58,26 +59,36 @@ struct offb_par { struct offb_par default_par; - /* - * Interface used by the world - */ - -static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, - u_int transp, struct fb_info *info); -static int offb_blank(int blank, struct fb_info *info); - #ifdef CONFIG_PPC32 extern boot_infos_t *boot_infos; #endif -static struct fb_ops offb_ops = { - .owner = THIS_MODULE, - .fb_setcolreg = offb_setcolreg, - .fb_blank = offb_blank, - .fb_fillrect = cfb_fillrect, - .fb_copyarea = cfb_copyarea, - .fb_imageblit = cfb_imageblit, -}; +/* Definitions used by the Avivo palette hack */ +#define AVIVO_DC_LUT_RW_SELECT 0x6480 +#define AVIVO_DC_LUT_RW_MODE 0x6484 +#define AVIVO_DC_LUT_RW_INDEX 0x6488 +#define AVIVO_DC_LUT_SEQ_COLOR 0x648c +#define AVIVO_DC_LUT_PWL_DATA 0x6490 +#define AVIVO_DC_LUT_30_COLOR 0x6494 +#define AVIVO_DC_LUT_READ_PIPE_SELECT 0x6498 +#define AVIVO_DC_LUT_WRITE_EN_MASK 0x649c +#define AVIVO_DC_LUT_AUTOFILL 0x64a0 + +#define AVIVO_DC_LUTA_CONTROL 0x64c0 +#define AVIVO_DC_LUTA_BLACK_OFFSET_BLUE 0x64c4 +#define AVIVO_DC_LUTA_BLACK_OFFSET_GREEN 0x64c8 +#define AVIVO_DC_LUTA_BLACK_OFFSET_RED 0x64cc +#define AVIVO_DC_LUTA_WHITE_OFFSET_BLUE 0x64d0 +#define AVIVO_DC_LUTA_WHITE_OFFSET_GREEN 0x64d4 +#define AVIVO_DC_LUTA_WHITE_OFFSET_RED 0x64d8 + +#define AVIVO_DC_LUTB_CONTROL 0x6cc0 +#define AVIVO_DC_LUTB_BLACK_OFFSET_BLUE 0x6cc4 +#define AVIVO_DC_LUTB_BLACK_OFFSET_GREEN 0x6cc8 +#define AVIVO_DC_LUTB_BLACK_OFFSET_RED 0x6ccc +#define AVIVO_DC_LUTB_WHITE_OFFSET_BLUE 0x6cd0 +#define AVIVO_DC_LUTB_WHITE_OFFSET_GREEN 0x6cd4 +#define AVIVO_DC_LUTB_WHITE_OFFSET_RED 0x6cd8 /* * Set a single color register. The values supplied are already @@ -160,6 +171,17 @@ static int offb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, out_le32(((unsigned __iomem *) par->cmap_adr) + regno, (red << 16 | green << 8 | blue)); break; + case cmap_avivo: + /* Write to both LUTs for now */ + writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); + writel(((red) << 22) | ((green) << 12) | ((blue) << 2), + par->cmap_adr + AVIVO_DC_LUT_30_COLOR); + writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writeb(regno, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); + writel(((red) << 22) | ((green) << 12) | ((blue) << 2), + par->cmap_adr + AVIVO_DC_LUT_30_COLOR); + break; } return 0; @@ -216,12 +238,59 @@ static int offb_blank(int blank, struct fb_info *info) out_le32(((unsigned __iomem *) par->cmap_adr) + i, 0); break; + case cmap_avivo: + writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); + writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); + writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writeb(i, par->cmap_adr + AVIVO_DC_LUT_RW_INDEX); + writel(0, par->cmap_adr + AVIVO_DC_LUT_30_COLOR); + break; } } else fb_set_cmap(&info->cmap, info); return 0; } +static int offb_set_par(struct fb_info *info) +{ + struct offb_par *par = (struct offb_par *) info->par; + + /* On avivo, initialize palette control */ + if (par->cmap_type == cmap_avivo) { + writel(0, par->cmap_adr + AVIVO_DC_LUTA_CONTROL); + writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_BLUE); + writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_GREEN); + writel(0, par->cmap_adr + AVIVO_DC_LUTA_BLACK_OFFSET_RED); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_BLUE); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_GREEN); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTA_WHITE_OFFSET_RED); + writel(0, par->cmap_adr + AVIVO_DC_LUTB_CONTROL); + writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_BLUE); + writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_GREEN); + writel(0, par->cmap_adr + AVIVO_DC_LUTB_BLACK_OFFSET_RED); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_BLUE); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_GREEN); + writel(0x0000ffff, par->cmap_adr + AVIVO_DC_LUTB_WHITE_OFFSET_RED); + writel(1, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); + writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); + writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_SELECT); + writel(0, par->cmap_adr + AVIVO_DC_LUT_RW_MODE); + writel(0x0000003f, par->cmap_adr + AVIVO_DC_LUT_WRITE_EN_MASK); + } + return 0; +} + +static struct fb_ops offb_ops = { + .owner = THIS_MODULE, + .fb_setcolreg = offb_setcolreg, + .fb_set_par = offb_set_par, + .fb_blank = offb_blank, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, +}; static void __iomem *offb_map_reg(struct device_node *np, int index, unsigned long offset, unsigned long size) @@ -245,6 +314,59 @@ static void __iomem *offb_map_reg(struct device_node *np, int index, return ioremap(taddr + offset, size); } +static void offb_init_palette_hacks(struct fb_info *info, struct device_node *dp, + const char *name, unsigned long address) +{ + struct offb_par *par = (struct offb_par *) info->par; + + if (dp && !strncmp(name, "ATY,Rage128", 11)) { + par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); + if (par->cmap_adr) + par->cmap_type = cmap_r128; + } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12) + || !strncmp(name, "ATY,RageM3p12A", 14))) { + par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); + if (par->cmap_adr) + par->cmap_type = cmap_M3A; + } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) { + par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); + if (par->cmap_adr) + par->cmap_type = cmap_M3B; + } else if (dp && !strncmp(name, "ATY,Rage6", 9)) { + par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff); + if (par->cmap_adr) + par->cmap_type = cmap_radeon; + } else if (!strncmp(name, "ATY,", 4)) { + unsigned long base = address & 0xff000000UL; + par->cmap_adr = + ioremap(base + 0x7ff000, 0x1000) + 0xcc0; + par->cmap_data = par->cmap_adr + 1; + par->cmap_type = cmap_m64; + } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") || + of_device_is_compatible(dp, "pci1014,21c"))) { + par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000); + if (par->cmap_adr) + par->cmap_type = cmap_gxt2000; + } else if (dp && !strncmp(name, "vga,Display-", 12)) { + /* Look for AVIVO initialized by SLOF */ + struct device_node *pciparent = of_get_parent(dp); + const u32 *vid, *did; + vid = of_get_property(pciparent, "vendor-id", NULL); + did = of_get_property(pciparent, "device-id", NULL); + /* This will match most R5xx */ + if (vid && did && *vid == 0x1002 && + ((*did >= 0x7100 && *did < 0x7800) || + (*did >= 0x9400))) { + par->cmap_adr = offb_map_reg(pciparent, 2, 0, 0x10000); + if (par->cmap_adr) + par->cmap_type = cmap_avivo; + } + of_node_put(pciparent); + } + info->fix.visual = (par->cmap_type != cmap_unknown) ? + FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR; +} + static void __init offb_init_fb(const char *name, const char *full_name, int width, int height, int depth, int pitch, unsigned long address, @@ -283,6 +405,7 @@ static void __init offb_init_fb(const char *name, const char *full_name, fix = &info->fix; var = &info->var; + info->par = par; strcpy(fix->id, "OFfb "); strncat(fix->id, name, sizeof(fix->id) - sizeof("OFfb ")); @@ -298,39 +421,9 @@ static void __init offb_init_fb(const char *name, const char *full_name, fix->type_aux = 0; par->cmap_type = cmap_unknown; - if (depth == 8) { - if (dp && !strncmp(name, "ATY,Rage128", 11)) { - par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); - if (par->cmap_adr) - par->cmap_type = cmap_r128; - } else if (dp && (!strncmp(name, "ATY,RageM3pA", 12) - || !strncmp(name, "ATY,RageM3p12A", 14))) { - par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); - if (par->cmap_adr) - par->cmap_type = cmap_M3A; - } else if (dp && !strncmp(name, "ATY,RageM3pB", 12)) { - par->cmap_adr = offb_map_reg(dp, 2, 0, 0x1fff); - if (par->cmap_adr) - par->cmap_type = cmap_M3B; - } else if (dp && !strncmp(name, "ATY,Rage6", 9)) { - par->cmap_adr = offb_map_reg(dp, 1, 0, 0x1fff); - if (par->cmap_adr) - par->cmap_type = cmap_radeon; - } else if (!strncmp(name, "ATY,", 4)) { - unsigned long base = address & 0xff000000UL; - par->cmap_adr = - ioremap(base + 0x7ff000, 0x1000) + 0xcc0; - par->cmap_data = par->cmap_adr + 1; - par->cmap_type = cmap_m64; - } else if (dp && (of_device_is_compatible(dp, "pci1014,b7") || - of_device_is_compatible(dp, "pci1014,21c"))) { - par->cmap_adr = offb_map_reg(dp, 0, 0x6000, 0x1000); - if (par->cmap_adr) - par->cmap_type = cmap_gxt2000; - } - fix->visual = (par->cmap_type != cmap_unknown) ? - FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_STATIC_PSEUDOCOLOR; - } else + if (depth == 8) + offb_init_palette_hacks(info, dp, name, address); + else fix->visual = FB_VISUAL_TRUECOLOR; var->xoffset = var->yoffset = 0; @@ -395,7 +488,6 @@ static void __init offb_init_fb(const char *name, const char *full_name, info->fbops = &offb_ops; info->screen_base = ioremap(address, fix->smem_len); - info->par = par; info->pseudo_palette = (void *) (info + 1); info->flags = FBINFO_DEFAULT | foreign_endian; -- cgit v1.2.3 From 1e2744011ff3cd195aba9f7a15dd71b332812a5c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Wed, 21 May 2008 12:52:33 -0700 Subject: device create: framebuffer: convert device_create to device_create_drvdata device_create() is race-prone, so use the race-free device_create_drvdata() instead as device_create() is going away. Cc: Antonino Daplas Signed-off-by: Greg Kroah-Hartman --- drivers/video/console/fbcon.c | 3 ++- drivers/video/fbmem.c | 5 +++-- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 97aff8db10b..4be3b46c069 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c @@ -3586,7 +3586,8 @@ static int __init fb_console_init(void) acquire_console_sem(); fb_register_client(&fbcon_event_notifier); - fbcon_device = device_create(fb_class, NULL, MKDEV(0, 0), "fbcon"); + fbcon_device = device_create_drvdata(fb_class, NULL, MKDEV(0, 0), + NULL, "fbcon"); if (IS_ERR(fbcon_device)) { printk(KERN_WARNING "Unable to create device " diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 33ebdb198da..1cd5071e536 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c @@ -1439,8 +1439,9 @@ register_framebuffer(struct fb_info *fb_info) break; fb_info->node = i; - fb_info->dev = device_create(fb_class, fb_info->device, - MKDEV(FB_MAJOR, i), "fb%d", i); + fb_info->dev = device_create_drvdata(fb_class, fb_info->device, + MKDEV(FB_MAJOR, i), NULL, + "fb%d", i); if (IS_ERR(fb_info->dev)) { /* Not fatal */ printk(KERN_WARNING "Unable to create device for framebuffer %d; errno = %ld\n", i, PTR_ERR(fb_info->dev)); -- cgit v1.2.3 From ca52a49846f1451163c0dc14c40cd06ff808df3e Mon Sep 17 00:00:00 2001 From: Kay Sievers Date: Fri, 2 May 2008 06:02:41 +0200 Subject: driver core: remove DEVICE_NAME_SIZE define There is no such thing as a "device name size" in the driver core, so remove the define and fix up any users of this odd define in the rest of the kernel. Signed-off-by: Kay Sievers Signed-off-by: Greg Kroah-Hartman --- drivers/video/aty/aty128fb.c | 2 +- drivers/video/aty/radeonfb.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c index 24ee96c4e9e..07b6addbb3c 100644 --- a/drivers/video/aty/aty128fb.c +++ b/drivers/video/aty/aty128fb.c @@ -1872,7 +1872,7 @@ static int __devinit aty128_init(struct pci_dev *pdev, const struct pci_device_i struct fb_info *info = pci_get_drvdata(pdev); struct aty128fb_par *par = info->par; struct fb_var_screeninfo var; - char video_card[DEVICE_NAME_SIZE]; + char video_card[50]; u8 chip_rev; u32 dac; diff --git a/drivers/video/aty/radeonfb.h b/drivers/video/aty/radeonfb.h index c347e38cd0b..ccbfffd1280 100644 --- a/drivers/video/aty/radeonfb.h +++ b/drivers/video/aty/radeonfb.h @@ -289,7 +289,7 @@ struct radeonfb_info { struct radeon_regs state; struct radeon_regs init_state; - char name[DEVICE_NAME_SIZE]; + char name[50]; unsigned long mmio_base_phys; unsigned long fb_base_phys; -- cgit v1.2.3 From 7be35c72e6454059a33ad844153349973d22fcb7 Mon Sep 17 00:00:00 2001 From: Matthew Garrett Date: Mon, 9 Jun 2008 21:56:16 +0100 Subject: backlight: Add Nvidia-based Apple Macbook Pro backlight driver Nvidia-based Apple Macbook Pros don't appear to handle backlight control through the graphics card registers or ACPI, but instead trigger changes via SMI calls. This driver registers a generic backlight device that lets existing userspace deal with it. Code derived from Julien Blache's Pommed application. Signed-off-by: Julien Blache Signed-off-by: Matthew Garrett Signed-off-by: Richard Purdie --- drivers/video/backlight/Kconfig | 9 +++ drivers/video/backlight/Makefile | 2 + drivers/video/backlight/mbp_nvidia_bl.c | 116 ++++++++++++++++++++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 drivers/video/backlight/mbp_nvidia_bl.c (limited to 'drivers/video') diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig index 30bf7f2f163..62547bd2ea4 100644 --- a/drivers/video/backlight/Kconfig +++ b/drivers/video/backlight/Kconfig @@ -119,3 +119,12 @@ config BACKLIGHT_PWM help If you have a LCD backlight adjustable by PWM, say Y to enable this driver. + +config BACKLIGHT_MBP_NVIDIA + tristate "MacBook Pro Nvidia Backlight Driver" + depends on BACKLIGHT_CLASS_DEVICE && X86 + default n + help + If you have an Apple Macbook Pro with Nvidia graphics hardware say Y + to enable a driver for its backlight + diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile index b51a7cd1250..c7c4d95fdc1 100644 --- a/drivers/video/backlight/Makefile +++ b/drivers/video/backlight/Makefile @@ -11,3 +11,5 @@ obj-$(CONFIG_BACKLIGHT_OMAP1) += omap1_bl.o obj-$(CONFIG_BACKLIGHT_PROGEAR) += progear_bl.o obj-$(CONFIG_BACKLIGHT_CARILLO_RANCH) += cr_bllcd.o obj-$(CONFIG_BACKLIGHT_PWM) += pwm_bl.o +obj-$(CONFIG_BACKLIGHT_MBP_NVIDIA) += mbp_nvidia_bl.o + diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c new file mode 100644 index 00000000000..385cba40ea8 --- /dev/null +++ b/drivers/video/backlight/mbp_nvidia_bl.c @@ -0,0 +1,116 @@ +/* + * Backlight Driver for Nvidia 8600 in Macbook Pro + * + * Copyright (c) Red Hat + * Based on code from Pommed: + * Copyright (C) 2006 Nicolas Boichat + * Copyright (C) 2006 Felipe Alfaro Solana + * Copyright (C) 2007 Julien BLACHE + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This driver triggers SMIs which cause the firmware to change the + * backlight brightness. This is icky in many ways, but it's impractical to + * get at the firmware code in order to figure out what it's actually doing. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +static struct backlight_device *mbp_backlight_device; + +static struct dmi_system_id __initdata mbp_device_table[] = { + { + .ident = "3,1", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro3,1"), + }, + }, + { + .ident = "3,2", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro3,2"), + }, + }, + { + .ident = "4,1", + .matches = { + DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), + DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro4,1"), + }, + }, + { } +}; + +static int mbp_send_intensity(struct backlight_device *bd) +{ + int intensity = bd->props.brightness; + + outb(0x04 | (intensity << 4), 0xb3); + outb(0xbf, 0xb2); + + return 0; +} + +static int mbp_get_intensity(struct backlight_device *bd) +{ + outb(0x03, 0xb3); + outb(0xbf, 0xb2); + return inb(0xb3) >> 4; +} + +static struct backlight_ops mbp_ops = { + .get_brightness = mbp_get_intensity, + .update_status = mbp_send_intensity, +}; + +static int __init mbp_init(void) +{ + if (!dmi_check_system(mbp_device_table)) + return -ENODEV; + + if (!request_region(0xb2, 2, "Macbook Pro backlight")) + return -ENXIO; + + mbp_backlight_device = backlight_device_register("mbp_backlight", + NULL, NULL, + &mbp_ops); + if (IS_ERR(mbp_backlight_device)) { + release_region(0xb2, 2); + return PTR_ERR(mbp_backlight_device); + } + + mbp_backlight_device->props.max_brightness = 15; + mbp_backlight_device->props.brightness = + mbp_get_intensity(mbp_backlight_device); + backlight_update_status(mbp_backlight_device); + + return 0; +} + +static void __exit mbp_exit(void) +{ + backlight_device_unregister(mbp_backlight_device); + + release_region(0xb2, 2); +} + +module_init(mbp_init); +module_exit(mbp_exit); + +MODULE_AUTHOR("Matthew Garrett "); +MODULE_DESCRIPTION("Nvidia-based Macbook Pro Backlight Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("svnAppleInc.:pnMacBookPro3,1"); +MODULE_ALIAS("svnAppleInc.:pnMacBookPro3,2"); +MODULE_ALIAS("svnAppleInc.:pnMacBookPro4,1"); -- cgit v1.2.3 From f6ec2d96796d0accda6c325890206f3629130729 Mon Sep 17 00:00:00 2001 From: Sebastian Siewior Date: Wed, 16 Jul 2008 23:05:49 +0100 Subject: backlight: Fix missing kernel doc entry Signed-off-by: Sebastian Siewior Signed-off-by: Richard Purdie --- drivers/video/backlight/backlight.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers/video') diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index 39394757679..fab0bc874b5 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c @@ -191,6 +191,7 @@ static struct device_attribute bl_device_attributes[] = { * backlight_device class. * @name: the name of the new object(must be the same as the name of the * respective framebuffer device). + * @parent: a pointer to the parent device * @devdata: an optional pointer to be stored for private driver use. The * methods may retrieve it by using bl_get_data(bd). * @ops: the backlight operations structure. -- cgit v1.2.3 From 27ac792ca0b0a1e7e65f20342260650516c95864 Mon Sep 17 00:00:00 2001 From: Andrea Righi Date: Wed, 23 Jul 2008 21:28:13 -0700 Subject: PAGE_ALIGN(): correctly handle 64-bit values on 32-bit architectures On 32-bit architectures PAGE_ALIGN() truncates 64-bit values to the 32-bit boundary. For example: u64 val = PAGE_ALIGN(size); always returns a value < 4GB even if size is greater than 4GB. The problem resides in PAGE_MASK definition (from include/asm-x86/page.h for example): #define PAGE_SHIFT 12 #define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) #define PAGE_MASK (~(PAGE_SIZE-1)) ... #define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) The "~" is performed on a 32-bit value, so everything in "and" with PAGE_MASK greater than 4GB will be truncated to the 32-bit boundary. Using the ALIGN() macro seems to be the right way, because it uses typeof(addr) for the mask. Also move the PAGE_ALIGN() definitions out of include/asm-*/page.h in include/linux/mm.h. See also lkml discussion: http://lkml.org/lkml/2008/6/11/237 [akpm@linux-foundation.org: fix drivers/media/video/uvc/uvc_queue.c] [akpm@linux-foundation.org: fix v850] [akpm@linux-foundation.org: fix powerpc] [akpm@linux-foundation.org: fix arm] [akpm@linux-foundation.org: fix mips] [akpm@linux-foundation.org: fix drivers/media/video/pvrusb2/pvrusb2-dvb.c] [akpm@linux-foundation.org: fix drivers/mtd/maps/uclinux.c] [akpm@linux-foundation.org: fix powerpc] Signed-off-by: Andrea Righi Cc: Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/acornfb.c | 1 + drivers/video/imxfb.c | 1 + drivers/video/omap/dispc.c | 1 + drivers/video/omap/omapfb_main.c | 1 + drivers/video/pxafb.c | 1 + drivers/video/sa1100fb.c | 1 + 6 files changed, 6 insertions(+) (limited to 'drivers/video') diff --git a/drivers/video/acornfb.c b/drivers/video/acornfb.c index eedb8285e32..017233d0c48 100644 --- a/drivers/video/acornfb.c +++ b/drivers/video/acornfb.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index 94e4d3ac1a0..0c5a475c1ca 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c index ab32ceb0617..ab77c51fe9d 100644 --- a/drivers/video/omap/dispc.c +++ b/drivers/video/omap/dispc.c @@ -20,6 +20,7 @@ */ #include #include +#include #include #include #include diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c index 14d0f7a1114..f85af5c4fa6 100644 --- a/drivers/video/omap/omapfb_main.c +++ b/drivers/video/omap/omapfb_main.c @@ -25,6 +25,7 @@ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #include +#include #include #include diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index bb251436950..5e8a140399f 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include diff --git a/drivers/video/sa1100fb.c b/drivers/video/sa1100fb.c index ab2b2110478..4a9f7e12180 100644 --- a/drivers/video/sa1100fb.c +++ b/drivers/video/sa1100fb.c @@ -167,6 +167,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 2ece5f43b041b96fa2a05107a10a6b0ea0c03a3b Mon Sep 17 00:00:00 2001 From: Sebastian Siewior Date: Wed, 23 Jul 2008 21:30:49 -0700 Subject: fbdev: add the carmine FB driver Basic FB driver for the carmine chip. The driver registers two FB devices for the two possible screens. The DRAM settings can be be switched via Kconfig (between eval board and custom). Signed-off-by: Sebastian Siewior Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/Kconfig | 26 ++ drivers/video/Makefile | 1 + drivers/video/carminefb.c | 790 +++++++++++++++++++++++++++++++++++++++++ drivers/video/carminefb.h | 64 ++++ drivers/video/carminefb_regs.h | 159 +++++++++ 5 files changed, 1040 insertions(+) create mode 100644 drivers/video/carminefb.c create mode 100644 drivers/video/carminefb.h create mode 100644 drivers/video/carminefb_regs.h (limited to 'drivers/video') diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9b887ef64ff..7072d2c5a04 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -1658,6 +1658,32 @@ config FB_PM3 similar boards, 3DLabs Permedia3 Create!, Appian Jeronimo 2000 and maybe other boards. +config FB_CARMINE + tristate "Fujitsu carmine frame buffer support" + depends on FB && PCI + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + help + This is the frame buffer device driver for the Fujitsu Carmine chip. + The driver provides two independent frame buffer devices. + +choice + depends on FB_CARMINE + prompt "DRAM timing" + default FB_CARMINE_DRAM_EVAL + +config FB_CARMINE_DRAM_EVAL + bool "Eval board timings" + help + Use timings which work on the eval card. + +config CARMINE_DRAM_CUSTOM + bool "Custom board timings" + help + Use custom board timings. +endchoice + config FB_AU1100 bool "Au1100 LCD Driver" depends on (FB = y) && MIPS && SOC_AU1100 diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 04bca35403f..7ee85c0d2e5 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -117,6 +117,7 @@ obj-$(CONFIG_FB_SM501) += sm501fb.o obj-$(CONFIG_FB_XILINX) += xilinxfb.o obj-$(CONFIG_FB_OMAP) += omap/ obj-$(CONFIG_XEN_FBDEV_FRONTEND) += xen-fbfront.o +obj-$(CONFIG_FB_CARMINE) += carminefb.o # Platform or fallback drivers go here obj-$(CONFIG_FB_UVESA) += uvesafb.o diff --git a/drivers/video/carminefb.c b/drivers/video/carminefb.c new file mode 100644 index 00000000000..e15bb447440 --- /dev/null +++ b/drivers/video/carminefb.c @@ -0,0 +1,790 @@ +/* + * Frame buffer driver for the Carmine GPU. + * + * The driver configures the GPU as follows + * - FB0 is display 0 with unique memory area + * - FB1 is display 1 with unique memory area + * - both display use 32 bit colors + */ +#include +#include +#include +#include +#include + +#include "carminefb.h" +#include "carminefb_regs.h" + +#if !defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN) +#error "The endianness of the target host has not been defined." +#endif + +/* + * The initial video mode can be supplied via two different ways: + * - as a string that is passed to fb_find_mode() (module option fb_mode_str) + * - as an integer that picks the video mode from carmine_modedb[] (module + * option fb_mode) + * + * If nothing is used than the initial video mode will be the + * CARMINEFB_DEFAULT_VIDEO_MODE member of the carmine_modedb[]. + */ +#define CARMINEFB_DEFAULT_VIDEO_MODE 1 + +static unsigned int fb_mode = CARMINEFB_DEFAULT_VIDEO_MODE; +module_param(fb_mode, uint, 444); +MODULE_PARM_DESC(fb_mode, "Initial video mode as integer."); + +static char *fb_mode_str; +module_param(fb_mode_str, charp, 444); +MODULE_PARM_DESC(fb_mode_str, "Initial video mode in characters."); + +/* + * Carminefb displays: + * 0b000 None + * 0b001 Display 0 + * 0b010 Display 1 + */ +static int fb_displays = CARMINE_USE_DISPLAY0 | CARMINE_USE_DISPLAY1; +module_param(fb_displays, int, 444); +MODULE_PARM_DESC(fb_displays, "Bit mode, which displays are used"); + +struct carmine_hw { + void __iomem *v_regs; + void __iomem *screen_mem; + struct fb_info *fb[MAX_DISPLAY]; +}; + +struct carmine_resolution { + u32 htp; + u32 hsp; + u32 hsw; + u32 hdp; + u32 vtr; + u32 vsp; + u32 vsw; + u32 vdp; + u32 disp_mode; +}; + +struct carmine_fb { + void __iomem *display_reg; + void __iomem *screen_base; + u32 smem_offset; + u32 cur_mode; + u32 new_mode; + struct carmine_resolution *res; + u32 pseudo_palette[16]; +}; + +static struct fb_fix_screeninfo carminefb_fix __devinitdata = { + .id = "Carmine", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .accel = FB_ACCEL_NONE, +}; + +static const struct fb_videomode carmine_modedb[] = { + { + .name = "640x480", + .xres = 640, + .yres = 480, + }, { + .name = "800x600", + .xres = 800, + .yres = 600, + }, +}; + +static struct carmine_resolution car_modes[] = { + { + /* 640x480 */ + .htp = 800, + .hsp = 672, + .hsw = 96, + .hdp = 640, + .vtr = 525, + .vsp = 490, + .vsw = 2, + .vdp = 480, + .disp_mode = 0x1400, + }, + { + /* 800x600 */ + .htp = 1060, + .hsp = 864, + .hsw = 72, + .hdp = 800, + .vtr = 628, + .vsp = 601, + .vsw = 2, + .vdp = 600, + .disp_mode = 0x0d00, + } +}; + +static int carmine_find_mode(const struct fb_var_screeninfo *var) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(car_modes); i++) + if (car_modes[i].hdp == var->xres && + car_modes[i].vdp == var->yres) + return i; + return -EINVAL; +} + +static void c_set_disp_reg(const struct carmine_fb *par, + u32 offset, u32 val) +{ + writel(val, par->display_reg + offset); +} + +static u32 c_get_disp_reg(const struct carmine_fb *par, + u32 offset) +{ + return readl(par->display_reg + offset); +} + +static void c_set_hw_reg(const struct carmine_hw *hw, + u32 offset, u32 val) +{ + writel(val, hw->v_regs + offset); +} + +static u32 c_get_hw_reg(const struct carmine_hw *hw, + u32 offset) +{ + return readl(hw->v_regs + offset); +} + +static int carmine_setcolreg(unsigned regno, unsigned red, unsigned green, + unsigned blue, unsigned transp, struct fb_info *info) +{ + if (regno >= 16) + return 1; + + red >>= 8; + green >>= 8; + blue >>= 8; + transp >>= 8; + + ((u32 *)info->pseudo_palette)[regno] = be32_to_cpu(transp << 24 | + red << 0 | green << 8 | blue << 16); + return 0; +} + +static int carmine_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + int ret; + + ret = carmine_find_mode(var); + if (ret < 0) + return ret; + + if (var->grayscale || var->rotate || var->nonstd) + return -EINVAL; + + var->xres_virtual = var->xres; + var->yres_virtual = var->yres; + + var->bits_per_pixel = 32; + +#ifdef __BIG_ENDIAN + var->transp.offset = 24; + var->red.offset = 0; + var->green.offset = 8; + var->blue.offset = 16; +#else + var->transp.offset = 24; + var->red.offset = 16; + var->green.offset = 8; + var->blue.offset = 0; +#endif + + var->red.length = 8; + var->green.length = 8; + var->blue.length = 8; + var->transp.length = 8; + + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + return 0; +} + +static void carmine_init_display_param(struct carmine_fb *par) +{ + u32 width; + u32 height; + u32 param; + u32 window_size; + u32 soffset = par->smem_offset; + + c_set_disp_reg(par, CARMINE_DISP_REG_C_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_MLMR_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_CURSOR_MODE, + CARMINE_CURSOR0_PRIORITY_MASK | + CARMINE_CURSOR1_PRIORITY_MASK | + CARMINE_CURSOR_CUTZ_MASK); + + /* Set default cursor position */ + c_set_disp_reg(par, CARMINE_DISP_REG_CUR1_POS, 0 << 16 | 0); + c_set_disp_reg(par, CARMINE_DISP_REG_CUR2_POS, 0 << 16 | 0); + + /* Set default display mode */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0_EXT_MODE, CARMINE_WINDOW_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_EXT_MODE, + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_EXT_MODE, CARMINE_EXTEND_MODE | + CARMINE_EXT_CMODE_DIRECT24_RGBA); + + /* Set default frame size to layer mode register */ + width = par->res->hdp * 4 / CARMINE_DISP_WIDTH_UNIT; + width = width << CARMINE_DISP_WIDTH_SHIFT; + + height = par->res->vdp - 1; + param = width | height; + + c_set_disp_reg(par, CARMINE_DISP_REG_L0_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_WIDTH, width); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_MODE_W_H, param); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_MODE_W_H, param); + + /* Set default pos and size */ + window_size = (par->res->vdp - 1) << CARMINE_DISP_WIN_H_SHIFT; + window_size |= par->res->hdp; + + c_set_disp_reg(par, CARMINE_DISP_REG_L0_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L0_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_WIN_SIZE, window_size); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_WIN_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_WIN_SIZE, window_size); + + /* Set default origin address */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0_ORG_ADR, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_ORG_ADR, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_ORG_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_ORG_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_ORG_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_ORG_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_ORG_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_ORG_ADR1, soffset); + + /* Set default display address */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0_DISP_ADR, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_DISP_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_DISP_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_DISP_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_DISP_ADR1, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_DISP_ADR0, soffset); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_DISP_ADR0, soffset); + + /* Set default display position */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_DISP_POS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_DISP_POS, 0); + + /* Set default blend mode */ + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L0, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L1, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L2, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L3, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L4, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L5, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L6, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_BLEND_MODE_L7, 0); + + /* default transparency mode */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L1_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6_TRANS, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7_TRANS, 0); + + /* Set default read skip parameter */ + c_set_disp_reg(par, CARMINE_DISP_REG_L0RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6RM, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7RM, 0); + + c_set_disp_reg(par, CARMINE_DISP_REG_L0PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6PX, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7PX, 0); + + c_set_disp_reg(par, CARMINE_DISP_REG_L0PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L2PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L3PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L4PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L5PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L6PY, 0); + c_set_disp_reg(par, CARMINE_DISP_REG_L7PY, 0); +} + +static void set_display_parameters(struct carmine_fb *par) +{ + u32 mode; + u32 hdp, vdp, htp, hsp, hsw, vtr, vsp, vsw; + + /* + * display timing. Parameters are decreased by one because hardware + * spec is 0 to (n - 1) + * */ + hdp = par->res->hdp - 1; + vdp = par->res->vdp - 1; + htp = par->res->htp - 1; + hsp = par->res->hsp - 1; + hsw = par->res->hsw - 1; + vtr = par->res->vtr - 1; + vsp = par->res->vsp - 1; + vsw = par->res->vsw - 1; + + c_set_disp_reg(par, CARMINE_DISP_REG_H_TOTAL, + htp << CARMINE_DISP_HTP_SHIFT); + c_set_disp_reg(par, CARMINE_DISP_REG_H_PERIOD, + (hdp << CARMINE_DISP_HDB_SHIFT) | hdp); + c_set_disp_reg(par, CARMINE_DISP_REG_V_H_W_H_POS, + (vsw << CARMINE_DISP_VSW_SHIFT) | + (hsw << CARMINE_DISP_HSW_SHIFT) | + (hsp)); + c_set_disp_reg(par, CARMINE_DISP_REG_V_TOTAL, + vtr << CARMINE_DISP_VTR_SHIFT); + c_set_disp_reg(par, CARMINE_DISP_REG_V_PERIOD_POS, + (vdp << CARMINE_DISP_VDP_SHIFT) | vsp); + + /* clock */ + mode = c_get_disp_reg(par, CARMINE_DISP_REG_DCM1); + mode = (mode & ~CARMINE_DISP_DCM_MASK) | + (par->res->disp_mode & CARMINE_DISP_DCM_MASK); + /* enable video output and layer 0 */ + mode |= CARMINE_DEN | CARMINE_L0E; + c_set_disp_reg(par, CARMINE_DISP_REG_DCM1, mode); +} + +static int carmine_set_par(struct fb_info *info) +{ + struct carmine_fb *par = info->par; + int ret; + + ret = carmine_find_mode(&info->var); + if (ret < 0) + return ret; + + par->new_mode = ret; + if (par->cur_mode != par->new_mode) { + + par->cur_mode = par->new_mode; + par->res = &car_modes[par->new_mode]; + + carmine_init_display_param(par); + set_display_parameters(par); + } + + info->fix.line_length = info->var.xres * info->var.bits_per_pixel / 8; + return 0; +} + +static int init_hardware(struct carmine_hw *hw) +{ + u32 flags; + u32 loops; + u32 ret; + + /* Initalize Carmine */ + /* Sets internal clock */ + c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_CLOCK_ENABLE, + CARMINE_DFLT_IP_CLOCK_ENABLE); + + /* Video signal output is turned off */ + c_set_hw_reg(hw, CARMINE_DISP0_REG + CARMINE_DISP_REG_DCM1, 0); + c_set_hw_reg(hw, CARMINE_DISP1_REG + CARMINE_DISP_REG_DCM1, 0); + + /* Software reset */ + c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_SOFTWARE_RESET, 1); + c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_SOFTWARE_RESET, 0); + + /* I/O mode settings */ + flags = CARMINE_DFLT_IP_DCTL_IO_CONT1 << 16 | + CARMINE_DFLT_IP_DCTL_IO_CONT0; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_IOCONT1_IOCONT0, + flags); + + /* DRAM initial sequence */ + flags = CARMINE_DFLT_IP_DCTL_MODE << 16 | CARMINE_DFLT_IP_DCTL_ADD; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_MODE_ADD, + flags); + + flags = CARMINE_DFLT_IP_DCTL_SET_TIME1 << 16 | + CARMINE_DFLT_IP_DCTL_EMODE; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_SETTIME1_EMODE, + flags); + + flags = CARMINE_DFLT_IP_DCTL_REFRESH << 16 | + CARMINE_DFLT_IP_DCTL_SET_TIME2; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_REFRESH_SETTIME2, + flags); + + flags = CARMINE_DFLT_IP_DCTL_RESERVE2 << 16 | + CARMINE_DFLT_IP_DCTL_FIFO_DEPTH; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_RSV2_RSV1, flags); + + flags = CARMINE_DFLT_IP_DCTL_DDRIF2 << 16 | CARMINE_DFLT_IP_DCTL_DDRIF1; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_DDRIF2_DDRIF1, + flags); + + flags = CARMINE_DFLT_IP_DCTL_RESERVE0 << 16 | + CARMINE_DFLT_IP_DCTL_STATES; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_RSV0_STATES, + flags); + + /* Executes DLL reset */ + if (CARMINE_DCTL_DLL_RESET) { + for (loops = 0; loops < CARMINE_DCTL_INIT_WAIT_LIMIT; loops++) { + + ret = c_get_hw_reg(hw, CARMINE_DCTL_REG + + CARMINE_DCTL_REG_RSV0_STATES); + ret &= CARMINE_DCTL_REG_STATES_MASK; + if (!ret) + break; + + mdelay(CARMINE_DCTL_INIT_WAIT_INTERVAL); + } + + if (loops >= CARMINE_DCTL_INIT_WAIT_LIMIT) { + printk(KERN_ERR "DRAM init failed\n"); + return -EIO; + } + } + + flags = CARMINE_DFLT_IP_DCTL_MODE_AFT_RST << 16 | + CARMINE_DFLT_IP_DCTL_ADD; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_MODE_ADD, flags); + + flags = CARMINE_DFLT_IP_DCTL_RESERVE0 << 16 | + CARMINE_DFLT_IP_DCTL_STATES_AFT_RST; + c_set_hw_reg(hw, CARMINE_DCTL_REG + CARMINE_DCTL_REG_RSV0_STATES, + flags); + + /* Initialize the write back register */ + c_set_hw_reg(hw, CARMINE_WB_REG + CARMINE_WB_REG_WBM, + CARMINE_WB_REG_WBM_DEFAULT); + + /* Initialize the Kottos registers */ + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_VRINTM, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_VRERRM, 0); + + /* Set DC offsets */ + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_PX, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_PY, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_LX, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_LY, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_TX, 0); + c_set_hw_reg(hw, CARMINE_GRAPH_REG + CARMINE_GRAPH_REG_DC_OFFSET_TY, 0); + return 0; +} + +static struct fb_ops carminefb_ops = { + .owner = THIS_MODULE, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, + + .fb_check_var = carmine_check_var, + .fb_set_par = carmine_set_par, + .fb_setcolreg = carmine_setcolreg, +}; + +static int alloc_carmine_fb(void __iomem *regs, void __iomem *smem_base, + int smem_offset, struct device *device, struct fb_info **rinfo) +{ + int ret; + struct fb_info *info; + struct carmine_fb *par; + + info = framebuffer_alloc(sizeof *par, device); + if (!info) + return -ENOMEM; + + par = info->par; + par->display_reg = regs; + par->smem_offset = smem_offset; + + info->screen_base = smem_base + smem_offset; + info->screen_size = CARMINE_DISPLAY_MEM; + info->fbops = &carminefb_ops; + + info->fix = carminefb_fix; + info->pseudo_palette = par->pseudo_palette; + info->flags = FBINFO_DEFAULT; + + ret = fb_alloc_cmap(&info->cmap, 256, 1); + if (ret < 0) + goto err_free_fb; + + if (fb_mode > ARRAY_SIZE(carmine_modedb)) + fb_mode = CARMINEFB_DEFAULT_VIDEO_MODE; + + par->cur_mode = par->new_mode = ~0; + + ret = fb_find_mode(&info->var, info, fb_mode_str, carmine_modedb, + ARRAY_SIZE(carmine_modedb), + &carmine_modedb[fb_mode], 32); + if (!ret || ret == 4) { + ret = -EINVAL; + goto err_dealloc_cmap; + } + + fb_videomode_to_modelist(carmine_modedb, ARRAY_SIZE(carmine_modedb), + &info->modelist); + + ret = register_framebuffer(info); + if (ret < 0) + goto err_dealloc_cmap; + + printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, + info->fix.id); + + *rinfo = info; + return 0; + +err_dealloc_cmap: + fb_dealloc_cmap(&info->cmap); +err_free_fb: + framebuffer_release(info); + return ret; +} + +static void cleanup_fb_device(struct fb_info *info) +{ + if (info) { + unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); + framebuffer_release(info); + } +} + +static int __devinit carminefb_probe(struct pci_dev *dev, + const struct pci_device_id *ent) +{ + struct carmine_hw *hw; + struct device *device = &dev->dev; + struct fb_info *info; + int ret; + + ret = pci_enable_device(dev); + if (ret) + return ret; + + ret = -ENOMEM; + hw = kzalloc(sizeof *hw, GFP_KERNEL); + if (!hw) + goto err_enable_pci; + + carminefb_fix.mmio_start = pci_resource_start(dev, CARMINE_CONFIG_BAR); + carminefb_fix.mmio_len = pci_resource_len(dev, CARMINE_CONFIG_BAR); + + if (!request_mem_region(carminefb_fix.mmio_start, + carminefb_fix.mmio_len, + "carminefb regbase")) { + printk(KERN_ERR "carminefb: Can't reserve regbase.\n"); + ret = -EBUSY; + goto err_free_hw; + } + hw->v_regs = ioremap_nocache(carminefb_fix.mmio_start, + carminefb_fix.mmio_len); + if (!hw->v_regs) { + printk(KERN_ERR "carminefb: Can't remap %s register.\n", + carminefb_fix.id); + goto err_free_reg_mmio; + } + + carminefb_fix.smem_start = pci_resource_start(dev, CARMINE_MEMORY_BAR); + carminefb_fix.smem_len = pci_resource_len(dev, CARMINE_MEMORY_BAR); + + /* The memory area tends to be very large (256 MiB). Remap only what + * is required for that largest resolution to avoid remaps at run + * time + */ + if (carminefb_fix.smem_len > CARMINE_TOTAL_DIPLAY_MEM) + carminefb_fix.smem_len = CARMINE_TOTAL_DIPLAY_MEM; + + else if (carminefb_fix.smem_len < CARMINE_TOTAL_DIPLAY_MEM) { + printk(KERN_ERR "carminefb: Memory bar is only %d bytes, %d " + "are required.", carminefb_fix.smem_len, + CARMINE_TOTAL_DIPLAY_MEM); + goto err_free_reg_mmio; + } + + if (!request_mem_region(carminefb_fix.smem_start, + carminefb_fix.smem_len, "carminefb smem")) { + printk(KERN_ERR "carminefb: Can't reserve smem.\n"); + goto err_unmap_vregs; + } + + hw->screen_mem = ioremap_nocache(carminefb_fix.smem_start, + carminefb_fix.smem_len); + if (!hw->screen_mem) { + printk(KERN_ERR "carmine: Can't ioremap smem area.\n"); + release_mem_region(carminefb_fix.smem_start, + carminefb_fix.smem_len); + goto err_reg_smem; + } + + ret = init_hardware(hw); + if (ret) + goto err_unmap_screen; + + info = NULL; + if (fb_displays & CARMINE_USE_DISPLAY0) { + ret = alloc_carmine_fb(hw->v_regs + CARMINE_DISP0_REG, + hw->screen_mem, CARMINE_DISPLAY_MEM * 0, + device, &info); + if (ret) + goto err_deinit_hw; + } + + hw->fb[0] = info; + + info = NULL; + if (fb_displays & CARMINE_USE_DISPLAY1) { + ret = alloc_carmine_fb(hw->v_regs + CARMINE_DISP1_REG, + hw->screen_mem, CARMINE_DISPLAY_MEM * 1, + device, &info); + if (ret) + goto err_cleanup_fb0; + } + + hw->fb[1] = info; + info = NULL; + + pci_set_drvdata(dev, hw); + return 0; + +err_cleanup_fb0: + cleanup_fb_device(hw->fb[0]); +err_deinit_hw: + /* disable clock, etc */ + c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_CLOCK_ENABLE, 0); +err_unmap_screen: + iounmap(hw->screen_mem); +err_reg_smem: + release_mem_region(carminefb_fix.mmio_start, carminefb_fix.mmio_len); +err_unmap_vregs: + iounmap(hw->v_regs); +err_free_reg_mmio: + release_mem_region(carminefb_fix.mmio_start, carminefb_fix.mmio_len); +err_free_hw: + kfree(hw); +err_enable_pci: + pci_disable_device(dev); + return ret; +} + +static void __devexit carminefb_remove(struct pci_dev *dev) +{ + struct carmine_hw *hw = pci_get_drvdata(dev); + struct fb_fix_screeninfo fix; + int i; + + /* in case we use only fb1 and not fb1 */ + if (hw->fb[0]) + fix = hw->fb[0]->fix; + else + fix = hw->fb[1]->fix; + + /* deactivate display(s) and switch clocks */ + c_set_hw_reg(hw, CARMINE_DISP0_REG + CARMINE_DISP_REG_DCM1, 0); + c_set_hw_reg(hw, CARMINE_DISP1_REG + CARMINE_DISP_REG_DCM1, 0); + c_set_hw_reg(hw, CARMINE_CTL_REG + CARMINE_CTL_REG_CLOCK_ENABLE, 0); + + for (i = 0; i < MAX_DISPLAY; i++) + cleanup_fb_device(hw->fb[i]); + + iounmap(hw->screen_mem); + release_mem_region(fix.smem_start, fix.smem_len); + iounmap(hw->v_regs); + release_mem_region(fix.mmio_start, fix.mmio_len); + + pci_set_drvdata(dev, NULL); + pci_disable_device(dev); + kfree(hw); +} + +#define PCI_VENDOR_ID_FUJITU_LIMITED 0x10cf +static struct pci_device_id carmine_devices[] __devinitdata = { +{ + PCI_DEVICE(PCI_VENDOR_ID_FUJITU_LIMITED, 0x202b)}, + {0, 0, 0, 0, 0, 0, 0} +}; + +MODULE_DEVICE_TABLE(pci, carmine_devices); + +static struct pci_driver carmine_pci_driver = { + .name = "carminefb", + .id_table = carmine_devices, + .probe = carminefb_probe, + .remove = __devexit_p(carminefb_remove), +}; + +static int __init carminefb_init(void) +{ + if (!(fb_displays & + (CARMINE_USE_DISPLAY0 | CARMINE_USE_DISPLAY1))) { + printk(KERN_ERR "If you disable both displays than you don't " + "need the driver at all\n"); + return -EINVAL; + } + return pci_register_driver(&carmine_pci_driver); +} +module_init(carminefb_init); + +static void __exit carminefb_cleanup(void) +{ + pci_unregister_driver(&carmine_pci_driver); +} +module_exit(carminefb_cleanup); + +MODULE_AUTHOR("Sebastian Siewior "); +MODULE_DESCRIPTION("Framebuffer driver for Fujitsu Carmine based devices"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/video/carminefb.h b/drivers/video/carminefb.h new file mode 100644 index 00000000000..05306de0c6b --- /dev/null +++ b/drivers/video/carminefb.h @@ -0,0 +1,64 @@ +#ifndef CARMINE_CARMINE_H +#define CARMINE_CARMINE_H + +#define CARMINE_MEMORY_BAR 2 +#define CARMINE_CONFIG_BAR 3 + +#define MAX_DISPLAY 2 +#define CARMINE_DISPLAY_MEM (800 * 600 * 4) +#define CARMINE_TOTAL_DIPLAY_MEM (CARMINE_DISPLAY_MEM * MAX_DISPLAY) + +#define CARMINE_USE_DISPLAY0 (1 << 0) +#define CARMINE_USE_DISPLAY1 (1 << 1) + +/* + * This values work on the eval card. Custom boards may use different timings, + * here an example :) + */ + +/* DRAM initialization values */ +#ifdef CONFIG_FB_CARMINE_DRAM_EVAL + +#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) +#define CARMINE_DFLT_IP_DCTL_ADD (0x05c3) +#define CARMINE_DFLT_IP_DCTL_MODE (0x0121) +#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) +#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x4749) +#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x2a22) +#define CARMINE_DFLT_IP_DCTL_REFRESH (0x0042) +#define CARMINE_DFLT_IP_DCTL_STATES (0x0003) +#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) +#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) +#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) +#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x6646) +#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x0055) +#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0021) +#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) +#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) +#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) +#define CARMINE_DCTL_DLL_RESET (1) +#endif + +#ifdef CONFIG_CARMINE_DRAM_CUSTOM + +#define CARMINE_DFLT_IP_CLOCK_ENABLE (0x03ff) +#define CARMINE_DFLT_IP_DCTL_ADD (0x03b2) +#define CARMINE_DFLT_IP_DCTL_MODE (0x0161) +#define CARMINE_DFLT_IP_DCTL_EMODE (0x8000) +#define CARMINE_DFLT_IP_DCTL_SET_TIME1 (0x2628) +#define CARMINE_DFLT_IP_DCTL_SET_TIME2 (0x1a09) +#define CARMINE_DFLT_IP_DCTL_REFRESH (0x00fe) +#define CARMINE_DFLT_IP_DCTL_STATES (0x0003) +#define CARMINE_DFLT_IP_DCTL_RESERVE0 (0x0020) +#define CARMINE_DFLT_IP_DCTL_FIFO_DEPTH (0x000f) +#define CARMINE_DFLT_IP_DCTL_RESERVE2 (0x0000) +#define CARMINE_DFLT_IP_DCTL_DDRIF1 (0x0646) +#define CARMINE_DFLT_IP_DCTL_DDRIF2 (0x55aa) +#define CARMINE_DFLT_IP_DCTL_MODE_AFT_RST (0x0061) +#define CARMINE_DFLT_IP_DCTL_STATES_AFT_RST (0x0002) +#define CARMINE_DFLT_IP_DCTL_IO_CONT0 (0x0555) +#define CARMINE_DFLT_IP_DCTL_IO_CONT1 (0x0555) +#define CARMINE_DCTL_DLL_RESET (1) +#endif + +#endif diff --git a/drivers/video/carminefb_regs.h b/drivers/video/carminefb_regs.h new file mode 100644 index 00000000000..045215600b7 --- /dev/null +++ b/drivers/video/carminefb_regs.h @@ -0,0 +1,159 @@ +#ifndef _CARMINEFB_REGS_H +#define _CARMINEFB_REGS_H + +#define CARMINE_OVERLAY_EXT_MODE (0x00000002) +#define CARMINE_GRAPH_REG (0x00000000) +#define CARMINE_DISP0_REG (0x00100000) +#define CARMINE_DISP1_REG (0x00140000) +#define CARMINE_WB_REG (0x00180000) +#define CARMINE_DCTL_REG (0x00300000) +#define CARMINE_CTL_REG (0x00400000) +#define CARMINE_WINDOW_MODE (0x00000001) +#define CARMINE_EXTEND_MODE (CARMINE_WINDOW_MODE | \ + CARMINE_OVERLAY_EXT_MODE) +#define CARMINE_L0E (1 << 16) +#define CARMINE_L2E (1 << 18) +#define CARMINE_DEN (1 << 31) + +#define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000) +#define CARMINE_DCTL_REG_MODE_ADD (0x00) +#define CARMINE_DCTL_REG_SETTIME1_EMODE (0x04) +#define CARMINE_DCTL_REG_REFRESH_SETTIME2 (0x08) +#define CARMINE_DCTL_REG_RSV0_STATES (0x0C) +#define CARMINE_DCTL_REG_RSV2_RSV1 (0x10) +#define CARMINE_DCTL_REG_DDRIF2_DDRIF1 (0x14) +#define CARMINE_DCTL_REG_IOCONT1_IOCONT0 (0x24) +#define CARMINE_DCTL_REG_STATES_MASK (0x000F) +#define CARMINE_DCTL_INIT_WAIT_INTERVAL (1) +#define CARMINE_DCTL_INIT_WAIT_LIMIT (5000) +#define CARMINE_WB_REG_WBM_DEFAULT (0x0001c020) +#define CARMINE_DISP_REG_L0RM (0x1880) +#define CARMINE_DISP_REG_L0PX (0x1884) +#define CARMINE_DISP_REG_L0PY (0x1888) +#define CARMINE_DISP_REG_L2RM (0x18A0) +#define CARMINE_DISP_REG_L2PX (0x18A4) +#define CARMINE_DISP_REG_L2PY (0x18A8) +#define CARMINE_DISP_REG_L3RM (0x18B0) +#define CARMINE_DISP_REG_L3PX (0x18B4) +#define CARMINE_DISP_REG_L3PY (0x18B8) +#define CARMINE_DISP_REG_L4RM (0x18C0) +#define CARMINE_DISP_REG_L4PX (0x18C4) +#define CARMINE_DISP_REG_L4PY (0x18C8) +#define CARMINE_DISP_REG_L5RM (0x18D0) +#define CARMINE_DISP_REG_L5PX (0x18D4) +#define CARMINE_DISP_REG_L5PY (0x18D8) +#define CARMINE_DISP_REG_L6RM (0x1924) +#define CARMINE_DISP_REG_L6PX (0x1928) +#define CARMINE_DISP_REG_L6PY (0x192C) +#define CARMINE_DISP_REG_L7RM (0x1964) +#define CARMINE_DISP_REG_L7PX (0x1968) +#define CARMINE_DISP_REG_L7PY (0x196C) +#define CARMINE_WB_REG_WBM (0x0004) +#define CARMINE_DISP_HTP_SHIFT (16) +#define CARMINE_DISP_HDB_SHIFT (16) +#define CARMINE_DISP_HSW_SHIFT (16) +#define CARMINE_DISP_VSW_SHIFT (24) +#define CARMINE_DISP_VTR_SHIFT (16) +#define CARMINE_DISP_VDP_SHIFT (16) +#define CARMINE_CURSOR_CUTZ_MASK (0x00000100) +#define CARMINE_CURSOR0_PRIORITY_MASK (0x00010000) +#define CARMINE_CURSOR1_PRIORITY_MASK (0x00020000) +#define CARMINE_DISP_WIDTH_SHIFT (16) +#define CARMINE_DISP_WIN_H_SHIFT (16) +#define CARMINE_DISP_REG_H_TOTAL (0x0004) +#define CARMINE_DISP_REG_H_PERIOD (0x0008) +#define CARMINE_DISP_REG_V_H_W_H_POS (0x000C) +#define CARMINE_DISP_REG_V_TOTAL (0x0010) +#define CARMINE_DISP_REG_V_PERIOD_POS (0x0014) +#define CARMINE_DISP_REG_L0_MODE_W_H (0x0020) +#define CARMINE_DISP_REG_L0_ORG_ADR (0x0024) +#define CARMINE_DISP_REG_L0_DISP_ADR (0x0028) +#define CARMINE_DISP_REG_L0_DISP_POS (0x002C) +#define CARMINE_DISP_REG_L1_WIDTH (0x0030) +#define CARMINE_DISP_REG_L1_ORG_ADR (0x0034) +#define CARMINE_DISP_REG_L2_MODE_W_H (0x0040) +#define CARMINE_DISP_REG_L2_ORG_ADR1 (0x0044) +#define CARMINE_DISP_REG_L2_DISP_ADR1 (0x0048) +#define CARMINE_DISP_REG_L2_DISP_POS (0x0054) +#define CARMINE_DISP_REG_L3_MODE_W_H (0x0058) +#define CARMINE_DISP_REG_L3_ORG_ADR1 (0x005C) +#define CARMINE_DISP_REG_L3_DISP_ADR1 (0x0060) +#define CARMINE_DISP_REG_L3_DISP_POS (0x006C) +#define CARMINE_DISP_REG_L4_MODE_W_H (0x0070) +#define CARMINE_DISP_REG_L4_ORG_ADR1 (0x0074) +#define CARMINE_DISP_REG_L4_DISP_ADR1 (0x0078) +#define CARMINE_DISP_REG_L4_DISP_POS (0x0084) +#define CARMINE_DISP_REG_L5_MODE_W_H (0x0088) +#define CARMINE_DISP_REG_L5_ORG_ADR1 (0x008C) +#define CARMINE_DISP_REG_L5_DISP_ADR1 (0x0090) +#define CARMINE_DISP_REG_L5_DISP_POS (0x009C) +#define CARMINE_DISP_REG_CURSOR_MODE (0x00A0) +#define CARMINE_DISP_REG_CUR1_POS (0x00A8) +#define CARMINE_DISP_REG_CUR2_POS (0x00B0) +#define CARMINE_DISP_REG_C_TRANS (0x00BC) +#define CARMINE_DISP_REG_MLMR_TRANS (0x00C0) +#define CARMINE_DISP_REG_L0_EXT_MODE (0x0110) +#define CARMINE_DISP_REG_L0_WIN_POS (0x0114) +#define CARMINE_DISP_REG_L0_WIN_SIZE (0x0118) +#define CARMINE_DISP_REG_L1_EXT_MODE (0x0120) +#define CARMINE_DISP_REG_L1_WIN_POS (0x0124) +#define CARMINE_DISP_REG_L1_WIN_SIZE (0x0128) +#define CARMINE_DISP_REG_L2_EXT_MODE (0x0130) +#define CARMINE_DISP_REG_L2_WIN_POS (0x0134) +#define CARMINE_DISP_REG_L2_WIN_SIZE (0x0138) +#define CARMINE_DISP_REG_L3_EXT_MODE (0x0140) +#define CARMINE_DISP_REG_L3_WIN_POS (0x0144) +#define CARMINE_DISP_REG_L3_WIN_SIZE (0x0148) +#define CARMINE_DISP_REG_L4_EXT_MODE (0x0150) +#define CARMINE_DISP_REG_L4_WIN_POS (0x0154) +#define CARMINE_DISP_REG_L4_WIN_SIZE (0x0158) +#define CARMINE_DISP_REG_L5_EXT_MODE (0x0160) +#define CARMINE_DISP_REG_L5_WIN_POS (0x0164) +#define CARMINE_DISP_REG_L5_WIN_SIZE (0x0168) +#define CARMINE_DISP_REG_L6_EXT_MODE (0x1918) +#define CARMINE_DISP_REG_L6_WIN_POS (0x191c) +#define CARMINE_DISP_REG_L6_WIN_SIZE (0x1920) +#define CARMINE_DISP_REG_L7_EXT_MODE (0x1958) +#define CARMINE_DISP_REG_L7_WIN_POS (0x195c) +#define CARMINE_DISP_REG_L7_WIN_SIZE (0x1960) +#define CARMINE_DISP_REG_BLEND_MODE_L0 (0x00B4) +#define CARMINE_DISP_REG_BLEND_MODE_L1 (0x0188) +#define CARMINE_DISP_REG_BLEND_MODE_L2 (0x018C) +#define CARMINE_DISP_REG_BLEND_MODE_L3 (0x0190) +#define CARMINE_DISP_REG_BLEND_MODE_L4 (0x0194) +#define CARMINE_DISP_REG_BLEND_MODE_L5 (0x0198) +#define CARMINE_DISP_REG_BLEND_MODE_L6 (0x1990) +#define CARMINE_DISP_REG_BLEND_MODE_L7 (0x1994) +#define CARMINE_DISP_REG_L0_TRANS (0x01A0) +#define CARMINE_DISP_REG_L1_TRANS (0x01A4) +#define CARMINE_DISP_REG_L2_TRANS (0x01A8) +#define CARMINE_DISP_REG_L3_TRANS (0x01AC) +#define CARMINE_DISP_REG_L4_TRANS (0x01B0) +#define CARMINE_DISP_REG_L5_TRANS (0x01B4) +#define CARMINE_DISP_REG_L6_TRANS (0x1998) +#define CARMINE_DISP_REG_L7_TRANS (0x199c) +#define CARMINE_EXTEND_MODE_MASK (0x00000003) +#define CARMINE_DISP_DCM_MASK (0x0000FFFF) +#define CARMINE_DISP_REG_DCM1 (0x0100) +#define CARMINE_DISP_WIDTH_UNIT (64) +#define CARMINE_DISP_REG_L6_MODE_W_H (0x1900) +#define CARMINE_DISP_REG_L6_ORG_ADR1 (0x1904) +#define CARMINE_DISP_REG_L6_DISP_ADR0 (0x1908) +#define CARMINE_DISP_REG_L6_DISP_POS (0x1914) +#define CARMINE_DISP_REG_L7_MODE_W_H (0x1940) +#define CARMINE_DISP_REG_L7_ORG_ADR1 (0x1944) +#define CARMINE_DISP_REG_L7_DISP_ADR0 (0x1948) +#define CARMINE_DISP_REG_L7_DISP_POS (0x1954) +#define CARMINE_CTL_REG_CLOCK_ENABLE (0x000C) +#define CARMINE_CTL_REG_SOFTWARE_RESET (0x0010) +#define CARMINE_CTL_REG_IST_MASK_ALL (0x07FFFFFF) +#define CARMINE_GRAPH_REG_VRINTM (0x00028064) +#define CARMINE_GRAPH_REG_VRERRM (0x0002806C) +#define CARMINE_GRAPH_REG_DC_OFFSET_PX (0x0004005C) +#define CARMINE_GRAPH_REG_DC_OFFSET_PY (0x00040060) +#define CARMINE_GRAPH_REG_DC_OFFSET_LX (0x00040064) +#define CARMINE_GRAPH_REG_DC_OFFSET_LY (0x00040068) +#define CARMINE_GRAPH_REG_DC_OFFSET_TX (0x0004006C) +#define CARMINE_GRAPH_REG_DC_OFFSET_TY (0x00040070) + +#endif -- cgit v1.2.3 From 306fa6f60a2870b7a9827a64e1b45cd35a9549aa Mon Sep 17 00:00:00 2001 From: Krzysztof Helt Date: Wed, 23 Jul 2008 21:30:50 -0700 Subject: tridentfb: replace macros with functions This patch replaces macros with static functions and puts tridentfb_par pointer as the first argument of these functions. These is a step toward multihead support. Additionally, bogus TRIDENT_MMIO define is removed as the driver supports graphics cards only through the mmio mode. Signed-off-by: Krzysztof Helt Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/tridentfb.c | 526 +++++++++++++++++++++++++--------------------- 1 file changed, 283 insertions(+), 243 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index beefab2992c..3e8a1ef892c 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -137,28 +137,34 @@ static int iscyber(int id) #define CRT 0x3D0 /* CRTC registers offset for color display */ -#ifndef TRIDENT_MMIO - #define TRIDENT_MMIO 1 -#endif - -#if TRIDENT_MMIO - #define t_outb(val, reg) writeb(val,((struct tridentfb_par *)(fb_info.par))->io_virt + reg) - #define t_inb(reg) readb(((struct tridentfb_par*)(fb_info.par))->io_virt + reg) -#else - #define t_outb(val, reg) outb(val, reg) - #define t_inb(reg) inb(reg) -#endif +static inline void t_outb(struct tridentfb_par *p, u8 val, u16 reg) +{ + fb_writeb(val, p->io_virt + reg); +} +static inline u8 t_inb(struct tridentfb_par *p, u16 reg) +{ + return fb_readb(p->io_virt + reg); +} static struct accel_switch { - void (*init_accel) (int, int); - void (*wait_engine) (void); - void (*fill_rect) (u32, u32, u32, u32, u32, u32); - void (*copy_rect) (u32, u32, u32, u32, u32, u32); + void (*init_accel) (struct tridentfb_par *, int, int); + void (*wait_engine) (struct tridentfb_par *); + void (*fill_rect) + (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); + void (*copy_rect) + (struct tridentfb_par *par, u32, u32, u32, u32, u32, u32); } *acc; -#define writemmr(r, v) writel(v, ((struct tridentfb_par *)fb_info.par)->io_virt + r) -#define readmmr(r) readl(((struct tridentfb_par *)fb_info.par)->io_virt + r) +static inline void writemmr(struct tridentfb_par *par, u16 r, u32 v) +{ + fb_writel(v, par->io_virt + r); +} + +static inline u32 readmmr(struct tridentfb_par *par, u16 r) +{ + return fb_readl(par->io_virt + r); +} /* * Blade specific acceleration. @@ -176,7 +182,7 @@ static struct accel_switch { #define ROP_S 0xCC -static void blade_init_accel(int pitch, int bpp) +static void blade_init_accel(struct tridentfb_par *par, int pitch, int bpp) { int v1 = (pitch >> 3) << 20; int tmp = 0, v2; @@ -196,33 +202,35 @@ static void blade_init_accel(int pitch, int bpp) break; } v2 = v1 | (tmp << 29); - writemmr(0x21C0, v2); - writemmr(0x21C4, v2); - writemmr(0x21B8, v2); - writemmr(0x21BC, v2); - writemmr(0x21D0, v1); - writemmr(0x21D4, v1); - writemmr(0x21C8, v1); - writemmr(0x21CC, v1); - writemmr(0x216C, 0); + writemmr(par, 0x21C0, v2); + writemmr(par, 0x21C4, v2); + writemmr(par, 0x21B8, v2); + writemmr(par, 0x21BC, v2); + writemmr(par, 0x21D0, v1); + writemmr(par, 0x21D4, v1); + writemmr(par, 0x21C8, v1); + writemmr(par, 0x21CC, v1); + writemmr(par, 0x216C, 0); } -static void blade_wait_engine(void) +static void blade_wait_engine(struct tridentfb_par *par) { - while (readmmr(STA) & 0xFA800000) ; + while (readmmr(par, STA) & 0xFA800000) ; } -static void blade_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) +static void blade_fill_rect(struct tridentfb_par *par, + u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) { - writemmr(CLR, c); - writemmr(ROP, rop ? 0x66 : ROP_S); - writemmr(CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); + writemmr(par, CLR, c); + writemmr(par, ROP, rop ? 0x66 : ROP_S); + writemmr(par, CMD, 0x20000000 | 1 << 19 | 1 << 4 | 2 << 2); - writemmr(DR1, point(x, y)); - writemmr(DR2, point(x + w - 1, y + h - 1)); + writemmr(par, DR1, point(x, y)); + writemmr(par, DR2, point(x + w - 1, y + h - 1)); } -static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) +static void blade_copy_rect(struct tridentfb_par *par, + u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) { u32 s1, s2, d1, d2; int direction = 2; @@ -234,13 +242,13 @@ static void blade_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) direction = 0; - writemmr(ROP, ROP_S); - writemmr(CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); + writemmr(par, ROP, ROP_S); + writemmr(par, CMD, 0xE0000000 | 1 << 19 | 1 << 4 | 1 << 2 | direction); - writemmr(SR1, direction ? s2 : s1); - writemmr(SR2, direction ? s1 : s2); - writemmr(DR1, direction ? d2 : d1); - writemmr(DR2, direction ? d1 : d2); + writemmr(par, SR1, direction ? s2 : s1); + writemmr(par, SR2, direction ? s1 : s2); + writemmr(par, DR1, direction ? d2 : d1); + writemmr(par, DR2, direction ? d1 : d2); } static struct accel_switch accel_blade = { @@ -257,7 +265,7 @@ static struct accel_switch accel_blade = { #define ROP_P 0xF0 #define masked_point(x, y) ((y & 0xffff)<<16|(x & 0xffff)) -static void xp_init_accel(int pitch, int bpp) +static void xp_init_accel(struct tridentfb_par *par, int pitch, int bpp) { int tmp = 0, v1; unsigned char x = 0; @@ -293,7 +301,7 @@ static void xp_init_accel(int pitch, int bpp) break; } - t_outb(x, 0x2125); + t_outb(par, x, 0x2125); eng_oper = x | 0x40; @@ -313,12 +321,12 @@ static void xp_init_accel(int pitch, int bpp) v1 = pitch << tmp; - writemmr(0x2154, v1); - writemmr(0x2150, v1); - t_outb(3, 0x2126); + writemmr(par, 0x2154, v1); + writemmr(par, 0x2150, v1); + t_outb(par, 3, 0x2126); } -static void xp_wait_engine(void) +static void xp_wait_engine(struct tridentfb_par *par) { int busy; int count, timeout; @@ -326,7 +334,7 @@ static void xp_wait_engine(void) count = 0; timeout = 0; for (;;) { - busy = t_inb(STA) & 0x80; + busy = t_inb(par, STA) & 0x80; if (busy != 0x80) return; count++; @@ -336,25 +344,27 @@ static void xp_wait_engine(void) timeout++; if (timeout == 8) { /* Reset engine */ - t_outb(0x00, 0x2120); + t_outb(par, 0x00, 0x2120); return; } } } } -static void xp_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) +static void xp_fill_rect(struct tridentfb_par *par, + u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) { - writemmr(0x2127, ROP_P); - writemmr(0x2158, c); - writemmr(0x2128, 0x4000); - writemmr(0x2140, masked_point(h, w)); - writemmr(0x2138, masked_point(y, x)); - t_outb(0x01, 0x2124); - t_outb(eng_oper, 0x2125); + writemmr(par, 0x2127, ROP_P); + writemmr(par, 0x2158, c); + writemmr(par, 0x2128, 0x4000); + writemmr(par, 0x2140, masked_point(h, w)); + writemmr(par, 0x2138, masked_point(y, x)); + t_outb(par, 0x01, 0x2124); + t_outb(par, eng_oper, 0x2125); } -static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) +static void xp_copy_rect(struct tridentfb_par *par, + u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) { int direction; u32 x1_tmp, x2_tmp, y1_tmp, y2_tmp; @@ -379,12 +389,12 @@ static void xp_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) y2_tmp = y2; } - writemmr(0x2128, direction); - t_outb(ROP_S, 0x2127); - writemmr(0x213C, masked_point(y1_tmp, x1_tmp)); - writemmr(0x2138, masked_point(y2_tmp, x2_tmp)); - writemmr(0x2140, masked_point(h, w)); - t_outb(0x01, 0x2124); + writemmr(par, 0x2128, direction); + t_outb(par, ROP_S, 0x2127); + writemmr(par, 0x213C, masked_point(y1_tmp, x1_tmp)); + writemmr(par, 0x2138, masked_point(y2_tmp, x2_tmp)); + writemmr(par, 0x2140, masked_point(h, w)); + t_outb(par, 0x01, 0x2124); } static struct accel_switch accel_xp = { @@ -397,7 +407,7 @@ static struct accel_switch accel_xp = { /* * Image specific acceleration functions */ -static void image_init_accel(int pitch, int bpp) +static void image_init_accel(struct tridentfb_par *par, int pitch, int bpp) { int tmp = 0; switch (bpp) { @@ -415,40 +425,42 @@ static void image_init_accel(int pitch, int bpp) tmp = 2; break; } - writemmr(0x2120, 0xF0000000); - writemmr(0x2120, 0x40000000 | tmp); - writemmr(0x2120, 0x80000000); - writemmr(0x2144, 0x00000000); - writemmr(0x2148, 0x00000000); - writemmr(0x2150, 0x00000000); - writemmr(0x2154, 0x00000000); - writemmr(0x2120, 0x60000000 | (pitch << 16) | pitch); - writemmr(0x216C, 0x00000000); - writemmr(0x2170, 0x00000000); - writemmr(0x217C, 0x00000000); - writemmr(0x2120, 0x10000000); - writemmr(0x2130, (2047 << 16) | 2047); + writemmr(par, 0x2120, 0xF0000000); + writemmr(par, 0x2120, 0x40000000 | tmp); + writemmr(par, 0x2120, 0x80000000); + writemmr(par, 0x2144, 0x00000000); + writemmr(par, 0x2148, 0x00000000); + writemmr(par, 0x2150, 0x00000000); + writemmr(par, 0x2154, 0x00000000); + writemmr(par, 0x2120, 0x60000000 | (pitch << 16) | pitch); + writemmr(par, 0x216C, 0x00000000); + writemmr(par, 0x2170, 0x00000000); + writemmr(par, 0x217C, 0x00000000); + writemmr(par, 0x2120, 0x10000000); + writemmr(par, 0x2130, (2047 << 16) | 2047); } -static void image_wait_engine(void) +static void image_wait_engine(struct tridentfb_par *par) { - while (readmmr(0x2164) & 0xF0000000) ; + while (readmmr(par, 0x2164) & 0xF0000000) ; } -static void image_fill_rect(u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) +static void image_fill_rect(struct tridentfb_par *par, + u32 x, u32 y, u32 w, u32 h, u32 c, u32 rop) { - writemmr(0x2120, 0x80000000); - writemmr(0x2120, 0x90000000 | ROP_S); + writemmr(par, 0x2120, 0x80000000); + writemmr(par, 0x2120, 0x90000000 | ROP_S); - writemmr(0x2144, c); + writemmr(par, 0x2144, c); - writemmr(DR1, point(x, y)); - writemmr(DR2, point(x + w - 1, y + h - 1)); + writemmr(par, DR1, point(x, y)); + writemmr(par, DR2, point(x + w - 1, y + h - 1)); - writemmr(0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); + writemmr(par, 0x2124, 0x80000000 | 3 << 22 | 1 << 10 | 1 << 9); } -static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) +static void image_copy_rect(struct tridentfb_par *par, + u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) { u32 s1, s2, d1, d2; int direction = 2; @@ -460,14 +472,15 @@ static void image_copy_rect(u32 x1, u32 y1, u32 x2, u32 y2, u32 w, u32 h) if ((y1 > y2) || ((y1 == y2) && (x1 > x2))) direction = 0; - writemmr(0x2120, 0x80000000); - writemmr(0x2120, 0x90000000 | ROP_S); + writemmr(par, 0x2120, 0x80000000); + writemmr(par, 0x2120, 0x90000000 | ROP_S); - writemmr(SR1, direction ? s2 : s1); - writemmr(SR2, direction ? s1 : s2); - writemmr(DR1, direction ? d2 : d1); - writemmr(DR2, direction ? d1 : d2); - writemmr(0x2124, 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); + writemmr(par, SR1, direction ? s2 : s1); + writemmr(par, SR2, direction ? s1 : s2); + writemmr(par, DR1, direction ? d2 : d1); + writemmr(par, DR2, direction ? d1 : d2); + writemmr(par, 0x2124, + 0x80000000 | 1 << 22 | 1 << 10 | 1 << 7 | direction); } static struct accel_switch accel_image = { @@ -484,6 +497,7 @@ static struct accel_switch accel_image = { static void tridentfb_fillrect(struct fb_info *info, const struct fb_fillrect *fr) { + struct tridentfb_par *par = info->par; int bpp = info->var.bits_per_pixel; int col = 0; @@ -502,14 +516,18 @@ static void tridentfb_fillrect(struct fb_info *info, break; } - acc->fill_rect(fr->dx, fr->dy, fr->width, fr->height, col, fr->rop); - acc->wait_engine(); + acc->fill_rect(par, fr->dx, fr->dy, fr->width, + fr->height, col, fr->rop); + acc->wait_engine(par); } static void tridentfb_copyarea(struct fb_info *info, const struct fb_copyarea *ca) { - acc->copy_rect(ca->sx, ca->sy, ca->dx, ca->dy, ca->width, ca->height); - acc->wait_engine(); + struct tridentfb_par *par = info->par; + + acc->copy_rect(par, ca->sx, ca->sy, ca->dx, ca->dy, + ca->width, ca->height); + acc->wait_engine(par); } #else /* !CONFIG_FB_TRIDENT_ACCEL */ #define tridentfb_fillrect cfb_fillrect @@ -521,49 +539,51 @@ static void tridentfb_copyarea(struct fb_info *info, * Hardware access functions */ -static inline unsigned char read3X4(int reg) +static inline unsigned char read3X4(struct tridentfb_par *par, int reg) { - struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; writeb(reg, par->io_virt + CRT + 4); return readb(par->io_virt + CRT + 5); } -static inline void write3X4(int reg, unsigned char val) +static inline void write3X4(struct tridentfb_par *par, int reg, + unsigned char val) { - struct tridentfb_par *par = (struct tridentfb_par *)fb_info.par; writeb(reg, par->io_virt + CRT + 4); writeb(val, par->io_virt + CRT + 5); } -static inline unsigned char read3C4(int reg) +static inline unsigned char read3C4(struct tridentfb_par *par, int reg) { - t_outb(reg, 0x3C4); - return t_inb(0x3C5); + t_outb(par, reg, 0x3C4); + return t_inb(par, 0x3C5); } -static inline void write3C4(int reg, unsigned char val) +static inline void write3C4(struct tridentfb_par *par, int reg, + unsigned char val) { - t_outb(reg, 0x3C4); - t_outb(val, 0x3C5); + t_outb(par, reg, 0x3C4); + t_outb(par, val, 0x3C5); } -static inline unsigned char read3CE(int reg) +static inline unsigned char read3CE(struct tridentfb_par *par, int reg) { - t_outb(reg, 0x3CE); - return t_inb(0x3CF); + t_outb(par, reg, 0x3CE); + return t_inb(par, 0x3CF); } -static inline void writeAttr(int reg, unsigned char val) +static inline void writeAttr(struct tridentfb_par *par, int reg, + unsigned char val) { - readb(((struct tridentfb_par *)fb_info.par)->io_virt + CRT + 0x0A); /* flip-flop to index */ - t_outb(reg, 0x3C0); - t_outb(val, 0x3C0); + fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ + t_outb(par, reg, 0x3C0); + t_outb(par, val, 0x3C0); } -static inline void write3CE(int reg, unsigned char val) +static inline void write3CE(struct tridentfb_par *par, int reg, + unsigned char val) { - t_outb(reg, 0x3CE); - t_outb(val, 0x3CF); + t_outb(par, reg, 0x3CE); + t_outb(par, val, 0x3CF); } static void enable_mmio(void) @@ -581,32 +601,35 @@ static void enable_mmio(void) outb(inb(0x3D5) | 0x01, 0x3D5); } -static void disable_mmio(void) +static void disable_mmio(struct tridentfb_par *par) { /* Goto New Mode */ - t_outb(0x0B, 0x3C4); - t_inb(0x3C5); + t_outb(par, 0x0B, 0x3C4); + t_inb(par, 0x3C5); /* Unprotect registers */ - t_outb(NewMode1, 0x3C4); - t_outb(0x80, 0x3C5); + t_outb(par, NewMode1, 0x3C4); + t_outb(par, 0x80, 0x3C5); /* Disable MMIO */ - t_outb(PCIReg, 0x3D4); - t_outb(t_inb(0x3D5) & ~0x01, 0x3D5); + t_outb(par, PCIReg, 0x3D4); + t_outb(par, t_inb(par, 0x3D5) & ~0x01, 0x3D5); } -#define crtc_unlock() write3X4(CRTVSyncEnd, read3X4(CRTVSyncEnd) & 0x7F) +static void crtc_unlock(struct tridentfb_par *par) +{ + write3X4(par, CRTVSyncEnd, read3X4(par, CRTVSyncEnd) & 0x7F); +} /* Return flat panel's maximum x resolution */ -static int __devinit get_nativex(void) +static int __devinit get_nativex(struct tridentfb_par *par) { int x, y, tmp; if (nativex) return nativex; - tmp = (read3CE(VertStretch) >> 4) & 3; + tmp = (read3CE(par, VertStretch) >> 4) & 3; switch (tmp) { case 0: @@ -632,44 +655,45 @@ static int __devinit get_nativex(void) } /* Set pitch */ -static void set_lwidth(int width) +static void set_lwidth(struct tridentfb_par *par, int width) { - write3X4(Offset, width & 0xFF); - write3X4(AddColReg, - (read3X4(AddColReg) & 0xCF) | ((width & 0x300) >> 4)); + write3X4(par, Offset, width & 0xFF); + write3X4(par, AddColReg, + (read3X4(par, AddColReg) & 0xCF) | ((width & 0x300) >> 4)); } /* For resolutions smaller than FP resolution stretch */ -static void screen_stretch(void) +static void screen_stretch(struct tridentfb_par *par) { if (chip_id != CYBERBLADEXPAi1) - write3CE(BiosReg, 0); + write3CE(par, BiosReg, 0); else - write3CE(BiosReg, 8); - write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 1); - write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 1); + write3CE(par, BiosReg, 8); + write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 1); + write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 1); } /* For resolutions smaller than FP resolution center */ -static void screen_center(void) +static void screen_center(struct tridentfb_par *par) { - write3CE(VertStretch, (read3CE(VertStretch) & 0x7C) | 0x80); - write3CE(HorStretch, (read3CE(HorStretch) & 0x7C) | 0x80); + write3CE(par, VertStretch, (read3CE(par, VertStretch) & 0x7C) | 0x80); + write3CE(par, HorStretch, (read3CE(par, HorStretch) & 0x7C) | 0x80); } /* Address of first shown pixel in display memory */ -static void set_screen_start(int base) +static void set_screen_start(struct tridentfb_par *par, int base) { - write3X4(StartAddrLow, base & 0xFF); - write3X4(StartAddrHigh, (base & 0xFF00) >> 8); - write3X4(CRTCModuleTest, - (read3X4(CRTCModuleTest) & 0xDF) | ((base & 0x10000) >> 11)); - write3X4(CRTHiOrd, - (read3X4(CRTHiOrd) & 0xF8) | ((base & 0xE0000) >> 17)); + u8 tmp; + write3X4(par, StartAddrLow, base & 0xFF); + write3X4(par, StartAddrHigh, (base & 0xFF00) >> 8); + tmp = read3X4(par, CRTCModuleTest) & 0xDF; + write3X4(par, CRTCModuleTest, tmp | ((base & 0x10000) >> 11)); + tmp = read3X4(par, CRTHiOrd) & 0xF8; + write3X4(par, CRTHiOrd, tmp | ((base & 0xE0000) >> 17)); } /* Set dotclock frequency */ -static void set_vclk(unsigned long freq) +static void set_vclk(struct tridentfb_par *par, unsigned long freq) { int m, n, k; unsigned long f, fi, d, di; @@ -690,8 +714,8 @@ static void set_vclk(unsigned long freq) break; } if (chip3D) { - write3C4(ClockHigh, hi); - write3C4(ClockLow, lo); + write3C4(par, ClockHigh, hi); + write3C4(par, ClockLow, lo); } else { outb(lo, 0x43C8); outb(hi, 0x43C9); @@ -700,9 +724,9 @@ static void set_vclk(unsigned long freq) } /* Set number of lines for flat panels*/ -static void set_number_of_lines(int lines) +static void set_number_of_lines(struct tridentfb_par *par, int lines) { - int tmp = read3CE(CyberEnhance) & 0x8F; + int tmp = read3CE(par, CyberEnhance) & 0x8F; if (lines > 1024) tmp |= 0x50; else if (lines > 768) @@ -711,24 +735,24 @@ static void set_number_of_lines(int lines) tmp |= 0x20; else if (lines > 480) tmp |= 0x10; - write3CE(CyberEnhance, tmp); + write3CE(par, CyberEnhance, tmp); } /* * If we see that FP is active we assume we have one. * Otherwise we have a CRT display.User can override. */ -static unsigned int __devinit get_displaytype(void) +static unsigned int __devinit get_displaytype(struct tridentfb_par *par) { if (fp) return DISPLAY_FP; if (crt || !chipcyber) return DISPLAY_CRT; - return (read3CE(FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT; + return (read3CE(par, FPConfig) & 0x10) ? DISPLAY_FP : DISPLAY_CRT; } /* Try detecting the video memory size */ -static unsigned int __devinit get_memsize(void) +static unsigned int __devinit get_memsize(struct tridentfb_par *par) { unsigned char tmp, tmp2; unsigned int k; @@ -742,7 +766,7 @@ static unsigned int __devinit get_memsize(void) k = 2560 * Kb; break; default: - tmp = read3X4(SPR) & 0x0F; + tmp = read3X4(par, SPR) & 0x0F; switch (tmp) { case 0x01: @@ -774,7 +798,7 @@ static unsigned int __devinit get_memsize(void) break; case 0x0E: /* XP */ - tmp2 = read3C4(0xC1); + tmp2 = read3C4(par, 0xC1); switch (tmp2) { case 0x00: k = 20 * Mb; @@ -862,6 +886,7 @@ static int tridentfb_check_var(struct fb_var_screeninfo *var, static int tridentfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) { + struct tridentfb_par *par = info->par; unsigned int offset; debug("enter\n"); @@ -869,13 +894,20 @@ static int tridentfb_pan_display(struct fb_var_screeninfo *var, * var->bits_per_pixel / 32; info->var.xoffset = var->xoffset; info->var.yoffset = var->yoffset; - set_screen_start(offset); + set_screen_start(par, offset); debug("exit\n"); return 0; } -#define shadowmode_on() write3CE(CyberControl, read3CE(CyberControl) | 0x81) -#define shadowmode_off() write3CE(CyberControl, read3CE(CyberControl) & 0x7E) +static void shadowmode_on(struct tridentfb_par *par) +{ + write3CE(par, CyberControl, read3CE(par, CyberControl) | 0x81); +} + +static void shadowmode_off(struct tridentfb_par *par) +{ + write3CE(par, CyberControl, read3CE(par, CyberControl) & 0x7E); +} /* Set the hardware to the requested video mode */ static int tridentfb_set_par(struct fb_info *info) @@ -905,8 +937,8 @@ static int tridentfb_set_par(struct fb_info *info) vblankstart = var->yres; vblankend = vtotal + 2; - crtc_unlock(); - write3CE(CyberControl, 8); + crtc_unlock(par); + write3CE(par, CyberControl, 8); if (flatpanel && var->xres < nativex) { /* @@ -914,35 +946,36 @@ static int tridentfb_set_par(struct fb_info *info) * than requested resolution decide whether * we stretch or center */ - t_outb(0xEB, 0x3C2); + t_outb(par, 0xEB, 0x3C2); - shadowmode_on(); + shadowmode_on(par); if (center) - screen_center(); + screen_center(par); else if (stretch) - screen_stretch(); + screen_stretch(par); } else { - t_outb(0x2B, 0x3C2); - write3CE(CyberControl, 8); + t_outb(par, 0x2B, 0x3C2); + write3CE(par, CyberControl, 8); } /* vertical timing values */ - write3X4(CRTVTotal, vtotal & 0xFF); - write3X4(CRTVDispEnd, vdispend & 0xFF); - write3X4(CRTVSyncStart, vsyncstart & 0xFF); - write3X4(CRTVSyncEnd, (vsyncend & 0x0F)); - write3X4(CRTVBlankStart, vblankstart & 0xFF); - write3X4(CRTVBlankEnd, 0 /* p->vblankend & 0xFF */ ); + write3X4(par, CRTVTotal, vtotal & 0xFF); + write3X4(par, CRTVDispEnd, vdispend & 0xFF); + write3X4(par, CRTVSyncStart, vsyncstart & 0xFF); + write3X4(par, CRTVSyncEnd, (vsyncend & 0x0F)); + write3X4(par, CRTVBlankStart, vblankstart & 0xFF); + write3X4(par, CRTVBlankEnd, 0 /* p->vblankend & 0xFF */); /* horizontal timing values */ - write3X4(CRTHTotal, htotal & 0xFF); - write3X4(CRTHDispEnd, hdispend & 0xFF); - write3X4(CRTHSyncStart, hsyncstart & 0xFF); - write3X4(CRTHSyncEnd, (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); - write3X4(CRTHBlankStart, hblankstart & 0xFF); - write3X4(CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */ ); + write3X4(par, CRTHTotal, htotal & 0xFF); + write3X4(par, CRTHDispEnd, hdispend & 0xFF); + write3X4(par, CRTHSyncStart, hsyncstart & 0xFF); + write3X4(par, CRTHSyncEnd, + (hsyncend & 0x1F) | ((hblankend & 0x20) << 2)); + write3X4(par, CRTHBlankStart, hblankstart & 0xFF); + write3X4(par, CRTHBlankEnd, 0 /* (p->hblankend & 0x1F) */); /* higher bits of vertical timing values */ tmp = 0x10; @@ -954,38 +987,40 @@ static int tridentfb_set_par(struct fb_info *info) if (vtotal & 0x200) tmp |= 0x20; if (vdispend & 0x200) tmp |= 0x40; if (vsyncstart & 0x200) tmp |= 0x80; - write3X4(CRTOverflow, tmp); + write3X4(par, CRTOverflow, tmp); - tmp = read3X4(CRTHiOrd) | 0x08; /* line compare bit 10 */ + tmp = read3X4(par, CRTHiOrd) | 0x08; /* line compare bit 10 */ if (vtotal & 0x400) tmp |= 0x80; if (vblankstart & 0x400) tmp |= 0x40; if (vsyncstart & 0x400) tmp |= 0x20; if (vdispend & 0x400) tmp |= 0x10; - write3X4(CRTHiOrd, tmp); + write3X4(par, CRTHiOrd, tmp); tmp = 0; if (htotal & 0x800) tmp |= 0x800 >> 11; if (hblankstart & 0x800) tmp |= 0x800 >> 7; - write3X4(HorizOverflow, tmp); + write3X4(par, HorizOverflow, tmp); tmp = 0x40; if (vblankstart & 0x200) tmp |= 0x20; //FIXME if (info->var.vmode & FB_VMODE_DOUBLE) tmp |= 0x80; /* double scan for 200 line modes */ - write3X4(CRTMaxScanLine, tmp); + write3X4(par, CRTMaxScanLine, tmp); - write3X4(CRTLineCompare, 0xFF); - write3X4(CRTPRowScan, 0); - write3X4(CRTModeControl, 0xC3); + write3X4(par, CRTLineCompare, 0xFF); + write3X4(par, CRTPRowScan, 0); + write3X4(par, CRTModeControl, 0xC3); - write3X4(LinearAddReg, 0x20); /* enable linear addressing */ + write3X4(par, LinearAddReg, 0x20); /* enable linear addressing */ tmp = (info->var.vmode & FB_VMODE_INTERLACED) ? 0x84 : 0x80; - write3X4(CRTCModuleTest, tmp); /* enable access extended memory */ + /* enable access extended memory */ + write3X4(par, CRTCModuleTest, tmp); - write3X4(GraphEngReg, 0x80); /* enable GE for text acceleration */ + /* enable GE for text acceleration */ + write3X4(par, GraphEngReg, 0x80); #ifdef CONFIG_FB_TRIDENT_ACCEL - acc->init_accel(info->var.xres, bpp); + acc->init_accel(par, info->var.xres, bpp); #endif switch (bpp) { @@ -1003,49 +1038,52 @@ static int tridentfb_set_par(struct fb_info *info) break; } - write3X4(PixelBusReg, tmp); + write3X4(par, PixelBusReg, tmp); tmp = 0x10; if (chipcyber) tmp |= 0x20; - write3X4(DRAMControl, tmp); /* both IO, linear enable */ + write3X4(par, DRAMControl, tmp); /* both IO, linear enable */ - write3X4(InterfaceSel, read3X4(InterfaceSel) | 0x40); - write3X4(Performance, 0x92); - write3X4(PCIReg, 0x07); /* MMIO & PCI read and write burst enable */ + write3X4(par, InterfaceSel, read3X4(par, InterfaceSel) | 0x40); + write3X4(par, Performance, 0x92); + /* MMIO & PCI read and write burst enable */ + write3X4(par, PCIReg, 0x07); /* convert from picoseconds to kHz */ vclk = PICOS2KHZ(info->var.pixclock); if (bpp == 32) vclk *= 2; - set_vclk(vclk); + set_vclk(par, vclk); - write3C4(0, 3); - write3C4(1, 1); /* set char clock 8 dots wide */ - write3C4(2, 0x0F); /* enable 4 maps because needed in chain4 mode */ - write3C4(3, 0); - write3C4(4, 0x0E); /* memory mode enable bitmaps ?? */ + write3C4(par, 0, 3); + write3C4(par, 1, 1); /* set char clock 8 dots wide */ + /* enable 4 maps because needed in chain4 mode */ + write3C4(par, 2, 0x0F); + write3C4(par, 3, 0); + write3C4(par, 4, 0x0E); /* memory mode enable bitmaps ?? */ - write3CE(MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); /* divide clock by 2 if 32bpp */ - /* chain4 mode display and CPU path */ - write3CE(0x5, 0x40); /* no CGA compat, allow 256 col */ - write3CE(0x6, 0x05); /* graphics mode */ - write3CE(0x7, 0x0F); /* planes? */ + /* divide clock by 2 if 32bpp chain4 mode display and CPU path */ + write3CE(par, MiscExtFunc, (bpp == 32) ? 0x1A : 0x12); + write3CE(par, 0x5, 0x40); /* no CGA compat, allow 256 col */ + write3CE(par, 0x6, 0x05); /* graphics mode */ + write3CE(par, 0x7, 0x0F); /* planes? */ if (chip_id == CYBERBLADEXPAi1) { /* This fixes snow-effect in 32 bpp */ - write3X4(CRTHSyncStart, 0x84); + write3X4(par, CRTHSyncStart, 0x84); } - writeAttr(0x10, 0x41); /* graphics mode and support 256 color modes */ - writeAttr(0x12, 0x0F); /* planes */ - writeAttr(0x13, 0); /* horizontal pel panning */ + /* graphics mode and support 256 color modes */ + writeAttr(par, 0x10, 0x41); + writeAttr(par, 0x12, 0x0F); /* planes */ + writeAttr(par, 0x13, 0); /* horizontal pel panning */ /* colors */ for (tmp = 0; tmp < 0x10; tmp++) - writeAttr(tmp, tmp); - readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ - t_outb(0x20, 0x3C0); /* enable attr */ + writeAttr(par, tmp, tmp); + fb_readb(par->io_virt + CRT + 0x0A); /* flip-flop to index */ + t_outb(par, 0x20, 0x3C0); /* enable attr */ switch (bpp) { case 8: @@ -1063,17 +1101,17 @@ static int tridentfb_set_par(struct fb_info *info) break; } - t_inb(0x3C8); - t_inb(0x3C6); - t_inb(0x3C6); - t_inb(0x3C6); - t_inb(0x3C6); - t_outb(tmp, 0x3C6); - t_inb(0x3C8); + t_inb(par, 0x3C8); + t_inb(par, 0x3C6); + t_inb(par, 0x3C6); + t_inb(par, 0x3C6); + t_inb(par, 0x3C6); + t_outb(par, tmp, 0x3C6); + t_inb(par, 0x3C8); if (flatpanel) - set_number_of_lines(info->var.yres); - set_lwidth(info->var.xres * bpp / (4 * 16)); + set_number_of_lines(par, info->var.yres); + set_lwidth(par, info->var.xres * bpp / (4 * 16)); info->fix.visual = (bpp == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR; info->fix.line_length = info->var.xres * (bpp >> 3); info->cmap.len = (bpp == 8) ? 256 : 16; @@ -1087,17 +1125,18 @@ static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, struct fb_info *info) { int bpp = info->var.bits_per_pixel; + struct tridentfb_par *par = info->par; if (regno >= info->cmap.len) return 1; if (bpp == 8) { - t_outb(0xFF, 0x3C6); - t_outb(regno, 0x3C8); + t_outb(par, 0xFF, 0x3C6); + t_outb(par, regno, 0x3C8); - t_outb(red >> 10, 0x3C9); - t_outb(green >> 10, 0x3C9); - t_outb(blue >> 10, 0x3C9); + t_outb(par, red >> 10, 0x3C9); + t_outb(par, green >> 10, 0x3C9); + t_outb(par, blue >> 10, 0x3C9); } else if (regno < 16) { if (bpp == 16) { /* RGB 565 */ @@ -1123,13 +1162,14 @@ static int tridentfb_setcolreg(unsigned regno, unsigned red, unsigned green, static int tridentfb_blank(int blank_mode, struct fb_info *info) { unsigned char PMCont, DPMSCont; + struct tridentfb_par *par = info->par; debug("enter\n"); if (flatpanel) return 0; - t_outb(0x04, 0x83C8); /* Read DPMS Control */ - PMCont = t_inb(0x83C6) & 0xFC; - DPMSCont = read3CE(PowerStatus) & 0xFC; + t_outb(par, 0x04, 0x83C8); /* Read DPMS Control */ + PMCont = t_inb(par, 0x83C6) & 0xFC; + DPMSCont = read3CE(par, PowerStatus) & 0xFC; switch (blank_mode) { case FB_BLANK_UNBLANK: /* Screen: On, HSync: On, VSync: On */ @@ -1155,9 +1195,9 @@ static int tridentfb_blank(int blank_mode, struct fb_info *info) break; } - write3CE(PowerStatus, DPMSCont); - t_outb(4, 0x83C8); - t_outb(PMCont, 0x83C6); + write3CE(par, PowerStatus, DPMSCont); + t_outb(par, 4, 0x83C8); + t_outb(par, PMCont, 0x83C6); debug("exit\n"); @@ -1265,11 +1305,11 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, /* setup framebuffer memory */ tridentfb_fix.smem_start = pci_resource_start(dev, 0); - tridentfb_fix.smem_len = get_memsize(); + tridentfb_fix.smem_len = get_memsize(&default_par); if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { debug("request_mem_region failed!\n"); - disable_mmio(); + disable_mmio(fb_info.par); err = -1; goto out_unmap1; } @@ -1284,10 +1324,10 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, } output("%s board found\n", pci_name(dev)); - displaytype = get_displaytype(); + displaytype = get_displaytype(&default_par); if (flatpanel) - nativex = get_nativex(); + nativex = get_nativex(&default_par); fb_info.fix = tridentfb_fix; fb_info.fbops = &tridentfb_ops; @@ -1330,7 +1370,7 @@ out_unmap2: if (fb_info.screen_base) iounmap(fb_info.screen_base); release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); - disable_mmio(); + disable_mmio(fb_info.par); out_unmap1: if (default_par.io_virt) iounmap(default_par.io_virt); -- cgit v1.2.3 From e09ed099d0169ac3a22b17cfeece0fa54a9e43eb Mon Sep 17 00:00:00 2001 From: Krzysztof Helt Date: Wed, 23 Jul 2008 21:30:51 -0700 Subject: tridentfb: convert fb_info into allocated one This patch converts fb_info structure from global variable to allocatable one. The global default_par is moved into function variable. Signed-off-by: Krzysztof Helt Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/tridentfb.c | 82 ++++++++++++++++++++++++++--------------------- 1 file changed, 46 insertions(+), 36 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index 3e8a1ef892c..cb37e10734b 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -33,10 +33,7 @@ struct tridentfb_par { static unsigned char eng_oper; /* engine operation... */ static struct fb_ops tridentfb_ops; -static struct tridentfb_par default_par; - /* FIXME:kmalloc these 3 instead */ -static struct fb_info fb_info; static u32 pseudo_pal[16]; static struct fb_var_screeninfo default_var; @@ -1217,16 +1214,23 @@ static struct fb_ops tridentfb_ops = { .fb_imageblit = cfb_imageblit, }; -static int __devinit trident_pci_probe(struct pci_dev * dev, - const struct pci_device_id * id) +static int __devinit trident_pci_probe(struct pci_dev *dev, + const struct pci_device_id *id) { int err; unsigned char revision; + struct fb_info *info; + struct tridentfb_par *default_par; err = pci_enable_device(dev); if (err) return err; + info = framebuffer_alloc(sizeof(struct tridentfb_par), &dev->dev); + if (!info) + return -ENOMEM; + default_par = info->par; + chip_id = id->device; if (chip_id == CYBERBLADEi1) @@ -1282,8 +1286,6 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, /* acceleration is on by default for 3D chips */ defaultaccel = chip3D && !noaccel; - fb_info.par = &default_par; - /* setup MMIO region */ tridentfb_fix.mmio_start = pci_resource_start(dev, 1); tridentfb_fix.mmio_len = chip3D ? 0x20000 : 0x10000; @@ -1293,9 +1295,10 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, return -1; } - default_par.io_virt = ioremap_nocache(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); + default_par->io_virt = ioremap_nocache(tridentfb_fix.mmio_start, + tridentfb_fix.mmio_len); - if (!default_par.io_virt) { + if (!default_par->io_virt) { debug("ioremap failed\n"); err = -1; goto out_unmap1; @@ -1305,46 +1308,46 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, /* setup framebuffer memory */ tridentfb_fix.smem_start = pci_resource_start(dev, 0); - tridentfb_fix.smem_len = get_memsize(&default_par); + tridentfb_fix.smem_len = get_memsize(default_par); if (!request_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len, "tridentfb")) { debug("request_mem_region failed!\n"); - disable_mmio(fb_info.par); + disable_mmio(info->par); err = -1; goto out_unmap1; } - fb_info.screen_base = ioremap_nocache(tridentfb_fix.smem_start, - tridentfb_fix.smem_len); + info->screen_base = ioremap_nocache(tridentfb_fix.smem_start, + tridentfb_fix.smem_len); - if (!fb_info.screen_base) { + if (!info->screen_base) { debug("ioremap failed\n"); err = -1; goto out_unmap2; } output("%s board found\n", pci_name(dev)); - displaytype = get_displaytype(&default_par); + displaytype = get_displaytype(default_par); if (flatpanel) - nativex = get_nativex(&default_par); + nativex = get_nativex(default_par); - fb_info.fix = tridentfb_fix; - fb_info.fbops = &tridentfb_ops; + info->fix = tridentfb_fix; + info->fbops = &tridentfb_ops; - fb_info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; + info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; #ifdef CONFIG_FB_TRIDENT_ACCEL - fb_info.flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; + info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; #endif - fb_info.pseudo_palette = pseudo_pal; + info->pseudo_palette = pseudo_pal; - if (!fb_find_mode(&default_var, &fb_info, + if (!fb_find_mode(&default_var, info, mode_option, NULL, 0, NULL, bpp)) { err = -EINVAL; goto out_unmap2; } - err = fb_alloc_cmap(&fb_info.cmap, 256, 0); + err = fb_alloc_cmap(&info->cmap, 256, 0); if (err < 0) goto out_unmap2; @@ -1353,39 +1356,46 @@ static int __devinit trident_pci_probe(struct pci_dev * dev, else default_var.accel_flags &= ~FB_ACCELF_TEXT; default_var.activate |= FB_ACTIVATE_NOW; - fb_info.var = default_var; - fb_info.device = &dev->dev; - if (register_framebuffer(&fb_info) < 0) { + info->var = default_var; + info->device = &dev->dev; + if (register_framebuffer(info) < 0) { printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); - fb_dealloc_cmap(&fb_info.cmap); + fb_dealloc_cmap(&info->cmap); err = -EINVAL; goto out_unmap2; } output("fb%d: %s frame buffer device %dx%d-%dbpp\n", - fb_info.node, fb_info.fix.id, default_var.xres, + info->node, info->fix.id, default_var.xres, default_var.yres, default_var.bits_per_pixel); + + pci_set_drvdata(dev, info); return 0; out_unmap2: - if (fb_info.screen_base) - iounmap(fb_info.screen_base); + if (info->screen_base) + iounmap(info->screen_base); release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); - disable_mmio(fb_info.par); + disable_mmio(info->par); out_unmap1: - if (default_par.io_virt) - iounmap(default_par.io_virt); + if (default_par->io_virt) + iounmap(default_par->io_virt); release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); + framebuffer_release(info); return err; } static void __devexit trident_pci_remove(struct pci_dev *dev) { - struct tridentfb_par *par = (struct tridentfb_par*)fb_info.par; - unregister_framebuffer(&fb_info); + struct fb_info *info = pci_get_drvdata(dev); + struct tridentfb_par *par = info->par; + + unregister_framebuffer(info); iounmap(par->io_virt); - iounmap(fb_info.screen_base); + iounmap(info->screen_base); release_mem_region(tridentfb_fix.smem_start, tridentfb_fix.smem_len); release_mem_region(tridentfb_fix.mmio_start, tridentfb_fix.mmio_len); + pci_set_drvdata(dev, NULL); + framebuffer_release(info); } /* List of boards that we are trying to support */ -- cgit v1.2.3 From ea8ee55c12f77cbbb6e067f91e0cd794baa692ab Mon Sep 17 00:00:00 2001 From: Krzysztof Helt Date: Wed, 23 Jul 2008 21:30:51 -0700 Subject: tridentfb: move global pseudo palette into structure This patch moves pseudo palette int tridentfb_par structure and removes global default_var. Signed-off-by: Krzysztof Helt Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/tridentfb.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index cb37e10734b..0f6e4054c99 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -28,16 +28,12 @@ struct tridentfb_par { void __iomem *io_virt; /* iospace virtual memory address */ + u32 pseudo_pal[16]; }; static unsigned char eng_oper; /* engine operation... */ static struct fb_ops tridentfb_ops; -/* FIXME:kmalloc these 3 instead */ -static u32 pseudo_pal[16]; - -static struct fb_var_screeninfo default_var; - static struct fb_fix_screeninfo tridentfb_fix = { .id = "Trident", .type = FB_TYPE_PACKED_PIXELS, @@ -1340,9 +1336,7 @@ static int __devinit trident_pci_probe(struct pci_dev *dev, #ifdef CONFIG_FB_TRIDENT_ACCEL info->flags |= FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; #endif - info->pseudo_palette = pseudo_pal; - - if (!fb_find_mode(&default_var, info, + if (!fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, bpp)) { err = -EINVAL; goto out_unmap2; @@ -1352,11 +1346,10 @@ static int __devinit trident_pci_probe(struct pci_dev *dev, goto out_unmap2; if (defaultaccel && acc) - default_var.accel_flags |= FB_ACCELF_TEXT; + info->var.accel_flags |= FB_ACCELF_TEXT; else - default_var.accel_flags &= ~FB_ACCELF_TEXT; - default_var.activate |= FB_ACTIVATE_NOW; - info->var = default_var; + info->var.accel_flags &= ~FB_ACCELF_TEXT; + info->var.activate |= FB_ACTIVATE_NOW; info->device = &dev->dev; if (register_framebuffer(info) < 0) { printk(KERN_ERR "tridentfb: could not register Trident framebuffer\n"); @@ -1365,8 +1358,8 @@ static int __devinit trident_pci_probe(struct pci_dev *dev, goto out_unmap2; } output("fb%d: %s frame buffer device %dx%d-%dbpp\n", - info->node, info->fix.id, default_var.xres, - default_var.yres, default_var.bits_per_pixel); + info->node, info->fix.id, info->var.xres, + info->var.yres, info->var.bits_per_pixel); pci_set_drvdata(dev, info); return 0; -- cgit v1.2.3 From 122e8ad3cbf172043ea93f2db8e107fa9f9b0192 Mon Sep 17 00:00:00 2001 From: Krzysztof Helt Date: Wed, 23 Jul 2008 21:30:52 -0700 Subject: tridentfb: move global chip_id into structure This patch moves the chip_id into tridentfb_par structure and removes global chip_id related constants. It also bumps version of the driver to 0.7.9 Signed-off-by: Krzysztof Helt Cc: "Antonino A. Daplas" Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/video/tridentfb.c | 27 +++++++++++++-------------- 1 file changed, 13 insertions(+), 14 deletions(-) (limited to 'drivers/video') diff --git a/drivers/video/tridentfb.c b/drivers/video/tridentfb.c index 0f6e4054c99..dfe52b424c9 100644 --- a/drivers/video/tridentfb.c +++ b/drivers/video/tridentfb.c @@ -24,11 +24,12 @@ #include #include