From 7412b10f7967ef4210ed6f793004d23642dc5140 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Sep 2006 23:24:10 +0100 Subject: [ARM] 3829/1: iop3xx: optimise irq entry macros Squeeze three instructions out of the iop32x irq demuxer, and nine out of the iop33x irq demuxer by using the hardware vector generator. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-iop32x/entry-macro.S | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) (limited to 'include/asm-arm/arch-iop32x') diff --git a/include/asm-arm/arch-iop32x/entry-macro.S b/include/asm-arm/arch-iop32x/entry-macro.S index c5ec1e23cbe..3497fef0b89 100644 --- a/include/asm-arm/arch-iop32x/entry-macro.S +++ b/include/asm-arm/arch-iop32x/entry-macro.S @@ -16,13 +16,9 @@ * Note: only deal with normal interrupts, not FIQ */ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp - mov \irqnr, #0 ldr \base, =IOP3XX_REG_ADDR(0x07D8) ldr \irqstat, [\base] @ Read IINTSRC - cmp \irqstat, #0 - beq 1001f - clz \irqnr, \irqstat - mov \base, #31 - subs \irqnr,\base,\irqnr -1001: + cmp \irqstat, #0 + clzne \irqnr, \irqstat + rsbne \irqnr, \irqnr, #31 .endm -- cgit v1.2.3