From 7e9740b11529a0a69789fbe92d324f293e6266f6 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Mon, 18 Sep 2006 23:17:36 +0100 Subject: [ARM] 3821/1: iop3xx: switch iop32x/iop33x over to shared pci code Switch the iop32x and iop33x code over to the common PCI implementation, and remove the (nearly identical) iop32x and iop33x PCI implementations. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-iop33x/hardware.h | 20 +------ include/asm-arm/arch-iop33x/iop331.h | 96 +--------------------------------- include/asm-arm/arch-iop33x/memory.h | 4 +- include/asm-arm/arch-iop33x/system.h | 2 +- 4 files changed, 7 insertions(+), 115 deletions(-) (limited to 'include/asm-arm/arch-iop33x') diff --git a/include/asm-arm/arch-iop33x/hardware.h b/include/asm-arm/arch-iop33x/hardware.h index 4a457084c5c..5e3cb32af02 100644 --- a/include/asm-arm/arch-iop33x/hardware.h +++ b/include/asm-arm/arch-iop33x/hardware.h @@ -19,26 +19,10 @@ */ #define pcibios_assign_all_busses() 1 +#define PCIBIOS_MIN_IO 0x00000000 +#define PCIBIOS_MIN_MEM 0x00000000 -/* - * The min PCI I/O and MEM space are dependent on what specific - * chipset/platform we are running on, so instead of hardcoding with - * #ifdefs, we just fill these in the platform level PCI init code. - */ -#ifndef __ASSEMBLY__ -extern unsigned long iop3xx_pcibios_min_io; -extern unsigned long iop3xx_pcibios_min_mem; - -extern unsigned int processor_id; -#endif - -/* - * We just set these to zero since they are really bogus anyways - */ -#define PCIBIOS_MIN_IO (iop3xx_pcibios_min_io) -#define PCIBIOS_MIN_MEM (iop3xx_pcibios_min_mem) - /* * Generic chipset bits * diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h index a7f47122c5e..e85e1a2e1a8 100644 --- a/include/asm-arm/arch-iop33x/iop331.h +++ b/include/asm-arm/arch-iop33x/iop331.h @@ -23,27 +23,6 @@ #define iop_is_331() 1 #endif -/* - * IOP331 I/O and Mem space regions for PCI autoconfiguration - */ -#define IOP331_PCI_IO_WINDOW_SIZE 0x00010000 -#define IOP331_PCI_LOWER_IO_PA 0x90000000 -#define IOP331_PCI_LOWER_IO_VA 0xfe000000 -#define IOP331_PCI_LOWER_IO_BA (*IOP331_OIOWTVR) -#define IOP331_PCI_UPPER_IO_PA (IOP331_PCI_LOWER_IO_PA + IOP331_PCI_IO_WINDOW_SIZE - 1) -#define IOP331_PCI_UPPER_IO_VA (IOP331_PCI_LOWER_IO_VA + IOP331_PCI_IO_WINDOW_SIZE - 1) -#define IOP331_PCI_UPPER_IO_BA (IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_WINDOW_SIZE - 1) -#define IOP331_PCI_IO_OFFSET (IOP331_PCI_LOWER_IO_VA - IOP331_PCI_LOWER_IO_BA) - -/* this can be 128M if OMWTVR1 is set */ -#define IOP331_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */ -/* #define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) */ -#define IOP331_PCI_LOWER_MEM_PA 0x80000000 -#define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0) -#define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1) -#define IOP331_PCI_UPPER_MEM_BA (IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_WINDOW_SIZE - 1) -#define IOP331_PCI_MEM_OFFSET (IOP331_PCI_LOWER_MEM_PA - IOP331_PCI_LOWER_MEM_BA) - /* * IOP331 chipset registers */ @@ -54,79 +33,6 @@ /* Reserved 0x00000000 through 0x000000FF */ /* Address Translation Unit 0x00000100 through 0x000001FF */ -#define IOP331_ATUVID (volatile u16 *)IOP331_REG_ADDR(0x00000100) -#define IOP331_ATUDID (volatile u16 *)IOP331_REG_ADDR(0x00000102) -#define IOP331_ATUCMD (volatile u16 *)IOP331_REG_ADDR(0x00000104) -#define IOP331_ATUSR (volatile u16 *)IOP331_REG_ADDR(0x00000106) -#define IOP331_ATURID (volatile u8 *)IOP331_REG_ADDR(0x00000108) -#define IOP331_ATUCCR (volatile u32 *)IOP331_REG_ADDR(0x00000109) -#define IOP331_ATUCLSR (volatile u8 *)IOP331_REG_ADDR(0x0000010C) -#define IOP331_ATULT (volatile u8 *)IOP331_REG_ADDR(0x0000010D) -#define IOP331_ATUHTR (volatile u8 *)IOP331_REG_ADDR(0x0000010E) -#define IOP331_ATUBIST (volatile u8 *)IOP331_REG_ADDR(0x0000010F) -#define IOP331_IABAR0 (volatile u32 *)IOP331_REG_ADDR(0x00000110) -#define IOP331_IAUBAR0 (volatile u32 *)IOP331_REG_ADDR(0x00000114) -#define IOP331_IABAR1 (volatile u32 *)IOP331_REG_ADDR(0x00000118) -#define IOP331_IAUBAR1 (volatile u32 *)IOP331_REG_ADDR(0x0000011C) -#define IOP331_IABAR2 (volatile u32 *)IOP331_REG_ADDR(0x00000120) -#define IOP331_IAUBAR2 (volatile u32 *)IOP331_REG_ADDR(0x00000124) -#define IOP331_ASVIR (volatile u16 *)IOP331_REG_ADDR(0x0000012C) -#define IOP331_ASIR (volatile u16 *)IOP331_REG_ADDR(0x0000012E) -#define IOP331_ERBAR (volatile u32 *)IOP331_REG_ADDR(0x00000130) -#define IOP331_ATU_CAPPTR (volatile u32 *)IOP331_REG_ADDR(0x00000134) -/* Reserved 0x00000138 through 0x0000013B */ -#define IOP331_ATUILR (volatile u8 *)IOP331_REG_ADDR(0x0000013C) -#define IOP331_ATUIPR (volatile u8 *)IOP331_REG_ADDR(0x0000013D) -#define IOP331_ATUMGNT (volatile u8 *)IOP331_REG_ADDR(0x0000013E) -#define IOP331_ATUMLAT (volatile u8 *)IOP331_REG_ADDR(0x0000013F) -#define IOP331_IALR0 (volatile u32 *)IOP331_REG_ADDR(0x00000140) -#define IOP331_IATVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000144) -#define IOP331_ERLR (volatile u32 *)IOP331_REG_ADDR(0x00000148) -#define IOP331_ERTVR (volatile u32 *)IOP331_REG_ADDR(0x0000014C) -#define IOP331_IALR1 (volatile u32 *)IOP331_REG_ADDR(0x00000150) -#define IOP331_IALR2 (volatile u32 *)IOP331_REG_ADDR(0x00000154) -#define IOP331_IATVR2 (volatile u32 *)IOP331_REG_ADDR(0x00000158) -#define IOP331_OIOWTVR (volatile u32 *)IOP331_REG_ADDR(0x0000015C) -#define IOP331_OMWTVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000160) -#define IOP331_OUMWTVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000164) -#define IOP331_OMWTVR1 (volatile u32 *)IOP331_REG_ADDR(0x00000168) -#define IOP331_OUMWTVR1 (volatile u32 *)IOP331_REG_ADDR(0x0000016C) -/* Reserved 0x00000170 through 0x00000177*/ -#define IOP331_OUDWTVR (volatile u32 *)IOP331_REG_ADDR(0x00000178) -/* Reserved 0x0000017C through 0x0000017F*/ -#define IOP331_ATUCR (volatile u32 *)IOP331_REG_ADDR(0x00000180) -#define IOP331_PCSR (volatile u32 *)IOP331_REG_ADDR(0x00000184) -#define IOP331_ATUISR (volatile u32 *)IOP331_REG_ADDR(0x00000188) -#define IOP331_ATUIMR (volatile u32 *)IOP331_REG_ADDR(0x0000018C) -#define IOP331_IABAR3 (volatile u32 *)IOP331_REG_ADDR(0x00000190) -#define IOP331_IAUBAR3 (volatile u32 *)IOP331_REG_ADDR(0x00000194) -#define IOP331_IALR3 (volatile u32 *)IOP331_REG_ADDR(0x00000198) -#define IOP331_IATVR3 (volatile u32 *)IOP331_REG_ADDR(0x0000019C) -/* Reserved 0x000001A0 through 0x000001A3*/ -#define IOP331_OCCAR (volatile u32 *)IOP331_REG_ADDR(0x000001A4) -/* Reserved 0x000001A8 through 0x000001AB*/ -#define IOP331_OCCDR (volatile u32 *)IOP331_REG_ADDR(0x000001AC) -/* Reserved 0x000001B0 through 0x000001BB*/ -#define IOP331_VPDCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001B8) -#define IOP331_VPDNXTP (volatile u8 *)IOP331_REG_ADDR(0x000001B9) -#define IOP331_VPDAR (volatile u16 *)IOP331_REG_ADDR(0x000001BA) -#define IOP331_VPDDR (volatile u32 *)IOP331_REG_ADDR(0x000001BC) -#define IOP331_PMCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001C0) -#define IOP331_PMNEXT (volatile u8 *)IOP331_REG_ADDR(0x000001C1) -#define IOP331_APMCR (volatile u16 *)IOP331_REG_ADDR(0x000001C2) -#define IOP331_APMCSR (volatile u16 *)IOP331_REG_ADDR(0x000001C4) -/* Reserved 0x000001C6 through 0x000001CF */ -#define IOP331_MSICAPID (volatile u8 *)IOP331_REG_ADDR(0x000001D0) -#define IOP331_MSINXTP (volatile u8 *)IOP331_REG_ADDR(0x000001D1) -#define IOP331_MSIMCR (volatile u16 *)IOP331_REG_ADDR(0x000001D2) -#define IOP331_MSIMAR (volatile u32 *)IOP331_REG_ADDR(0x000001D4) -#define IOP331_MSIMUAR (volatile u32 *)IOP331_REG_ADDR(0x000001D8) -#define IOP331_MSIMDR (volatile u32 *)IOP331_REG_ADDR(0x000001DC) -#define IOP331_PCIXCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001E0) -#define IOP331_PCIXNEXT (volatile u8 *)IOP331_REG_ADDR(0x000001E1) -#define IOP331_PCIXCMD (volatile u16 *)IOP331_REG_ADDR(0x000001E2) -#define IOP331_PCIXSR (volatile u32 *)IOP331_REG_ADDR(0x000001E4) -#define IOP331_PCIIRSR (volatile u32 *)IOP331_REG_ADDR(0x000001EC) /* Messaging Unit 0x00000300 through 0x000003FF */ @@ -332,6 +238,8 @@ /* Reserved 0x0000178c through 0x000019ff */ +#include + #ifndef __ASSEMBLY__ extern void iop331_init_irq(void); diff --git a/include/asm-arm/arch-iop33x/memory.h b/include/asm-arm/arch-iop33x/memory.h index 5e47164934c..de208d2cca4 100644 --- a/include/asm-arm/arch-iop33x/memory.h +++ b/include/asm-arm/arch-iop33x/memory.h @@ -19,8 +19,8 @@ * bus_to_virt: Used to convert an address for DMA operations * to an address that the kernel can use. */ -#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP331_IATVR2)) | ((*IOP331_IABAR2) & 0xfffffff0)) -#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP331_IALR2)) | ( *IOP331_IATVR2))) +#define __virt_to_bus(x) (((__virt_to_phys(x)) & ~(*IOP3XX_IATVR2)) | ((*IOP3XX_IABAR2) & 0xfffffff0)) +#define __bus_to_virt(x) (__phys_to_virt(((x) & ~(*IOP3XX_IALR2)) | ( *IOP3XX_IATVR2))) #endif diff --git a/include/asm-arm/arch-iop33x/system.h b/include/asm-arm/arch-iop33x/system.h index 43cc787ea62..8270ad9f86c 100644 --- a/include/asm-arm/arch-iop33x/system.h +++ b/include/asm-arm/arch-iop33x/system.h @@ -16,7 +16,7 @@ static inline void arch_idle(void) static inline void arch_reset(char mode) { - *IOP331_PCSR = 0x30; + *IOP3XX_PCSR = 0x30; if ( 1 && mode == 's') { /* Jump into ROM at address 0 */ -- cgit v1.2.3