From ed36a6e47e095f266031f6fb532d1098b4bf42dc Mon Sep 17 00:00:00 2001 From: mokopatches Date: Wed, 19 Nov 2008 17:03:18 +0000 Subject: fiq-hdq.patch --- include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) (limited to 'include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h') diff --git a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h index 507d23556b2..c5eb3df47cf 100644 --- a/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h +++ b/include/asm-arm/arch-s3c2410/fiq_ipc_gta02.h @@ -19,12 +19,35 @@ #include #include +enum hdq_bitbang_states { + HDQB_IDLE = 0, + HDQB_TX_BREAK, + HDQB_TX_BREAK_RECOVERY, + HDQB_ADS_CALC, + HDQB_ADS_LOW, + HDQB_ADS_HIGH, + HDQB_WAIT_RX, + HDQB_DATA_RX_LOW, + HDQB_DATA_RX_HIGH, + HDQB_WAIT_TX, +}; struct fiq_ipc { /* vibrator */ unsigned long vib_gpio_pin; /* which pin to meddle with */ u8 vib_pwm; /* 0 = OFF -- will ensure GPIO deasserted and stop FIQ */ u8 vib_pwm_latched; + + /* hdq */ + u8 hdq_probed; /* nonzero after HDQ driver probed */ + struct mutex hdq_lock; /* if you want to use hdq, you have to take lock */ + unsigned long hdq_gpio_pin; /* GTA02 = GPD14 which pin to meddle with */ + u8 hdq_ads; /* b7..b6 = register address, b0 = r/w */ + u8 hdq_tx_data; /* data to tx for write action */ + u8 hdq_rx_data; /* data received in read action */ + u8 hdq_request_ctr; /* incremented by "user" to request a transfer */ + u8 hdq_transaction_ctr; /* incremented after each transfer */ + u8 hdq_error; /* 0 = no error */ }; /* actual definition lives in arch/arm/mach-s3c2440/fiq_c_isr.c */ -- cgit v1.2.3