From 4c61afcdb2cd4be299c1442b33adf312b695e2d7 Mon Sep 17 00:00:00 2001 From: Ingo Molnar Date: Wed, 30 Jan 2008 13:34:09 +0100 Subject: x86: fix clflush_page_range logic only present ptes must be flushed. Signed-off-by: Thomas Gleixner Signed-off-by: Ingo Molnar --- include/asm-x86/cacheflush.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include/asm-x86/cacheflush.h') diff --git a/include/asm-x86/cacheflush.h b/include/asm-x86/cacheflush.h index 3e74aff9080..8dd8c5e3cc7 100644 --- a/include/asm-x86/cacheflush.h +++ b/include/asm-x86/cacheflush.h @@ -42,7 +42,7 @@ int set_memory_ro(unsigned long addr, int numpages); int set_memory_rw(unsigned long addr, int numpages); int set_memory_np(unsigned long addr, int numpages); -void clflush_cache_range(void *addr, int size); +void clflush_cache_range(void *addr, unsigned int size); #ifdef CONFIG_DEBUG_RODATA void mark_rodata_ro(void); -- cgit v1.2.3