From d53ace70052b5c0a08a4f92993c0614f84920abf Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 29 Mar 2006 09:42:43 +0100 Subject: [ARM] Allow un-muxed syscalls to be available for everyone It's been a while since the un-muxed socket and ipc syscalls were introduced, so make the unistd.h number definitions visible for non-EABI as well as EABI. Signed-off-by: Russell King --- include/asm-arm/unistd.h | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'include') diff --git a/include/asm-arm/unistd.h b/include/asm-arm/unistd.h index 8f331bbd39a..65ac305c2d4 100644 --- a/include/asm-arm/unistd.h +++ b/include/asm-arm/unistd.h @@ -308,8 +308,6 @@ #define __NR_mq_notify (__NR_SYSCALL_BASE+278) #define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279) #define __NR_waitid (__NR_SYSCALL_BASE+280) - -#if defined(__ARM_EABI__) /* reserve these for un-muxing socketcall */ #define __NR_socket (__NR_SYSCALL_BASE+281) #define __NR_bind (__NR_SYSCALL_BASE+282) #define __NR_connect (__NR_SYSCALL_BASE+283) @@ -327,9 +325,6 @@ #define __NR_getsockopt (__NR_SYSCALL_BASE+295) #define __NR_sendmsg (__NR_SYSCALL_BASE+296) #define __NR_recvmsg (__NR_SYSCALL_BASE+297) -#endif - -#if defined(__ARM_EABI__) /* reserve these for un-muxing ipc */ #define __NR_semop (__NR_SYSCALL_BASE+298) #define __NR_semget (__NR_SYSCALL_BASE+299) #define __NR_semctl (__NR_SYSCALL_BASE+300) @@ -341,16 +336,10 @@ #define __NR_shmdt (__NR_SYSCALL_BASE+306) #define __NR_shmget (__NR_SYSCALL_BASE+307) #define __NR_shmctl (__NR_SYSCALL_BASE+308) -#endif - #define __NR_add_key (__NR_SYSCALL_BASE+309) #define __NR_request_key (__NR_SYSCALL_BASE+310) #define __NR_keyctl (__NR_SYSCALL_BASE+311) - -#if defined(__ARM_EABI__) /* reserved for un-muxing ipc */ #define __NR_semtimedop (__NR_SYSCALL_BASE+312) -#endif - #define __NR_vserver (__NR_SYSCALL_BASE+313) #define __NR_ioprio_set (__NR_SYSCALL_BASE+314) #define __NR_ioprio_get (__NR_SYSCALL_BASE+315) -- cgit v1.2.3 From fd88dd740ad7b92cd399b6116dfa9486b36ffaff Mon Sep 17 00:00:00 2001 From: Marc-Andre Hebert Date: Thu, 30 Mar 2006 10:24:08 +0100 Subject: [ARM] 3434/1: pxa i2s amsl define Patch from Marc-Andre Hebert The error concerns a bit mask define for the AMSL bit of the SACR1 register in the 2.6 kernel tree. The AMSL is bit 0 and it was defined as so in the 2.4 kernel tree but it is inccorrectly set as bit 1 (a reserved bit) in the 2.6 kernel tree. Signed-off-by: Marc-Andre Hebert Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 1409c5bd703..c8f53a71c07 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -485,7 +485,7 @@ #define SACR1_ENLBF (1 << 5) /* Enable Loopback */ #define SACR1_DRPL (1 << 4) /* Disable Replaying Function */ #define SACR1_DREC (1 << 3) /* Disable Recording Function */ -#define SACR1_AMSL (1 << 1) /* Specify Alternate Mode */ +#define SACR1_AMSL (1 << 0) /* Specify Alternate Mode */ #define SASR0_I2SOFF (1 << 7) /* Controller Status */ #define SASR0_ROR (1 << 6) /* Rx FIFO Overrun */ -- cgit v1.2.3 From cc3d48db75235adf0ae37d3287f6f9e14657d1ae Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Thu, 30 Mar 2006 10:51:44 +0100 Subject: [ARM] 3424/2: ixp23xx: fix uncompress.h for recent CRLF decompressor change Patch from Lennert Buytenhek Adapt ixp23xx uncompress.h to a081568d7016061ed848696984e3acf1ba0b3054. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- include/asm-arm/arch-ixp23xx/uncompress.h | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h index 62623fa9b2f..013575e6a9a 100644 --- a/include/asm-arm/arch-ixp23xx/uncompress.h +++ b/include/asm-arm/arch-ixp23xx/uncompress.h @@ -16,26 +16,21 @@ #define UART_BASE ((volatile u32 *)IXP23XX_UART1_PHYS) -static __inline__ void putc(char c) +static inline void putc(char c) { int j; for (j = 0; j < 0x1000; j++) { if (UART_BASE[UART_LSR] & UART_LSR_THRE) break; + barrier(); } UART_BASE[UART_TX] = c; } -static void putstr(const char *s) +static inline void flush(void) { - while (*s) { - putc(*s); - if (*s == '\n') - putc('\r'); - s++; - } } #define arch_decomp_setup() -- cgit v1.2.3 From f19180056ea09ec6a5d32e741234451a1e6eba4d Mon Sep 17 00:00:00 2001 From: "Zhang, Yanmin" Date: Mon, 27 Feb 2006 11:37:45 +0800 Subject: [IA64] Export cpu cache info by sysfs The patch exports 8 attributes of cpu cache info under /sys/devices/system/cpu/cpuX/cache/indexX: 1) level 2) type 3) coherency_line_size 4) ways_of_associativity 5) size 6) shared_cpu_map 7) attributes 8) number_of_sets: number_of_sets=size/ways_of_associativity/coherency_line_size. Signed-off-by: Zhang Yanmin Signed-off-by: Tony Luck --- include/asm-ia64/pal.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'include') diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 4e7e6f23b08..5d229c5953e 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -68,6 +68,7 @@ #define PAL_SHUTDOWN 40 /* enter processor shutdown state */ #define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */ #define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */ +#define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */ #define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */ #define PAL_HALT_INFO 257 /* return the low power capabilities of processor */ @@ -1647,6 +1648,33 @@ ia64_pal_logical_to_phys(u64 proc_number, pal_logical_to_physical_t *mapping) return iprv.status; } + +typedef struct pal_cache_shared_info_s +{ + u64 num_shared; + pal_proc_n_log_info1_t ppli1; + pal_proc_n_log_info2_t ppli2; +} pal_cache_shared_info_t; + +/* Get information on logical to physical processor mappings. */ +static inline s64 +ia64_pal_cache_shared_info(u64 level, + u64 type, + u64 proc_number, + pal_cache_shared_info_t *info) +{ + struct ia64_pal_retval iprv; + + PAL_CALL(iprv, PAL_CACHE_SHARED_INFO, level, type, proc_number); + + if (iprv.status == PAL_STATUS_SUCCESS) { + info->num_shared = iprv.v0; + info->ppli1.ppli1_data = iprv.v1; + info->ppli2.ppli2_data = iprv.v2; + } + + return iprv.status; +} #endif /* __ASSEMBLY__ */ #endif /* _ASM_IA64_PAL_H */ -- cgit v1.2.3 From 2ab9391dea6e36fed13443c29bf97d3be05f5289 Mon Sep 17 00:00:00 2001 From: Tony Luck Date: Fri, 31 Mar 2006 10:28:29 -0800 Subject: [IA64] Avoid "u64 foo : 32;" for gcc3 vs. gcc4 compatibility gcc3 thinks that a 32-bit field of a u64 type is itself a u64, so should be printed with "%ld". gcc4 thinks it needs just "%d". Make both versions happy by avoiding this construct. Signed-off-by: Tony Luck --- include/asm-ia64/pal.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-ia64/pal.h b/include/asm-ia64/pal.h index 5d229c5953e..37e52a2836b 100644 --- a/include/asm-ia64/pal.h +++ b/include/asm-ia64/pal.h @@ -131,7 +131,7 @@ typedef u64 pal_cache_line_state_t; #define PAL_CACHE_LINE_STATE_MODIFIED 3 /* Modified */ typedef struct pal_freq_ratio { - u64 den : 32, num : 32; /* numerator & denominator */ + u32 den, num; /* numerator & denominator */ } itc_ratio, proc_ratio; typedef union pal_cache_config_info_1_s { @@ -152,10 +152,10 @@ typedef union pal_cache_config_info_1_s { typedef union pal_cache_config_info_2_s { struct { - u64 cache_size : 32, /*cache size in bytes*/ + u32 cache_size; /*cache size in bytes*/ - alias_boundary : 8, /* 39-32 aliased addr + u32 alias_boundary : 8, /* 39-32 aliased addr * separation for max * performance. */ -- cgit v1.2.3