From ba5187dbb4b2eac99d6fa1d6bbece67e0066bf51 Mon Sep 17 00:00:00 2001 From: Thiemo Seufer Date: Mon, 25 Apr 2005 16:36:23 +0000 Subject: Better interface to run uncached cache setup code. Signed-off-by: Thiemo Seufer Signed-off-by: Ralf Baechle --- include/asm-mips/cacheflush.h | 3 +++ include/asm-mips/mipsregs.h | 3 +++ 2 files changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index 4213d2c8bb8..a18ba2edc0b 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -90,4 +90,7 @@ extern void (*flush_data_cache_page)(unsigned long addr); #define ClearPageDcacheDirty(page) \ clear_bit(PG_dcache_dirty, &(page)->flags) +/* Run kernel code uncached, useful for cache probing functions. */ +unsigned long __init run_uncached(void *func); + #endif /* _ASM_CACHEFLUSH_H */ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 006354ed2e2..f3b0b418150 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -433,6 +433,9 @@ #define R5K_CONF_SE (_ULCAST_(1) << 12) #define R5K_CONF_SS (_ULCAST_(3) << 20) +/* Bits specific to the RM7000. */ +#define R7K_CONF_SE (_ULCAST_(1) << 3) + /* Bits specific to the R10000. */ #define R10K_CONF_DN (_ULCAST_(3) << 3) #define R10K_CONF_CT (_ULCAST_(1) << 5) -- cgit v1.2.3