From fb31690fbac6f4055c1765522752e4746759f5de Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 29 Oct 2005 13:15:10 +0100 Subject: [ARM] Ensure machine information structures aren't optimised away Since the machine information structures are now static, the compiler might optimise them away. Mark them with __attribute_used__ to prevent this occuring. Signed-off-by: Russell King --- include/asm-arm/mach/arch.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h index 7273c6fd95b..eb262e078c4 100644 --- a/include/asm-arm/mach/arch.h +++ b/include/asm-arm/mach/arch.h @@ -50,6 +50,7 @@ struct machine_desc { */ #define MACHINE_START(_type,_name) \ static const struct machine_desc __mach_desc_##_type \ + __attribute_used__ \ __attribute__((__section__(".arch.info.init"))) = { \ .nr = MACH_TYPE_##_type, \ .name = _name, -- cgit v1.2.3 From 8c18fe2562c45180c407872d05857c55c1e5e37b Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 29 Oct 2005 13:18:10 +0100 Subject: [ARM] Fix buggy __phys_to_pfn / __pfn_to_phys Macro arguments should _always_ be surrounded by parentheses when used to prevent unexpected problems with operator precedence. Signed-off-by: Russell King --- include/asm-arm/mach/map.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h index 0619522bd92..b338936bde4 100644 --- a/include/asm-arm/mach/map.h +++ b/include/asm-arm/mach/map.h @@ -27,8 +27,8 @@ struct meminfo; #define MT_ROM 6 #define MT_IXP2000_DEVICE 7 -#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT) -#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT) +#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT) +#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT) extern void create_memmap_holes(struct meminfo *); extern void memtable_init(struct meminfo *); -- cgit v1.2.3 From 14e66f767f5e8d023e098b475dc24ddc9a5dbdfd Mon Sep 17 00:00:00 2001 From: Russell King Date: Sat, 29 Oct 2005 16:08:31 +0100 Subject: [ARM] Allow MTD device name to be passed via platform data Allow SA1100 devices to pass the name of the flash device to the SA1100 map driver. Signed-off-by: Russell King --- include/asm-arm/mach/flash.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-arm/mach/flash.h b/include/asm-arm/mach/flash.h index a92887d4b2c..cd57436d987 100644 --- a/include/asm-arm/mach/flash.h +++ b/include/asm-arm/mach/flash.h @@ -14,6 +14,7 @@ struct mtd_partition; /* * map_name: the map probe function name + * name: flash device name (eg, as used with mtdparts=) * width: width of mapped device * init: method called at driver/device initialisation * exit: method called at driver/device removal @@ -23,6 +24,7 @@ struct mtd_partition; */ struct flash_platform_data { const char *map_name; + const char *name; unsigned int width; int (*init)(void); void (*exit)(void); -- cgit v1.2.3 From 931db7d6880027bb2b6b0cb78a488ab1486e28b7 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 29 Oct 2005 16:28:26 +0100 Subject: [ARM] 3050/1: remove ixp2000_reg_write erratum #66 workaround Patch from Lennert Buytenhek The workaround that we do for avoiding triggering ixp2400 erratum #66 involves mapping I/O pages using XCB=101 instead of XCB=000 so that we prevent the I/O signal to the gasket from being asserted (which can cause data corruption.) But XCB=101 mappings are write-buffered while mappings using XCB=000 are not, which is why if we use XCB=101 mappings we do a readback for every CSR store in an attempt to make sure that the store has been pushed out of the xscale core and the gasket. Unfortunately, there are two issues with this: - we do a readback for every CSR store, which is wrong, because the register we are writing to might have unwanted side-effects on read, for example, in the case of the scratchpad ring enqueue/dequeue registers; and - the readback is totally ineffective in the way we currently do it, because we just issue a load but do not issue any instruction that depends on the return value of that load, so the xscale core does not wait for the load to complete before continuing. See this linux-arm-kernel mailing list post for further information: http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2005-September/031314.html This means that my ixp2400 boxes have been running for many months without a working readback in ixp2000_reg_write, without any apparent adverse effects. Two of them have been running for a week now with the actual readback deleted from ixp2000_reg_write, also without any apparent ill effects. So, because in its current form it does more harm than good, the readback in ixp2000_reg_write should simply be killed, as the patch below does. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp2000/platform.h | 29 ----------------------------- 1 file changed, 29 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index abdcf51bd28..aabeef2454d 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h @@ -15,39 +15,10 @@ #ifndef __ASSEMBLY__ -/* - * The IXP2400 B0 silicon contains an erratum (#66) that causes writes - * to on-chip I/O register to not complete fully. What this means is - * that if you have a write to on-chip I/O followed by a back-to-back - * read or write, the first write will happen twice. OR...if it's - * not a back-to-back transaction, the read or write will generate - * incorrect data. - * - * The official work around for this is to set the on-chip I/O regions - * as XCB=101 and then force a read-back from the register. - * - */ -#if defined(CONFIG_ARCH_ENP2611) || defined(CONFIG_ARCH_IXDP2400) || defined(CONFIG_ARCH_IXDP2401) - -#include /* Pickup local_irq_ functions */ - -static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) -{ - unsigned long dummy; - unsigned long flags; - - local_irq_save(flags); - *((volatile unsigned long *)reg) = val; - barrier(); - dummy = *((volatile unsigned long *)reg); - local_irq_restore(flags); -} -#else static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) { *((volatile unsigned long *)reg) = val; } -#endif /* IXDP2400 || IXDP2401 */ #define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg)) /* -- cgit v1.2.3 From ecbea7a2dae94092db9566bcd1f38535e9b3cde9 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 29 Oct 2005 16:28:27 +0100 Subject: [ARM] 3051/1: turn ixp2000_reg_read into an inline function Patch from Lennert Buytenhek Turn ixp2000_reg_read into an inline function. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp2000/platform.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index aabeef2454d..6e5b6a955ab 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h @@ -15,11 +15,15 @@ #ifndef __ASSEMBLY__ +static inline unsigned long ixp2000_reg_read(volatile void *reg) +{ + return *((volatile unsigned long *)reg); +} + static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) { *((volatile unsigned long *)reg) = val; } -#define ixp2000_reg_read(reg) (*((volatile unsigned long *)reg)) /* * Boards may multiplex different devices on the 2nd channel of -- cgit v1.2.3 From b4a1f67fbfb848ded8cf0c6c305224534144ab2d Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Sat, 29 Oct 2005 16:28:28 +0100 Subject: [ARM] 3053/1: introduce ixp2000_reg_wrb (ixp2000_reg_write plus readback) Patch from Lennert Buytenhek Introduce ixp2000_reg_wrb, which is a variant of ixp2000_reg_write that does a readback from the target register, to make sure that the write has been flushed out of the write buffer. Unlike the previous (ineffective) readback in ixp2000_reg_write, this readback is followed by an instruction that depends on the value of the readback so that the CPU actually stalls until the readback has completed. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp2000/platform.h | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-ixp2000/platform.h b/include/asm-arm/arch-ixp2000/platform.h index 6e5b6a955ab..a66317ab207 100644 --- a/include/asm-arm/arch-ixp2000/platform.h +++ b/include/asm-arm/arch-ixp2000/platform.h @@ -25,6 +25,31 @@ static inline void ixp2000_reg_write(volatile void *reg, unsigned long val) *((volatile unsigned long *)reg) = val; } +/* + * On the IXP2400, we can't use XCB=000 due to chip bugs. We use + * XCB=101 instead, but that makes all I/O accesses bufferable. This + * is not a problem in general, but we do have to be slightly more + * careful because I/O writes are no longer automatically flushed out + * of the write buffer. + * + * In cases where we want to make sure that a write has been flushed + * out of the write buffer before we proceed, for example when masking + * a device interrupt before re-enabling IRQs in CPSR, we can use this + * function, ixp2000_reg_wrb, which performs a write, a readback, and + * issues a dummy instruction dependent on the value of the readback + * (mov rX, rX) to make sure that the readback has completed before we + * continue. + */ +static inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) +{ + unsigned long dummy; + + *((volatile unsigned long *)reg) = val; + + dummy = *((volatile unsigned long *)reg); + __asm__ __volatile__("mov %0, %0" : "+r" (dummy)); +} + /* * Boards may multiplex different devices on the 2nd channel of * the slowport interface that each need different configuration -- cgit v1.2.3 From c514e58cb8eac0d21f4ab5011df75a09eb5edd50 Mon Sep 17 00:00:00 2001 From: Kenneth Tan Date: Sat, 29 Oct 2005 16:32:14 +0100 Subject: [ARM] 3022/1: Missing peripheral devices memory mapping definition for IXP46X processor Patch from Kenneth Tan Defining IXP46X peripheral devices memory mapping definitions that have been missed out: o Peripheral virtual base address is being adjusted to allow more headroom to add extra peripheral device addresses o Peripheral size is being increased to address the above needs o Virtual address of expansion bus and PCI configuration register needs to be adjusted as new peripheral device memory space is overlapping with their virtual address space Signed-off-by: Kenneth Tan Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/ixp4xx-regs.h | 75 ++++++++++++++++++++----------- 1 file changed, 49 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h index 004696a95bd..2b149ed5914 100644 --- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h +++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h @@ -36,11 +36,11 @@ * * 0x6000000 0x00004000 ioremap'd QMgr * - * 0xC0000000 0x00001000 0xffbfe000 PCI CFG + * 0xC0000000 0x00001000 0xffbff000 PCI CFG * - * 0xC4000000 0x00001000 0xffbfd000 EXP CFG + * 0xC4000000 0x00001000 0xffbfe000 EXP CFG * - * 0xC8000000 0x0000C000 0xffbf2000 On-Chip Peripherals + * 0xC8000000 0x00013000 0xffbeb000 On-Chip Peripherals */ /* @@ -52,22 +52,22 @@ * Expansion BUS Configuration registers */ #define IXP4XX_EXP_CFG_BASE_PHYS (0xC4000000) -#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFD000) +#define IXP4XX_EXP_CFG_BASE_VIRT (0xFFBFE000) #define IXP4XX_EXP_CFG_REGION_SIZE (0x00001000) /* * PCI Config registers */ #define IXP4XX_PCI_CFG_BASE_PHYS (0xC0000000) -#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFE000) +#define IXP4XX_PCI_CFG_BASE_VIRT (0xFFBFF000) #define IXP4XX_PCI_CFG_REGION_SIZE (0x00001000) /* * Peripheral space */ #define IXP4XX_PERIPHERAL_BASE_PHYS (0xC8000000) -#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBF2000) -#define IXP4XX_PERIPHERAL_REGION_SIZE (0x0000C000) +#define IXP4XX_PERIPHERAL_BASE_VIRT (0xFFBEB000) +#define IXP4XX_PERIPHERAL_REGION_SIZE (0x00013000) /* * Debug UART @@ -115,25 +115,48 @@ /* * Peripheral Space Register Region Base Addresses */ -#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) -#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) -#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) -#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) -#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) -#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) -#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) -#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) -#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) - -#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) -#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) -#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) -#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) -#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) -#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) -#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) -#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) -#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) +#define IXP4XX_UART1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x0000) +#define IXP4XX_UART2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x1000) +#define IXP4XX_PMU_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x2000) +#define IXP4XX_INTC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x3000) +#define IXP4XX_GPIO_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x4000) +#define IXP4XX_TIMER_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x5000) +#define IXP4XX_NPEA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) +#define IXP4XX_NPEB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) +#define IXP4XX_NPEC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) +#define IXP4XX_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000) +#define IXP4XX_EthC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000) +#define IXP4XX_USB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xB000) +/* ixp46X only */ +#define IXP4XX_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xC000) +#define IXP4XX_EthB1_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xD000) +#define IXP4XX_EthB2_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xE000) +#define IXP4XX_EthB3_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xF000) +#define IXP4XX_TIMESYNC_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x10000) +#define IXP4XX_I2C_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x11000) +#define IXP4XX_SSP_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x12000) + + +#define IXP4XX_UART1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x0000) +#define IXP4XX_UART2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x1000) +#define IXP4XX_PMU_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x2000) +#define IXP4XX_INTC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x3000) +#define IXP4XX_GPIO_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x4000) +#define IXP4XX_TIMER_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x5000) +#define IXP4XX_NPEA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x6000) +#define IXP4XX_NPEB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x7000) +#define IXP4XX_NPEC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_PHYS + 0x8000) +#define IXP4XX_EthB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x9000) +#define IXP4XX_EthC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xA000) +#define IXP4XX_USB_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xB000) +/* ixp46X only */ +#define IXP4XX_EthA_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xC000) +#define IXP4XX_EthB1_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xD000) +#define IXP4XX_EthB2_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xE000) +#define IXP4XX_EthB3_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0xF000) +#define IXP4XX_TIMESYNC_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x10000) +#define IXP4XX_I2C_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x11000) +#define IXP4XX_SSP_BASE_VIRT (IXP4XX_PERIPHERAL_BASE_VIRT + 0x12000) /* * Constants to make it easy to access Interrupt Controller registers -- cgit v1.2.3 From f09b99799991c7c3ba441162406247f5df077322 Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 29 Oct 2005 21:44:55 +0100 Subject: [ARM] 3060/1: allow constants found in asm/memory.h to be used in asm code Patch from Nicolas Pitre This patch allows for assorted type of cleanups by letting assembly code use the same set of defines for constant values and avoid duplicated definitions that might not always be in sync, or that might simply be confusing due to the different names for the same thing. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/arch-aaec2000/memory.h | 2 +- include/asm-arm/arch-cl7500/memory.h | 2 +- include/asm-arm/arch-clps711x/memory.h | 2 +- include/asm-arm/arch-ebsa110/memory.h | 2 +- include/asm-arm/arch-ebsa285/memory.h | 10 +++++----- include/asm-arm/arch-epxa10db/memory.h | 2 +- include/asm-arm/arch-h720x/memory.h | 2 +- include/asm-arm/arch-imx/memory.h | 2 +- include/asm-arm/arch-integrator/memory.h | 4 ++-- include/asm-arm/arch-iop3xx/memory.h | 4 ++-- include/asm-arm/arch-ixp2000/memory.h | 2 +- include/asm-arm/arch-ixp4xx/memory.h | 2 +- include/asm-arm/arch-l7200/memory.h | 2 +- include/asm-arm/arch-lh7a40x/memory.h | 2 +- include/asm-arm/arch-omap/memory.h | 6 +++--- include/asm-arm/arch-pxa/memory.h | 2 +- include/asm-arm/arch-rpc/memory.h | 2 +- include/asm-arm/arch-s3c2410/memory.h | 4 ++-- include/asm-arm/arch-sa1100/memory.h | 2 +- include/asm-arm/arch-shark/memory.h | 2 +- include/asm-arm/arch-versatile/memory.h | 2 +- include/asm-arm/memory.h | 18 ++++++++++++++---- 22 files changed, 44 insertions(+), 34 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-aaec2000/memory.h b/include/asm-arm/arch-aaec2000/memory.h index 79c90813bc3..d8209f8911d 100644 --- a/include/asm-arm/arch-aaec2000/memory.h +++ b/include/asm-arm/arch-aaec2000/memory.h @@ -13,7 +13,7 @@ #include -#define PHYS_OFFSET (0xf0000000UL) +#define PHYS_OFFSET UL(0xf0000000) #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h index 9776bba8e58..34f40a6cec3 100644 --- a/include/asm-arm/arch-cl7500/memory.h +++ b/include/asm-arm/arch-cl7500/memory.h @@ -17,7 +17,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) /* * These are exactly the same on the RiscPC as the diff --git a/include/asm-arm/arch-clps711x/memory.h b/include/asm-arm/arch-clps711x/memory.h index bd978947db4..61d8717406c 100644 --- a/include/asm-arm/arch-clps711x/memory.h +++ b/include/asm-arm/arch-clps711x/memory.h @@ -25,7 +25,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-ebsa110/memory.h b/include/asm-arm/arch-ebsa110/memory.h index 5a9493e1227..02f144520c1 100644 --- a/include/asm-arm/arch-ebsa110/memory.h +++ b/include/asm-arm/arch-ebsa110/memory.h @@ -19,7 +19,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * We keep this 1:1 so that we don't interfere diff --git a/include/asm-arm/arch-ebsa285/memory.h b/include/asm-arm/arch-ebsa285/memory.h index d0466f9987d..09e335cd687 100644 --- a/include/asm-arm/arch-ebsa285/memory.h +++ b/include/asm-arm/arch-ebsa285/memory.h @@ -46,14 +46,14 @@ extern unsigned long __bus_to_virt(unsigned long); #if defined(CONFIG_ARCH_FOOTBRIDGE) /* Task size and page offset at 3GB */ -#define TASK_SIZE (0xbf000000UL) -#define PAGE_OFFSET (0xc0000000UL) +#define TASK_SIZE UL(0xbf000000) +#define PAGE_OFFSET UL(0xc0000000) #elif defined(CONFIG_ARCH_CO285) /* Task size and page offset at 1.5GB */ -#define TASK_SIZE (0x5f000000UL) -#define PAGE_OFFSET (0x60000000UL) +#define TASK_SIZE UL(0x5f000000) +#define PAGE_OFFSET UL(0x60000000) #else @@ -64,7 +64,7 @@ extern unsigned long __bus_to_virt(unsigned long); /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * This decides where the kernel will search for a free chunk of vm diff --git a/include/asm-arm/arch-epxa10db/memory.h b/include/asm-arm/arch-epxa10db/memory.h index 3f86bf7f67f..999541b6a9f 100644 --- a/include/asm-arm/arch-epxa10db/memory.h +++ b/include/asm-arm/arch-epxa10db/memory.h @@ -23,7 +23,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h index 5633447af26..4a1bfd78a0f 100644 --- a/include/asm-arm/arch-h720x/memory.h +++ b/include/asm-arm/arch-h720x/memory.h @@ -11,7 +11,7 @@ * Page offset: * ( 0xc0000000UL ) */ -#define PHYS_OFFSET (0x40000000UL) +#define PHYS_OFFSET UL(0x40000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h index 116a91fa14f..d09ae32cd2f 100644 --- a/include/asm-arm/arch-imx/memory.h +++ b/include/asm-arm/arch-imx/memory.h @@ -21,7 +21,7 @@ #ifndef __ASM_ARCH_MMU_H #define __ASM_ARCH_MMU_H -#define PHYS_OFFSET (0x08000000UL) +#define PHYS_OFFSET UL(0x08000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-integrator/memory.h b/include/asm-arm/arch-integrator/memory.h index 2087ea7d28a..1ab56d783e7 100644 --- a/include/asm-arm/arch-integrator/memory.h +++ b/include/asm-arm/arch-integrator/memory.h @@ -23,8 +23,8 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) -#define BUS_OFFSET (0x80000000UL) +#define PHYS_OFFSET UL(0x00000000) +#define BUS_OFFSET UL(0x80000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-iop3xx/memory.h b/include/asm-arm/arch-iop3xx/memory.h index 45351f5cd90..bc62f4b1323 100644 --- a/include/asm-arm/arch-iop3xx/memory.h +++ b/include/asm-arm/arch-iop3xx/memory.h @@ -12,9 +12,9 @@ * Physical DRAM offset. */ #ifndef CONFIG_ARCH_IOP331 -#define PHYS_OFFSET (0xa0000000UL) +#define PHYS_OFFSET UL(0xa0000000) #else -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) #endif /* diff --git a/include/asm-arm/arch-ixp2000/memory.h b/include/asm-arm/arch-ixp2000/memory.h index d0f415c6dae..21e1de51e3f 100644 --- a/include/asm-arm/arch-ixp2000/memory.h +++ b/include/asm-arm/arch-ixp2000/memory.h @@ -13,7 +13,7 @@ #ifndef __ASM_ARCH_MEMORY_H #define __ASM_ARCH_MEMORY_H -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-ixp4xx/memory.h b/include/asm-arm/arch-ixp4xx/memory.h index d348548b592..e024d0a1a66 100644 --- a/include/asm-arm/arch-ixp4xx/memory.h +++ b/include/asm-arm/arch-ixp4xx/memory.h @@ -12,7 +12,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-l7200/memory.h b/include/asm-arm/arch-l7200/memory.h index c5b9608cb13..9e50a171f78 100644 --- a/include/asm-arm/arch-l7200/memory.h +++ b/include/asm-arm/arch-l7200/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset on the L7200 SDB. */ -#define PHYS_OFFSET (0xf0000000UL) +#define PHYS_OFFSET UL(0xf0000000) #define __virt_to_bus(x) __virt_to_phys(x) #define __bus_to_virt(x) __phys_to_virt(x) diff --git a/include/asm-arm/arch-lh7a40x/memory.h b/include/asm-arm/arch-lh7a40x/memory.h index c650e6feb9d..c92bcb83762 100644 --- a/include/asm-arm/arch-lh7a40x/memory.h +++ b/include/asm-arm/arch-lh7a40x/memory.h @@ -17,7 +17,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-omap/memory.h b/include/asm-arm/arch-omap/memory.h index ef32d61eec7..bf545b6e0a2 100644 --- a/include/asm-arm/arch-omap/memory.h +++ b/include/asm-arm/arch-omap/memory.h @@ -37,9 +37,9 @@ * Physical DRAM offset. */ #if defined(CONFIG_ARCH_OMAP1) -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) #elif defined(CONFIG_ARCH_OMAP2) -#define PHYS_OFFSET (0x80000000UL) +#define PHYS_OFFSET UL(0x80000000) #endif /* @@ -66,7 +66,7 @@ /* * OMAP-1510 Local Bus address offset */ -#define OMAP1510_LB_OFFSET (0x30000000UL) +#define OMAP1510_LB_OFFSET UL(0x30000000) #define virt_to_lbus(x) ((x) - PAGE_OFFSET + OMAP1510_LB_OFFSET) #define lbus_to_virt(x) ((x) - OMAP1510_LB_OFFSET + PAGE_OFFSET) diff --git a/include/asm-arm/arch-pxa/memory.h b/include/asm-arm/arch-pxa/memory.h index 58bad9748b5..eaf6d43939e 100644 --- a/include/asm-arm/arch-pxa/memory.h +++ b/include/asm-arm/arch-pxa/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0xa0000000UL) +#define PHYS_OFFSET UL(0xa0000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/arch-rpc/memory.h b/include/asm-arm/arch-rpc/memory.h index 33fc75cdead..0592cb3f0c7 100644 --- a/include/asm-arm/arch-rpc/memory.h +++ b/include/asm-arm/arch-rpc/memory.h @@ -21,7 +21,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x10000000UL) +#define PHYS_OFFSET UL(0x10000000) /* * These are exactly the same on the RiscPC as the diff --git a/include/asm-arm/arch-s3c2410/memory.h b/include/asm-arm/arch-s3c2410/memory.h index 3380ab1d074..6ab834a14c8 100644 --- a/include/asm-arm/arch-s3c2410/memory.h +++ b/include/asm-arm/arch-s3c2410/memory.h @@ -28,9 +28,9 @@ * and at 0x0C000000 for S3C2400 */ #ifdef CONFIG_CPU_S3C2400 -#define PHYS_OFFSET (0x0C000000UL) +#define PHYS_OFFSET UL(0x0C000000) #else -#define PHYS_OFFSET (0x30000000UL) +#define PHYS_OFFSET UL(0x30000000) #endif /* diff --git a/include/asm-arm/arch-sa1100/memory.h b/include/asm-arm/arch-sa1100/memory.h index 8743ff5c1b2..0fc555b4c91 100644 --- a/include/asm-arm/arch-sa1100/memory.h +++ b/include/asm-arm/arch-sa1100/memory.h @@ -13,7 +13,7 @@ /* * Physical DRAM offset is 0xc0000000 on the SA1100 */ -#define PHYS_OFFSET (0xc0000000UL) +#define PHYS_OFFSET UL(0xc0000000) #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-shark/memory.h b/include/asm-arm/arch-shark/memory.h index 8ff956d2546..95a29b4bc5d 100644 --- a/include/asm-arm/arch-shark/memory.h +++ b/include/asm-arm/arch-shark/memory.h @@ -15,7 +15,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x08000000UL) +#define PHYS_OFFSET UL(0x08000000) #ifndef __ASSEMBLY__ diff --git a/include/asm-arm/arch-versatile/memory.h b/include/asm-arm/arch-versatile/memory.h index 7b8b7cc422f..a9370976cc5 100644 --- a/include/asm-arm/arch-versatile/memory.h +++ b/include/asm-arm/arch-versatile/memory.h @@ -23,7 +23,7 @@ /* * Physical DRAM offset. */ -#define PHYS_OFFSET (0x00000000UL) +#define PHYS_OFFSET UL(0x00000000) /* * Virtual view <-> DMA view memory address translations diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index a8a933a775d..bee10fcf7e8 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -12,6 +12,16 @@ #ifndef __ASM_ARM_MEMORY_H #define __ASM_ARM_MEMORY_H +/* + * Allow for constants defined here to be used from assembly code + * by prepending the UL suffix only with actual C code compilation. + */ +#ifndef __ASSEMBLY__ +#define UL(x) (x##UL) +#else +#define UL(x) (x) +#endif + #include #include #include @@ -21,20 +31,20 @@ * TASK_SIZE - the maximum size of a user space task. * TASK_UNMAPPED_BASE - the lower boundary of the mmap VM area */ -#define TASK_SIZE (0xbf000000UL) -#define TASK_UNMAPPED_BASE (0x40000000UL) +#define TASK_SIZE UL(0xbf000000) +#define TASK_UNMAPPED_BASE UL(0x40000000) #endif /* * The maximum size of a 26-bit user space task. */ -#define TASK_SIZE_26 (0x04000000UL) +#define TASK_SIZE_26 UL(0x04000000) /* * Page offset: 3GB */ #ifndef PAGE_OFFSET -#define PAGE_OFFSET (0xc0000000UL) +#define PAGE_OFFSET UL(0xc0000000) #endif /* -- cgit v1.2.3 From 37d07b72ef58f2d5ec7701ab75084fbeee0e503e Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Sat, 29 Oct 2005 21:44:56 +0100 Subject: [ARM] 3061/1: cleanup the XIP link address mess Patch from Nicolas Pitre Since vmlinux.lds.S is preprocessed, we can use the defines already present in asm/memory.h (allowed by patch #3060) for the XIP kernel link address instead of relying on a duplicated Makefile hardcoded value, and also get rid of its dependency on awk to handle it at the same time. While at it let's clean XIP stuff even further and make things clearer in head.S with a nice code reduction. Signed-off-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/memory.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h index bee10fcf7e8..a547ee598c6 100644 --- a/include/asm-arm/memory.h +++ b/include/asm-arm/memory.h @@ -68,6 +68,13 @@ #error Top of user space clashes with start of module space #endif +/* + * The XIP kernel gets mapped at the bottom of the module vm area. + * Since we use sections to map it, this macro replaces the physical address + * with its virtual address while keeping offset from the base section. + */ +#define XIP_VIRT_ADDR(physaddr) (MODULE_START + ((physaddr) & 0x000fffff)) + #ifndef __ASSEMBLY__ /* -- cgit v1.2.3