From ee9745fcf214272b7cdd9d320d044cf433ee958e Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Sat, 30 Jun 2007 13:57:49 +0900 Subject: [MTD] [OneNAND] 2X program support The 2X Program is an extension of Program Operation. Since the device is equipped with two DataRAMs, and two-plane NAND Flash memory array, these two component enables simultaneous program of 4KiB. Plane1 has only even blocks such as block0, block2, block4 while Plane2 has only odd blocks such as block1, block3, block5. So MTD regards it as 4KiB page size and 256KiB block size Now the following chips support it. (KFXXX16Q2M) Demux: KFG2G16Q2M, KFH4G16Q2M, KFW8G16Q2M, Mux: KFM2G16Q2M, KFN4G16Q2M, And more recent chips Signed-off-by: Kyungmin Park Signed-off-by: David Woodhouse --- include/linux/mtd/onenand.h | 12 ++++++++++++ include/linux/mtd/onenand_regs.h | 4 ++++ 2 files changed, 16 insertions(+) (limited to 'include') diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index a56d24ada50..fd0a260e070 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -60,6 +60,7 @@ struct onenand_bufferram { * @erase_shift: [INTERN] number of address bits in a block * @page_shift: [INTERN] number of address bits in a page * @page_mask: [INTERN] a page per block mask + * @writesize: [INTERN] a real page size * @bufferram_index: [INTERN] BufferRAM index * @bufferram: [INTERN] BufferRAM info * @readw: [REPLACEABLE] hardware specific function for read short @@ -100,6 +101,7 @@ struct onenand_chip { unsigned int erase_shift; unsigned int page_shift; unsigned int page_mask; + unsigned int writesize; unsigned int bufferram_index; struct onenand_bufferram bufferram[MAX_BUFFERRAM]; @@ -140,6 +142,8 @@ struct onenand_chip { #define ONENAND_NEXT_BUFFERRAM(this) (this->bufferram_index ^ 1) #define ONENAND_SET_NEXT_BUFFERRAM(this) (this->bufferram_index ^= 1) #define ONENAND_SET_PREV_BUFFERRAM(this) (this->bufferram_index ^= 1) +#define ONENAND_SET_BUFFERRAM0(this) (this->bufferram_index = 0) +#define ONENAND_SET_BUFFERRAM1(this) (this->bufferram_index = 1) #define ONENAND_GET_SYS_CFG1(this) \ (this->read_word(this->base + ONENAND_REG_SYS_CFG1)) @@ -149,6 +153,13 @@ struct onenand_chip { #define ONENAND_IS_DDP(this) \ (this->device_id & ONENAND_DEVICE_IS_DDP) +#ifdef CONFIG_MTD_ONENAND_2X_PROGRAM +#define ONENAND_IS_2PLANE(this) \ + (this->options & ONENAND_HAS_2PLANE) +#else +#define ONENAND_IS_2PLANE(this) (0) +#endif + /* Check byte access in OneNAND */ #define ONENAND_CHECK_BYTE_ACCESS(addr) (addr & 0x1) @@ -157,6 +168,7 @@ struct onenand_chip { */ #define ONENAND_HAS_CONT_LOCK (0x0001) #define ONENAND_HAS_UNLOCK_ALL (0x0002) +#define ONENAND_HAS_2PLANE (0x0004) #define ONENAND_PAGEBUF_ALLOC (0x1000) #define ONENAND_OOBBUF_ALLOC (0x2000) diff --git a/include/linux/mtd/onenand_regs.h b/include/linux/mtd/onenand_regs.h index af94719890e..c46161f4eee 100644 --- a/include/linux/mtd/onenand_regs.h +++ b/include/linux/mtd/onenand_regs.h @@ -74,6 +74,8 @@ #define ONENAND_DEVICE_DENSITY_512Mb (0x002) #define ONENAND_DEVICE_DENSITY_1Gb (0x003) +#define ONENAND_DEVICE_DENSITY_2Gb (0x004) +#define ONENAND_DEVICE_DENSITY_4Gb (0x005) /* * Version ID Register F002h (R) @@ -111,6 +113,8 @@ #define ONENAND_CMD_READOOB (0x13) #define ONENAND_CMD_PROG (0x80) #define ONENAND_CMD_PROGOOB (0x1A) +#define ONENAND_CMD_2X_PROG (0x7D) +#define ONENAND_CMD_2X_CACHE_PROG (0x7F) #define ONENAND_CMD_UNLOCK (0x23) #define ONENAND_CMD_LOCK (0x2A) #define ONENAND_CMD_LOCK_TIGHT (0x2C) -- cgit v1.2.3 From c799aca31bfe61ba3a91133acf5a13a0773087d4 Mon Sep 17 00:00:00 2001 From: Richard Purdie Date: Tue, 10 Jul 2007 10:28:36 +0100 Subject: [JFFS2] Add LZO compression support. Add LZO1X compression/decompression support to jffs2. LZO's interface doesn't entirely match that required by jffs2 so a buffer and memcpy is unavoidable. Signed-off-by: Richard Purdie Signed-off-by: David Woodhouse --- include/linux/jffs2.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h index 840631fa5ff..6b563cae23d 100644 --- a/include/linux/jffs2.h +++ b/include/linux/jffs2.h @@ -46,6 +46,7 @@ #define JFFS2_COMPR_COPY 0x04 #define JFFS2_COMPR_DYNRUBIN 0x05 #define JFFS2_COMPR_ZLIB 0x06 +#define JFFS2_COMPR_LZO 0x07 /* Compatibility flags. */ #define JFFS2_COMPAT_MASK 0xc000 /* What do to if an unknown nodetype is found */ #define JFFS2_NODE_ACCURATE 0x2000 -- cgit v1.2.3 From 30eb0db07d67b9211da7f506220184df827e425d Mon Sep 17 00:00:00 2001 From: "Steven J. Hill" Date: Wed, 18 Jul 2007 23:29:46 -0500 Subject: [MTD] [NAND] Add NAND manufacturer AMD. This patch adds the manufacturer ID for AMD flash. Signed-off-by: Steven J. Hill Signed-off-by: David Woodhouse --- include/linux/mtd/nand.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index d2365c8dcac..c42bc7f533a 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -432,6 +432,7 @@ struct nand_chip { #define NAND_MFR_STMICRO 0x20 #define NAND_MFR_HYNIX 0xad #define NAND_MFR_MICRON 0x2c +#define NAND_MFR_AMD 0x01 /** * struct nand_flash_dev - NAND Flash Device ID Structure -- cgit v1.2.3 From 241651d04d672fb685b2874707016cbbf95931e5 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Thu, 6 Sep 2007 09:40:21 +0100 Subject: [MTD] Fix CFI build error when no map width or interleave supported When building NOR flash support, you have compile-time options for the bus width and the number of individual chips which are interleaved together onto that bus. The code to deal with arbitrary geometry is a bit convoluted, and people want to just configure it for the specific hardware they have, to avoid the runtime overhead. Selecting _none_ of the available options doesn't make any sense. You should have at least one. This makes it build though, since people persist in trying. Signed-off-by: David Woodhouse --- include/linux/mtd/cfi.h | 9 +++++++++ include/linux/mtd/map.h | 10 +++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index 123948b1454..e17c5343cf5 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -57,6 +57,15 @@ #define cfi_interleave_is_8(cfi) (0) #endif +#ifndef cfi_interleave +#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work. +static inline int cfi_interleave(void *cfi) +{ + BUG(); + return 0; +} +#endif + static inline int cfi_interleave_supported(int i) { switch (i) { diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index 81f3a314dd7..a9fae032ba8 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -125,7 +125,15 @@ #endif #ifndef map_bankwidth -#error "No bus width supported. What's the point?" +#warning "No CONFIG_MTD_MAP_BANK_WIDTH_xx selected. No NOR chip support can work" +static inline int map_bankwidth(void *map) +{ + BUG(); + return 0; +} +#define map_bankwidth_is_large(map) (0) +#define map_words(map) (0) +#define MAX_MAP_BANKWIDTH 1 #endif static inline int map_bankwidth_supported(int w) -- cgit v1.2.3 From b38178ee712e8608f20c8e741adf97f75f1aea39 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?J=C3=B6rn=20Engel?= Date: Fri, 21 Sep 2007 15:41:44 +0200 Subject: [MTD] Document erase interface. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Document mtd erase interface. Signed-off-by: Jörn Engel Signed-off-by: David Woodhouse --- include/linux/mtd/mtd.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index fd64ccfbce0..783fc983417 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -133,6 +133,13 @@ struct mtd_info { int numeraseregions; struct mtd_erase_region_info *eraseregions; + /* + * Erase is an asynchronous operation. Device drivers are supposed + * to call instr->callback() whenever the operation completes, even + * if it completes with a failure. + * Callers are supposed to pass a callback function and wait for it + * to be called before writing to the block. + */ int (*erase) (struct mtd_info *mtd, struct erase_info *instr); /* This stuff for eXecute-In-Place */ -- cgit v1.2.3 From c4a9f88daf6c382fedde4cdddef0b30f1d0a20db Mon Sep 17 00:00:00 2001 From: Kevin Hao Date: Tue, 2 Oct 2007 13:56:04 -0700 Subject: [MTD] [NOR] fix ctrl-alt-del can't reboot for intel flash bug When we press ctrl-alt-del,kernel_restart_prepare will invoke cfi_intelext_reboot which will set flash to read array mode, but later when device_shutdown is invoked which may put current work queue to sleep and other process may be scheduled to running and programming flash in not FL_READY mode again. So we can't boot up if this flash is used for bootloader. Signed-off-by: Andrew Morton Signed-off-by: David Woodhouse --- include/linux/mtd/flashchip.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index a293a3b78e0..39e7d2a1be9 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -40,6 +40,7 @@ typedef enum { FL_POINT, FL_XIP_WHILE_ERASING, FL_XIP_WHILE_WRITING, + FL_SHUTDOWN, FL_UNKNOWN } flstate_t; -- cgit v1.2.3 From b37bde147890c8fea8369a5a4e230dabdea4ebfb Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Tue, 2 Oct 2007 13:56:05 -0700 Subject: [MTD] [NAND] Blackfin on-chip NAND Flash Controller driver This is the driver for latest Blackfin on-chip nand flash controller - use nand_chip and mtd_info common nand driver interface - provide both PIO and dma operation - compiled with ezkit bf548 configuration - use hardware 1-bit ECC - tested with YAFFS2 and can mount YAFFS2 filesystem as rootfs ChangeLog from try#1 - use hweight32() instead of count_bits() - replace bf54x with bf5xx and BF54X with BF5XX - compare against plat->page_size in 2 cases when enable hardware ECC ChangeLog from try#2 - passed nand_test suites - use cpu_relax() instead of busy wait loop - some coding style issue pointed out by Andrew Signed-off-by: Bryan Wu Signed-off-by: Andrew Morton Signed-off-by: David Woodhouse --- include/asm-blackfin/mach-bf548/dma.h | 1 + include/asm-blackfin/nand.h | 47 +++++++++++++++++++++++++++++++++++ 2 files changed, 48 insertions(+) create mode 100644 include/asm-blackfin/nand.h (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h index fcc8b4c34c6..14cb10cc24a 100644 --- a/include/asm-blackfin/mach-bf548/dma.h +++ b/include/asm-blackfin/mach-bf548/dma.h @@ -55,6 +55,7 @@ #define CH_SPORT3_RX 20 #define CH_SPORT3_TX 21 #define CH_SDH 22 +#define CH_NFC 22 #define CH_SPI2 23 #define CH_MEM_STREAM0_DEST 24 diff --git a/include/asm-blackfin/nand.h b/include/asm-blackfin/nand.h new file mode 100644 index 00000000000..afbaafa793f --- /dev/null +++ b/include/asm-blackfin/nand.h @@ -0,0 +1,47 @@ +/* linux/include/asm-blackfin/nand.h + * + * Copyright (c) 2007 Analog Devices, Inc. + * Bryan Wu + * + * BF5XX - NAND flash controller platfrom_device info + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* struct bf5xx_nand_platform + * + * define a interface between platfrom board specific code and + * bf54x NFC driver. + * + * nr_partitions = number of partitions pointed to be partitoons (or zero) + * partitions = mtd partition list + */ + +#define NFC_PG_SIZE_256 0 +#define NFC_PG_SIZE_512 1 +#define NFC_PG_SIZE_OFFSET 9 + +#define NFC_NWIDTH_8 0 +#define NFC_NWIDTH_16 1 +#define NFC_NWIDTH_OFFSET 8 + +#define NFC_RDDLY_OFFSET 4 +#define NFC_WRDLY_OFFSET 0 + +#define NFC_STAT_NBUSY 1 + +struct bf5xx_nand_platform { + /* NAND chip information */ + unsigned short page_size; + unsigned short data_width; + + /* RD/WR strobe delay timing information, all times in SCLK cycles */ + unsigned short rd_dly; + unsigned short wr_dly; + + /* NAND MTD partition information */ + int nr_partitions; + struct mtd_partition *partitions; +}; -- cgit v1.2.3