From 3dd0dcbe9dc5c116df96989c42a062951b644e04 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 17:27:15 +0400 Subject: cpm_uart: make it possible to utilize from powerpc Driver core has been updated to make use of the new powerpc OF-inspired platform devices, yet keeping compatibility to the vast board list from ppc. Signed-off-by: Vitaly Bordug --- include/asm-powerpc/fs_pd.h | 27 +++++++++++++++++++++++++++ include/asm-ppc/fs_pd.h | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) create mode 100644 include/asm-powerpc/fs_pd.h create mode 100644 include/asm-ppc/fs_pd.h (limited to 'include') diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h new file mode 100644 index 00000000000..d530f68b4ee --- /dev/null +++ b/include/asm-powerpc/fs_pd.h @@ -0,0 +1,27 @@ +/* + * Platform information definitions. + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef FS_PD_H +#define FS_PD_H +#include +#include + +static inline int uart_baudrate(void) +{ + return get_baudrate(); +} + +static inline int uart_clock(void) +{ + return ppc_proc_freq; +} + +#endif diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h new file mode 100644 index 00000000000..eed77783412 --- /dev/null +++ b/include/asm-ppc/fs_pd.h @@ -0,0 +1,32 @@ +/* + * Platform information definitions. + * + * 2006 (c) MontaVista Software, Inc. + * Vitaly Bordug + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#ifndef FS_PD_H +#define FS_PD_H + +static inline int uart_baudrate(void) +{ + int baud; + bd_t *bd = (bd_t *) __res; + + if (bd->bi_baudrate) + baud = bd->bi_baudrate; + else + baud = -1; + return baud; +} + +static inline int uart_clock(void) +{ + return (((bd_t *) __res)->bi_intfreq); +} + +#endif -- cgit v1.2.3 From b0c110b4f19b226dcc9f7805759bf17f8ef4dca4 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:18:53 +0400 Subject: POWERPC: Move generic cpm2 stuff to powerpc This moves the cpm2 common code and PIC stuff to the powerpc. Most of the files were just copied from ppc/, with minor tuning to make it compile, and, subsequently, work. Signed-off-by: Vitaly Bordug --- include/asm-ppc/cpm2.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index f6a7ff04ffe..876974e5412 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -42,6 +42,8 @@ #define CPM_CR_IDMA4_SBLOCK (0x17) #define CPM_CR_MCC1_SBLOCK (0x1c) +#define CPM_CR_FCC_SBLOCK(x) (x + 0x10) + #define CPM_CR_SCC1_PAGE (0x00) #define CPM_CR_SCC2_PAGE (0x01) #define CPM_CR_SCC3_PAGE (0x02) @@ -62,6 +64,8 @@ #define CPM_CR_MCC1_PAGE (0x07) #define CPM_CR_MCC2_PAGE (0x08) +#define CPM_CR_FCC_PAGE(x) (x + 0x04) + /* Some opcodes (there are more...later) */ #define CPM_CR_INIT_TRX ((ushort)0x0000) @@ -1186,7 +1190,7 @@ typedef struct im_idma { #define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128)) #define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0) #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) -#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(2) +#define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) #endif /* __CPM2__ */ #endif /* __KERNEL__ */ -- cgit v1.2.3 From 902f392d011d0a781ea4695c464345faa6664540 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:31:26 +0400 Subject: POWERPC: Add support for the mpc8560 eval board This makes the 8560 evaluation board fully supported under arch/powerpc, as the first board with CPM2 SoC peripherals. The brand new devicetree nodes are introduced (intending to be a subset of the QuiccEngine-equipped models, with dts sources placed into the kernel according to the new convention. Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART update), the both TSEC eth ,FCC Eths, and both SCC UARTs are working. The relevant drivers are still capable to drive users in ppc, which was verified with 8272ADS (SCC uart+FCC eth). This is also verified on mpc8540 and actually make it work (PCI stuff working as well) Signed-off-by: Vitaly Bordug --- include/asm-powerpc/mpc85xx.h | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 include/asm-powerpc/mpc85xx.h (limited to 'include') diff --git a/include/asm-powerpc/mpc85xx.h b/include/asm-powerpc/mpc85xx.h new file mode 100644 index 00000000000..ccdb8a21138 --- /dev/null +++ b/include/asm-powerpc/mpc85xx.h @@ -0,0 +1,53 @@ +/* + * include/asm-powerpc/mpc85xx.h + * + * MPC85xx definitions + * + * Maintainer: Kumar Gala + * + * Copyright 2004 Freescale Semiconductor, Inc + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#ifdef __KERNEL__ +#ifndef __ASM_MPC85xx_H__ +#define __ASM_MPC85xx_H__ + +#include + +#ifdef CONFIG_85xx + +#if defined(CONFIG_MPC8540_ADS) || defined(CONFIG_MPC8560_ADS) +#include +#endif +#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS) +#include +#endif +#ifdef CONFIG_MPC85xx_CDS +#include +#endif + +#define _IO_BASE isa_io_base +#define _ISA_MEM_BASE isa_mem_base +#ifdef CONFIG_PCI +#define PCI_DRAM_OFFSET pci_dram_offset +#else +#define PCI_DRAM_OFFSET 0 +#endif + +/* Let modules/drivers get at CCSRBAR */ +extern phys_addr_t get_ccsrbar(void); + +#ifdef MODULE +#define CCSRBAR get_ccsrbar() +#else +#define CCSRBAR BOARD_CCSRBAR +#endif + +#endif /* CONFIG_85xx */ +#endif /* __ASM_MPC85xx_H__ */ +#endif /* __KERNEL__ */ -- cgit v1.2.3 From fc8e50e349aa722d9f97ed9ba30e324ede8fa408 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:37:58 +0400 Subject: POWERPC: Get rid of remapping the whole immr The stuff below cleans up the code attempting to remap the whole cpm2_immr early, as well as places happily assuming that fact. This is more like the 2.4 legacy stuff, and is at least confusing and unclear now. To keep the world comfortable, a new mechanism is introduced: before accessing specific immr register/register set, one needs to map it, using cpm2_map(), for instance, access to CPM command register will look like volatile cpm_cpm2_t *cp = cpm2_map(im_cpm); keeping the code clear, yet without "already defined somewhere" cpm2_immr. So far, unmapping code is not implemented, but it's not a big deal to add it, if the whole idea makes sense. Signed-off-by: Vitaly Bordug --- include/asm-powerpc/fs_pd.h | 18 ++++++++++++++++++ include/asm-ppc/cpm2.h | 4 ++++ include/asm-ppc/fs_pd.h | 4 ++++ 3 files changed, 26 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h index d530f68b4ee..3d0e819d37f 100644 --- a/include/asm-powerpc/fs_pd.h +++ b/include/asm-powerpc/fs_pd.h @@ -11,6 +11,7 @@ #ifndef FS_PD_H #define FS_PD_H +#include #include #include @@ -24,4 +25,21 @@ static inline int uart_clock(void) return ppc_proc_freq; } +#define cpm2_map(member) \ +({ \ + u32 offset = offsetof(cpm2_map_t, member); \ + void *addr = ioremap (CPM_MAP_ADDR + offset, \ + sizeof( ((cpm2_map_t*)0)->member)); \ + addr; \ +}) + +#define cpm2_map_size(member, size) \ +({ \ + u32 offset = offsetof(cpm2_map_t, member); \ + void *addr = ioremap (CPM_MAP_ADDR + offset, size); \ + addr; \ +}) + +#define cpm2_unmap(addr) iounmap(addr) + #endif diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index 876974e5412..bd6623aed38 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -177,6 +177,10 @@ typedef struct cpm_buf_desc { #define PROFF_I2C_BASE ((uint)0x8afc) #define PROFF_IDMA4_BASE ((uint)0x8afe) +#define PROFF_SCC_SIZE ((uint)0x100) +#define PROFF_FCC_SIZE ((uint)0x100) +#define PROFF_SMC_SIZE ((uint)64) + /* The SMCs are relocated to any of the first eight DPRAM pages. * We will fix these at the first locations of DPRAM, until we * get some microcode patches :-). diff --git a/include/asm-ppc/fs_pd.h b/include/asm-ppc/fs_pd.h index eed77783412..8691327653a 100644 --- a/include/asm-ppc/fs_pd.h +++ b/include/asm-ppc/fs_pd.h @@ -29,4 +29,8 @@ static inline int uart_clock(void) return (((bd_t *) __res)->bi_intfreq); } +#define cpm2_map(member) (&cpm2_immr->member) +#define cpm2_map_size(member, size) (&cpm2_immr->member) +#define cpm2_unmap(addr) do {} while(0) + #endif -- cgit v1.2.3 From d3465c921f79cfef0a4a8ceeeef9a3721bbbb57d Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:38:05 +0400 Subject: POWERPC: overhaul with cpm2_map mechanism Incorporating the new way of cpm2 immr access, introduced in the previous patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and powerpc approved working( real actions taken in powerpc only, ppc just has a wrapper to keep init stuff consistent). Signed-off-by: Vitaly Bordug --- include/asm-ppc/cpm2.h | 53 ++++++++++++++++++++++++++++++++++++++++++++++ include/linux/fs_enet_pd.h | 10 +++++---- include/linux/fs_uart_pd.h | 4 +++- 3 files changed, 62 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h index bd6623aed38..220cc2debe0 100644 --- a/include/asm-ppc/cpm2.h +++ b/include/asm-ppc/cpm2.h @@ -1196,5 +1196,58 @@ typedef struct im_idma { #define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1) #define FCC3_MEM_OFFSET FCC_MEM_OFFSET(2) +/* Clocks and GRG's */ + +enum cpm_clk_dir { + CPM_CLK_RX, + CPM_CLK_TX, + CPM_CLK_RTX +}; + +enum cpm_clk_target { + CPM_CLK_SCC1, + CPM_CLK_SCC2, + CPM_CLK_SCC3, + CPM_CLK_SCC4, + CPM_CLK_FCC1, + CPM_CLK_FCC2, + CPM_CLK_FCC3 +}; + +enum cpm_clk { + CPM_CLK_NONE = 0, + CPM_BRG1, /* Baud Rate Generator 1 */ + CPM_BRG2, /* Baud Rate Generator 2 */ + CPM_BRG3, /* Baud Rate Generator 3 */ + CPM_BRG4, /* Baud Rate Generator 4 */ + CPM_BRG5, /* Baud Rate Generator 5 */ + CPM_BRG6, /* Baud Rate Generator 6 */ + CPM_BRG7, /* Baud Rate Generator 7 */ + CPM_BRG8, /* Baud Rate Generator 8 */ + CPM_CLK1, /* Clock 1 */ + CPM_CLK2, /* Clock 2 */ + CPM_CLK3, /* Clock 3 */ + CPM_CLK4, /* Clock 4 */ + CPM_CLK5, /* Clock 5 */ + CPM_CLK6, /* Clock 6 */ + CPM_CLK7, /* Clock 7 */ + CPM_CLK8, /* Clock 8 */ + CPM_CLK9, /* Clock 9 */ + CPM_CLK10, /* Clock 10 */ + CPM_CLK11, /* Clock 11 */ + CPM_CLK12, /* Clock 12 */ + CPM_CLK13, /* Clock 13 */ + CPM_CLK14, /* Clock 14 */ + CPM_CLK15, /* Clock 15 */ + CPM_CLK16, /* Clock 16 */ + CPM_CLK17, /* Clock 17 */ + CPM_CLK18, /* Clock 18 */ + CPM_CLK19, /* Clock 19 */ + CPM_CLK20, /* Clock 20 */ + CPM_CLK_DUMMY +}; + +extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode); + #endif /* __CPM2__ */ #endif /* __KERNEL__ */ diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h index 74ed35a00a9..932223550ac 100644 --- a/include/linux/fs_enet_pd.h +++ b/include/linux/fs_enet_pd.h @@ -87,18 +87,20 @@ struct fs_mii_bb_platform_info { }; struct fs_platform_info { - - void(*init_ioports)(void); + + void(*init_ioports)(struct fs_platform_info *); /* device specific information */ int fs_no; /* controller index */ u32 cp_page; /* CPM page */ u32 cp_block; /* CPM sblock */ - + u32 clk_trx; /* some stuff for pins & mux configuration*/ + u32 clk_rx; + u32 clk_tx; u32 clk_route; u32 clk_mask; - + u32 mem_offset; u32 dpram_offset; u32 fcc_regs_c; diff --git a/include/linux/fs_uart_pd.h b/include/linux/fs_uart_pd.h index f5975126b71..a99a020f95c 100644 --- a/include/linux/fs_uart_pd.h +++ b/include/linux/fs_uart_pd.h @@ -46,7 +46,7 @@ static inline int fs_uart_id_fsid2smc(int id) } struct fs_uart_platform_info { - void(*init_ioports)(void); + void(*init_ioports)(struct fs_uart_platform_info *); /* device specific information */ int fs_no; /* controller index */ u32 uart_clk; @@ -55,6 +55,8 @@ struct fs_uart_platform_info { u8 rx_num_fifo; u8 rx_buf_size; u8 brg; + u8 clk_rx; + u8 clk_tx; }; #endif -- cgit v1.2.3 From 611a15afcdaacec6efba984c7eb089b853564bdf Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Thu, 21 Sep 2006 22:38:05 +0400 Subject: POWERPC: Bring the fs_no calculation to the relevant SoC enumeration The fs_no mean used to be fs_enet driver driven, hence it was an enumeration across all the possible fs_enet "users" in the SoC. Now, with QE on the pipeline, and to make DTS descriptions more clear, fs_no features relevant SoC part number, with additional field to describe the SoC type. Another reason for that is now not only fs_enet is going to utilize those stuff. There might be UART, HLDC, and even USB, so to prevent confusion and be ready for upcoming OF_device transfer, fs_enet and cpm_uart drivers were updated in that concern, as well as the relevant DTS. Signed-off-by: Vitaly Bordug --- include/linux/fs_enet_pd.h | 37 +++++++++++++++++++++++++++++++++++++ include/linux/fs_uart_pd.h | 10 ++++++++++ 2 files changed, 47 insertions(+) (limited to 'include') diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h index 932223550ac..543cd3cd9e7 100644 --- a/include/linux/fs_enet_pd.h +++ b/include/linux/fs_enet_pd.h @@ -55,6 +55,30 @@ static inline int fs_get_scc_index(enum fs_id id) return -1; } +static inline int fs_fec_index2id(int index) +{ + int id = fsid_fec1 + index - 1; + if (id >= fsid_fec1 && id <= fsid_fec2) + return id; + return FS_MAX_INDEX; + } + +static inline int fs_fcc_index2id(int index) +{ + int id = fsid_fcc1 + index - 1; + if (id >= fsid_fcc1 && id <= fsid_fcc3) + return id; + return FS_MAX_INDEX; +} + +static inline int fs_scc_index2id(int index) +{ + int id = fsid_scc1 + index - 1; + if (id >= fsid_scc1 && id <= fsid_scc4) + return id; + return FS_MAX_INDEX; +} + enum fs_mii_method { fsmii_fixed, fsmii_fec, @@ -91,6 +115,7 @@ struct fs_platform_info { void(*init_ioports)(struct fs_platform_info *); /* device specific information */ int fs_no; /* controller index */ + char fs_type[4]; /* controller type */ u32 cp_page; /* CPM page */ u32 cp_block; /* CPM sblock */ @@ -126,4 +151,16 @@ struct fs_mii_fec_platform_info { u32 irq[32]; u32 mii_speed; }; + +static inline int fs_get_id(struct fs_platform_info *fpi) +{ + if(strstr(fpi->fs_type, "SCC")) + return fs_scc_index2id(fpi->fs_no); + if(strstr(fpi->fs_type, "FCC")) + return fs_fcc_index2id(fpi->fs_no); + if(strstr(fpi->fs_type, "FEC")) + return fs_fec_index2id(fpi->fs_no); + return fpi->fs_no; +} + #endif diff --git a/include/linux/fs_uart_pd.h b/include/linux/fs_uart_pd.h index a99a020f95c..809bb9ffc78 100644 --- a/include/linux/fs_uart_pd.h +++ b/include/linux/fs_uart_pd.h @@ -49,6 +49,7 @@ struct fs_uart_platform_info { void(*init_ioports)(struct fs_uart_platform_info *); /* device specific information */ int fs_no; /* controller index */ + char fs_type[4]; /* controller type */ u32 uart_clk; u8 tx_num_fifo; u8 tx_buf_size; @@ -59,4 +60,13 @@ struct fs_uart_platform_info { u8 clk_tx; }; +static inline int fs_uart_get_id(struct fs_uart_platform_info *fpi) +{ + if(strstr(fpi->fs_type, "SMC")) + return fs_uart_id_smc2fsid(fpi->fs_no); + if(strstr(fpi->fs_type, "SCC")) + return fs_uart_id_scc2fsid(fpi->fs_no); + return fpi->fs_no; +} + #endif -- cgit v1.2.3 From 7a69af63e788a324d162201a0b23df41bcf158dd Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Tue, 26 Sep 2006 17:46:37 -0500 Subject: [POWERPC] Add powerpc get/set_rtc_time interface to new generic rtc class Add powerpc get/set_rtc_time interface to new generic rtc class. This abstracts rtc chip specific code from the platform code for rtc-over-i2c platforms. Specific RTC chip support is now configured under Device Drivers -> Real Time Clock. Setting time of day from the RTC on startup is also configurable. this time without the potentially platform breaking initcall. Signed-off-by: Kim Phillips Signed-off-by: Paul Mackerras --- include/asm-powerpc/time.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index 5785ac4737b..b051d4c88c3 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -39,6 +39,10 @@ extern void generic_calibrate_decr(void); extern void wakeup_decrementer(void); extern void snapshot_timebase(void); +#ifdef CONFIG_RTC_CLASS +extern int __init rtc_class_hookup(void); +#endif + /* Some sane defaults: 125 MHz timebase, 1GHz processor */ extern unsigned long ppc_proc_freq; #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) @@ -234,4 +238,4 @@ extern void snapshot_timebases(void); #endif #endif /* __KERNEL__ */ -#endif /* __PPC64_TIME_H */ +#endif /* __POWERPC_TIME_H */ -- cgit v1.2.3 From 5e980823581682d1566e7b5089cf827ddd5f3c94 Mon Sep 17 00:00:00 2001 From: Li Yang Date: Fri, 29 Sep 2006 18:15:52 +0800 Subject: [POWERPC] Fix rheap alignment problem Honor alignment parameter in the rheap allocator. This is needed by qe_lib. Remove compile warning. Signed-off-by: Pantelis Antoniou Signed-off-by: Li Yang Acked-by: Kumar Galak Signed-off-by: Paul Mackerras --- include/asm-ppc/rheap.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/rheap.h b/include/asm-ppc/rheap.h index e6ca1f67ced..65b93225a77 100644 --- a/include/asm-ppc/rheap.h +++ b/include/asm-ppc/rheap.h @@ -62,6 +62,10 @@ extern int rh_attach_region(rh_info_t * info, void *start, int size); /* Detach a free region */ extern void *rh_detach_region(rh_info_t * info, void *start, int size); +/* Allocate the given size from the remote heap (with alignment) */ +extern void *rh_alloc_align(rh_info_t * info, int size, int alignment, + const char *owner); + /* Allocate the given size from the remote heap */ extern void *rh_alloc(rh_info_t * info, int size, const char *owner); -- cgit v1.2.3