From fd31f92cea0ce8613a22d8f4b3c75b340bcc5689 Mon Sep 17 00:00:00 2001
From: Keith Whitwell <keithw@vmware.com>
Date: Wed, 22 Jul 2009 00:39:00 +0100
Subject: gallium: simplify tgsi_full_immediate struct

Remove the need to have a pointer in this struct by just including
the immediate data inline.  Having a pointer in the struct introduces
complications like needing to alloc/free the data pointed to, uncertainty
about who owns the data, etc.  There doesn't seem to be a need for it,
and it is unlikely to make much difference plus or minus to performance.

Added some asserts as we now will trip up on immediates with more
than four elements.  There were actually already quite a few such asserts,
but the >4 case could be used in the future to specify indexable immediate
ranges, such as lookup tables.
---
 src/gallium/drivers/nv50/nv50_program.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 5f7d06dbec..4ec9c03305 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -1809,10 +1809,10 @@ nv50_program_tx_prep(struct nv50_pc *pc)
 			const struct tgsi_full_immediate *imm =
 				&p.FullToken.FullImmediate;
 
-			ctor_immd(pc, imm->u.ImmediateFloat32[0].Float,
-				      imm->u.ImmediateFloat32[1].Float,
-				      imm->u.ImmediateFloat32[2].Float,
-				      imm->u.ImmediateFloat32[3].Float);
+			ctor_immd(pc, imm->u[0].Float,
+				      imm->u[1].Float,
+				      imm->u[2].Float,
+				      imm->u[3].Float);
 		}
 			break;
 		case TGSI_TOKEN_TYPE_DECLARATION:
-- 
cgit v1.2.3


From b0341f994feb3ea724bdbbfde5d79ec2c88c34a1 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Wed, 29 Jul 2009 00:35:12 +0200
Subject: nv50: use correct scissor reg

---
 src/gallium/drivers/nv50/nv50_screen.c         |  4 ++++
 src/gallium/drivers/nv50/nv50_state_validate.c | 23 ++++++++++++++++-------
 2 files changed, 20 insertions(+), 7 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index ce8f906b15..349619db21 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -417,6 +417,10 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	so_method(so, screen->tesla, 0x1234, 1);
 	so_data  (so, 1);
 
+	/* activate first scissor rectangle */
+	so_method(so, screen->tesla, NV50TCL_SCISSOR_ENABLE, 1);
+	so_data  (so, 1);
+
 	so_emit(chan, so);
 	so_ref (so, &screen->static_init);
 	so_ref (NULL, &so);
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index d313e9de4f..03aed81fed 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -119,12 +119,18 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 	so_method(so, tesla, NV50TCL_VIEWPORT_HORIZ, 2);
 	so_data  (so, w << 16);
 	so_data  (so, h << 16);
-	so_method(so, tesla, 0x0e04, 2);
+	/* set window scissor rectangle to window extents */
+	so_method(so, tesla, NV50TCL_SCISSOR_HORIZ, 2);
 	so_data  (so, w << 16);
 	so_data  (so, h << 16);
-	so_method(so, tesla, 0xdf8, 2);
+	/* set window lower left corner */
+	so_method(so, tesla, NV50TCL_WINDOW_LEFT, 2);
 	so_data  (so, 0);
 	so_data  (so, h);
+	/* set screen scissor rectangle */
+	so_method(so, tesla, NV50TCL_SCREEN_SCISSOR_HORIZ, 2);
+	so_data  (so, w << 16);
+	so_data  (so, h << 16);
 
 	so_ref(so, &nv50->state.fb);
 	so_ref(NULL, &so);
@@ -233,13 +239,16 @@ nv50_state_validate(struct nv50_context *nv50)
 		nv50->state.scissor_enabled = rast->scissor;
 
 		so = so_new(3, 0);
-		so_method(so, tesla, 0x0ff4, 2);
+		so_method(so, tesla, NV50TCL_SCISSOR_HORIZ, 2);
 		if (nv50->state.scissor_enabled) {
-			so_data(so, ((s->maxx - s->minx) << 16) | s->minx);
-			so_data(so, ((s->maxy - s->miny) << 16) | s->miny);
+			/* the hw has y = 0 = bottom here */
+			unsigned top = nv50->framebuffer.height - s->miny;
+			unsigned bottom = nv50->framebuffer.height - s->maxy;
+			so_data(so, (s->maxx << 16) | s->minx);
+			so_data(so, (top << 16) | bottom);
 		} else {
-			so_data(so, (8192 << 16));
-			so_data(so, (8192 << 16));
+			so_data(so, (nv50->framebuffer.width << 16));
+			so_data(so, (nv50->framebuffer.height << 16));
 		}
 		so_ref(so, &nv50->state.scissor);
 		so_ref(NULL, &so);
-- 
cgit v1.2.3


From d1b9183e64e819d389688074c3db338bd0d2d80e Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Wed, 29 Jul 2009 01:21:41 +0200
Subject: nv50: fix viewport transform

The translation also needs to be inverted, and in bypass mode
the state tracker incorrectly assumes that Y = 0 = TOP, so we
need inversion there to; NDC clipping has to be deactivated
explicitly.
---
 src/gallium/drivers/nv50/nv50_state_validate.c | 31 +++++++++++++++++---------
 1 file changed, 20 insertions(+), 11 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 03aed81fed..ce8e44fb00 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -258,6 +258,7 @@ scissor_uptodate:
 
 	if (nv50->dirty & (NV50_NEW_VIEWPORT | NV50_NEW_RASTERIZER)) {
 		unsigned bypass;
+		float y_translate = (float)nv50->framebuffer.height;
 
 		if (!nv50->rasterizer->pipe.bypass_vs_clip_and_viewport)
 			bypass = 0;
@@ -271,25 +272,33 @@ scissor_uptodate:
 		nv50->state.viewport_bypass = bypass;
 
 		so = so_new(12, 0);
+		so_method(so, tesla, NV50TCL_VIEW_VOLUME_CLIP_CTRL, 1);
 		if (!bypass) {
-			so_method(so, tesla, NV50TCL_VIEWPORT_UNK1(0), 3);
+			so_data(so, 0x0000);
+			y_translate -= nv50->viewport.translate[1];
+			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE(0), 3);
 			so_data  (so, fui(nv50->viewport.translate[0]));
-			so_data  (so, fui(nv50->viewport.translate[1]));
+			so_data  (so, fui(y_translate));
 			so_data  (so, fui(nv50->viewport.translate[2]));
-			so_method(so, tesla, NV50TCL_VIEWPORT_UNK0(0), 3);
+			so_method(so, tesla, NV50TCL_VIEWPORT_SCALE(0), 3);
 			so_data  (so, fui(nv50->viewport.scale[0]));
 			so_data  (so, fui(-nv50->viewport.scale[1]));
 			so_data  (so, fui(nv50->viewport.scale[2]));
-			so_method(so, tesla, 0x192c, 1);
-			so_data  (so, 1);
-			so_method(so, tesla, 0x0f90, 1);
-			so_data  (so, 0);
 		} else {
-			so_method(so, tesla, 0x192c, 1);
-			so_data  (so, 0);
-			so_method(so, tesla, 0x0f90, 1);
-			so_data  (so, 1);
+			/* don't do xy-clipping in NDC space */
+			so_data(so, 0x0800);
+			/* in bypass mode, y = 0 would be bottom */
+			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE(0), 3);
+			so_data  (so, fui(0.0f));
+			so_data  (so, fui(y_translate));
+			so_data  (so, fui(0.0f));
+			so_method(so, tesla, NV50TCL_VIEWPORT_SCALE(0), 3);
+			so_data  (so, fui(1.0f));
+			so_data  (so, fui(-1.0f));
+			so_data  (so, fui(1.0f));
 		}
+		so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1);
+		so_data  (so, 1);
 
 		so_ref(so, &nv50->state.viewport);
 		so_ref(NULL, &so);
-- 
cgit v1.2.3


From f498ccd654bf04d401eafc3690635fcbf707e1f0 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Wed, 29 Jul 2009 00:51:35 +0200
Subject: nv50: fix sx/dx typo in transfer_rect_m2mf

---
 src/gallium/drivers/nv50/nv50_transfer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c
index d0b7f0bef4..6ff375951e 100644
--- a/src/gallium/drivers/nv50/nv50_transfer.c
+++ b/src/gallium/drivers/nv50/nv50_transfer.c
@@ -76,13 +76,13 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct nouveau_bo *src_bo,
 		OUT_RELOCl(chan, dst_bo, dst_offset, dst_reloc);
 		if (src_bo->tile_flags) {
 			BEGIN_RING(chan, m2mf, 0x0218, 1);
-			OUT_RING  (chan, (dy << 16) | sx);
+			OUT_RING  (chan, (sy << 16) | sx);
 		} else {
 			src_offset += (line_count * src_pitch);
 		}
 		if (dst_bo->tile_flags) {
 			BEGIN_RING(chan, m2mf, 0x0234, 1);
-			OUT_RING  (chan, (sy << 16) | dx);
+			OUT_RING  (chan, (dy << 16) | dx);
 		} else {
 			dst_offset += (line_count * dst_pitch);
 		}
-- 
cgit v1.2.3


From df189c9efc0fbcdce816af483f0147ab635280d1 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Wed, 29 Jul 2009 00:55:03 +0200
Subject: nv50: TIC/TSC fixes and additions

Red and blue were interchanged in TIC.
Add border color and some formats.
---
 src/gallium/drivers/nv50/nv50_state.c   |  7 +++-
 src/gallium/drivers/nv50/nv50_tex.c     | 16 ++++----
 src/gallium/drivers/nv50/nv50_texture.h | 71 +++++++++++++++++++++------------
 3 files changed, 60 insertions(+), 34 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index 116866a8e7..c93694c60f 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -205,11 +205,16 @@ nv50_sampler_state_create(struct pipe_context *pipe,
 	}
 
 	limit = CLAMP(cso->lod_bias, -16.0, 15.0);
-	tsc[1] |= ((int)(limit * 256.0) & 0x1fff) << 11;
+	tsc[1] |= ((int)(limit * 256.0) & 0x1fff) << 12;
 
 	tsc[2] |= ((int)CLAMP(cso->max_lod, 0.0, 15.0) << 20) |
 		  ((int)CLAMP(cso->min_lod, 0.0, 15.0) << 8);
 
+	tsc[4] = fui(cso->border_color[0]);
+	tsc[5] = fui(cso->border_color[1]);
+	tsc[6] = fui(cso->border_color[2]);
+	tsc[7] = fui(cso->border_color[3]);
+
 	sso->normalized = cso->normalized_coords;
 	return (void *)sso;
 }
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index ff40c2ad81..46c3073def 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -32,30 +32,30 @@ nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
 	switch (mt->base.format) {
 	case PIPE_FORMAT_A8R8G8B8_UNORM:
 		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
 			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
 			    NV50TIC_0_0_FMT_8_8_8_8);
 		break;
 	case PIPE_FORMAT_A1R5G5B5_UNORM:
 		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
 			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
 			    NV50TIC_0_0_FMT_1_5_5_5);
 		break;
 	case PIPE_FORMAT_A4R4G4B4_UNORM:
 		so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
 			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
 			    NV50TIC_0_0_FMT_4_4_4_4);
 		break;
 	case PIPE_FORMAT_R5G6B5_UNORM:
 		so_data(so, NV50TIC_0_0_MAPA_ONE | NV50TIC_0_0_TYPEA_UNORM |
-			    NV50TIC_0_0_MAPR_C0 | NV50TIC_0_0_TYPER_UNORM |
+			    NV50TIC_0_0_MAPR_C2 | NV50TIC_0_0_TYPER_UNORM |
 			    NV50TIC_0_0_MAPG_C1 | NV50TIC_0_0_TYPEG_UNORM |
-			    NV50TIC_0_0_MAPB_C2 | NV50TIC_0_0_TYPEB_UNORM |
+			    NV50TIC_0_0_MAPB_C0 | NV50TIC_0_0_TYPEB_UNORM |
 			    NV50TIC_0_0_FMT_5_6_5);
 		break;
 	case PIPE_FORMAT_L8_UNORM:
diff --git a/src/gallium/drivers/nv50/nv50_texture.h b/src/gallium/drivers/nv50/nv50_texture.h
index aca622c73b..207fb039f7 100644
--- a/src/gallium/drivers/nv50/nv50_texture.h
+++ b/src/gallium/drivers/nv50/nv50_texture.h
@@ -14,13 +14,13 @@
 #define NV50TIC_0_0_MAPA_C2                                       0x20000000
 #define NV50TIC_0_0_MAPA_C3                                       0x28000000
 #define NV50TIC_0_0_MAPA_ONE                                      0x38000000
-#define NV50TIC_0_0_MAPR_MASK                                     0x07000000
-#define NV50TIC_0_0_MAPR_ZERO                                     0x00000000
-#define NV50TIC_0_0_MAPR_C0                                       0x02000000
-#define NV50TIC_0_0_MAPR_C1                                       0x03000000
-#define NV50TIC_0_0_MAPR_C2                                       0x04000000
-#define NV50TIC_0_0_MAPR_C3                                       0x05000000
-#define NV50TIC_0_0_MAPR_ONE                                      0x07000000
+#define NV50TIC_0_0_MAPB_MASK                                     0x07000000
+#define NV50TIC_0_0_MAPB_ZERO                                     0x00000000
+#define NV50TIC_0_0_MAPB_C0                                       0x02000000
+#define NV50TIC_0_0_MAPB_C1                                       0x03000000
+#define NV50TIC_0_0_MAPB_C2                                       0x04000000
+#define NV50TIC_0_0_MAPB_C3                                       0x05000000
+#define NV50TIC_0_0_MAPB_ONE                                      0x07000000
 #define NV50TIC_0_0_MAPG_MASK                                     0x00e00000
 #define NV50TIC_0_0_MAPG_ZERO                                     0x00000000
 #define NV50TIC_0_0_MAPG_C0                                       0x00400000
@@ -28,31 +28,49 @@
 #define NV50TIC_0_0_MAPG_C2                                       0x00800000
 #define NV50TIC_0_0_MAPG_C3                                       0x00a00000
 #define NV50TIC_0_0_MAPG_ONE                                      0x00e00000
-#define NV50TIC_0_0_MAPB_MASK                                     0x001c0000
-#define NV50TIC_0_0_MAPB_ZERO                                     0x00000000
-#define NV50TIC_0_0_MAPB_C0                                       0x00080000
-#define NV50TIC_0_0_MAPB_C1                                       0x000c0000
-#define NV50TIC_0_0_MAPB_C2                                       0x00100000
-#define NV50TIC_0_0_MAPB_C3                                       0x00140000
-#define NV50TIC_0_0_MAPB_ONE                                      0x001c0000
+#define NV50TIC_0_0_MAPR_MASK                                     0x001c0000
+#define NV50TIC_0_0_MAPR_ZERO                                     0x00000000
+#define NV50TIC_0_0_MAPR_C0                                       0x00080000
+#define NV50TIC_0_0_MAPR_C1                                       0x000c0000
+#define NV50TIC_0_0_MAPR_C2                                       0x00100000
+#define NV50TIC_0_0_MAPR_C3                                       0x00140000
+#define NV50TIC_0_0_MAPR_ONE                                      0x001c0000
 #define NV50TIC_0_0_TYPEA_MASK                                    0x00038000
 #define NV50TIC_0_0_TYPEA_UNORM                                   0x00010000
-#define NV50TIC_0_0_TYPER_MASK                                    0x00007000
-#define NV50TIC_0_0_TYPER_UNORM                                   0x00002000
+#define NV50TIC_0_0_TYPEA_SNORM                                   0x00008000
+#define NV50TIC_0_0_TYPEA_FLOAT                                   0x00038000
+#define NV50TIC_0_0_TYPEB_MASK                                    0x00007000
+#define NV50TIC_0_0_TYPEB_UNORM                                   0x00002000
+#define NV50TIC_0_0_TYPEB_SNORM                                   0x00001000
+#define NV50TIC_0_0_TYPEB_FLOAT                                   0x00007000
 #define NV50TIC_0_0_TYPEG_MASK                                    0x00000e00
 #define NV50TIC_0_0_TYPEG_UNORM                                   0x00000400
-#define NV50TIC_0_0_TYPEB_MASK                                    0x000001c0
-#define NV50TIC_0_0_TYPEB_UNORM                                   0x00000080
-#define NV50TIC_0_0_FMT_MASK                                      0x0000003c
+#define NV50TIC_0_0_TYPEG_SNORM                                   0x00000200
+#define NV50TIC_0_0_TYPEG_FLOAT                                   0x00000e00
+#define NV50TIC_0_0_TYPER_MASK                                    0x000001c0
+#define NV50TIC_0_0_TYPER_UNORM                                   0x00000080
+#define NV50TIC_0_0_TYPER_SNORM                                   0x00000040
+#define NV50TIC_0_0_TYPER_FLOAT                                   0x000001c0
+#define NV50TIC_0_0_FMT_MASK                                      0x0000003f
+#define NV50TIC_0_0_FMT_32_32_32_32                               0x00000001
+#define NV50TIC_0_0_FMT_16_16_16_16                               0x00000003
+#define NV50TIC_0_0_FMT_32_32                                     0x00000004
 #define NV50TIC_0_0_FMT_8_8_8_8                                   0x00000008
+#define NV50TIC_0_0_FMT_2_10_10_10                                0x00000009
+#define NV50TIC_0_0_FMT_32                                        0x0000000f
 #define NV50TIC_0_0_FMT_4_4_4_4                                   0x00000012
-#define NV50TIC_0_0_FMT_1_5_5_5                                   0x00000013
+/* #define NV50TIC_0_0_FMT_1_5_5_5                                0x00000013 */
+#define NV50TIC_0_0_FMT_1_5_5_5                                   0x00000014
 #define NV50TIC_0_0_FMT_5_6_5                                     0x00000015
 #define NV50TIC_0_0_FMT_8_8                                       0x00000018
+#define NV50TIC_0_0_FMT_16                                        0x0000001b
 #define NV50TIC_0_0_FMT_8                                         0x0000001d
+#define NV50TIC_0_0_FMT_10_11_11                                  0x00000021
 #define NV50TIC_0_0_FMT_DXT1                                      0x00000024
 #define NV50TIC_0_0_FMT_DXT3                                      0x00000025
 #define NV50TIC_0_0_FMT_DXT5                                      0x00000026
+#define NV50TIC_0_0_FMT_RGTC1                                     0x00000027
+#define NV50TIC_0_0_FMT_RGTC2                                     0x00000028
 
 #define NV50TIC_0_1_OFFSET_LOW_MASK                               0xffffffff
 #define NV50TIC_0_1_OFFSET_LOW_SHIFT                                       0
@@ -102,6 +120,7 @@
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_EDGE                   0x00000140
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP_TO_BORDER                 0x00000180
 #define NV50TSC_1_0_WRAPR_MIRROR_CLAMP                           0x000001c0
+#define NV50TSC_1_0_MAX_ANISOTROPY_MASK                          0x00700000
 
 #define NV50TSC_1_1_MAGF_MASK                                    0x00000003
 #define NV50TSC_1_1_MAGF_NEAREST                                 0x00000001
@@ -113,17 +132,19 @@
 #define NV50TSC_1_1_MIPF_NONE                                    0x00000040
 #define NV50TSC_1_1_MIPF_NEAREST                                 0x00000080
 #define NV50TSC_1_1_MIPF_LINEAR                                  0x000000c0
+#define NV50TSC_1_1_LOD_BIAS_MASK                                0x01fff000
 
-#define NV50TSC_1_2_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_2_MIN_LOD_MASK                                 0x00000f00
+#define NV50TSC_1_2_MAX_LOD_MASK                                 0x00f00000
 
 #define NV50TSC_1_3_UNKNOWN_MASK                                 0xffffffff
 
-#define NV50TSC_1_4_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_4_BORDER_COLOR_RED_MASK                        0xffffffff
 
-#define NV50TSC_1_5_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_5_BORDER_COLOR_GREEN_MASK                      0xffffffff
 
-#define NV50TSC_1_6_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_6_BORDER_COLOR_BLUE_MASK                       0xffffffff
 
-#define NV50TSC_1_7_UNKNOWN_MASK                                 0xffffffff
+#define NV50TSC_1_7_BORDER_COLOR_ALPHA_MASK                      0xffffffff
 
 #endif
-- 
cgit v1.2.3


From 72813ba5b6ac60519957a96afbefb62e3be91c19 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Tue, 28 Jul 2009 17:21:31 +0200
Subject: nv50: should use uint32_t ptr in draw_elements_inline_u32

---
 src/gallium/drivers/nv50/nv50_vbo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index f81929f238..cbd9d6ab8d 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -139,7 +139,7 @@ nv50_draw_elements_inline_u16(struct nv50_context *nv50, uint16_t *map,
 }
 
 static INLINE void
-nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint8_t *map,
+nv50_draw_elements_inline_u32(struct nv50_context *nv50, uint32_t *map,
 			      unsigned start, unsigned count)
 {
 	struct nouveau_channel *chan = nv50->screen->tesla->channel;
-- 
cgit v1.2.3


From 1f17b8ff5903b72117caaa49ac786f2f6dfbe401 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Tue, 28 Jul 2009 17:34:07 +0200
Subject: nv50: support more vtxelt formats

NOTE: we must not try to emit buffer relocations when
vtxbuf_nr is 0 but vtxelt_nr is not
---
 src/gallium/drivers/nv50/nv50_vbo.c | 80 ++++++++++++++++++++++++++-----------
 1 file changed, 56 insertions(+), 24 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index cbd9d6ab8d..422c8c6b5b 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -49,6 +49,57 @@ nv50_prim(unsigned mode)
 	return NV50TCL_VERTEX_BEGIN_POINTS;
 }
 
+static INLINE unsigned
+nv50_vtxeltfmt(unsigned pf)
+{
+	static const uint8_t vtxelt_32[4] = { 0x90, 0x20, 0x10, 0x08 };
+	static const uint8_t vtxelt_16[4] = { 0xd8, 0x78, 0x28, 0x18 };
+	static const uint8_t vtxelt_08[4] = { 0xe8, 0xc0, 0x98, 0x50 };
+
+	unsigned nf, c = 0;
+
+	switch (pf_type(pf)) {
+	case PIPE_FORMAT_TYPE_FLOAT:
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT; break;
+	case PIPE_FORMAT_TYPE_UNORM:
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_UNORM; break;
+	case PIPE_FORMAT_TYPE_SNORM:
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SNORM; break;
+	case PIPE_FORMAT_TYPE_USCALED:
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_USCALED; break;
+	case PIPE_FORMAT_TYPE_SSCALED:
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_SSCALED; break;
+	default:
+		NOUVEAU_ERR("invalid vbo type %d\n",pf_type(pf));
+		assert(0);
+		nf = NV50TCL_VERTEX_ARRAY_ATTRIB_TYPE_FLOAT;
+		break;
+	}
+
+	if (pf_size_y(pf)) c++;
+	if (pf_size_z(pf)) c++;
+	if (pf_size_w(pf)) c++;
+
+	if (pf_exp2(pf) == 3) {
+		switch (pf_size_x(pf)) {
+		case 1: return (nf | (vtxelt_08[c] << 16));
+		case 2: return (nf | (vtxelt_16[c] << 16));
+		case 4: return (nf | (vtxelt_32[c] << 16));
+		default:
+			break;
+		}
+	} else
+	if (pf_exp2(pf) == 6 && pf_size_x(pf) == 1) {
+		NOUVEAU_ERR("unsupported vbo component size 64\n");
+		assert(0);
+		return (nf | 0x08000000);
+	}
+
+	NOUVEAU_ERR("invalid vbo format %s\n",pf_name(pf));
+	assert(0);
+	return (nf | 0x08000000);
+}
+
 boolean
 nv50_draw_arrays(struct pipe_context *pipe, unsigned mode, unsigned start,
 		 unsigned count)
@@ -208,6 +259,10 @@ nv50_vbo_validate(struct nv50_context *nv50)
 	struct nouveau_stateobj *vtxbuf, *vtxfmt;
 	int i;
 
+	/* don't validate if Gallium took away our buffers */
+	if (nv50->vtxbuf_nr == 0)
+		return;
+
 	vtxbuf = so_new(nv50->vtxelt_nr * 4, nv50->vtxelt_nr * 2);
 	vtxfmt = so_new(nv50->vtxelt_nr + 1, 0);
 	so_method(vtxfmt, tesla, 0x1ac0, nv50->vtxelt_nr);
@@ -218,30 +273,7 @@ nv50_vbo_validate(struct nv50_context *nv50)
 			&nv50->vtxbuf[ve->vertex_buffer_index];
 		struct nouveau_bo *bo = nouveau_bo(vb->buffer);
 
-		switch (ve->src_format) {
-		case PIPE_FORMAT_R32G32B32A32_FLOAT:
-			so_data(vtxfmt, 0x7e080000 | i);
-			break;
-		case PIPE_FORMAT_R32G32B32_FLOAT:
-			so_data(vtxfmt, 0x7e100000 | i);
-			break;
-		case PIPE_FORMAT_R32G32_FLOAT:
-			so_data(vtxfmt, 0x7e200000 | i);
-			break;
-		case PIPE_FORMAT_R32_FLOAT:
-			so_data(vtxfmt, 0x7e900000 | i);
-			break;
-		case PIPE_FORMAT_R8G8B8A8_UNORM:
-			so_data(vtxfmt, 0x24500000 | i);
-			break;
-		default:
-		{
-			NOUVEAU_ERR("invalid vbo format %s\n",
-				    pf_name(ve->src_format));
-			assert(0);
-			return;
-		}
-		}
+		so_data(vtxfmt, nv50_vtxeltfmt(ve->src_format) | i);
 
 		so_method(vtxbuf, tesla, 0x900 + (i * 16), 3);
 		so_data  (vtxbuf, 0x20000000 | vb->stride);
-- 
cgit v1.2.3


From 987c59c486500780a9315d2a850e6121319f4e93 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Tue, 28 Jul 2009 17:38:28 +0200
Subject: nv50: use new 2D surface format names

---
 src/gallium/drivers/nv50/nv50_surface.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c
index 3da9d6e728..31c36a12b7 100644
--- a/src/gallium/drivers/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nv50/nv50_surface.c
@@ -35,13 +35,13 @@ nv50_format(enum pipe_format format)
 {
 	switch (format) {
 	case PIPE_FORMAT_A8R8G8B8_UNORM:
-		return NV50_2D_DST_FORMAT_32BPP;
+		return NV50_2D_DST_FORMAT_A8R8G8B8_UNORM;
 	case PIPE_FORMAT_X8R8G8B8_UNORM:
-		return NV50_2D_DST_FORMAT_24BPP;
+		return NV50_2D_DST_FORMAT_X8R8G8B8_UNORM;
 	case PIPE_FORMAT_R5G6B5_UNORM:
-		return NV50_2D_DST_FORMAT_16BPP;
+		return NV50_2D_DST_FORMAT_R5G6B5_UNORM;
 	case PIPE_FORMAT_A8_UNORM:
-		return NV50_2D_DST_FORMAT_8BPP;
+		return NV50_2D_DST_FORMAT_R8_UNORM;
 	default:
 		return -1;
 	}
-- 
cgit v1.2.3


From 84166a021fe7b4a05f03d0119d2954998f7f12c6 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Wed, 29 Jul 2009 01:07:52 +0200
Subject: nv50: correct zeta formats

What was Z24S8 before is actually S8Z24, and what we had for Z16
is actually X8Z24. Now, we also have the REAL Z24S8 and I added
Z32_FLOAT as well; most of the formats need different tile_flags.
---
 src/gallium/drivers/nv50/nv50_miptree.c        |  9 +++++++--
 src/gallium/drivers/nv50/nv50_screen.c         |  5 +++--
 src/gallium/drivers/nv50/nv50_state_validate.c | 15 ++++++++++-----
 3 files changed, 20 insertions(+), 9 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c
index 22465e0227..c8392799ed 100644
--- a/src/gallium/drivers/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nv50/nv50_miptree.c
@@ -42,9 +42,14 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
 	mt->base.screen = pscreen;
 
 	switch (pt->format) {
-	case PIPE_FORMAT_Z24X8_UNORM:
+	case PIPE_FORMAT_Z32_FLOAT:
+		tile_flags = 0x4800;
+		break;
 	case PIPE_FORMAT_Z24S8_UNORM:
-	case PIPE_FORMAT_Z16_UNORM:
+		tile_flags = 0x1800;
+		break;
+	case PIPE_FORMAT_X8Z24_UNORM:
+	case PIPE_FORMAT_S8Z24_UNORM:
 		tile_flags = 0x2800;
 		break;
 	default:
diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 349619db21..0f6b1aed96 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -44,9 +44,10 @@ nv50_screen_is_format_supported(struct pipe_screen *pscreen,
 	} else
 	if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
 		switch (format) {
+		case PIPE_FORMAT_Z32_FLOAT:
 		case PIPE_FORMAT_Z24S8_UNORM:
-		case PIPE_FORMAT_Z24X8_UNORM:
-		case PIPE_FORMAT_Z16_UNORM:
+		case PIPE_FORMAT_X8Z24_UNORM:
+		case PIPE_FORMAT_S8Z24_UNORM:
 			return TRUE;
 		default:
 			break;
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index ce8e44fb00..4a49b107a5 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -92,17 +92,22 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 		so_reloc (so, bo, fb->zsbuf->offset, NOUVEAU_BO_VRAM |
 			      NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
 		switch (fb->zsbuf->format) {
+		case PIPE_FORMAT_Z32_FLOAT:
+			so_data(so, NV50TCL_ZETA_FORMAT_Z32_FLOAT);
+			break;
 		case PIPE_FORMAT_Z24S8_UNORM:
-		case PIPE_FORMAT_Z24X8_UNORM:
-			so_data(so, 0x16);
+			so_data(so, NV50TCL_ZETA_FORMAT_Z24S8_UNORM);
+			break;
+		case PIPE_FORMAT_X8Z24_UNORM:
+			so_data(so, NV50TCL_ZETA_FORMAT_X8Z24_UNORM);
 			break;
-		case PIPE_FORMAT_Z16_UNORM:
-			so_data(so, 0x15);
+		case PIPE_FORMAT_S8Z24_UNORM:
+			so_data(so, NV50TCL_ZETA_FORMAT_S8Z24_UNORM);
 			break;
 		default:
 			NOUVEAU_ERR("AIIII unknown format %s\n",
 				    pf_name(fb->zsbuf->format));
-			so_data(so, 0x16);
+			so_data(so, NV50TCL_ZETA_FORMAT_S8Z24_UNORM);
 			break;
 		}
 		so_data(so, bo->tile_mode << 4);
-- 
cgit v1.2.3


From 693f900b163f89952ed9b4c30d093f8ead461657 Mon Sep 17 00:00:00 2001
From: Ben Skeggs <bskeggs@redhat.com>
Date: Wed, 29 Jul 2009 11:19:52 +1000
Subject: nv50: support non-blocking query_result()

---
 src/gallium/drivers/nv50/nv50_query.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_query.c b/src/gallium/drivers/nv50/nv50_query.c
index 940e04365f..c354e10b0f 100644
--- a/src/gallium/drivers/nv50/nv50_query.c
+++ b/src/gallium/drivers/nv50/nv50_query.c
@@ -107,13 +107,13 @@ nv50_query_result(struct pipe_context *pipe, struct pipe_query *pq,
 		  boolean wait, uint64_t *result)
 {
 	struct nv50_query *q = nv50_query(pq);
-
-	/*XXX: Want to be able to return FALSE here instead of blocking
-	 *     until the result is available..
-	 */
+	int ret;
 
 	if (!q->ready) {
-		nouveau_bo_map(q->bo, NOUVEAU_BO_RD);
+		ret = nouveau_bo_map(q->bo, NOUVEAU_BO_RD |
+				     wait ? 0 : NOUVEAU_BO_NOWAIT);
+		if (ret)
+			return false;
 		q->result = ((uint32_t *)q->bo->map)[1];
 		q->ready = TRUE;
 		nouveau_bo_unmap(q->bo);
-- 
cgit v1.2.3


From f1aa2a43b7588aaca3ef175c8cc5366414cac2f8 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Fri, 14 Aug 2009 15:26:58 +0200
Subject: nv50: fix typo in REALLOC's 2nd argument in ctor_immd

---
 src/gallium/drivers/nv50/nv50_program.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index 4ec9c03305..fefccd0b2a 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -296,7 +296,7 @@ kill_temp_temp(struct nv50_pc *pc)
 static int
 ctor_immd(struct nv50_pc *pc, float x, float y, float z, float w)
 {
-	pc->immd_buf = REALLOC(pc->immd_buf, (pc->immd_nr * r * sizeof(float)),
+	pc->immd_buf = REALLOC(pc->immd_buf, (pc->immd_nr * 4 * sizeof(float)),
 			       (pc->immd_nr + 1) * 4 * sizeof(float));
 	pc->immd_buf[(pc->immd_nr * 4) + 0] = x;
 	pc->immd_buf[(pc->immd_nr * 4) + 1] = y;
-- 
cgit v1.2.3


From 74e8b1a30b82c89c70048cfcc1f12e1ceebfd628 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Fri, 14 Aug 2009 18:06:24 +0200
Subject: nv50: make use of the y-origin switch

Now that we know how to make the hardware have y-coordinate origin
top, we can get rid of all the inversion introduced earlier.
---
 src/gallium/drivers/nv50/nv50_screen.c         |  3 +-
 src/gallium/drivers/nv50/nv50_state_validate.c | 38 ++++++++++----------------
 2 files changed, 16 insertions(+), 25 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index 0f6b1aed96..e13536e84a 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -291,8 +291,9 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 
 	so_method(so, screen->tesla, 0x13bc, 1);
 	so_data  (so, 0x54);
+	/* origin is top left (set to 1 for bottom left) */
 	so_method(so, screen->tesla, 0x13ac, 1);
-	so_data  (so, 1);
+	so_data  (so, 0);
 	so_method(so, screen->tesla, 0x16b8, 1);
 	so_data  (so, 8);
 
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 4a49b107a5..b872684040 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -131,7 +131,7 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 	/* set window lower left corner */
 	so_method(so, tesla, NV50TCL_WINDOW_LEFT, 2);
 	so_data  (so, 0);
-	so_data  (so, h);
+	so_data  (so, 0);
 	/* set screen scissor rectangle */
 	so_method(so, tesla, NV50TCL_SCREEN_SCISSOR_HORIZ, 2);
 	so_data  (so, w << 16);
@@ -246,11 +246,8 @@ nv50_state_validate(struct nv50_context *nv50)
 		so = so_new(3, 0);
 		so_method(so, tesla, NV50TCL_SCISSOR_HORIZ, 2);
 		if (nv50->state.scissor_enabled) {
-			/* the hw has y = 0 = bottom here */
-			unsigned top = nv50->framebuffer.height - s->miny;
-			unsigned bottom = nv50->framebuffer.height - s->maxy;
 			so_data(so, (s->maxx << 16) | s->minx);
-			so_data(so, (top << 16) | bottom);
+			so_data(so, (s->maxy << 16) | s->miny);
 		} else {
 			so_data(so, (nv50->framebuffer.width << 16));
 			so_data(so, (nv50->framebuffer.height << 16));
@@ -263,7 +260,6 @@ scissor_uptodate:
 
 	if (nv50->dirty & (NV50_NEW_VIEWPORT | NV50_NEW_RASTERIZER)) {
 		unsigned bypass;
-		float y_translate = (float)nv50->framebuffer.height;
 
 		if (!nv50->rasterizer->pipe.bypass_vs_clip_and_viewport)
 			bypass = 0;
@@ -277,33 +273,27 @@ scissor_uptodate:
 		nv50->state.viewport_bypass = bypass;
 
 		so = so_new(12, 0);
-		so_method(so, tesla, NV50TCL_VIEW_VOLUME_CLIP_CTRL, 1);
 		if (!bypass) {
-			so_data(so, 0x0000);
-			y_translate -= nv50->viewport.translate[1];
 			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE(0), 3);
 			so_data  (so, fui(nv50->viewport.translate[0]));
-			so_data  (so, fui(y_translate));
+			so_data  (so, fui(nv50->viewport.translate[1]));
 			so_data  (so, fui(nv50->viewport.translate[2]));
 			so_method(so, tesla, NV50TCL_VIEWPORT_SCALE(0), 3);
 			so_data  (so, fui(nv50->viewport.scale[0]));
-			so_data  (so, fui(-nv50->viewport.scale[1]));
+			so_data  (so, fui(nv50->viewport.scale[1]));
 			so_data  (so, fui(nv50->viewport.scale[2]));
+
+			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1);
+			so_data  (so, 1);
+			/* no idea what 0f90 does */
+			so_method(so, tesla, 0x0f90, 1);
+			so_data  (so, 0);
 		} else {
-			/* don't do xy-clipping in NDC space */
-			so_data(so, 0x0800);
-			/* in bypass mode, y = 0 would be bottom */
-			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSLATE(0), 3);
-			so_data  (so, fui(0.0f));
-			so_data  (so, fui(y_translate));
-			so_data  (so, fui(0.0f));
-			so_method(so, tesla, NV50TCL_VIEWPORT_SCALE(0), 3);
-			so_data  (so, fui(1.0f));
-			so_data  (so, fui(-1.0f));
-			so_data  (so, fui(1.0f));
+			so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1);
+			so_data  (so, 0);
+			so_method(so, tesla, 0x0f90, 1);
+			so_data  (so, 1);
 		}
-		so_method(so, tesla, NV50TCL_VIEWPORT_TRANSFORM_EN, 1);
-		so_data  (so, 1);
 
 		so_ref(so, &nv50->state.viewport);
 		so_ref(NULL, &so);
-- 
cgit v1.2.3


From 3506d7d3e2b5ed57cb3f0653421226a863555ae1 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Fri, 14 Aug 2009 18:16:46 +0200
Subject: nv50: make sure we don't re-emit outdated scissor state

Since we don't turn off scissors, we need to update the
stateobj when the framebuffer size changes.
---
 src/gallium/drivers/nv50/nv50_state_validate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index b872684040..42ecf05580 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -124,10 +124,6 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 	so_method(so, tesla, NV50TCL_VIEWPORT_HORIZ, 2);
 	so_data  (so, w << 16);
 	so_data  (so, h << 16);
-	/* set window scissor rectangle to window extents */
-	so_method(so, tesla, NV50TCL_SCISSOR_HORIZ, 2);
-	so_data  (so, w << 16);
-	so_data  (so, h << 16);
 	/* set window lower left corner */
 	so_method(so, tesla, NV50TCL_WINDOW_LEFT, 2);
 	so_data  (so, 0);
@@ -137,6 +133,10 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 	so_data  (so, w << 16);
 	so_data  (so, h << 16);
 
+	/* we set scissors to framebuffer size when they're 'turned off' */
+	nv50->dirty |= NV50_NEW_SCISSOR;
+	so_ref(NULL, &nv50->state.scissor);
+
 	so_ref(so, &nv50->state.fb);
 	so_ref(NULL, &so);
 }
-- 
cgit v1.2.3


From 442a5e434381987a426192e2b7d34847de50a0ed Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Fri, 14 Aug 2009 18:23:55 +0200
Subject: nv50: fix mipmap offsets and tiling

The hardware expects a texture's tile mode to change with
the mipmap level.
Also, only multiply by block size once to obtain size.
---
 src/gallium/drivers/nv50/nv50_context.h  |  1 +
 src/gallium/drivers/nv50/nv50_miptree.c  | 11 +++++++--
 src/gallium/drivers/nv50/nv50_transfer.c | 39 ++++++++++++++++++++------------
 3 files changed, 34 insertions(+), 17 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_context.h b/src/gallium/drivers/nv50/nv50_context.h
index 9b8cc4d37d..5cbc2c8f82 100644
--- a/src/gallium/drivers/nv50/nv50_context.h
+++ b/src/gallium/drivers/nv50/nv50_context.h
@@ -71,6 +71,7 @@ struct nv50_sampler_stateobj {
 struct nv50_miptree_level {
 	int *image_offset;
 	unsigned pitch;
+	unsigned tile_mode;
 };
 
 struct nv50_miptree {
diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c
index c8392799ed..7493ef3af2 100644
--- a/src/gallium/drivers/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nv50/nv50_miptree.c
@@ -87,20 +87,27 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
 
 		lvl->image_offset = CALLOC(mt->image_nr, sizeof(int));
 		lvl->pitch = align(pt->width[l] * pt->block.size, 64);
+		lvl->tile_mode = tile_mode;
 
 		width = MAX2(1, width >> 1);
 		height = MAX2(1, height >> 1);
 		depth = MAX2(1, depth >> 1);
+
+		if (tile_mode && height <= (tile_h >> 1)) {
+			tile_mode--;
+			tile_h >>= 1;
+		}
 	}
 
 	for (i = 0; i < mt->image_nr; i++) {
 		for (l = 0; l <= pt->last_level; l++) {
 			struct nv50_miptree_level *lvl = &mt->level[l];
 			int size;
+			tile_h = 1 << (lvl->tile_mode + 2);
 
 			size  = align(pt->width[l], 8) * pt->block.size;
 			size  = align(size, 64);
-			size *= align(pt->height[l], tile_h) * pt->block.size;
+			size *= align(pt->height[l], tile_h);
 
 			lvl->image_offset[i] = mt->total_size;
 
@@ -109,7 +116,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
 	}
 
 	ret = nouveau_bo_new_tile(dev, NOUVEAU_BO_VRAM, 256, mt->total_size,
-				  tile_mode, tile_flags, &mt->bo);
+				  mt->level[0].tile_mode, tile_flags, &mt->bo);
 	if (ret) {
 		FREE(mt);
 		return NULL;
diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c
index 6ff375951e..1c47c30968 100644
--- a/src/gallium/drivers/nv50/nv50_transfer.c
+++ b/src/gallium/drivers/nv50/nv50_transfer.c
@@ -8,6 +8,7 @@ struct nv50_transfer {
 	struct pipe_transfer base;
 	struct nouveau_bo *bo;
 	unsigned level_offset;
+	unsigned level_tiling;
 	int level_pitch;
 	int level_width;
 	int level_height;
@@ -16,11 +17,14 @@ struct nv50_transfer {
 };
 
 static void
-nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct nouveau_bo *src_bo,
-			unsigned src_offset, int src_pitch, int sx, int sy,
-			int sw, int sh, struct nouveau_bo *dst_bo,
-			unsigned dst_offset, int dst_pitch, int dx, int dy,
-			int dw, int dh, int cpp, int width, int height,
+nv50_transfer_rect_m2mf(struct pipe_screen *pscreen,
+			struct nouveau_bo *src_bo, unsigned src_offset,
+			int src_pitch, unsigned src_tile_mode,
+			int sx, int sy, int sw, int sh,
+			struct nouveau_bo *dst_bo, unsigned dst_offset,
+			int dst_pitch, unsigned dst_tile_mode,
+			int dx, int dy, int dw, int dh,
+			int cpp, int width, int height,
 			unsigned src_reloc, unsigned dst_reloc)
 {
 	struct nv50_screen *screen = nv50_screen(pscreen);
@@ -41,7 +45,7 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct nouveau_bo *src_bo,
 	} else {
 		BEGIN_RING(chan, m2mf, 0x0200, 6);
 		OUT_RING  (chan, 0);
-		OUT_RING  (chan, src_bo->tile_mode << 4);
+		OUT_RING  (chan, src_tile_mode << 4);
 		OUT_RING  (chan, sw * cpp);
 		OUT_RING  (chan, sh);
 		OUT_RING  (chan, 1);
@@ -57,7 +61,7 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen, struct nouveau_bo *src_bo,
 	} else {
 		BEGIN_RING(chan, m2mf, 0x021c, 6);
 		OUT_RING  (chan, 0);
-		OUT_RING  (chan, dst_bo->tile_mode << 4);
+		OUT_RING  (chan, dst_tile_mode << 4);
 		OUT_RING  (chan, dw * cpp);
 		OUT_RING  (chan, dh);
 		OUT_RING  (chan, 1);
@@ -136,6 +140,7 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
 	tx->level_width = mt->base.width[level];
 	tx->level_height = mt->base.height[level];
 	tx->level_offset = lvl->image_offset[image];
+	tx->level_tiling = lvl->tile_mode;
 	tx->level_x = x;
 	tx->level_y = y;
 	ret = nouveau_bo_new(dev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP, 0,
@@ -147,9 +152,11 @@ nv50_transfer_new(struct pipe_screen *pscreen, struct pipe_texture *pt,
 
 	if (usage != PIPE_TRANSFER_WRITE) {
 		nv50_transfer_rect_m2mf(pscreen, mt->bo, tx->level_offset,
-					tx->level_pitch, x, y, tx->level_width,
-					tx->level_height, tx->bo, 0,
-					tx->base.stride, 0, 0,
+					tx->level_pitch, tx->level_tiling,
+					x, y,
+					tx->level_width, tx->level_height,
+					tx->bo, 0, tx->base.stride,
+					tx->bo->tile_mode, 0, 0,
 					tx->base.width, tx->base.height,
 					tx->base.block.size, w, h,
 					NOUVEAU_BO_VRAM | NOUVEAU_BO_GART,
@@ -168,12 +175,14 @@ nv50_transfer_del(struct pipe_transfer *ptx)
 	if (ptx->usage != PIPE_TRANSFER_READ) {
 		struct pipe_screen *pscreen = ptx->texture->screen;
 		nv50_transfer_rect_m2mf(pscreen, tx->bo, 0, tx->base.stride,
-					0, 0, tx->base.width, tx->base.height,
-					mt->bo, tx->level_offset,
-					tx->level_pitch, tx->level_x,
-					tx->level_y, tx->level_width,
-					tx->level_height, tx->base.block.size,
+					tx->bo->tile_mode, 0, 0,
 					tx->base.width, tx->base.height,
+					mt->bo, tx->level_offset,
+					tx->level_pitch, tx->level_tiling,
+					tx->level_x, tx->level_y,
+					tx->level_width, tx->level_height,
+					tx->base.block.size, tx->base.width,
+					tx->base.height,
 					NOUVEAU_BO_GART, NOUVEAU_BO_VRAM |
 					NOUVEAU_BO_GART);
 	}
-- 
cgit v1.2.3


From a2af40b846e0b510887aaf15c2777387a3caae62 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Sat, 15 Aug 2009 16:22:27 +0200
Subject: nv50: align registers used with TEX to 4

The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
---
 src/gallium/drivers/nv50/nv50_program.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index fefccd0b2a..e45769c069 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -251,7 +251,7 @@ alloc_temp4(struct nv50_pc *pc, struct nv50_reg *dst[4], int idx)
 
 	if (pc->r_temp[idx] || pc->r_temp[idx + 1] ||
 	    pc->r_temp[idx + 2] || pc->r_temp[idx + 3])
-		return alloc_temp4(pc, dst, idx + 1);
+		return alloc_temp4(pc, dst, idx + 4);
 
 	for (i = 0; i < 4; i++) {
 		dst[i] = CALLOC_STRUCT(nv50_reg);
@@ -1014,6 +1014,7 @@ emit_tex(struct nv50_pc *pc, struct nv50_reg **dst, unsigned mask,
 		break;
 	}
 
+	/* some cards need t[0]'s hw index to be a multiple of 4 */
 	alloc_temp4(pc, t, 0);
 
 	if (proj) {
-- 
cgit v1.2.3


From a7adb858278ee2311e014ca2d7bb56656cbd7aa7 Mon Sep 17 00:00:00 2001
From: Maarten Maathuis <madman2003@gmail.com>
Date: Fri, 14 Aug 2009 22:25:04 +0200
Subject: nv50: avoid a NULL-ptr dereference when the pipe context changes

- We cannot assume all state objects are present when the pipe context changes.
---
 src/gallium/drivers/nv50/nv50_state_validate.c | 27 +++++++++++++++++++++++++-
 1 file changed, 26 insertions(+), 1 deletion(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 42ecf05580..633be78753 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -148,7 +148,32 @@ nv50_state_emit(struct nv50_context *nv50)
 	struct nouveau_channel *chan = screen->base.channel;
 
 	if (nv50->pctx_id != screen->cur_pctx) {
-		nv50->state.dirty |= 0xffffffff;
+		if (nv50->state.fb)
+			nv50->state.dirty |= NV50_NEW_FRAMEBUFFER;
+		if (nv50->state.blend)
+			nv50->state.dirty |= NV50_NEW_BLEND;
+		if (nv50->state.zsa)
+			nv50->state.dirty |= NV50_NEW_ZSA;
+		if (nv50->state.vertprog)
+			nv50->state.dirty |= NV50_NEW_VERTPROG;
+		if (nv50->state.fragprog)
+			nv50->state.dirty |= NV50_NEW_FRAGPROG;
+		if (nv50->state.rast)
+			nv50->state.dirty |= NV50_NEW_RASTERIZER;
+		if (nv50->state.blend_colour)
+			nv50->state.dirty |= NV50_NEW_BLEND_COLOUR;
+		if (nv50->state.stipple)
+			nv50->state.dirty |= NV50_NEW_STIPPLE;
+		if (nv50->state.scissor)
+			nv50->state.dirty |= NV50_NEW_SCISSOR;
+		if (nv50->state.viewport)
+			nv50->state.dirty |= NV50_NEW_VIEWPORT;
+		if (nv50->state.tsc_upload)
+			nv50->state.dirty |= NV50_NEW_SAMPLER;
+		if (nv50->state.tic_upload)
+			nv50->state.dirty |= NV50_NEW_TEXTURE;
+		if (nv50->state.vtxfmt && nv50->state.vtxbuf)
+			nv50->state.dirty |= NV50_NEW_ARRAYS;
 		screen->cur_pctx = nv50->pctx_id;
 	}
 
-- 
cgit v1.2.3


From 0204c7d8d712c1023b6d75f2f50b0e89d7777de8 Mon Sep 17 00:00:00 2001
From: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Date: Mon, 17 Aug 2009 12:26:54 +0200
Subject: nv50: fix stencil state

It's the front stencil methods that have contiguous offsets,
not the back ones.
Unfortunately the names in the header still have FRONT/BACK
reversed, so I'm using hex values until it gets updated.
---
 src/gallium/drivers/nv50/nv50_state.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_state.c b/src/gallium/drivers/nv50/nv50_state.c
index c93694c60f..ef4154d303 100644
--- a/src/gallium/drivers/nv50/nv50_state.c
+++ b/src/gallium/drivers/nv50/nv50_state.c
@@ -409,35 +409,35 @@ nv50_depth_stencil_alpha_state_create(struct pipe_context *pipe,
 		so_data  (so, 0);
 	}
 
-	/*XXX: yes, I know they're backwards.. header needs fixing */
+	/* XXX: keep hex values until header is updated (names reversed) */
 	if (cso->stencil[0].enabled) {
-		so_method(so, tesla, NV50TCL_STENCIL_BACK_ENABLE, 5);
+		so_method(so, tesla, 0x1380, 8);
 		so_data  (so, 1);
 		so_data  (so, nvgl_stencil_op(cso->stencil[0].fail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
 		so_data  (so, nvgl_comparison_op(cso->stencil[0].func));
-		so_method(so, tesla, NV50TCL_STENCIL_BACK_FUNC_REF, 3);
 		so_data  (so, cso->stencil[0].ref_value);
 		so_data  (so, cso->stencil[0].writemask);
 		so_data  (so, cso->stencil[0].valuemask);
 	} else {
-		so_method(so, tesla, NV50TCL_STENCIL_BACK_ENABLE, 1);
+		so_method(so, tesla, 0x1380, 1);
 		so_data  (so, 0);
 	}
 
 	if (cso->stencil[1].enabled) {
-		so_method(so, tesla, NV50TCL_STENCIL_FRONT_ENABLE, 8);
+		so_method(so, tesla, 0x1594, 5);
 		so_data  (so, 1);
 		so_data  (so, nvgl_stencil_op(cso->stencil[1].fail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
 		so_data  (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
 		so_data  (so, nvgl_comparison_op(cso->stencil[1].func));
+		so_method(so, tesla, 0x0f54, 3);
 		so_data  (so, cso->stencil[1].ref_value);
 		so_data  (so, cso->stencil[1].writemask);
 		so_data  (so, cso->stencil[1].valuemask);
 	} else {
-		so_method(so, tesla, NV50TCL_STENCIL_FRONT_ENABLE, 1);
+		so_method(so, tesla, 0x1594, 1);
 		so_data  (so, 0);
 	}
 
-- 
cgit v1.2.3


From 93ce4c99d4c4515b8f8c4e999af53c8196b5f9eb Mon Sep 17 00:00:00 2001
From: Maarten Maathuis <madman2003@gmail.com>
Date: Sun, 16 Aug 2009 01:29:06 +0200
Subject: nv50: whitespace fixes and deobfuscation

---
 src/gallium/drivers/nv50/nv50_context.c        |  2 --
 src/gallium/drivers/nv50/nv50_miptree.c        |  8 ++---
 src/gallium/drivers/nv50/nv50_program.c        | 33 ++++++++++----------
 src/gallium/drivers/nv50/nv50_query.c          |  2 +-
 src/gallium/drivers/nv50/nv50_screen.c         | 43 ++++++++++++++------------
 src/gallium/drivers/nv50/nv50_state_validate.c | 13 ++++----
 src/gallium/drivers/nv50/nv50_tex.c            | 15 +++++----
 src/gallium/drivers/nv50/nv50_transfer.c       | 33 +++++++++++++-------
 src/gallium/drivers/nv50/nv50_vbo.c            |  5 +--
 9 files changed, 85 insertions(+), 69 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c
index e02afc4be9..a2222d88b9 100644
--- a/src/gallium/drivers/nv50/nv50_context.c
+++ b/src/gallium/drivers/nv50/nv50_context.c
@@ -112,5 +112,3 @@ nv50_create(struct pipe_screen *pscreen, unsigned pctx_id)
 
 	return &nv50->pipe;
 }
-
-		
diff --git a/src/gallium/drivers/nv50/nv50_miptree.c b/src/gallium/drivers/nv50/nv50_miptree.c
index 7493ef3af2..dd1b0303bd 100644
--- a/src/gallium/drivers/nv50/nv50_miptree.c
+++ b/src/gallium/drivers/nv50/nv50_miptree.c
@@ -121,7 +121,7 @@ nv50_miptree_create(struct pipe_screen *pscreen, const struct pipe_texture *tmp)
 		FREE(mt);
 		return NULL;
 	}
-			     
+
 	return &mt->base;
 }
 
@@ -158,7 +158,7 @@ nv50_miptree_destroy(struct pipe_texture *pt)
 	struct nv50_miptree *mt = nv50_miptree(pt);
 
 	nouveau_bo_ref(NULL, &mt->bo);
-        FREE(mt);
+	FREE(mt);
 }
 
 static struct pipe_surface *
@@ -201,8 +201,8 @@ nv50_miptree_surface_del(struct pipe_surface *ps)
 {
 	struct nv50_surface *s = nv50_surface(ps);
 
-        pipe_texture_reference(&ps->texture, NULL);
-        FREE(s);
+	pipe_texture_reference(&ps->texture, NULL);
+	FREE(s);
 }
 
 void
diff --git a/src/gallium/drivers/nv50/nv50_program.c b/src/gallium/drivers/nv50/nv50_program.c
index e45769c069..289c3485e0 100644
--- a/src/gallium/drivers/nv50/nv50_program.c
+++ b/src/gallium/drivers/nv50/nv50_program.c
@@ -2222,9 +2222,9 @@ nv50_program_upload_data(struct nv50_context *nv50, float *map,
 	while (count) {
 		unsigned nr = count > 2047 ? 2047 : count;
 
-		BEGIN_RING(chan, tesla, 0x00000f00, 1);
+		BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
 		OUT_RING  (chan, (cbuf << 0) | (start << 8));
-		BEGIN_RING(chan, tesla, 0x40000f04, nr);
+		BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, nr);
 		OUT_RINGp (chan, map, nr);
 
 		map += nr;
@@ -2346,7 +2346,7 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p)
 	}
 
 	so = so_new(4,2);
-	so_method(so, nv50->screen->tesla, 0x1280, 3);
+	so_method(so, nv50->screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, p->bo, 0, flags | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, p->bo, 0, flags | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_PUPLOAD << 16) | 0x0800); //(p->exec_size * 4));
@@ -2365,9 +2365,9 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p)
 			continue;
 		}
 
-		BEGIN_RING(chan, tesla, 0x0f00, 1);
+		BEGIN_RING(chan, tesla, NV50TCL_CB_ADDR, 1);
 		OUT_RING  (chan, (start << 8) | NV50_CB_PUPLOAD);
-		BEGIN_RING(chan, tesla, 0x40000f04, nr);	
+		BEGIN_RING(chan, tesla, NV50TCL_CB_DATA(0) | 0x40000000, nr);
 		OUT_RINGp (chan, up + start, nr);
 
 		start += nr;
@@ -2400,15 +2400,15 @@ nv50_vertprog_validate(struct nv50_context *nv50)
 		      NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
 		      NOUVEAU_BO_LOW, 0, 0);
-	so_method(so, tesla, 0x1650, 2);
+	so_method(so, tesla, NV50TCL_VP_ATTR_EN_0, 2);
 	so_data  (so, p->cfg.vp.attr[0]);
 	so_data  (so, p->cfg.vp.attr[1]);
-	so_method(so, tesla, 0x16b8, 1);
+	so_method(so, tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
 	so_data  (so, p->cfg.high_result);
-	so_method(so, tesla, 0x16ac, 2);
+	so_method(so, tesla, NV50TCL_VP_RESULT_MAP_SIZE, 2);
 	so_data  (so, p->cfg.high_result); //8);
 	so_data  (so, p->cfg.high_temp);
-	so_method(so, tesla, 0x140c, 1);
+	so_method(so, tesla, NV50TCL_VP_START_ID, 1);
 	so_data  (so, 0); /* program start offset */
 	so_ref(so, &nv50->state.vertprog);
 	so_ref(NULL, &so);
@@ -2437,24 +2437,24 @@ nv50_fragprog_validate(struct nv50_context *nv50)
 		      NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
 		      NOUVEAU_BO_LOW, 0, 0);
-	so_method(so, tesla, 0x1904, 4);
+	so_method(so, tesla, NV50TCL_MAP_SEMANTIC_0, 4);
 	so_data  (so, p->cfg.fp.regs[0]); /* 0x01000404 / 0x00040404 */
 	so_data  (so, 0x00000004);
 	so_data  (so, 0x00000000);
 	so_data  (so, 0x00000000);
-	so_method(so, tesla, 0x16bc, p->cfg.fp.high_map);
+	so_method(so, tesla, NV50TCL_VP_RESULT_MAP(0), p->cfg.fp.high_map);
 	for (i = 0; i < p->cfg.fp.high_map; i++)
 		so_data(so, p->cfg.fp.map[i]);
-	so_method(so, tesla, 0x1988, 2);
+	so_method(so, tesla, NV50TCL_FP_INTERPOLANT_CTRL, 2);
 	so_data  (so, p->cfg.fp.regs[1]); /* 0x08040404 / 0x0f000401 */
 	so_data  (so, p->cfg.high_temp);
-	so_method(so, tesla, 0x1298, 1);
+	so_method(so, tesla, NV50TCL_FP_RESULT_COUNT, 1);
 	so_data  (so, p->cfg.high_result);
-	so_method(so, tesla, 0x19a8, 1);
+	so_method(so, tesla, NV50TCL_FP_CTRL_UNK19A8, 1);
 	so_data  (so, p->cfg.fp.regs[2]);
-	so_method(so, tesla, 0x196c, 1);
+	so_method(so, tesla, NV50TCL_FP_CTRL_UNK196C, 1);
 	so_data  (so, p->cfg.fp.regs[3]);
-	so_method(so, tesla, 0x1414, 1);
+	so_method(so, tesla, NV50TCL_FP_START_ID, 1);
 	so_data  (so, 0); /* program start offset */
 	so_ref(so, &nv50->state.fragprog);
 	so_ref(NULL, &so);
@@ -2479,4 +2479,3 @@ nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p)
 
 	p->translated = 0;
 }
-
diff --git a/src/gallium/drivers/nv50/nv50_query.c b/src/gallium/drivers/nv50/nv50_query.c
index c354e10b0f..5305c93d59 100644
--- a/src/gallium/drivers/nv50/nv50_query.c
+++ b/src/gallium/drivers/nv50/nv50_query.c
@@ -94,7 +94,7 @@ nv50_query_end(struct pipe_context *pipe, struct pipe_query *pq)
 	struct nv50_query *q = nv50_query(pq);
 
 	WAIT_RING (chan, 5);
-	BEGIN_RING(chan, tesla, 0x1b00, 4);
+	BEGIN_RING(chan, tesla, NV50TCL_QUERY_ADDRESS_HIGH, 4);
 	OUT_RELOCh(chan, q->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 	OUT_RELOCl(chan, q->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
 	OUT_RING  (chan, 0x00000000);
diff --git a/src/gallium/drivers/nv50/nv50_screen.c b/src/gallium/drivers/nv50/nv50_screen.c
index e13536e84a..c7f80a2203 100644
--- a/src/gallium/drivers/nv50/nv50_screen.c
+++ b/src/gallium/drivers/nv50/nv50_screen.c
@@ -189,7 +189,8 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	nv50_transfer_init_screen_functions(pscreen);
 
 	/* DMA engine object */
-	ret = nouveau_grobj_alloc(chan, 0xbeef5039, 0x5039, &screen->m2mf);
+	ret = nouveau_grobj_alloc(chan, 0xbeef5039,
+		NV50_MEMORY_TO_MEMORY_FORMAT, &screen->m2mf);
 	if (ret) {
 		NOUVEAU_ERR("Error creating M2MF object: %d\n", ret);
 		nv50_screen_destroy(pscreen);
@@ -198,7 +199,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	BIND_RING(chan, screen->m2mf, 1);
 
 	/* 2D object */
-	ret = nouveau_grobj_alloc(chan, 0xbeef502d, 0x502d, &screen->eng2d);
+	ret = nouveau_grobj_alloc(chan, 0xbeef502d, NV50_2D, &screen->eng2d);
 	if (ret) {
 		NOUVEAU_ERR("Error creating 2D object: %d\n", ret);
 		nv50_screen_destroy(pscreen);
@@ -209,14 +210,15 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	/* 3D object */
 	switch (chipset & 0xf0) {
 	case 0x50:
-		tesla_class = 0x5097;
+		tesla_class = NV50TCL;
 		break;
 	case 0x80:
 	case 0x90:
-		tesla_class = 0x8297;
+		/* this stupid name should be corrected. */
+		tesla_class = NV54TCL;
 		break;
 	case 0xa0:
-		tesla_class = 0x8397;
+		tesla_class = NVA0TCL;
 		break;
 	default:
 		NOUVEAU_ERR("Not a known NV50 chipset: NV%02x\n", chipset);
@@ -230,7 +232,8 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 		return NULL;
 	}
 
-	ret = nouveau_grobj_alloc(chan, 0xbeef5097, tesla_class, &screen->tesla);
+	ret = nouveau_grobj_alloc(chan, 0xbeef5097, tesla_class,
+		&screen->tesla);
 	if (ret) {
 		NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 		nv50_screen_destroy(pscreen);
@@ -248,7 +251,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 
 	/* Static M2MF init */
 	so = so_new(32, 0);
-	so_method(so, screen->m2mf, 0x0180, 3);
+	so_method(so, screen->m2mf, NV04_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 3);
 	so_data  (so, screen->sync->handle);
 	so_data  (so, chan->vram->handle);
 	so_data  (so, chan->vram->handle);
@@ -294,7 +297,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	/* origin is top left (set to 1 for bottom left) */
 	so_method(so, screen->tesla, 0x13ac, 1);
 	so_data  (so, 0);
-	so_method(so, screen->tesla, 0x16b8, 1);
+	so_method(so, screen->tesla, NV50TCL_VP_REG_ALLOC_RESULT, 1);
 	so_data  (so, 8);
 
 	/* constant buffers for immediates and VP/FP parameters */
@@ -332,33 +335,33 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 	so_data  (so, 0x000BBNP1);
 	*/
 
-	so_method(so, screen->tesla, 0x1280, 3);
+	so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->constbuf_misc[0], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_PMISC << 16) | 0x00000800);
-	so_method(so, screen->tesla, 0x1694, 1);
+	so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
 	so_data  (so, 0x00000001 | (NV50_CB_PMISC << 12));
-	so_method(so, screen->tesla, 0x1694, 1);
+	so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
 	so_data  (so, 0x00000031 | (NV50_CB_PMISC << 12));
 
-	so_method(so, screen->tesla, 0x1280, 3);
+	so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->constbuf_parm[0], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_PVP << 16) | 0x00000800);
-	so_method(so, screen->tesla, 0x1694, 1);
+	so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
 	so_data  (so, 0x00000101 | (NV50_CB_PVP << 12));
 
-	so_method(so, screen->tesla, 0x1280, 3);
+	so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->constbuf_parm[1], 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_PFP << 16) | 0x00000800);
-	so_method(so, screen->tesla, 0x1694, 1);
+	so_method(so, screen->tesla, NV50TCL_SET_PROGRAM_CB, 1);
 	so_data  (so, 0x00000131 | (NV50_CB_PFP << 12));
 
 	/* Texture sampler/image unit setup - we abuse the constant buffer
@@ -372,13 +375,13 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 		return NULL;
 	}
 
-	so_method(so, screen->tesla, 0x1280, 3);
+	so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_TIC << 16) | 0x0800);
-	so_method(so, screen->tesla, 0x1574, 3);
+	so_method(so, screen->tesla, NV50TCL_TIC_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
@@ -391,13 +394,13 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 		return NULL;
 	}
 
-	so_method(so, screen->tesla, 0x1280, 3);
+	so_method(so, screen->tesla, NV50TCL_CB_DEF_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 	so_data  (so, (NV50_CB_TSC << 16) | 0x0800);
-	so_method(so, screen->tesla, 0x155c, 3);
+	so_method(so, screen->tesla, NV50TCL_TSC_ADDRESS_HIGH, 3);
 	so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 		  NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 	so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
@@ -407,7 +410,7 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 
 	/* Vertex array limits - max them out */
 	for (i = 0; i < 16; i++) {
-		so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
+		so_method(so, screen->tesla, NV50TCL_UNK1080_OFFSET_HIGH(i), 2);
 		so_data  (so, 0x000000ff);
 		so_data  (so, 0xffffffff);
 	}
diff --git a/src/gallium/drivers/nv50/nv50_state_validate.c b/src/gallium/drivers/nv50/nv50_state_validate.c
index 633be78753..a879df2e6e 100644
--- a/src/gallium/drivers/nv50/nv50_state_validate.c
+++ b/src/gallium/drivers/nv50/nv50_state_validate.c
@@ -55,15 +55,15 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 			      NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
 		switch (fb->cbufs[i]->format) {
 		case PIPE_FORMAT_A8R8G8B8_UNORM:
-			so_data(so, 0xcf);
+			so_data(so, NV50TCL_RT_FORMAT_A8R8G8B8_UNORM);
 			break;
 		case PIPE_FORMAT_R5G6B5_UNORM:
-			so_data(so, 0xe8);
+			so_data(so, NV50TCL_RT_FORMAT_R5G6B5_UNORM);
 			break;
 		default:
 			NOUVEAU_ERR("AIIII unknown format %s\n",
 				    pf_name(fb->cbufs[i]->format));
-			so_data(so, 0xe6);
+			so_data(so, NV50TCL_RT_FORMAT_X8R8G8B8_UNORM);
 			break;
 		}
 		so_data(so, bo->tile_mode << 4);
@@ -115,7 +115,7 @@ nv50_state_validate_fb(struct nv50_context *nv50)
 
 		so_method(so, tesla, 0x1538, 1);
 		so_data  (so, 1);
-		so_method(so, tesla, 0x1228, 3);
+		so_method(so, tesla, NV50TCL_ZETA_HORIZ, 3);
 		so_data  (so, fb->zsbuf->width);
 		so_data  (so, fb->zsbuf->height);
 		so_data  (so, 0x00010001);
@@ -330,9 +330,10 @@ viewport_uptodate:
 		int i;
 
 		so = so_new(nv50->sampler_nr * 8 + 3, 0);
-		so_method(so, tesla, 0x0f00, 1);
+		so_method(so, tesla, NV50TCL_CB_ADDR, 1);
 		so_data  (so, NV50_CB_TSC);
-		so_method(so, tesla, 0x40000f04, nv50->sampler_nr * 8);
+		so_method(so, tesla, NV50TCL_CB_DATA(0) | 0x40000000,
+			nv50->sampler_nr * 8);
 		for (i = 0; i < nv50->sampler_nr; i++)
 			so_datap (so, nv50->sampler[i]->tsc, 8);
 		so_ref(so, &nv50->state.tsc_upload);
diff --git a/src/gallium/drivers/nv50/nv50_tex.c b/src/gallium/drivers/nv50/nv50_tex.c
index 46c3073def..14c68b96e1 100644
--- a/src/gallium/drivers/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nv50/nv50_tex.c
@@ -145,25 +145,28 @@ nv50_tex_validate(struct nv50_context *nv50)
 	push += MAX2(nv50->miptree_nr, nv50->state.miptree_nr) * 2;
 
 	so = so_new(push, nv50->miptree_nr * 2);
-	so_method(so, tesla, 0x0f00, 1);
+	so_method(so, tesla, NV50TCL_CB_ADDR, 1);
 	so_data  (so, NV50_CB_TIC);
 	for (unit = 0; unit < nv50->miptree_nr; unit++) {
 		struct nv50_miptree *mt = nv50->miptree[unit];
 
-		so_method(so, tesla, 0x40000f04, 8);
+		so_method(so, tesla, NV50TCL_CB_DATA(0) | 0x40000000, 8);
 		if (nv50_tex_construct(nv50, so, mt, unit)) {
 			NOUVEAU_ERR("failed tex validate\n");
 			so_ref(NULL, &so);
 			return;
 		}
 
-		so_method(so, tesla, 0x1458, 1);
-		so_data  (so, (unit << 9) | (unit << 1) | 1);
+		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
+		so_data  (so, (unit << NV50TCL_SET_SAMPLER_TEX_TIC_SHIFT) |
+			(unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) |
+			NV50TCL_SET_SAMPLER_TEX_VALID);
 	}
 
 	for (; unit < nv50->state.miptree_nr; unit++) {
-		so_method(so, tesla, 0x1458, 1);
-		so_data  (so, (unit << 1) | 0);
+		so_method(so, tesla, NV50TCL_SET_SAMPLER_TEX, 1);
+		so_data  (so,
+			(unit << NV50TCL_SET_SAMPLER_TEX_SAMPLER_SHIFT) | 0);
 	}
 
 	so_ref(so, &nv50->state.tic_upload);
diff --git a/src/gallium/drivers/nv50/nv50_transfer.c b/src/gallium/drivers/nv50/nv50_transfer.c
index 1c47c30968..d2b5e4d75d 100644
--- a/src/gallium/drivers/nv50/nv50_transfer.c
+++ b/src/gallium/drivers/nv50/nv50_transfer.c
@@ -37,13 +37,16 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen,
 	WAIT_RING (chan, 14);
 
 	if (!src_bo->tile_flags) {
-		BEGIN_RING(chan, m2mf, 0x0200, 1);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_IN, 1);
 		OUT_RING  (chan, 1);
-		BEGIN_RING(chan, m2mf, 0x0314, 1);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_PITCH_IN, 1);
 		OUT_RING  (chan, src_pitch);
 		src_offset += (sy * src_pitch) + (sx * cpp);
 	} else {
-		BEGIN_RING(chan, m2mf, 0x0200, 6);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_IN, 6);
 		OUT_RING  (chan, 0);
 		OUT_RING  (chan, src_tile_mode << 4);
 		OUT_RING  (chan, sw * cpp);
@@ -53,13 +56,16 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen,
 	}
 
 	if (!dst_bo->tile_flags) {
-		BEGIN_RING(chan, m2mf, 0x021c, 1);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_OUT, 1);
 		OUT_RING  (chan, 1);
-		BEGIN_RING(chan, m2mf, 0x0318, 1);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_PITCH_OUT, 1);
 		OUT_RING  (chan, dst_pitch);
 		dst_offset += (dy * dst_pitch) + (dx * cpp);
 	} else {
-		BEGIN_RING(chan, m2mf, 0x021c, 6);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_LINEAR_OUT, 6);
 		OUT_RING  (chan, 0);
 		OUT_RING  (chan, dst_tile_mode << 4);
 		OUT_RING  (chan, dw * cpp);
@@ -72,25 +78,30 @@ nv50_transfer_rect_m2mf(struct pipe_screen *pscreen,
 		int line_count = height > 2047 ? 2047 : height;
 
 		WAIT_RING (chan, 15);
-		BEGIN_RING(chan, m2mf, 0x0238, 2);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN_HIGH, 2);
 		OUT_RELOCh(chan, src_bo, src_offset, src_reloc);
 		OUT_RELOCh(chan, dst_bo, dst_offset, dst_reloc);
-		BEGIN_RING(chan, m2mf, 0x030c, 2);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 2);
 		OUT_RELOCl(chan, src_bo, src_offset, src_reloc);
 		OUT_RELOCl(chan, dst_bo, dst_offset, dst_reloc);
 		if (src_bo->tile_flags) {
-			BEGIN_RING(chan, m2mf, 0x0218, 1);
+			BEGIN_RING(chan, m2mf,
+				NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_IN, 1);
 			OUT_RING  (chan, (sy << 16) | sx);
 		} else {
 			src_offset += (line_count * src_pitch);
 		}
 		if (dst_bo->tile_flags) {
-			BEGIN_RING(chan, m2mf, 0x0234, 1);
+			BEGIN_RING(chan, m2mf,
+				NV50_MEMORY_TO_MEMORY_FORMAT_TILING_POSITION_OUT, 1);
 			OUT_RING  (chan, (dy << 16) | dx);
 		} else {
 			dst_offset += (line_count * dst_pitch);
 		}
-		BEGIN_RING(chan, m2mf, 0x031c, 4);
+		BEGIN_RING(chan, m2mf,
+			NV50_MEMORY_TO_MEMORY_FORMAT_LINE_LENGTH_IN, 4);
 		OUT_RING  (chan, width * cpp);
 		OUT_RING  (chan, line_count);
 		OUT_RING  (chan, 0x00000101);
diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index 422c8c6b5b..17283f3f41 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -265,7 +265,8 @@ nv50_vbo_validate(struct nv50_context *nv50)
 
 	vtxbuf = so_new(nv50->vtxelt_nr * 4, nv50->vtxelt_nr * 2);
 	vtxfmt = so_new(nv50->vtxelt_nr + 1, 0);
-	so_method(vtxfmt, tesla, 0x1ac0, nv50->vtxelt_nr);
+	so_method(vtxfmt, tesla, NV50TCL_VERTEX_ARRAY_ATTRIB(0),
+		nv50->vtxelt_nr);
 
 	for (i = 0; i < nv50->vtxelt_nr; i++) {
 		struct pipe_vertex_element *ve = &nv50->vtxelt[i];
@@ -275,7 +276,7 @@ nv50_vbo_validate(struct nv50_context *nv50)
 
 		so_data(vtxfmt, nv50_vtxeltfmt(ve->src_format) | i);
 
-		so_method(vtxbuf, tesla, 0x900 + (i * 16), 3);
+		so_method(vtxbuf, tesla, NV50TCL_VERTEX_ARRAY_FORMAT(i), 3);
 		so_data  (vtxbuf, 0x20000000 | vb->stride);
 		so_reloc (vtxbuf, bo, vb->buffer_offset +
 			  ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
-- 
cgit v1.2.3


From 97cc526eb7ae17c6ec3509a129863ea85f4e8900 Mon Sep 17 00:00:00 2001
From: Maarten Maathuis <madman2003@gmail.com>
Date: Sun, 16 Aug 2009 04:06:44 +0200
Subject: nv50: borrow some flushing code from the ddx

- This fixes neverball corruption.
- I'm unsure about what we're actually flushing here.
---
 src/gallium/drivers/nv50/nv50_context.c | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c
index a2222d88b9..48f36d6a8b 100644
--- a/src/gallium/drivers/nv50/nv50_context.c
+++ b/src/gallium/drivers/nv50/nv50_context.c
@@ -31,9 +31,17 @@ static void
 nv50_flush(struct pipe_context *pipe, unsigned flags,
 	   struct pipe_fence_handle **fence)
 {
-	struct nv50_context *nv50 = (struct nv50_context *)pipe;
-	
-	FIRE_RING(nv50->screen->base.channel);
+	struct nv50_context *nv50 = nv50_context(pipe);
+	struct nouveau_channel *chan = nv50->screen->base.channel;
+	struct nouveau_grobj *eng2d = nv50->screen->eng2d;
+
+	/* We need this in the ddx for reliable composite, not sure what we're
+	 * actually flushing. We generate all our own flushes with flags = 0. */
+	WAIT_RING(chan, 3);
+	BEGIN_RING(chan, eng2d, 0x0110, 1);
+	OUT_RING  (chan, 0);
+
+	FIRE_RING(chan);
 }
 
 static void
-- 
cgit v1.2.3


From caf40d5d145185d6a4c3ce8ff7c30ec93c040abd Mon Sep 17 00:00:00 2001
From: Maarten Maathuis <madman2003@gmail.com>
Date: Mon, 17 Aug 2009 14:45:50 +0200
Subject: nv50: remove a few cases of directly casting struct pipe_context

---
 src/gallium/drivers/nv50/nv50_context.c | 2 +-
 src/gallium/drivers/nv50/nv50_surface.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

(limited to 'src/gallium/drivers/nv50')

diff --git a/src/gallium/drivers/nv50/nv50_context.c b/src/gallium/drivers/nv50/nv50_context.c
index 48f36d6a8b..6e8f4f9750 100644
--- a/src/gallium/drivers/nv50/nv50_context.c
+++ b/src/gallium/drivers/nv50/nv50_context.c
@@ -47,7 +47,7 @@ nv50_flush(struct pipe_context *pipe, unsigned flags,
 static void
 nv50_destroy(struct pipe_context *pipe)
 {
-	struct nv50_context *nv50 = (struct nv50_context *)pipe;
+	struct nv50_context *nv50 = nv50_context(pipe);
 
 	draw_destroy(nv50->draw);
 	FREE(nv50);
diff --git a/src/gallium/drivers/nv50/nv50_surface.c b/src/gallium/drivers/nv50/nv50_surface.c
index 31c36a12b7..edaf4b055a 100644
--- a/src/gallium/drivers/nv50/nv50_surface.c
+++ b/src/gallium/drivers/nv50/nv50_surface.c
@@ -144,7 +144,7 @@ nv50_surface_copy(struct pipe_context *pipe,
 		  struct pipe_surface *src, unsigned srcx, unsigned srcy,
 		  unsigned width, unsigned height)
 {
-	struct nv50_context *nv50 = (struct nv50_context *)pipe;
+	struct nv50_context *nv50 = nv50_context(pipe);
 	struct nv50_screen *screen = nv50->screen;
 
 	assert(src->format == dest->format);
@@ -158,7 +158,7 @@ nv50_surface_fill(struct pipe_context *pipe, struct pipe_surface *dest,
 		  unsigned destx, unsigned desty, unsigned width,
 		  unsigned height, unsigned value)
 {
-	struct nv50_context *nv50 = (struct nv50_context *)pipe;
+	struct nv50_context *nv50 = nv50_context(pipe);
 	struct nv50_screen *screen = nv50->screen;
 	struct nouveau_channel *chan = screen->eng2d->channel;
 	struct nouveau_grobj *eng2d = screen->eng2d;
-- 
cgit v1.2.3