From af0e6336e9d7dc19d74950ce13b33e1fa1b2081d Mon Sep 17 00:00:00 2001 From: Brian Paul Date: Fri, 16 Jan 2009 16:02:34 -0700 Subject: i965: whitespace changes and reformatting --- src/mesa/drivers/dri/i965/brw_wm_pass2.c | 28 +++++++++++++--------------- 1 file changed, 13 insertions(+), 15 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_wm_pass2.c') diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass2.c b/src/mesa/drivers/dri/i965/brw_wm_pass2.c index 6fca9ad220..780edbc42e 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_pass2.c +++ b/src/mesa/drivers/dri/i965/brw_wm_pass2.c @@ -84,7 +84,7 @@ static void init_registers( struct brw_wm_compile *c ) for (j = 0; j < c->nr_creg; j++) prealloc_reg(c, &c->creg[j], i++); - for (j = 0; j < FRAG_ATTRIB_MAX; j++) + for (j = 0; j < FRAG_ATTRIB_MAX; j++) { if (inputs & (1<payload.input_interp[index], i++); } + } assert(nr_interp_regs >= 1); @@ -120,7 +121,7 @@ static void update_register_usage(struct brw_wm_compile *c, /* Only search those which can change: */ if (grf->nextuse < thisinsn) { - struct brw_wm_ref *ref = grf->value->lastuse; + const struct brw_wm_ref *ref = grf->value->lastuse; /* Has last use of value been passed? */ @@ -148,7 +149,7 @@ static void spill_value(struct brw_wm_compile *c, /* Allocate a spill slot. Note that allocations start from 0x40 - * the first slot is reserved to mean "undef" in brw_wm_emit.c */ - if (!value->spill_slot) { + if (!value->spill_slot) { c->last_scratch += 0x40; value->spill_slot = c->last_scratch; } @@ -189,7 +190,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, if (grf[i+j].nextuse < group_nextuse) group_nextuse = grf[i+j].nextuse; } - + if (group_nextuse > furthest) { furthest = group_nextuse; reg = i; @@ -197,7 +198,7 @@ static GLuint search_contiguous_regs(struct brw_wm_compile *c, } assert(furthest != thisinsn); - + /* Any non-empty regs will need to be spilled: */ for (j = 0; j < nr; j++) @@ -243,7 +244,7 @@ static void alloc_contiguous_dest(struct brw_wm_compile *c, static void load_args(struct brw_wm_compile *c, struct brw_wm_instruction *inst) -{ +{ GLuint thisinsn = inst - c->instruction; GLuint i,j; @@ -258,17 +259,17 @@ static void load_args(struct brw_wm_compile *c, * register allocation and mark the ref as requiring a fill. */ GLuint reg = search_contiguous_regs(c, 1, thisinsn); - + c->pass2_grf[reg].value = ref->value; c->pass2_grf[reg].nextuse = thisinsn; - + ref->value->resident = &c->pass2_grf[reg]; /* Note that a fill is required: */ ref->unspill_reg = reg*2; } - + /* Adjust the hw_reg to point at the value's current location: */ assert(ref->value == ref->value->resident->value); @@ -294,7 +295,7 @@ void brw_wm_pass2( struct brw_wm_compile *c ) for (insn = 0; insn < c->nr_insns; insn++) { struct brw_wm_instruction *inst = &c->instruction[insn]; - + /* Update registers' nextuse values: */ update_register_usage(c, insn); @@ -322,11 +323,11 @@ void brw_wm_pass2( struct brw_wm_compile *c ) break; } - if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) + if (TEST_DST_SPILLS && inst->opcode != WM_PIXELXY) { for (i = 0; i < 4; i++) if (inst->dst[i]) spill_value(c, inst->dst[i]); - + } } if (INTEL_DEBUG & DEBUG_WM) { @@ -339,6 +340,3 @@ void brw_wm_pass2( struct brw_wm_compile *c ) brw_wm_print_program(c, "pass2/done"); } } - - - -- cgit v1.2.3