From bd10f0e84f1491363d76d92dcbd410ab5cc43dbe Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 12 Jun 2009 08:44:40 -0700 Subject: i965: Fix tiling for FBO depth attachments by making DEPTH_COMPONENT Y tiled. This may hurt if miptree relayout occurs, since we can't blit Y tiled objects. But it corrects depth tests on FBOs using textures. --- src/mesa/drivers/dri/intel/intel_regions.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/intel/intel_regions.c') diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 49bcb3c1dd..7c3b483836 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -189,7 +189,7 @@ intel_region_alloc(struct intel_context *intel, pitch, buffer); if (tiling != I915_TILING_NONE) { - assert(((pitch * cpp) & 511) == 0); + assert(((pitch * cpp) & 127) == 0); drm_intel_bo_set_tiling(buffer, &tiling, pitch * cpp); drm_intel_bo_get_tiling(buffer, ®ion->tiling, ®ion->bit_6_swizzle); } -- cgit v1.2.3