From e95e76e1255a3ad0ce604271301d090337b2e82b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Sun, 6 Sep 2009 11:47:40 +0200 Subject: r300/compiler: New dataflow structures and passes This replaces the old NQSSADCE code with the same functionality, but quite different design. Instead of doing a single integerated pass, we now build explicit data structures representing the dataflow. This will enable analysis of flow control instruction, and could potentially open an avenue for several dataflow based optimizations, such as peephole optimization, fusing MUL+ADD to MAD, and so on. --- .../dri/r300/compiler/radeon_dataflow_swizzles.c | 126 +++++++++++++++++++++ 1 file changed, 126 insertions(+) create mode 100644 src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c (limited to 'src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c') diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c new file mode 100644 index 0000000000..1aa91eff7c --- /dev/null +++ b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c @@ -0,0 +1,126 @@ +/* + * Copyright (C) 2009 Nicolai Haehnle. + * + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining + * a copy of this software and associated documentation files (the + * "Software"), to deal in the Software without restriction, including + * without limitation the rights to use, copy, modify, merge, publish, + * distribute, sublicense, and/or sell copies of the Software, and to + * permit persons to whom the Software is furnished to do so, subject to + * the following conditions: + * + * The above copyright notice and this permission notice (including the + * next paragraph) shall be included in all copies or substantial + * portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. + * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE + * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION + * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION + * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include "radeon_dataflow.h" + +#include "radeon_compiler.h" +#include "radeon_swizzle.h" + + +static void rewrite_source(struct radeon_compiler * c, + struct rc_instruction * inst, unsigned src) +{ + struct rc_swizzle_split split; + unsigned int tempreg = rc_find_free_temporary(c); + unsigned int usemask; + struct rc_dataflow_ref * oldref = inst->Dataflow.SrcReg[src]; + struct rc_dataflow_vector * vector = 0; + + usemask = 0; + for(unsigned int chan = 0; chan < 4; ++chan) { + if (GET_SWZ(inst->I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) + usemask |= 1 << chan; + } + + c->SwizzleCaps->Split(inst->I.SrcReg[src], usemask, &split); + + for(unsigned int phase = 0; phase < split.NumPhases; ++phase) { + struct rc_instruction * mov = rc_insert_new_instruction(c, inst->Prev); + unsigned int phase_refmask; + unsigned int masked_negate; + + mov->I.Opcode = RC_OPCODE_MOV; + mov->I.DstReg.File = RC_FILE_TEMPORARY; + mov->I.DstReg.Index = tempreg; + mov->I.DstReg.WriteMask = split.Phase[phase]; + mov->I.SrcReg[0] = inst->I.SrcReg[src]; + + phase_refmask = 0; + for(unsigned int chan = 0; chan < 4; ++chan) { + if (!GET_BIT(split.Phase[phase], chan)) + SET_SWZ(mov->I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); + else + phase_refmask |= 1 << GET_SWZ(mov->I.SrcReg[0].Swizzle, chan); + } + + phase_refmask &= RC_MASK_XYZW; + + masked_negate = split.Phase[phase] & mov->I.SrcReg[0].Negate; + if (masked_negate == 0) + mov->I.SrcReg[0].Negate = 0; + else if (masked_negate == split.Phase[phase]) + mov->I.SrcReg[0].Negate = RC_MASK_XYZW; + + if (oldref) { + mov->Dataflow.SrcReg[0] = rc_dataflow_create_ref(c, oldref->Vector, mov); + mov->Dataflow.SrcReg[0]->UseMask = phase_refmask; + } + + mov->Dataflow.DstReg = rc_dataflow_create_vector(c, RC_FILE_TEMPORARY, tempreg, mov); + mov->Dataflow.DstReg->ValidMask = split.Phase[phase]; + + if (vector) { + mov->Dataflow.DstRegPrev = rc_dataflow_create_ref(c, vector, mov); + mov->Dataflow.DstRegPrev->UseMask = vector->ValidMask; + mov->Dataflow.DstReg->ValidMask |= vector->ValidMask; + mov->Dataflow.DstRegAliased = 1; + } + + mov->Dataflow.DstReg->UseMask = mov->Dataflow.DstReg->ValidMask; + vector = mov->Dataflow.DstReg; + } + + if (oldref) + rc_dataflow_remove_ref(oldref); + inst->Dataflow.SrcReg[src] = rc_dataflow_create_ref(c, vector, inst); + inst->Dataflow.SrcReg[src]->UseMask = usemask; + + inst->I.SrcReg[src].File = RC_FILE_TEMPORARY; + inst->I.SrcReg[src].Index = tempreg; + inst->I.SrcReg[src].Swizzle = 0; + inst->I.SrcReg[src].Negate = RC_MASK_NONE; + inst->I.SrcReg[src].Abs = 0; + for(unsigned int chan = 0; chan < 4; ++chan) { + SET_SWZ(inst->I.SrcReg[src].Swizzle, chan, + GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED); + } +} + +void rc_dataflow_swizzles(struct radeon_compiler * c) +{ + struct rc_instruction * inst; + + for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) { + const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->I.Opcode); + unsigned int src; + + for(src = 0; src < opcode->NumSrcRegs; ++src) { + if (!c->SwizzleCaps->IsNative(inst->I.Opcode, inst->I.SrcReg[src])) + rewrite_source(c, inst, src); + } + } +} -- cgit v1.2.3 From b7cf887ca74561469c144f1d12227e1bcf277e7e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Sat, 3 Oct 2009 21:28:59 +0200 Subject: r300/compiler: Introduce control flow instructions and refactor dataflow MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Note that control flow instruction support isn't actually fully functional yet. Signed-off-by: Nicolai Hähnle --- .../dri/r300/compiler/radeon_dataflow_swizzles.c | 24 ---------------------- 1 file changed, 24 deletions(-) (limited to 'src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c') diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c index 1aa91eff7c..fcef218b59 100644 --- a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c +++ b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c @@ -37,8 +37,6 @@ static void rewrite_source(struct radeon_compiler * c, struct rc_swizzle_split split; unsigned int tempreg = rc_find_free_temporary(c); unsigned int usemask; - struct rc_dataflow_ref * oldref = inst->Dataflow.SrcReg[src]; - struct rc_dataflow_vector * vector = 0; usemask = 0; for(unsigned int chan = 0; chan < 4; ++chan) { @@ -75,30 +73,8 @@ static void rewrite_source(struct radeon_compiler * c, else if (masked_negate == split.Phase[phase]) mov->I.SrcReg[0].Negate = RC_MASK_XYZW; - if (oldref) { - mov->Dataflow.SrcReg[0] = rc_dataflow_create_ref(c, oldref->Vector, mov); - mov->Dataflow.SrcReg[0]->UseMask = phase_refmask; - } - - mov->Dataflow.DstReg = rc_dataflow_create_vector(c, RC_FILE_TEMPORARY, tempreg, mov); - mov->Dataflow.DstReg->ValidMask = split.Phase[phase]; - - if (vector) { - mov->Dataflow.DstRegPrev = rc_dataflow_create_ref(c, vector, mov); - mov->Dataflow.DstRegPrev->UseMask = vector->ValidMask; - mov->Dataflow.DstReg->ValidMask |= vector->ValidMask; - mov->Dataflow.DstRegAliased = 1; - } - - mov->Dataflow.DstReg->UseMask = mov->Dataflow.DstReg->ValidMask; - vector = mov->Dataflow.DstReg; } - if (oldref) - rc_dataflow_remove_ref(oldref); - inst->Dataflow.SrcReg[src] = rc_dataflow_create_ref(c, vector, inst); - inst->Dataflow.SrcReg[src]->UseMask = usemask; - inst->I.SrcReg[src].File = RC_FILE_TEMPORARY; inst->I.SrcReg[src].Index = tempreg; inst->I.SrcReg[src].Swizzle = 0; -- cgit v1.2.3 From 995135479d5662d1b1970c0f233c3c3d944d8b4d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Sun, 4 Oct 2009 11:25:48 +0200 Subject: r300/compiler: Refactor to allow different instruction types MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Nicolai Hähnle --- .../dri/r300/compiler/radeon_dataflow_swizzles.c | 40 +++++++++++----------- 1 file changed, 20 insertions(+), 20 deletions(-) (limited to 'src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c') diff --git a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c index fcef218b59..33acbd30f4 100644 --- a/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c +++ b/src/mesa/drivers/dri/r300/compiler/radeon_dataflow_swizzles.c @@ -40,48 +40,48 @@ static void rewrite_source(struct radeon_compiler * c, usemask = 0; for(unsigned int chan = 0; chan < 4; ++chan) { - if (GET_SWZ(inst->I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) + if (GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan) != RC_SWIZZLE_UNUSED) usemask |= 1 << chan; } - c->SwizzleCaps->Split(inst->I.SrcReg[src], usemask, &split); + c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split); for(unsigned int phase = 0; phase < split.NumPhases; ++phase) { struct rc_instruction * mov = rc_insert_new_instruction(c, inst->Prev); unsigned int phase_refmask; unsigned int masked_negate; - mov->I.Opcode = RC_OPCODE_MOV; - mov->I.DstReg.File = RC_FILE_TEMPORARY; - mov->I.DstReg.Index = tempreg; - mov->I.DstReg.WriteMask = split.Phase[phase]; - mov->I.SrcReg[0] = inst->I.SrcReg[src]; + mov->U.I.Opcode = RC_OPCODE_MOV; + mov->U.I.DstReg.File = RC_FILE_TEMPORARY; + mov->U.I.DstReg.Index = tempreg; + mov->U.I.DstReg.WriteMask = split.Phase[phase]; + mov->U.I.SrcReg[0] = inst->U.I.SrcReg[src]; phase_refmask = 0; for(unsigned int chan = 0; chan < 4; ++chan) { if (!GET_BIT(split.Phase[phase], chan)) - SET_SWZ(mov->I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); + SET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan, RC_SWIZZLE_UNUSED); else - phase_refmask |= 1 << GET_SWZ(mov->I.SrcReg[0].Swizzle, chan); + phase_refmask |= 1 << GET_SWZ(mov->U.I.SrcReg[0].Swizzle, chan); } phase_refmask &= RC_MASK_XYZW; - masked_negate = split.Phase[phase] & mov->I.SrcReg[0].Negate; + masked_negate = split.Phase[phase] & mov->U.I.SrcReg[0].Negate; if (masked_negate == 0) - mov->I.SrcReg[0].Negate = 0; + mov->U.I.SrcReg[0].Negate = 0; else if (masked_negate == split.Phase[phase]) - mov->I.SrcReg[0].Negate = RC_MASK_XYZW; + mov->U.I.SrcReg[0].Negate = RC_MASK_XYZW; } - inst->I.SrcReg[src].File = RC_FILE_TEMPORARY; - inst->I.SrcReg[src].Index = tempreg; - inst->I.SrcReg[src].Swizzle = 0; - inst->I.SrcReg[src].Negate = RC_MASK_NONE; - inst->I.SrcReg[src].Abs = 0; + inst->U.I.SrcReg[src].File = RC_FILE_TEMPORARY; + inst->U.I.SrcReg[src].Index = tempreg; + inst->U.I.SrcReg[src].Swizzle = 0; + inst->U.I.SrcReg[src].Negate = RC_MASK_NONE; + inst->U.I.SrcReg[src].Abs = 0; for(unsigned int chan = 0; chan < 4; ++chan) { - SET_SWZ(inst->I.SrcReg[src].Swizzle, chan, + SET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan, GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED); } } @@ -91,11 +91,11 @@ void rc_dataflow_swizzles(struct radeon_compiler * c) struct rc_instruction * inst; for(inst = c->Program.Instructions.Next; inst != &c->Program.Instructions; inst = inst->Next) { - const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->I.Opcode); + const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); unsigned int src; for(src = 0; src < opcode->NumSrcRegs; ++src) { - if (!c->SwizzleCaps->IsNative(inst->I.Opcode, inst->I.SrcReg[src])) + if (!c->SwizzleCaps->IsNative(inst->U.I.Opcode, inst->U.I.SrcReg[src])) rewrite_source(c, inst, src); } } -- cgit v1.2.3