From 69e57cf6ae0af823e903926bafa8daa46b11352c Mon Sep 17 00:00:00 2001 From: Aapo Tahkola Date: Sun, 11 Mar 2007 11:47:03 +0200 Subject: Guess another unknown register in R300 command buffer initialization. (Oliver McFadden) --- src/mesa/drivers/dri/r300/r300_reg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 69bc994cf6..7bc832c871 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -571,6 +571,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * Some of the tests indicate that fgl has a fallback implementation of zbias * via pixel shaders. */ +#define R300_RE_ZBIAS_CNTL 0x42A0 /* GUESS */ #define R300_RE_ZBIAS_T_FACTOR 0x42A4 #define R300_RE_ZBIAS_T_CONSTANT 0x42A8 #define R300_RE_ZBIAS_W_FACTOR 0x42AC -- cgit v1.2.3 From 0c750ca98de5a08c0fe4c513a741c78b7bab80e3 Mon Sep 17 00:00:00 2001 From: Oliver McFadden Date: Tue, 13 Mar 2007 00:48:17 +0000 Subject: Guess another unknown register used for R300 pacification. --- src/mesa/drivers/dri/r300/r300_reg.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 7bc832c871..be357ab5c7 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -1395,6 +1395,10 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* gap */ +#define R300_RB3D_ZCACHE_CTLSTAT 0x4F18 /* GUESS */ + +/* gap */ + #define R300_RB3D_DEPTHOFFSET 0x4F20 #define R300_RB3D_DEPTHPITCH 0x4F24 # define R300_DEPTHPITCH_MASK 0x00001FF8 /* GUESS */ -- cgit v1.2.3 From 19fbe9732c92ff67911c28bf19c174326af05c84 Mon Sep 17 00:00:00 2001 From: Oliver McFadden Date: Tue, 13 Mar 2007 06:08:36 +0000 Subject: Documented the value written for R300_TX_CNTL cache flush. --- src/mesa/drivers/dri/r300/r300_reg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index be357ab5c7..aa6d81a063 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -497,6 +497,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* Zero to flush caches. */ #define R300_TX_CNTL 0x4100 +#define R300_TX_FLUSH 0x0 /* The upper enable bits are guessed, based on fglrx reported limits. */ #define R300_TX_ENABLE 0x4104 -- cgit v1.2.3 From eb4db4c4ec7efc366b00e1b1f1fe519ca1af79d6 Mon Sep 17 00:00:00 2001 From: Oliver McFadden Date: Tue, 13 Mar 2007 06:24:56 +0000 Subject: Add defines for the values written to R300_RB3D_ZCACHE_CTLSTAT. Note that just like the values written to R300_RB3D_DSTCACHE_CTLSTAT these values are really unknown; ideally more reverse engineering should be done to determine what these values mean and when they should be set. --- src/mesa/drivers/dri/r300/r300_reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index aa6d81a063..f9accadf61 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -1397,6 +1397,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* gap */ #define R300_RB3D_ZCACHE_CTLSTAT 0x4F18 /* GUESS */ +# define R300_RB3D_ZCACHE_CTLSTAT_01 0x1 +# define R300_RB3D_ZCACHE_CTLSTAT_03 0x3 /* gap */ -- cgit v1.2.3 From 4c18d9056b3793a8441ecbfc9c5ea5f2d43555b2 Mon Sep 17 00:00:00 2001 From: Oliver McFadden Date: Tue, 13 Mar 2007 14:46:45 +0000 Subject: r300: Renamed the CACHE_CTLSTAT values to include UNKNOWN in the name; not enough information is known about them to be sure as to what the values mean. --- src/mesa/drivers/dri/r300/r300_reg.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index f9accadf61..3de15752b1 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -1324,8 +1324,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * Set to 0A before 3D operations, set to 02 afterwards. */ #define R300_RB3D_DSTCACHE_CTLSTAT 0x4E4C -# define R300_RB3D_DSTCACHE_02 0x00000002 -# define R300_RB3D_DSTCACHE_0A 0x0000000A +# define R300_RB3D_DSTCACHE_UNKNOWN_02 0x00000002 +# define R300_RB3D_DSTCACHE_UNKNOWN_0A 0x0000000A /* gap */ /* There seems to be no "write only" setting, so use Z-test = ALWAYS @@ -1397,8 +1397,8 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* gap */ #define R300_RB3D_ZCACHE_CTLSTAT 0x4F18 /* GUESS */ -# define R300_RB3D_ZCACHE_CTLSTAT_01 0x1 -# define R300_RB3D_ZCACHE_CTLSTAT_03 0x3 +# define R300_RB3D_ZCACHE_UNKNOWN_01 0x1 +# define R300_RB3D_ZCACHE_UNKNOWN_03 0x3 /* gap */ -- cgit v1.2.3 From 7b430acd71f04dce3e21bdcfe70115a23d751f30 Mon Sep 17 00:00:00 2001 From: Nicolai Haehnle Date: Sun, 18 Mar 2007 02:15:56 +0100 Subject: r300: Fix fragment program instruction pairing and register allocation There were a number of bugs related to the pairing of vector and scalar operations where swizzles ended up using the wrong source register, or an instruction was moved forward and ended up overwriting an aliased register. The new algorithm for register allocation is quite conservative and may run out of registers before necessary. On the plus side, It Just Works. Pairing is done whenever possible, and in more cases than before, so in practice this change should be a net win. --- src/mesa/drivers/dri/r300/r300_reg.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/r300/r300_reg.h') diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index 3de15752b1..1f4a2d2e64 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -1047,7 +1047,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * WRT swizzling. If, for example, you want to load an R component into an * Alpha operand, this R component is taken from a *color* source, not from * an alpha source. The corresponding register doesn't even have to appear in - * the alpha sources list. (I hope this alll makes sense to you) + * the alpha sources list. (I hope this all makes sense to you) * * Destination selection * The destination register index is in FPI1 (color) and FPI3 (alpha) @@ -1074,6 +1074,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_FPI1_SRC2C_SHIFT 12 # define R300_FPI1_SRC2C_MASK (31 << 12) # define R300_FPI1_SRC2C_CONST (1 << 17) +# define R300_FPI1_SRC_MASK 0x0003ffff # define R300_FPI1_DSTC_SHIFT 18 # define R300_FPI1_DSTC_MASK (31 << 18) # define R300_FPI1_DSTC_REG_MASK_SHIFT 23 @@ -1095,6 +1096,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_FPI3_SRC2A_SHIFT 12 # define R300_FPI3_SRC2A_MASK (31 << 12) # define R300_FPI3_SRC2A_CONST (1 << 17) +# define R300_FPI3_SRC_MASK 0x0003ffff # define R300_FPI3_DSTA_SHIFT 18 # define R300_FPI3_DSTA_MASK (31 << 18) # define R300_FPI3_DSTA_REG (1 << 23) -- cgit v1.2.3