From 0926a5f4a110926711d0f8a4eb297dc772b09aa2 Mon Sep 17 00:00:00 2001 From: Pauli Nieminen Date: Sat, 29 Aug 2009 00:46:08 +0300 Subject: radeon: Fix swtcl emit pediction. Problem was to find the correct place to run prediction. Only place that is called for every primitive is ALLOC_VERTS so we have to do prediction there before allocation. --- src/mesa/drivers/dri/radeon/radeon_swtcl.c | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) (limited to 'src/mesa/drivers/dri/radeon/radeon_swtcl.c') diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index 7358e22255..32df569257 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -220,9 +220,8 @@ static void radeonSetVertexFormat( GLcontext *ctx ) } } -static void radeon_predict_emit_size( GLcontext* ctx ) +static void radeon_predict_emit_size( r100ContextPtr rmesa ) { - r100ContextPtr rmesa = R100_CONTEXT( ctx ); if (!rmesa->radeon.swtcl.emit_prediction) { const int state_size = radeonCountStateEmitSize( &rmesa->radeon ); @@ -251,7 +250,6 @@ static void radeonRenderStart( GLcontext *ctx ) if (rmesa->radeon.dma.flush != 0 && rmesa->radeon.dma.flush != rcommon_flush_last_swtcl_prim) rmesa->radeon.dma.flush( ctx ); - radeon_predict_emit_size( ctx ); } @@ -324,7 +322,6 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset) " We might overflow command buffer.\n", rmesa->radeon.cmdbuf.cs->cdw - rmesa->radeon.swtcl.emit_prediction ); - radeon_predict_emit_size( ctx ); rmesa->radeon.swtcl.emit_prediction = 0; @@ -369,6 +366,16 @@ radeonDmaPrimitive( r100ContextPtr rmesa, GLenum prim ) // assert(rmesa->radeon.dma.current.ptr == rmesa->radeon.dma.current.start); } +static void* radeon_alloc_verts( r100ContextPtr rmesa , GLuint nr, GLuint size ) +{ + void *rv; + do { + radeon_predict_emit_size( rmesa ); + rv = rcommonAllocDmaLowVerts( &rmesa->radeon, nr, size ); + } while (!rv); + return rv; +} + #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx) #define INIT( prim ) radeonDmaPrimitive( rmesa, prim ) #define FLUSH() RADEON_NEWPRIM( rmesa ) @@ -376,8 +383,7 @@ radeonDmaPrimitive( r100ContextPtr rmesa, GLenum prim ) // (((int)rmesa->radeon.dma.current.end - (int)rmesa->radeon.dma.current.ptr) / (rmesa->radeon.swtcl.vertex_size*4)) #define GET_SUBSEQUENT_VB_MAX_VERTS() \ ((RADEON_BUFFER_SIZE) / (rmesa->radeon.swtcl.vertex_size*4)) -#define ALLOC_VERTS( nr ) \ - rcommonAllocDmaLowVerts( &rmesa->radeon, nr, rmesa->radeon.swtcl.vertex_size * 4 ) +#define ALLOC_VERTS( nr ) radeon_alloc_verts( rmesa, nr, rmesa->radeon.swtcl.vertex_size * 4 ) #define EMIT_VERTS( ctx, j, nr, buf ) \ _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf) @@ -470,7 +476,7 @@ static void radeonResetLineStipple( GLcontext *ctx ); #undef ALLOC_VERTS #define CTX_ARG r100ContextPtr rmesa #define GET_VERTEX_DWORDS() rmesa->radeon.swtcl.vertex_size -#define ALLOC_VERTS( n, size ) rcommonAllocDmaLowVerts( &rmesa->radeon, n, (size) * 4 ) +#define ALLOC_VERTS( n, size ) radeon_alloc_verts( rmesa, n, (size) * 4 ) #undef LOCAL_VARS #define LOCAL_VARS \ r100ContextPtr rmesa = R100_CONTEXT(ctx); \ -- cgit v1.2.3