From 3149b87ac43a5f10983c6682dff7a00cf1d99c7c Mon Sep 17 00:00:00 2001 From: root Date: Tue, 19 May 2009 16:47:39 -0400 Subject: Makeup checkin for radeon code change paired with r6/7 code. --- src/mesa/drivers/dri/radeon/radeon_bo_drm.h | 28 +++++- src/mesa/drivers/dri/radeon/radeon_bo_legacy.c | 89 ++++++++++++++++--- src/mesa/drivers/dri/radeon/radeon_common.h | 3 + .../drivers/dri/radeon/radeon_common_context.c | 99 +++++++++++++++++++++- .../drivers/dri/radeon/radeon_common_context.h | 4 + src/mesa/drivers/dri/radeon/radeon_dma.c | 8 +- src/mesa/drivers/dri/radeon/radeon_fbo.c | 10 +++ src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c | 8 ++ src/mesa/drivers/dri/radeon/radeon_screen.c | 4 +- src/mesa/drivers/dri/radeon/radeon_texture.c | 1 + 10 files changed, 234 insertions(+), 20 deletions(-) (limited to 'src/mesa/drivers/dri/radeon') diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h index 1ed13f1795..5720957c78 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_drm.h +++ b/src/mesa/drivers/dri/radeon/radeon_bo_drm.h @@ -34,6 +34,10 @@ #include //#include "radeon_track.h" +#ifndef RADEON_DEBUG_BO +#define RADEON_DEBUG_BO 1 +#endif + /* bo object */ #define RADEON_BO_FLAGS_MACRO_TILE 1 #define RADEON_BO_FLAGS_MICRO_TILE 2 @@ -57,12 +61,22 @@ struct radeon_bo { /* bo functions */ struct radeon_bo_funcs { +#ifdef RADEON_DEBUG_BO + struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom, + uint32_t handle, + uint32_t size, + uint32_t alignment, + uint32_t domains, + uint32_t flags, + char * szBufUsage); +#else struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom, uint32_t handle, uint32_t size, uint32_t alignment, uint32_t domains, uint32_t flags); +#endif /* RADEON_DEBUG_BO */ void (*bo_ref)(struct radeon_bo *bo); struct radeon_bo *(*bo_unref)(struct radeon_bo *bo); int (*bo_map)(struct radeon_bo *bo, int write); @@ -95,13 +109,21 @@ static inline struct radeon_bo *_radeon_bo_open(struct radeon_bo_manager *bom, uint32_t alignment, uint32_t domains, uint32_t flags, +#ifdef RADEON_DEBUG_BO + char * szBufUsage, +#endif /* RADEON_DEBUG_BO */ const char *file, const char *func, int line) { struct radeon_bo *bo; +#ifdef RADEON_DEBUG_BO + bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags, szBufUsage); +#else bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags); +#endif /* RADEON_DEBUG_BO */ + #ifdef RADEON_BO_TRACK if (bo) { bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle); @@ -163,9 +185,13 @@ static inline int _radeon_bo_wait(struct radeon_bo *bo, { return bo->bom->funcs->bo_wait(bo); } - +#ifdef RADEON_DEBUG_BO +#define radeon_bo_open(bom, h, s, a, d, f, u)\ + _radeon_bo_open(bom, h, s, a, d, f, u, __FILE__, __FUNCTION__, __LINE__) +#else #define radeon_bo_open(bom, h, s, a, d, f)\ _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__) +#endif /* RADEON_DEBUG_BO */ #define radeon_bo_ref(bo)\ _radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__) #define radeon_bo_unref(bo)\ diff --git a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c index 03a6299ed8..670fa5b604 100644 --- a/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c +++ b/src/mesa/drivers/dri/radeon/radeon_bo_legacy.c @@ -68,6 +68,9 @@ struct bo_legacy { void *ptr; struct bo_legacy *next, *prev; struct bo_legacy *pnext, *pprev; +#ifdef RADEON_DEBUG_BO + char szBufUsage[16]; +#endif /* RADEON_DEBUG_BO */ }; struct bo_manager_legacy { @@ -278,7 +281,12 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml, uint32_t size, uint32_t alignment, uint32_t domains, +#ifdef RADEON_DEBUG_BO + uint32_t flags, + char * szBufUsage) +#else uint32_t flags) +#endif /* RADEON_DEBUG_BO */ { struct bo_legacy *bo_legacy; static int pgsize; @@ -310,6 +318,11 @@ static struct bo_legacy *bo_allocate(struct bo_manager_legacy *boml, if (bo_legacy->next) { bo_legacy->next->prev = bo_legacy; } + +#ifdef RADEON_DEBUG_BO + sprintf(bo_legacy->szBufUsage, "%s", szBufUsage); +#endif /* RADEON_DEBUG_BO */ + return bo_legacy; } @@ -408,7 +421,12 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, uint32_t size, uint32_t alignment, uint32_t domains, +#ifdef RADEON_DEBUG_BO + uint32_t flags, + char * szBufUsage) +#else uint32_t flags) +#endif /* RADEON_DEBUG_BO */ { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bom; struct bo_legacy *bo_legacy; @@ -425,29 +443,37 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, } return NULL; } - +#ifdef RADEON_DEBUG_BO + bo_legacy = bo_allocate(boml, size, alignment, domains, flags, szBufUsage); +#else bo_legacy = bo_allocate(boml, size, alignment, domains, flags); +#endif /* RADEON_DEBUG_BO */ bo_legacy->static_bo = 0; r = legacy_new_handle(boml, &bo_legacy->base.handle); if (r) { bo_free(bo_legacy); return NULL; } - if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT) { - retry: + if (bo_legacy->base.domains & RADEON_GEM_DOMAIN_GTT) + { +retry: legacy_track_pending(boml, 0); /* dma buffers */ r = bo_dma_alloc(&(bo_legacy->base)); - if (r) { - if (legacy_wait_any_pending(boml) == -1) { - bo_free(bo_legacy); - return NULL; - } - goto retry; - return NULL; + if (r) + { + if (legacy_wait_any_pending(boml) == -1) + { + bo_free(bo_legacy); + return NULL; + } + goto retry; + return NULL; } - } else { + } + else + { bo_legacy->ptr = malloc(bo_legacy->base.size); if (bo_legacy->ptr == NULL) { bo_free(bo_legacy); @@ -455,6 +481,7 @@ static struct radeon_bo *bo_open(struct radeon_bo_manager *bom, } } radeon_bo_ref(&(bo_legacy->base)); + return (struct radeon_bo*)bo_legacy; } @@ -483,7 +510,7 @@ static int bo_map(struct radeon_bo *bo, int write) { struct bo_manager_legacy *boml = (struct bo_manager_legacy *)bo->bom; struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; - + legacy_wait_pending(bo); bo_legacy->validated = 0; bo_legacy->dirty = 1; @@ -509,6 +536,7 @@ static int bo_map(struct radeon_bo *bo, int write) volatile int *buf = (int*)boml->screen->driScreen->pFB; p = *buf; } + return 0; } @@ -516,10 +544,13 @@ static int bo_unmap(struct radeon_bo *bo) { struct bo_legacy *bo_legacy = (struct bo_legacy*)bo; - if (--bo_legacy->map_count > 0) { + if (--bo_legacy->map_count > 0) + { return 0; } + bo->ptr = NULL; + return 0; } @@ -632,13 +663,20 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, int retries = 0; if (bo_legacy->map_count) { +#ifdef RADEON_DEBUG_BO + fprintf(stderr, "bo(%p, %d, %s) is mapped (%d) can't valide it.\n", + bo, bo->size, bo_legacy->szBufUsage, bo_legacy->map_count); +#else fprintf(stderr, "bo(%p, %d) is mapped (%d) can't valide it.\n", bo, bo->size, bo_legacy->map_count); +#endif /* RADEON_DEBUG_BO */ + return -EINVAL; } if (bo_legacy->static_bo || bo_legacy->validated) { *soffset = bo_legacy->offset; *eoffset = bo_legacy->offset + bo->size; + return 0; } if (!(bo->domains & RADEON_GEM_DOMAIN_GTT)) { @@ -659,6 +697,7 @@ int radeon_bo_legacy_validate(struct radeon_bo *bo, *soffset = bo_legacy->offset; *eoffset = bo_legacy->offset + bo->size; bo_legacy->validated = 1; + return 0; } @@ -703,11 +742,21 @@ void radeon_bo_manager_legacy_dtor(struct radeon_bo_manager *bom) } static struct bo_legacy *radeon_legacy_bo_alloc_static(struct bo_manager_legacy *bom, - int size, uint32_t offset) + int size, +#ifdef RADEON_DEBUG_BO + uint32_t offset, + char * szBufUsage) +#else + uint32_t offset) +#endif /* RADEON_DEBUG_BO */ { struct bo_legacy *bo; +#ifdef RADEON_DEBUG_BO + bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0, szBufUsage); +#else bo = bo_allocate(bom, size, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ if (bo == NULL) return NULL; bo->static_bo = 1; @@ -768,7 +817,11 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc size = 4096*4096*4; /* allocate front */ +#ifdef RADEON_DEBUG_BO + bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset, "FRONT BUF"); +#else bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->frontOffset); +#endif /* RADEON_DEBUG_BO */ if (!bo) { radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom); return NULL; @@ -778,7 +831,11 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc } /* allocate back */ +#ifdef RADEON_DEBUG_BO + bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset, "BACK BUF"); +#else bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->backOffset); +#endif /* RADEON_DEBUG_BO */ if (!bo) { radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom); return NULL; @@ -788,7 +845,11 @@ struct radeon_bo_manager *radeon_bo_manager_legacy_ctor(struct radeon_screen *sc } /* allocate depth */ +#ifdef RADEON_DEBUG_BO + bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset, "Z BUF"); +#else bo = radeon_legacy_bo_alloc_static(bom, size, bom->screen->depthOffset); +#endif /* RADEON_DEBUG_BO */ if (!bo) { radeon_bo_manager_legacy_dtor((struct radeon_bo_manager*)bom); return NULL; diff --git a/src/mesa/drivers/dri/radeon/radeon_common.h b/src/mesa/drivers/dri/radeon/radeon_common.h index c2fbb0950d..dcfd5a67e2 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.h +++ b/src/mesa/drivers/dri/radeon/radeon_common.h @@ -5,6 +5,9 @@ #include "radeon_dma.h" #include "radeon_texture.h" +#ifndef RADEON_DEBUG_BO +#define RADEON_DEBUG_BO 1 +#endif #define TRI_CLEAR_COLOR_BITS (BUFFER_BIT_BACK_LEFT | \ BUFFER_BIT_FRONT_LEFT | \ diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 30c858fce0..409825182e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -227,7 +227,8 @@ void radeonDestroyContext(__DRIcontextPrivate *driContextPriv ) } assert(radeon); - if (radeon) { + if (radeon) + { #if RADEON_COMMON && defined(RADEON_COMMON_FOR_R600) /* +r6/r7 */ if (IS_R600_CLASS(screen)) @@ -306,48 +307,88 @@ radeon_make_kernel_renderbuffer_current(radeonContextPtr radeon, if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->frontOffset, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Front Buf"); +#else rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->frontOffset, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->backOffset, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Back Buf"); +#else + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->backOffset, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->backPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->depthOffset, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Z Buf"); +#else rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->depthOffset, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Stencil Buf"); +#else rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset, 0, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; @@ -370,6 +411,16 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, if ((rb = (void *)draw->base.Attachment[BUFFER_FRONT_LEFT].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->frontOffset + + radeon->radeonScreen->fbLocation, + size, + 4096, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Front Buf"); +#else rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->frontOffset + radeon->radeonScreen->fbLocation, @@ -377,12 +428,23 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, 4096, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->frontPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->backOffset + + radeon->radeonScreen->fbLocation, + size, + 4096, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Back Buf"); +#else rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->backOffset + radeon->radeonScreen->fbLocation, @@ -390,32 +452,55 @@ radeon_make_renderbuffer_current(radeonContextPtr radeon, 4096, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->backPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_DEPTH].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->depthOffset + + radeon->radeonScreen->fbLocation, + size, + 4096, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Z Buf"); +#else + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset + radeon->radeonScreen->fbLocation, size, 4096, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; } if ((rb = (void *)draw->base.Attachment[BUFFER_STENCIL].Renderbuffer)) { if (!rb->bo) { +#ifdef RADEON_DEBUG_BO rb->bo = radeon_bo_open(radeon->radeonScreen->bom, + radeon->radeonScreen->depthOffset + + radeon->radeonScreen->fbLocation, + size, + 4096, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Stencil Buf"); +#else + rb->bo = radeon_bo_open(radeon->radeonScreen->bom, radeon->radeonScreen->depthOffset + radeon->radeonScreen->fbLocation, size, 4096, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ } rb->cpp = radeon->radeonScreen->cpp; rb->pitch = radeon->radeonScreen->depthPitch * rb->cpp; @@ -529,12 +614,22 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) bo = depth_bo; radeon_bo_ref(bo); } else { +#ifdef RADEON_DEBUG_BO + bo = radeon_bo_open(radeon->radeonScreen->bom, + buffers[i].name, + 0, + 0, + RADEON_GEM_DOMAIN_VRAM, + buffers[i].flags, + regname); +#else bo = radeon_bo_open(radeon->radeonScreen->bom, buffers[i].name, 0, 0, RADEON_GEM_DOMAIN_VRAM, buffers[i].flags); +#endif /* RADEON_DEBUG_BO */ if (bo == NULL) { fprintf(stderr, "failed to attach %s %d\n", @@ -591,7 +686,6 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, radeon_make_renderbuffer_current(radeon, drfb); } - if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb); @@ -636,6 +730,7 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, if (RADEON_DEBUG & DEBUG_DRI) fprintf(stderr, "End %s\n", __FUNCTION__); + return GL_TRUE; } diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index d32e5af544..233a150d42 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -560,4 +560,8 @@ extern int RADEON_DEBUG; #define RADEON_DEBUG 0 #endif +#ifndef RADEON_DEBUG_BO +#define RADEON_DEBUG_BO 1 +#endif + #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index 5ffee86e5a..db96269337 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -184,10 +184,16 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) rmesa->dma.current = 0; } -again_alloc: +again_alloc: +#ifdef RADEON_DEBUG_BO + rmesa->dma.current = radeon_bo_open(rmesa->radeonScreen->bom, + 0, size, 4, RADEON_GEM_DOMAIN_GTT, + 0, "dma.current"); +#else rmesa->dma.current = radeon_bo_open(rmesa->radeonScreen->bom, 0, size, 4, RADEON_GEM_DOMAIN_GTT, 0); +#endif /* RADEON_DEBUG_BO */ if (!rmesa->dma.current) { rcommonFlushCmdBuf(rmesa, __FUNCTION__); diff --git a/src/mesa/drivers/dri/radeon/radeon_fbo.c b/src/mesa/drivers/dri/radeon/radeon_fbo.c index b2585eae77..8fa665e49c 100644 --- a/src/mesa/drivers/dri/radeon/radeon_fbo.c +++ b/src/mesa/drivers/dri/radeon/radeon_fbo.c @@ -184,12 +184,22 @@ radeon_alloc_renderbuffer_storage(GLcontext * ctx, struct gl_renderbuffer *rb, rrb->pitch = pitch * cpp; rrb->cpp = cpp; +#ifdef RADEON_DEBUG_BO + rrb->bo = radeon_bo_open(radeon->radeonScreen->bom, + 0, + size, + 0, + RADEON_GEM_DOMAIN_VRAM, + 0, + "Radeon RBO"); +#else rrb->bo = radeon_bo_open(radeon->radeonScreen->bom, 0, size, 0, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ rb->Width = width; rb->Height = height; return GL_TRUE; diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 34d6261706..0a33fe4afa 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -183,10 +183,18 @@ radeon_mipmap_tree* radeon_miptree_create(radeonContextPtr rmesa, radeonTexObj * calculate_miptree_layout(mt); +#ifdef RADEON_DEBUG_BO + mt->bo = radeon_bo_open(rmesa->radeonScreen->bom, + 0, mt->totalsize, 1024, + RADEON_GEM_DOMAIN_VRAM, + 0, + "MIPMAP TREE"); +#else mt->bo = radeon_bo_open(rmesa->radeonScreen->bom, 0, mt->totalsize, 1024, RADEON_GEM_DOMAIN_VRAM, 0); +#endif /* RADEON_DEBUG_BO */ return mt; } diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index 1d26e2c40a..40487c66e3 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -61,7 +61,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "r300_tex.h" #elif RADEON_COMMON && defined(RADEON_COMMON_FOR_R600) #include "r600_context.h" -//#include "r700_driconf.h" /* +r6/r7 */ +#include "r700_driconf.h" /* +r6/r7 */ #include "r700_tex.h" /* +r6/r7 */ #endif @@ -1086,7 +1086,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv ) screen->AGPMode = dri_priv->AGPMode; ret = radeonGetParam(sPriv, RADEON_PARAM_FB_LOCATION, &temp); - + /* +r6/r7 */ if(screen->chip_family >= CHIP_FAMILY_R600) { diff --git a/src/mesa/drivers/dri/radeon/radeon_texture.c b/src/mesa/drivers/dri/radeon/radeon_texture.c index 35ed542431..64029eeb91 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texture.c +++ b/src/mesa/drivers/dri/radeon/radeon_texture.c @@ -929,6 +929,7 @@ int radeon_validate_texture_miptree(GLcontext * ctx, struct gl_texture_object *t if (t->mt == image->mt) { if (RADEON_DEBUG & DEBUG_TEXTURE) fprintf(stderr, "OK\n"); + continue; } -- cgit v1.2.3