diff options
author | Lars-Peter Clausen <lars@metafoo.de> | 2009-07-05 13:03:14 +0200 |
---|---|---|
committer | Lars-Peter Clausen <lars@metafoo.de> | 2009-07-05 13:03:14 +0200 |
commit | 74b16fcdba85a6f851ffe2ecb63a0f16235285a0 (patch) | |
tree | 700cbedd856f286ae8668ff3b6b57a295af64af9 /src | |
parent | 69ccc9307c6b6a1aeb1f51ea732af20d52a66685 (diff) |
Implement support for engine ioctls. The glamo Xorg driver should only touch
cmdq or 2d registers, so we enable/disable engines through framebuffer ioctls.
This needs support from the kernel side.
Diffstat (limited to 'src')
-rw-r--r-- | src/glamo-driver.c | 10 | ||||
-rw-r--r-- | src/glamo-engine.c | 27 | ||||
-rw-r--r-- | src/glamo-engine.h | 9 | ||||
-rw-r--r-- | src/glamo-regs.h | 6 | ||||
-rw-r--r-- | src/glamo.h | 4 |
5 files changed, 55 insertions, 1 deletions
diff --git a/src/glamo-driver.c b/src/glamo-driver.c index a280f98..6d0c6a4 100644 --- a/src/glamo-driver.c +++ b/src/glamo-driver.c @@ -743,7 +743,9 @@ fail2: static void GlamoSaveHW(ScrnInfoPtr pScrn) { GlamoPtr pGlamo = GlamoPTR(pScrn); +#ifndef HAS_ENGINE_IOCTLS volatile char *mmio = pGlamo->reg_base; +#endif #if JBT6K74_SET_STATE int fd; @@ -758,11 +760,13 @@ GlamoSaveHW(ScrnInfoPtr pScrn) { } #endif +#ifndef HAS_ENGINE_IOCTLS pGlamo->saved_clock_2d = MMIO_IN16(mmio, GLAMO_REG_CLOCK_2D); pGlamo->saved_clock_isp = MMIO_IN16(mmio, GLAMO_REG_CLOCK_ISP); pGlamo->saved_clock_gen5_1 = MMIO_IN16(mmio, GLAMO_REG_CLOCK_GEN5_1); pGlamo->saved_clock_gen5_2 = MMIO_IN16(mmio, GLAMO_REG_CLOCK_GEN5_2); pGlamo->saved_hostbus_2 = MMIO_IN16(mmio, GLAMO_REG_HOSTBUS(2)); +#endif if (ioctl(pGlamo->fb_fd, FBIOGET_VSCREENINFO, (void*)(&pGlamo->fb_saved_var)) == -1) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, @@ -774,15 +778,20 @@ GlamoSaveHW(ScrnInfoPtr pScrn) { static void GlamoRestoreHW(ScrnInfoPtr pScrn) { GlamoPtr pGlamo = GlamoPTR(pScrn); +#ifndef HAS_ENGINE_IOCTLS volatile char *mmio = pGlamo->reg_base; +#endif #ifdef JBT6K74_SET_STATE int fd; #endif + if (ioctl(pGlamo->fb_fd, FBIOPUT_VSCREENINFO, (void*)(&pGlamo->fb_saved_var)) == -1) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Framebuffer ioctl FBIOSET_FSCREENINFO failed: %s", strerror(errno)); } + +#ifndef HAS_ENGINE_IOCTLS MMIOSetBitMask(mmio, GLAMO_REG_CLOCK_2D, GLAMO_CLOCK_2D_EN_M6CLK | GLAMO_CLOCK_2D_EN_M7CLK | GLAMO_CLOCK_2D_EN_GCLK | GLAMO_CLOCK_2D_DG_M7CLK | @@ -794,6 +803,7 @@ GlamoRestoreHW(ScrnInfoPtr pScrn) { MMIOSetBitMask(mmio, GLAMO_REG_HOSTBUS(2), GLAMO_HOSTBUS2_MMIO_EN_CMDQ | GLAMO_HOSTBUS2_MMIO_EN_2D, pGlamo->saved_hostbus_2); +#endif #ifdef JBT6K74_SET_STATE fd = open(pGlamo->jbt6k74_state_path, O_WRONLY); diff --git a/src/glamo-engine.c b/src/glamo-engine.c index 81e68a1..6bb4da5 100644 --- a/src/glamo-engine.c +++ b/src/glamo-engine.c @@ -26,9 +26,21 @@ #include "glamo-engine.h" #include "glamo-regs.h" +#ifdef HAS_ENGINE_IOCTLS +# include <linux/types.h> +# include <sys/ioctl.h> +# include <errno.h> +#endif + void GLAMOEngineReset(GlamoPtr pGlamo, enum GLAMOEngine engine) { +#ifdef HAS_ENGINE_IOCTLS + if (ioctl(pGlamo->fb_fd, GLAMOFB_ENGINE_RESET, (void*)((__u32)engine)) == -1) + xf86DrvMsg(xf86Screens[pGlamo->pScreen->myNum]->scrnIndex, X_ERROR, + "Framebuffer ioctl GLAMOFB_ENGINE_RESET failed: %s\n", + strerror(errno)); +#else CARD32 reg; CARD16 mask; volatile char *mmio = pGlamo->reg_base; @@ -57,11 +69,18 @@ GLAMOEngineReset(GlamoPtr pGlamo, enum GLAMOEngine engine) sleep(1); MMIOSetBitMask(mmio, reg, mask, 0); sleep(1); +#endif } void GLAMOEngineDisable(GlamoPtr pGlamo, enum GLAMOEngine engine) { +#ifdef HAS_ENGINE_IOCTLS + if (ioctl(pGlamo->fb_fd, GLAMOFB_ENGINE_DISABLE, (void*)((__u32)engine)) == -1) + xf86DrvMsg(xf86Screens[pGlamo->pScreen->myNum]->scrnIndex, X_ERROR, + "Framebuffer ioctl GLAMOFB_ENGINE_DISABLE failed: %s\n", + strerror(errno)); +#else volatile char *mmio = pGlamo->reg_base; if (!mmio) @@ -108,11 +127,18 @@ GLAMOEngineDisable(GlamoPtr pGlamo, enum GLAMOEngine engine) default: break; } +#endif } void GLAMOEngineEnable(GlamoPtr pGlamo, enum GLAMOEngine engine) { +#ifdef HAS_ENGINE_IOCTLS + if (ioctl(pGlamo->fb_fd, GLAMOFB_ENGINE_ENABLE, (void*)((__u32)engine)) == -1) + xf86DrvMsg(xf86Screens[pGlamo->pScreen->myNum]->scrnIndex, X_ERROR, + "Framebuffer ioctl GLAMOFB_ENGINE_ENABLE failed: %s\n", + strerror(errno)); +#else volatile char *mmio = pGlamo->reg_base; if (!mmio) @@ -162,6 +188,7 @@ GLAMOEngineEnable(GlamoPtr pGlamo, enum GLAMOEngine engine) default: break; } +#endif } bool diff --git a/src/glamo-engine.h b/src/glamo-engine.h index 187fa1f..efba199 100644 --- a/src/glamo-engine.h +++ b/src/glamo-engine.h @@ -21,6 +21,13 @@ #include <stdbool.h> +#ifdef HAS_ENGINE_IOCTLS +#include <linux/glamofb.h> + +typedef GLAMOEngine glamo_engine; + +#else + enum GLAMOEngine { GLAMO_ENGINE_CMDQ, GLAMO_ENGINE_ISP, @@ -29,6 +36,7 @@ enum GLAMOEngine { GLAMO_ENGINE_ALL, NB_GLAMO_ENGINES /*should be the last entry*/ }; +#endif /* #ifdef HAS_ENGINE_IOCTLS */ void GLAMOEngineEnable(GlamoPtr pGlamo, enum GLAMOEngine engine); @@ -45,4 +53,3 @@ GLAMOEngineBusy(GlamoPtr pGlamo, enum GLAMOEngine engine); void GLAMOEngineWait(GlamoPtr pGlamo, enum GLAMOEngine engine); - diff --git a/src/glamo-regs.h b/src/glamo-regs.h index 18a84d7..6023dba 100644 --- a/src/glamo-regs.h +++ b/src/glamo-regs.h @@ -23,6 +23,8 @@ * MA 02111-1307 USA */ + + enum glamo_regster_offsets { GLAMO_REGOFS_GENERIC = 0x0000, GLAMO_REGOFS_HOSTBUS = 0x0200, @@ -41,6 +43,8 @@ enum glamo_regster_offsets { GLAMO_REGOFS_3D = 0x1b00, }; +/* The Xorg driver is only allowed to touch 2D engine and cmdq engine registers */ +#ifndef HAS_ENGINE_ENABLE_IOCTL enum glamo_register_generic { GLAMO_REG_GCONF1 = 0x0000, @@ -723,6 +727,8 @@ enum glamo_register_mpeg { GLAMO_REG_MPEG_DEC_RB1 = REG_MPEG(0xcc), }; +#endif /* #ifndef HAS_ENGINE_IOCTLS */ + #define REG_CMDQ(x) (GLAMO_REGOFS_CMDQUEUE+(x)) enum glamo_register_cq { diff --git a/src/glamo.h b/src/glamo.h index 6155259..704862f 100644 --- a/src/glamo.h +++ b/src/glamo.h @@ -38,6 +38,8 @@ #include "exa.h" #include <linux/fb.h> +#define HAS_ENGINE_IOCTLS + #define GLAMO_REG_BASE(c) ((c)->attr.address[0]) #define GLAMO_REG_SIZE(c) (0x2400) @@ -118,12 +120,14 @@ typedef struct { unsigned char *fbmem; int fboff; +#ifndef HAS_ENGINE_IOCTLS /* save hardware registers */ short saved_clock_2d; short saved_clock_isp; short saved_clock_gen5_1; short saved_clock_gen5_2; short saved_hostbus_2; +#endif #ifdef JBT6K74_SET_STATE char *jbt6k74_state_path; |