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author | Chris Zankel <chris@zankel.net> | 2007-08-22 10:14:51 -0700 |
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committer | Chris Zankel <chris@zankel.net> | 2007-08-27 13:54:16 -0700 |
commit | 6656920b0b50beacb6cb64cf55273cbb686e436e (patch) | |
tree | dab9fdb81821b455a29779de6ca3306dbdf05dbd /.mailmap | |
parent | ff6fd469885aafa5ec387babcb6537f3c00d6df0 (diff) |
[XTENSA] Add support for cache-aliasing
Add support for processors that have cache-aliasing issues, such as
the Stretch S5000 processor. Cache-aliasing means that the size of
the cache (for one way) is larger than the page size, thus, a page
can end up in several places in cache depending on the virtual to
physical translation. The method used here is to map a user page
temporarily through the auto-refill way 0 and of of the DTLB.
We probably will want to revisit this issue and use a better
approach with kmap/kunmap.
Signed-off-by: Chris Zankel <chris@zankel.net>
Diffstat (limited to '.mailmap')
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