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authorBecky Bruce <beckyb@kernel.crashing.org>2009-04-20 11:26:48 -0500
committerKumar Gala <galak@kernel.crashing.org>2009-05-19 00:46:22 -0500
commit89d93347d1f66832c43e6b25a669fddff89929b5 (patch)
tree848b3dbba4384bd3842f42ea35e107b21c0f66bb
parentda385780489db4f55dad96609511a9a6d1b041cb (diff)
powerpc: make dma_window_* in pci_controller struct avail on 32b
Also, convert them to resource_size_t (which is unsigned long on 64-bit, so it's not a change there). We will be using these on fsl 32b to indicate the start and size address of memory that the pci controller can actually reach - this is needed to determine if an address requires bounce buffering. For now, initialize them to a standard value; in the near future, the value will be calculated based on how the inbound windows are programmed. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Acked-by: Ben Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/include/asm/pci-bridge.h6
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c4
2 files changed, 8 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 84007afabdb..9861258f6a4 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -140,10 +140,12 @@ struct pci_controller {
struct resource io_resource;
struct resource mem_resources[3];
int global_number; /* PCI domain number */
+
+ resource_size_t dma_window_base_cur;
+ resource_size_t dma_window_size;
+
#ifdef CONFIG_PPC64
unsigned long buid;
- unsigned long dma_window_base_cur;
- unsigned long dma_window_size;
void *private_data;
#endif /* CONFIG_PPC64 */
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 78021d8afc5..376603df7c4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -152,6 +152,10 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
out_be32(&pci->piw[2].piwbar,0x00000000);
out_be32(&pci->piw[2].piwar, PIWAR_2G);
+ /* Save the base address and size covered by inbound window mappings */
+ hose->dma_window_base_cur = 0x00000000;
+ hose->dma_window_size = 0x80000000;
+
iounmap(pci);
}