diff options
| author | Sam Ravnborg <sam@ravnborg.org> | 2008-07-17 21:55:51 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-07-17 21:55:51 -0700 |
| commit | f5e706ad886b6a5eb59637830110b09ccebf01c5 (patch) | |
| tree | ea043a0a28e16a2ac6395c35d737f52698a165b7 | |
| parent | 5e3609f60c09f0f15f71f80c6d7933b2c7be71a6 (diff) | |
sparc: join the remaining header files
With this commit all sparc64 header files are moved to asm-sparc.
The remaining files (71 files) were too different to be trivially
merged so divide them up in a _32.h and a _64.h file which
are both included from the file with no bit size.
The following script were used:
cd include
FILES=`wc -l asm-sparc64/*h | grep -v '^ 1' | cut -b 20-`
for FILE in ${FILES}; do
echo $FILE:
BASE=`echo $FILE | cut -d '.' -f 1`
FN32=${BASE}_32.h
FN64=${BASE}_64.h
GUARD=___ASM_SPARC_`echo $BASE | tr '-' '_' | tr [:lower:] [:upper:]`_H
git mv asm-sparc/$FILE asm-sparc/$FN32
git mv asm-sparc64/$FILE asm-sparc/$FN64
echo git mv done
printf "#ifndef %s\n" $GUARD > asm-sparc/$FILE
printf "#define %s\n" $GUARD >> asm-sparc/$FILE
printf "#if defined(__sparc__) && defined(__arch64__)\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN64 >> asm-sparc/$FILE
printf "#else\n" >> asm-sparc/$FILE
printf "#include <asm-sparc/%s>\n" $FN32 >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
printf "#endif\n" >> asm-sparc/$FILE
git add asm-sparc/$FILE
echo new file done
printf "#include <asm-sparc/%s>\n" $FILE > asm-sparc64/$FILE
git add asm-sparc64/$FILE
echo sparc64 file done
done
The guard contains three '_' to avoid conflict with existing guards.
In additing the two Kbuild files are emptied to avoid breaking
headers_* targets.
We will reintroduce the exported header files when the necessary
kbuild changes are merged.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
254 files changed, 17513 insertions, 16987 deletions
diff --git a/include/asm-sparc/Kbuild b/include/asm-sparc/Kbuild index c83e3c0aa30..6cdaf9d33b3 100644 --- a/include/asm-sparc/Kbuild +++ b/include/asm-sparc/Kbuild @@ -1,22 +1 @@ -include include/asm-generic/Kbuild.asm - -header-y += apc.h -header-y += asi.h -header-y += bpp.h -header-y += display7seg.h -header-y += envctrl.h -header-y += jsflash.h -header-y += openprom.h -header-y += openpromio.h -header-y += psrcompat.h -header-y += pstate.h -header-y += reg.h -header-y += traps.h -header-y += uctx.h -header-y += utrap.h -header-y += vfc_ioctls.h -header-y += watchdog.h - -unifdef-y += fbio.h -unifdef-y += perfctr.h -unifdef-y += psr.h +# dummy file to avoid breaking make headers_install diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h index 5c944b5a804..66d8166ec1d 100644 --- a/include/asm-sparc/atomic.h +++ b/include/asm-sparc/atomic.h @@ -1,165 +1,8 @@ -/* atomic.h: These still suck, but the I-cache hit rate is higher. - * - * Copyright (C) 1996 David S. Miller (davem@davemloft.net) - * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) - * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org) - * - * Additions by Keith M Wesolowski (wesolows@foobazco.org) based - * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. - */ - -#ifndef __ARCH_SPARC_ATOMIC__ -#define __ARCH_SPARC_ATOMIC__ - -#include <linux/types.h> - -typedef struct { volatile int counter; } atomic_t; - -#ifdef __KERNEL__ - -#define ATOMIC_INIT(i) { (i) } - -extern int __atomic_add_return(int, atomic_t *); -extern int atomic_cmpxchg(atomic_t *, int, int); -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) -extern int atomic_add_unless(atomic_t *, int, int); -extern void atomic_set(atomic_t *, int); - -#define atomic_read(v) ((v)->counter) - -#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) -#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) -#define atomic_inc(v) ((void)__atomic_add_return( 1, (v))) -#define atomic_dec(v) ((void)__atomic_add_return( -1, (v))) - -#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v))) -#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v))) -#define atomic_inc_return(v) (__atomic_add_return( 1, (v))) -#define atomic_dec_return(v) (__atomic_add_return( -1, (v))) - -#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) - -#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) -#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -/* This is the old 24-bit implementation. It's still used internally - * by some sparc-specific code, notably the semaphore implementation. - */ -typedef struct { volatile int counter; } atomic24_t; - -#ifndef CONFIG_SMP - -#define ATOMIC24_INIT(i) { (i) } -#define atomic24_read(v) ((v)->counter) -#define atomic24_set(v, i) (((v)->counter) = i) - +#ifndef ___ASM_SPARC_ATOMIC_H +#define ___ASM_SPARC_ATOMIC_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/atomic_64.h> #else -/* We do the bulk of the actual work out of line in two common - * routines in assembler, see arch/sparc/lib/atomic.S for the - * "fun" details. - * - * For SMP the trick is you embed the spin lock byte within - * the word, use the low byte so signedness is easily retained - * via a quick arithmetic shift. It looks like this: - * - * ---------------------------------------- - * | signed 24-bit counter value | lock | atomic_t - * ---------------------------------------- - * 31 8 7 0 - */ - -#define ATOMIC24_INIT(i) { ((i) << 8) } - -static inline int atomic24_read(const atomic24_t *v) -{ - int ret = v->counter; - - while(ret & 0xff) - ret = v->counter; - - return ret >> 8; -} - -#define atomic24_set(v, i) (((v)->counter) = ((i) << 8)) +#include <asm-sparc/atomic_32.h> +#endif #endif - -static inline int __atomic24_add(int i, atomic24_t *v) -{ - register volatile int *ptr asm("g1"); - register int increment asm("g2"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g7"); - - ptr = &v->counter; - increment = i; - - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___atomic24_add\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) - : "0" (increment), "r" (ptr) - : "memory", "cc"); - - return increment; -} - -static inline int __atomic24_sub(int i, atomic24_t *v) -{ - register volatile int *ptr asm("g1"); - register int increment asm("g2"); - register int tmp1 asm("g3"); - register int tmp2 asm("g4"); - register int tmp3 asm("g7"); - - ptr = &v->counter; - increment = i; - - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___atomic24_sub\n\t" - " add %%o7, 8, %%o7\n" - : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) - : "0" (increment), "r" (ptr) - : "memory", "cc"); - - return increment; -} - -#define atomic24_add(i, v) ((void)__atomic24_add((i), (v))) -#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v))) - -#define atomic24_dec_return(v) __atomic24_sub(1, (v)) -#define atomic24_inc_return(v) __atomic24_add(1, (v)) - -#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0) -#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0) - -#define atomic24_inc(v) ((void)__atomic24_add(1, (v))) -#define atomic24_dec(v) ((void)__atomic24_sub(1, (v))) - -#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0) - -/* Atomic operations are already serializing */ -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() - -#endif /* !(__KERNEL__) */ - -#include <asm-generic/atomic.h> -#endif /* !(__ARCH_SPARC_ATOMIC__) */ diff --git a/include/asm-sparc/atomic_32.h b/include/asm-sparc/atomic_32.h new file mode 100644 index 00000000000..5c944b5a804 --- /dev/null +++ b/include/asm-sparc/atomic_32.h @@ -0,0 +1,165 @@ +/* atomic.h: These still suck, but the I-cache hit rate is higher. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) + * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org) + * + * Additions by Keith M Wesolowski (wesolows@foobazco.org) based + * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. + */ + +#ifndef __ARCH_SPARC_ATOMIC__ +#define __ARCH_SPARC_ATOMIC__ + +#include <linux/types.h> + +typedef struct { volatile int counter; } atomic_t; + +#ifdef __KERNEL__ + +#define ATOMIC_INIT(i) { (i) } + +extern int __atomic_add_return(int, atomic_t *); +extern int atomic_cmpxchg(atomic_t *, int, int); +#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) +extern int atomic_add_unless(atomic_t *, int, int); +extern void atomic_set(atomic_t *, int); + +#define atomic_read(v) ((v)->counter) + +#define atomic_add(i, v) ((void)__atomic_add_return( (int)(i), (v))) +#define atomic_sub(i, v) ((void)__atomic_add_return(-(int)(i), (v))) +#define atomic_inc(v) ((void)__atomic_add_return( 1, (v))) +#define atomic_dec(v) ((void)__atomic_add_return( -1, (v))) + +#define atomic_add_return(i, v) (__atomic_add_return( (int)(i), (v))) +#define atomic_sub_return(i, v) (__atomic_add_return(-(int)(i), (v))) +#define atomic_inc_return(v) (__atomic_add_return( 1, (v))) +#define atomic_dec_return(v) (__atomic_add_return( -1, (v))) + +#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) + +/* + * atomic_inc_and_test - increment and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. + */ +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) + +#define atomic_dec_and_test(v) (atomic_dec_return(v) == 0) +#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0) + +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + +/* This is the old 24-bit implementation. It's still used internally + * by some sparc-specific code, notably the semaphore implementation. + */ +typedef struct { volatile int counter; } atomic24_t; + +#ifndef CONFIG_SMP + +#define ATOMIC24_INIT(i) { (i) } +#define atomic24_read(v) ((v)->counter) +#define atomic24_set(v, i) (((v)->counter) = i) + +#else +/* We do the bulk of the actual work out of line in two common + * routines in assembler, see arch/sparc/lib/atomic.S for the + * "fun" details. + * + * For SMP the trick is you embed the spin lock byte within + * the word, use the low byte so signedness is easily retained + * via a quick arithmetic shift. It looks like this: + * + * ---------------------------------------- + * | signed 24-bit counter value | lock | atomic_t + * ---------------------------------------- + * 31 8 7 0 + */ + +#define ATOMIC24_INIT(i) { ((i) << 8) } + +static inline int atomic24_read(const atomic24_t *v) +{ + int ret = v->counter; + + while(ret & 0xff) + ret = v->counter; + + return ret >> 8; +} + +#define atomic24_set(v, i) (((v)->counter) = ((i) << 8)) +#endif + +static inline int __atomic24_add(int i, atomic24_t *v) +{ + register volatile int *ptr asm("g1"); + register int increment asm("g2"); + register int tmp1 asm("g3"); + register int tmp2 asm("g4"); + register int tmp3 asm("g7"); + + ptr = &v->counter; + increment = i; + + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___atomic24_add\n\t" + " add %%o7, 8, %%o7\n" + : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) + : "0" (increment), "r" (ptr) + : "memory", "cc"); + + return increment; +} + +static inline int __atomic24_sub(int i, atomic24_t *v) +{ + register volatile int *ptr asm("g1"); + register int increment asm("g2"); + register int tmp1 asm("g3"); + register int tmp2 asm("g4"); + register int tmp3 asm("g7"); + + ptr = &v->counter; + increment = i; + + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___atomic24_sub\n\t" + " add %%o7, 8, %%o7\n" + : "=&r" (increment), "=r" (tmp1), "=r" (tmp2), "=r" (tmp3) + : "0" (increment), "r" (ptr) + : "memory", "cc"); + + return increment; +} + +#define atomic24_add(i, v) ((void)__atomic24_add((i), (v))) +#define atomic24_sub(i, v) ((void)__atomic24_sub((i), (v))) + +#define atomic24_dec_return(v) __atomic24_sub(1, (v)) +#define atomic24_inc_return(v) __atomic24_add(1, (v)) + +#define atomic24_sub_and_test(i, v) (__atomic24_sub((i), (v)) == 0) +#define atomic24_dec_and_test(v) (__atomic24_sub(1, (v)) == 0) + +#define atomic24_inc(v) ((void)__atomic24_add(1, (v))) +#define atomic24_dec(v) ((void)__atomic24_sub(1, (v))) + +#define atomic24_add_negative(i, v) (__atomic24_add((i), (v)) < 0) + +/* Atomic operations are already serializing */ +#define smp_mb__before_atomic_dec() barrier() +#define smp_mb__after_atomic_dec() barrier() +#define smp_mb__before_atomic_inc() barrier() +#define smp_mb__after_atomic_inc() barrier() + +#endif /* !(__KERNEL__) */ + +#include <asm-generic/atomic.h> +#endif /* !(__ARCH_SPARC_ATOMIC__) */ diff --git a/include/asm-sparc/atomic_64.h b/include/asm-sparc/atomic_64.h new file mode 100644 index 00000000000..2c71ec4a3b1 --- /dev/null +++ b/include/asm-sparc/atomic_64.h @@ -0,0 +1,128 @@ +/* atomic.h: Thankfully the V9 is at least reasonable for this + * stuff. + * + * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) + */ + +#ifndef __ARCH_SPARC64_ATOMIC__ +#define __ARCH_SPARC64_ATOMIC__ + +#include <linux/types.h> +#include <asm/system.h> + +typedef struct { volatile int counter; } atomic_t; +typedef struct { volatile __s64 counter; } atomic64_t; + +#define ATOMIC_INIT(i) { (i) } +#define ATOMIC64_INIT(i) { (i) } + +#define atomic_read(v) ((v)->counter) +#define atomic64_read(v) ((v)->counter) + +#define atomic_set(v, i) (((v)->counter) = i) +#define atomic64_set(v, i) (((v)->counter) = i) + +extern void atomic_add(int, atomic_t *); +extern void atomic64_add(int, atomic64_t *); +extern void atomic_sub(int, atomic_t *); +extern void atomic64_sub(int, atomic64_t *); + +extern int atomic_add_ret(int, atomic_t *); +extern int atomic64_add_ret(int, atomic64_t *); +extern int atomic_sub_ret(int, atomic_t *); +extern int atomic64_sub_ret(int, atomic64_t *); + +#define atomic_dec_return(v) atomic_sub_ret(1, v) +#define atomic64_dec_return(v) atomic64_sub_ret(1, v) + +#define atomic_inc_return(v) atomic_add_ret(1, v) +#define atomic64_inc_return(v) atomic64_add_ret(1, v) + +#define atomic_sub_return(i, v) atomic_sub_ret(i, v) +#define atomic64_sub_return(i, v) atomic64_sub_ret(i, v) + +#define atomic_add_return(i, v) atomic_add_ret(i, v) +#define atomic64_add_return(i, v) atomic64_add_ret(i, v) + +/* + * atomic_inc_and_test - increment and test + * @v: pointer of type atomic_t + * + * Atomically increments @v by 1 + * and returns true if the result is zero, or false for all + * other cases. + */ +#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) +#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) + +#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) +#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) + +#define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0) +#define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0) + +#define atomic_inc(v) atomic_add(1, v) +#define atomic64_inc(v) atomic64_add(1, v) + +#define atomic_dec(v) atomic_sub(1, v) +#define atomic64_dec(v) atomic64_sub(1, v) + +#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) +#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) + +#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) +#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) + +static inline int atomic_add_unless(atomic_t *v, int a, int u) +{ + int c, old; + c = atomic_read(v); + for (;;) { + if (unlikely(c == (u))) + break; + old = atomic_cmpxchg((v), c, c + (a)); + if (likely(old == c)) + break; + c = old; + } + return c != (u); +} + +#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) + +#define atomic64_cmpxchg(v, o, n) \ + ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) +#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) + +static inline int atomic64_add_unless(atomic64_t *v, long a, long u) +{ + long c, old; + c = atomic64_read(v); + for (;;) { + if (unlikely(c == (u))) + break; + old = atomic64_cmpxchg((v), c, c + (a)); + if (likely(old == c)) + break; + c = old; + } + return c != (u); +} + +#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) + +/* Atomic operations are already serializing */ +#ifdef CONFIG_SMP +#define smp_mb__before_atomic_dec() membar_storeload_loadload(); +#define smp_mb__after_atomic_dec() membar_storeload_storestore(); +#define smp_mb__before_atomic_inc() membar_storeload_loadload(); +#define smp_mb__after_atomic_inc() membar_storeload_storestore(); +#else +#define smp_mb__before_atomic_dec() barrier() +#define smp_mb__after_atomic_dec() barrier() +#define smp_mb__before_atomic_inc() barrier() +#define smp_mb__after_atomic_inc() barrier() +#endif + +#include <asm-generic/atomic.h> +#endif /* !(__ARCH_SPARC64_ATOMIC__) */ diff --git a/include/asm-sparc/auxio.h b/include/asm-sparc/auxio.h index e552b8d6845..24c6f3c0f57 100644 --- a/include/asm-sparc/auxio.h +++ b/include/asm-sparc/auxio.h @@ -1,89 +1,8 @@ -/* - * auxio.h: Definitions and code for the Auxiliary I/O register. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_AUXIO_H -#define _SPARC_AUXIO_H - -#include <asm/system.h> -#include <asm/vaddrs.h> - -/* This register is an unsigned char in IO space. It does two things. - * First, it is used to control the front panel LED light on machines - * that have it (good for testing entry points to trap handlers and irq's) - * Secondly, it controls various floppy drive parameters. - */ -#define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ -#define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ -#define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ -#define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ -#define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ -#define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ -#define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ - -/* Set the following to one, then zero, after doing a pseudo DMA transfer. */ -#define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ - -/* Set the following to zero to eject the floppy. */ -#define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ -#define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ - -#ifndef __ASSEMBLY__ - -/* - * NOTE: these routines are implementation dependent-- - * understand the hardware you are querying! - */ -extern void set_auxio(unsigned char bits_on, unsigned char bits_off); -extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */ - -/* - * The following routines are provided for driver-compatibility - * with sparc64 (primarily sunlance.c) - */ - -#define AUXIO_LTE_ON 1 -#define AUXIO_LTE_OFF 0 - -/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) - * - * on - AUXIO_LTE_ON or AUXIO_LTE_OFF - */ -#define auxio_set_lte(on) \ -do { \ - if(on) { \ - set_auxio(AUXIO_LINK_TEST, 0); \ - } else { \ - set_auxio(0, AUXIO_LINK_TEST); \ - } \ -} while (0) - -#define AUXIO_LED_ON 1 -#define AUXIO_LED_OFF 0 - -/* auxio_set_led - Set system front panel LED - * - * on - AUXIO_LED_ON or AUXIO_LED_OFF - */ -#define auxio_set_led(on) \ -do { \ - if(on) { \ - set_auxio(AUXIO_LED, 0); \ - } else { \ - set_auxio(0, AUXIO_LED); \ - } \ -} while (0) - -#endif /* !(__ASSEMBLY__) */ - - -/* AUXIO2 (Power Off Control) */ -extern __volatile__ unsigned char * auxio_power_register; - -#define AUXIO_POWER_DETECT_FAILURE 32 -#define AUXIO_POWER_CLEAR_FAILURE 2 -#define AUXIO_POWER_OFF 1 - - -#endif /* !(_SPARC_AUXIO_H) */ +#ifndef ___ASM_SPARC_AUXIO_H +#define ___ASM_SPARC_AUXIO_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/auxio_64.h> +#else +#include <asm-sparc/auxio_32.h> +#endif +#endif diff --git a/include/asm-sparc/auxio_32.h b/include/asm-sparc/auxio_32.h new file mode 100644 index 00000000000..4db8f23db20 --- /dev/null +++ b/include/asm-sparc/auxio_32.h @@ -0,0 +1,89 @@ +/* + * auxio.h: Definitions and code for the Auxiliary I/O register. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ +#ifndef _SPARC_AUXIO_H +#define _SPARC_AUXIO_H + +#include <asm/system.h> +#include <asm/vaddrs.h> + +/* This register is an unsigned char in IO space. It does two things. + * First, it is used to control the front panel LED light on machines + * that have it (good for testing entry points to trap handlers and irq's) + * Secondly, it controls various floppy drive parameters. + */ +#define AUXIO_ORMEIN 0xf0 /* All writes must set these bits. */ +#define AUXIO_ORMEIN4M 0xc0 /* sun4m - All writes must set these bits. */ +#define AUXIO_FLPY_DENS 0x20 /* Floppy density, high if set. Read only. */ +#define AUXIO_FLPY_DCHG 0x10 /* A disk change occurred. Read only. */ +#define AUXIO_EDGE_ON 0x10 /* sun4m - On means Jumper block is in. */ +#define AUXIO_FLPY_DSEL 0x08 /* Drive select/start-motor. Write only. */ +#define AUXIO_LINK_TEST 0x08 /* sun4m - On means TPE Carrier detect. */ + +/* Set the following to one, then zero, after doing a pseudo DMA transfer. */ +#define AUXIO_FLPY_TCNT 0x04 /* Floppy terminal count. Write only. */ + +/* Set the following to zero to eject the floppy. */ +#define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ +#define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ + +#ifndef __ASSEMBLY__ + +/* + * NOTE: these routines are implementation dependent-- + * understand the hardware you are querying! + */ +extern void set_auxio(unsigned char bits_on, unsigned char bits_off); +extern unsigned char get_auxio(void); /* .../asm-sparc/floppy.h */ + +/* + * The following routines are provided for driver-compatibility + * with sparc64 (primarily sunlance.c) + */ + +#define AUXIO_LTE_ON 1 +#define AUXIO_LTE_OFF 0 + +/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) + * + * on - AUXIO_LTE_ON or AUXIO_LTE_OFF + */ +#define auxio_set_lte(on) \ +do { \ + if(on) { \ + set_auxio(AUXIO_LINK_TEST, 0); \ + } else { \ + set_auxio(0, AUXIO_LINK_TEST); \ + } \ +} while (0) + +#define AUXIO_LED_ON 1 +#define AUXIO_LED_OFF 0 + +/* auxio_set_led - Set system front panel LED + * + * on - AUXIO_LED_ON or AUXIO_LED_OFF + */ +#define auxio_set_led(on) \ +do { \ + if(on) { \ + set_auxio(AUXIO_LED, 0); \ + } else { \ + set_auxio(0, AUXIO_LED); \ + } \ +} while (0) + +#endif /* !(__ASSEMBLY__) */ + + +/* AUXIO2 (Power Off Control) */ +extern __volatile__ unsigned char * auxio_power_register; + +#define AUXIO_POWER_DETECT_FAILURE 32 +#define AUXIO_POWER_CLEAR_FAILURE 2 +#define AUXIO_POWER_OFF 1 + + +#endif /* !(_SPARC_AUXIO_H) */ diff --git a/include/asm-sparc/auxio_64.h b/include/asm-sparc/auxio_64.h new file mode 100644 index 00000000000..f61cd1e3e39 --- /dev/null +++ b/include/asm-sparc/auxio_64.h @@ -0,0 +1,100 @@ +/* + * auxio.h: Definitions and code for the Auxiliary I/O registers. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * + * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) + */ +#ifndef _SPARC64_AUXIO_H +#define _SPARC64_AUXIO_H + +/* AUXIO implementations: + * sbus-based NCR89C105 "Slavio" + * LED/Floppy (AUX1) register + * Power (AUX2) register + * + * ebus-based auxio on PCIO + * LED Auxio Register + * Power Auxio Register + * + * Register definitions from NCR _NCR89C105 Chip Specification_ + * + * SLAVIO AUX1 @ 0x1900000 + * ------------------------------------------------- + * | (R) | (R) | D | (R) | E | M | T | L | + * ------------------------------------------------- + * (R) - bit 7:6,4 are reserved and should be masked in s/w + * D - Floppy Density Sense (1=high density) R/O + * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin + * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin + * T - Terminal Count: sends TC pulse to 82077 floppy controller + * L - System LED on front panel (0=off, 1=on) + */ +#define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ +#define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ +#define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ +#define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ +#define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ +#define AUXIO_AUX1_LED 0x01 /* System LED */ + +/* SLAVIO AUX2 @ 0x1910000 + * ------------------------------------------------- + * | (R) | (R) | D | (R) | (R) | (R) | C | F | + * ------------------------------------------------- + * (R) - bits 7:6,4:2 are reserved and should be masked in s/w + * D - Power Failure Detect (1=power fail) + * C - Clear Power Failure Detect Int (1=clear) + * F - Power Off (1=power off) + */ +#define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ +#define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ +#define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ +#define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ + +/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 + * + * PCIO LED Auxio @ 0x726000 + * ------------------------------------------------- + * | 31:1 Unused | LED | + * ------------------------------------------------- + * Bits 31:1 unused + * LED - System LED on front panel (0=off, 1=on) + */ +#define AUXIO_PCIO_LED 0x01 /* System LED */ + +/* PCIO Power Auxio @ 0x724000 + * ------------------------------------------------- + * | 31:2 Unused | CPO | SPO | + * ------------------------------------------------- + * Bits 31:2 unused + * CPO - Courtesy Power Off (1=off) + * SPO - System Power Off (1=off) + */ +#define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ +#define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ + +#ifndef __ASSEMBLY__ + +extern void __iomem *auxio_register; + +#define AUXIO_LTE_ON 1 +#define AUXIO_LTE_OFF 0 + +/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) + * + * on - AUXIO_LTE_ON or AUXIO_LTE_OFF + */ +extern void auxio_set_lte(int on); + +#define AUXIO_LED_ON 1 +#define AUXIO_LED_OFF 0 + +/* auxio_set_led - Set system front panel LED + * + * on - AUXIO_LED_ON or AUXIO_LED_OFF + */ +extern void auxio_set_led(int on); + +#endif /* ifndef __ASSEMBLY__ */ + +#endif /* !(_SPARC64_AUXIO_H) */ diff --git a/include/asm-sparc/bitops.h b/include/asm-sparc/bitops.h index 68b98a7e645..1a2949d0193 100644 --- a/include/asm-sparc/bitops.h +++ b/include/asm-sparc/bitops.h @@ -1,111 +1,8 @@ -/* - * bitops.h: Bit string operations on the Sparc. - * - * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright 1996 Eddie C. Dost (ecd@skynet.be) - * Copyright 2001 Anton Blanchard (anton@samba.org) - */ - -#ifndef _SPARC_BITOPS_H -#define _SPARC_BITOPS_H - -#include <linux/compiler.h> -#include <asm/byteorder.h> - -#ifdef __KERNEL__ - -#ifndef _LINUX_BITOPS_H -#error only <linux/bitops.h> can be included directly +#ifndef ___ASM_SPARC_BITOPS_H +#define ___ASM_SPARC_BITOPS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/bitops_64.h> +#else +#include <asm-sparc/bitops_32.h> +#endif #endif - -extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); -extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); -extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); - -/* - * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' - * is in the highest of the four bytes and bit '31' is the high bit - * within the first byte. Sparc is BIG-Endian. Unless noted otherwise - * all bit-ops return 0 if bit was previously clear and != 0 otherwise. - */ -static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___set_bit(ADDR, mask) != 0; -} - -static inline void set_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___set_bit(ADDR, mask); -} - -static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___clear_bit(ADDR, mask) != 0; -} - -static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___clear_bit(ADDR, mask); -} - -static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - return ___change_bit(ADDR, mask) != 0; -} - -static inline void change_bit(unsigned long nr, volatile unsigned long *addr) -{ - unsigned long *ADDR, mask; - - ADDR = ((unsigned long *) addr) + (nr >> 5); - mask = 1 << (nr & 31); - - (void) ___change_bit(ADDR, mask); -} - -#include <asm-generic/bitops/non-atomic.h> - -#define smp_mb__before_clear_bit() do { } while(0) -#define smp_mb__after_clear_bit() do { } while(0) - -#include <asm-generic/bitops/ffz.h> -#include <asm-generic/bitops/__ffs.h> -#include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ffs.h> -#include <asm-generic/bitops/fls.h> -#include <asm-generic/bitops/fls64.h> -#include <asm-generic/bitops/hweight.h> -#include <asm-generic/bitops/lock.h> -#include <asm-generic/bitops/find.h> -#include <asm-generic/bitops/ext2-non-atomic.h> -#include <asm-generic/bitops/ext2-atomic.h> -#include <asm-generic/bitops/minix.h> - -#endif /* __KERNEL__ */ - -#endif /* defined(_SPARC_BITOPS_H) */ diff --git a/include/asm-sparc/bitops_32.h b/include/asm-sparc/bitops_32.h new file mode 100644 index 00000000000..68b98a7e645 --- /dev/null +++ b/include/asm-sparc/bitops_32.h @@ -0,0 +1,111 @@ +/* + * bitops.h: Bit string operations on the Sparc. + * + * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright 1996 Eddie C. Dost (ecd@skynet.be) + * Copyright 2001 Anton Blanchard (anton@samba.org) + */ + +#ifndef _SPARC_BITOPS_H +#define _SPARC_BITOPS_H + +#include <linux/compiler.h> +#include <asm/byteorder.h> + +#ifdef __KERNEL__ + +#ifndef _LINUX_BITOPS_H +#error only <linux/bitops.h> can be included directly +#endif + +extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask); +extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); +extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask); + +/* + * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' + * is in the highest of the four bytes and bit '31' is the high bit + * within the first byte. Sparc is BIG-Endian. Unless noted otherwise + * all bit-ops return 0 if bit was previously clear and != 0 otherwise. + */ +static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + return ___set_bit(ADDR, mask) != 0; +} + +static inline void set_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + (void) ___set_bit(ADDR, mask); +} + +static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + return ___clear_bit(ADDR, mask) != 0; +} + +static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + (void) ___clear_bit(ADDR, mask); +} + +static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + return ___change_bit(ADDR, mask) != 0; +} + +static inline void change_bit(unsigned long nr, volatile unsigned long *addr) +{ + unsigned long *ADDR, mask; + + ADDR = ((unsigned long *) addr) + (nr >> 5); + mask = 1 << (nr & 31); + + (void) ___change_bit(ADDR, mask); +} + +#include <asm-generic/bitops/non-atomic.h> + +#define smp_mb__before_clear_bit() do { } while(0) +#define smp_mb__after_clear_bit() do { } while(0) + +#include <asm-generic/bitops/ffz.h> +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/sched.h> +#include <asm-generic/bitops/ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/fls64.h> +#include <asm-generic/bitops/hweight.h> +#include <asm-generic/bitops/lock.h> +#include <asm-generic/bitops/find.h> +#include <asm-generic/bitops/ext2-non-atomic.h> +#include <asm-generic/bitops/ext2-atomic.h> +#include <asm-generic/bitops/minix.h> + +#endif /* __KERNEL__ */ + +#endif /* defined(_SPARC_BITOPS_H) */ diff --git a/include/asm-sparc/bitops_64.h b/include/asm-sparc/bitops_64.h new file mode 100644 index 00000000000..bb87b808022 --- /dev/null +++ b/include/asm-sparc/bitops_64.h @@ -0,0 +1,107 @@ +/* + * bitops.h: Bit string operations on the V9. + * + * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC64_BITOPS_H +#define _SPARC64_BITOPS_H + +#ifndef _LINUX_BITOPS_H +#error only <linux/bitops.h> can be included directly +#endif + +#include <linux/compiler.h> +#include <asm/byteorder.h> + +extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr); +extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); +extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr); +extern void set_bit(unsigned long nr, volatile unsigned long *addr); +extern void clear_bit(unsigned long nr, volatile unsigned long *addr); +extern void change_bit(unsigned long nr, volatile unsigned long *addr); + +#include <asm-generic/bitops/non-atomic.h> + +#ifdef CONFIG_SMP +#define smp_mb__before_clear_bit() membar_storeload_loadload() +#define smp_mb__after_clear_bit() membar_storeload_storestore() +#else +#define smp_mb__before_clear_bit() barrier() +#define smp_mb__after_clear_bit() barrier() +#endif + +#include <asm-generic/bitops/ffz.h> +#include <asm-generic/bitops/__ffs.h> +#include <asm-generic/bitops/fls.h> +#include <asm-generic/bitops/__fls.h> +#include <asm-generic/bitops/fls64.h> + +#ifdef __KERNEL__ + +#include <asm-generic/bitops/sched.h> +#include <asm-generic/bitops/ffs.h> + +/* + * hweightN: returns the hamming weight (i.e. the number + * of bits set) of a N-bit word + */ + +#ifdef ULTRA_HAS_POPULATION_COUNT + +static inline unsigned int hweight64(unsigned long w) +{ + unsigned int res; + + __asm__ ("popc %1,%0" : "=r" (res) : "r" (w)); + return res; +} + +static inline unsigned int hweight32(unsigned int w) +{ + unsigned int res; + + __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff)); + return res; +} + +static inline unsigned int hweight16(unsigned int w) +{ + unsigned int res; + + __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff)); + return res; +} + +static inline unsigned int hweight8(unsigned int w) +{ + unsigned int res; + + __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff)); + return res; +} + +#else + +#include <asm-generic/bitops/hweight.h> + +#endif +#include <asm-generic/bitops/lock.h> +#endif /* __KERNEL__ */ + +#include <asm-generic/bitops/find.h> + +#ifdef __KERNEL__ + +#include <asm-generic/bitops/ext2-non-atomic.h> + +#define ext2_set_bit_atomic(lock,nr,addr) \ + test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) +#define ext2_clear_bit_atomic(lock,nr,addr) \ + test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) + +#include <asm-generic/bitops/minix.h> + +#endif /* __KERNEL__ */ + +#endif /* defined(_SPARC64_BITOPS_H) */ diff --git a/include/asm-sparc/cacheflush.h b/include/asm-sparc/cacheflush.h index 68ac1091027..2b6a37957c2 100644 --- a/include/asm-sparc/cacheflush.h +++ b/include/asm-sparc/cacheflush.h @@ -1,85 +1,8 @@ -#ifndef _SPARC_CACHEFLUSH_H -#define _SPARC_CACHEFLUSH_H - -#include <linux/mm.h> /* Common for other includes */ -// #include <linux/kernel.h> from pgalloc.h -// #include <linux/sched.h> from pgalloc.h - -// #include <asm/page.h> -#include <asm/btfixup.h> - -/* - * Fine grained cache flushing. - */ -#ifdef CONFIG_SMP - -BTFIXUPDEF_CALL(void, local_flush_cache_all, void) -BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long) - -#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)() -#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm) -#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end) -#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr) - -BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long) - -#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr) -#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr) - -extern void smp_flush_cache_all(void); -extern void smp_flush_cache_mm(struct mm_struct *mm); -extern void smp_flush_cache_range(struct vm_area_struct *vma, - unsigned long start, - unsigned long end); -extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page); - -extern void smp_flush_page_to_ram(unsigned long page); -extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); - -#endif /* CONFIG_SMP */ - -BTFIXUPDEF_CALL(void, flush_cache_all, void) -BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long) - -#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)() -#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) -#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) -#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end) -#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr) -#define flush_icache_range(start, end) do { } while (0) -#define flush_icache_page(vma, pg) do { } while (0) - -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - } while (0) -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page));\ - memcpy(dst, src, len); \ - } while (0) - -BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long) -BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long) - -#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr) -#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr) - -extern void sparc_flush_page_to_ram(struct page *page); - -#define flush_dcache_page(page) sparc_flush_page_to_ram(page) -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() - -#endif /* _SPARC_CACHEFLUSH_H */ +#ifndef ___ASM_SPARC_CACHEFLUSH_H +#define ___ASM_SPARC_CACHEFLUSH_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/cacheflush_64.h> +#else +#include <asm-sparc/cacheflush_32.h> +#endif +#endif diff --git a/include/asm-sparc/cacheflush_32.h b/include/asm-sparc/cacheflush_32.h new file mode 100644 index 00000000000..68ac1091027 --- /dev/null +++ b/include/asm-sparc/cacheflush_32.h @@ -0,0 +1,85 @@ +#ifndef _SPARC_CACHEFLUSH_H +#define _SPARC_CACHEFLUSH_H + +#include <linux/mm.h> /* Common for other includes */ +// #include <linux/kernel.h> from pgalloc.h +// #include <linux/sched.h> from pgalloc.h + +// #include <asm/page.h> +#include <asm/btfixup.h> + +/* + * Fine grained cache flushing. + */ +#ifdef CONFIG_SMP + +BTFIXUPDEF_CALL(void, local_flush_cache_all, void) +BTFIXUPDEF_CALL(void, local_flush_cache_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, local_flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, local_flush_cache_page, struct vm_area_struct *, unsigned long) + +#define local_flush_cache_all() BTFIXUP_CALL(local_flush_cache_all)() +#define local_flush_cache_mm(mm) BTFIXUP_CALL(local_flush_cache_mm)(mm) +#define local_flush_cache_range(vma,start,end) BTFIXUP_CALL(local_flush_cache_range)(vma,start,end) +#define local_flush_cache_page(vma,addr) BTFIXUP_CALL(local_flush_cache_page)(vma,addr) + +BTFIXUPDEF_CALL(void, local_flush_page_to_ram, unsigned long) +BTFIXUPDEF_CALL(void, local_flush_sig_insns, struct mm_struct *, unsigned long) + +#define local_flush_page_to_ram(addr) BTFIXUP_CALL(local_flush_page_to_ram)(addr) +#define local_flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(local_flush_sig_insns)(mm,insn_addr) + +extern void smp_flush_cache_all(void); +extern void smp_flush_cache_mm(struct mm_struct *mm); +extern void smp_flush_cache_range(struct vm_area_struct *vma, + unsigned long start, + unsigned long end); +extern void smp_flush_cache_page(struct vm_area_struct *vma, unsigned long page); + +extern void smp_flush_page_to_ram(unsigned long page); +extern void smp_flush_sig_insns(struct mm_struct *mm, unsigned long insn_addr); + +#endif /* CONFIG_SMP */ + +BTFIXUPDEF_CALL(void, flush_cache_all, void) +BTFIXUPDEF_CALL(void, flush_cache_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, flush_cache_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, flush_cache_page, struct vm_area_struct *, unsigned long) + +#define flush_cache_all() BTFIXUP_CALL(flush_cache_all)() +#define flush_cache_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) +#define flush_cache_dup_mm(mm) BTFIXUP_CALL(flush_cache_mm)(mm) +#define flush_cache_range(vma,start,end) BTFIXUP_CALL(flush_cache_range)(vma,start,end) +#define flush_cache_page(vma,addr,pfn) BTFIXUP_CALL(flush_cache_page)(vma,addr) +#define flush_icache_range(start, end) do { } while (0) +#define flush_icache_page(vma, pg) do { } while (0) + +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page));\ + memcpy(dst, src, len); \ + } while (0) +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page));\ + memcpy(dst, src, len); \ + } while (0) + +BTFIXUPDEF_CALL(void, __flush_page_to_ram, unsigned long) +BTFIXUPDEF_CALL(void, flush_sig_insns, struct mm_struct *, unsigned long) + +#define __flush_page_to_ram(addr) BTFIXUP_CALL(__flush_page_to_ram)(addr) +#define flush_sig_insns(mm,insn_addr) BTFIXUP_CALL(flush_sig_insns)(mm,insn_addr) + +extern void sparc_flush_page_to_ram(struct page *page); + +#define flush_dcache_page(page) sparc_flush_page_to_ram(page) +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) + +#define flush_cache_vmap(start, end) flush_cache_all() +#define flush_cache_vunmap(start, end) flush_cache_all() + +#endif /* _SPARC_CACHEFLUSH_H */ diff --git a/include/asm-sparc/cacheflush_64.h b/include/asm-sparc/cacheflush_64.h new file mode 100644 index 00000000000..c43321729b3 --- /dev/null +++ b/include/asm-sparc/cacheflush_64.h @@ -0,0 +1,76 @@ +#ifndef _SPARC64_CACHEFLUSH_H +#define _SPARC64_CACHEFLUSH_H + +#include <asm/page.h> + +#ifndef __ASSEMBLY__ + +#include <linux/mm.h> + +/* Cache flush operations. */ + +/* These are the same regardless of whether this is an SMP kernel or not. */ +#define flush_cache_mm(__mm) \ + do { if ((__mm) == current->mm) flushw_user(); } while(0) +#define flush_cache_dup_mm(mm) flush_cache_mm(mm) +#define flush_cache_range(vma, start, end) \ + flush_cache_mm((vma)->vm_mm) +#define flush_cache_page(vma, page, pfn) \ + flush_cache_mm((vma)->vm_mm) + +/* + * On spitfire, the icache doesn't snoop local stores and we don't + * use block commit stores (which invalidate icache lines) during + * module load, so we need this. + */ +extern void flush_icache_range(unsigned long start, unsigned long end); +extern void __flush_icache_page(unsigned long); + +extern void __flush_dcache_page(void *addr, int flush_icache); +extern void flush_dcache_page_impl(struct page *page); +#ifdef CONFIG_SMP +extern void smp_flush_dcache_page_impl(struct page *page, int cpu); +extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page); +#else +#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page) +#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page) +#endif + +extern void __flush_dcache_range(unsigned long start, unsigned long end); +extern void flush_dcache_page(struct page *page); + +#define flush_icache_page(vma, pg) do { } while(0) +#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) + +extern void flush_ptrace_access(struct vm_area_struct *, struct page *, + unsigned long uaddr, void *kaddr, + unsigned long len, int write); + +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page)); \ + memcpy(dst, src, len); \ + flush_ptrace_access(vma, page, vaddr, src, len, 0); \ + } while (0) + +#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ + do { \ + flush_cache_page(vma, vaddr, page_to_pfn(page)); \ + memcpy(dst, src, len); \ + flush_ptrace_access(vma, page, vaddr, dst, len, 1); \ + } while (0) + +#define flush_dcache_mmap_lock(mapping) do { } while (0) +#define flush_dcache_mmap_unlock(mapping) do { } while (0) + +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) + +#ifdef CONFIG_DEBUG_PAGEALLOC +/* internal debugging function */ +void kernel_map_pages(struct page *page, int numpages, int enable); +#endif + +#endif /* !__ASSEMBLY__ */ + +#endif /* _SPARC64_CACHEFLUSH_H */ diff --git a/include/asm-sparc/checksum.h b/include/asm-sparc/checksum.h index d044ddb5a3c..4e3553d4f6e 100644 --- a/include/asm-sparc/checksum.h +++ b/include/asm-sparc/checksum.h @@ -1,241 +1,8 @@ -#ifndef __SPARC_CHECKSUM_H -#define __SPARC_CHECKSUM_H - -/* checksum.h: IP/UDP/TCP checksum routines on the Sparc. - * - * Copyright(C) 1995 Linus Torvalds - * Copyright(C) 1995 Miguel de Icaza - * Copyright(C) 1996 David S. Miller - * Copyright(C) 1996 Eddie C. Dost - * Copyright(C) 1997 Jakub Jelinek - * - * derived from: - * Alpha checksum c-code - * ix86 inline assembly - * RFC1071 Computing the Internet Checksum - */ - -#include <linux/in6.h> -#include <asm/uaccess.h> - -/* computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void *buff, int len, __wsum sum); - -/* the same as csum_partial, but copies from fs:src while it - * checksums - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ - -extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); - -static inline __wsum -csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) -{ - register unsigned int ret asm("o0") = (unsigned int)src; - register char *d asm("o1") = dst; - register int l asm("g1") = len; - - __asm__ __volatile__ ( - "call __csum_partial_copy_sparc_generic\n\t" - " mov %6, %%g7\n" - : "=&r" (ret), "=&r" (d), "=&r" (l) - : "0" (ret), "1" (d), "2" (l), "r" (sum) - : "o2", "o3", "o4", "o5", "o7", - "g2", "g3", "g4", "g5", "g7", - "memory", "cc"); - return (__force __wsum)ret; -} - -static inline __wsum -csum_partial_copy_from_user(const void __user *src, void *dst, int len, - __wsum sum, int *err) - { - register unsigned long ret asm("o0") = (unsigned long)src; - register char *d asm("o1") = dst; - register int l asm("g1") = len; - register __wsum s asm("g7") = sum; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,2\n\t" - ".previous\n" - "1:\n\t" - "call __csum_partial_copy_sparc_generic\n\t" - " st %8, [%%sp + 64]\n" - : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) - : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) - : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", - "cc", "memory"); - return (__force __wsum)ret; -} - -static inline __wsum -csum_partial_copy_to_user(const void *src, void __user *dst, int len, - __wsum sum, int *err) -{ - if (!access_ok (VERIFY_WRITE, dst, len)) { - *err = -EFAULT; - return sum; - } else { - register unsigned long ret asm("o0") = (unsigned long)src; - register char __user *d asm("o1") = dst; - register int l asm("g1") = len; - register __wsum s asm("g7") = sum; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,1\n\t" - ".previous\n" - "1:\n\t" - "call __csum_partial_copy_sparc_generic\n\t" - " st %8, [%%sp + 64]\n" - : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) - : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) - : "o2", "o3", "o4", "o5", "o7", - "g2", "g3", "g4", "g5", - "cc", "memory"); - return (__force __wsum)ret; - } -} - -#define HAVE_CSUM_COPY_USER -#define csum_and_copy_to_user csum_partial_copy_to_user - -/* ihl is always 5 or greater, almost always is 5, and iph is word aligned - * the majority of the time. - */ -static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) -{ - __sum16 sum; - - /* Note: We must read %2 before we touch %0 for the first time, - * because GCC can legitimately use the same register for - * both operands. - */ - __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" - "ld\t[%1 + 0x00], %0\n\t" - "ld\t[%1 + 0x04], %%g2\n\t" - "ld\t[%1 + 0x08], %%g3\n\t" - "addcc\t%%g2, %0, %0\n\t" - "addxcc\t%%g3, %0, %0\n\t" - "ld\t[%1 + 0x0c], %%g2\n\t" - "ld\t[%1 + 0x10], %%g3\n\t" - "addxcc\t%%g2, %0, %0\n\t" - "addx\t%0, %%g0, %0\n" - "1:\taddcc\t%%g3, %0, %0\n\t" - "add\t%1, 4, %1\n\t" - "addxcc\t%0, %%g0, %0\n\t" - "subcc\t%%g4, 1, %%g4\n\t" - "be,a\t2f\n\t" - "sll\t%0, 16, %%g2\n\t" - "b\t1b\n\t" - "ld\t[%1 + 0x10], %%g3\n" - "2:\taddcc\t%0, %%g2, %%g2\n\t" - "srl\t%%g2, 16, %0\n\t" - "addx\t%0, %%g0, %0\n\t" - "xnor\t%%g0, %0, %0" - : "=r" (sum), "=&r" (iph) - : "r" (ihl), "1" (iph) - : "g2", "g3", "g4", "cc", "memory"); - return sum; -} - -/* Fold a partial checksum without adding pseudo headers. */ -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - __asm__ __volatile__("addcc\t%0, %1, %1\n\t" - "srl\t%1, 16, %1\n\t" - "addx\t%1, %%g0, %1\n\t" - "xnor\t%%g0, %1, %0" - : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" ((__force u32)sum<<16) - : "cc"); - return (__force __sum16)sum; -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__("addcc\t%1, %0, %0\n\t" - "addxcc\t%2, %0, %0\n\t" - "addxcc\t%3, %0, %0\n\t" - "addx\t%0, %%g0, %0\n\t" - : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" (proto + len), "0" (sum), - "1" (saddr) - : "cc"); - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -#define _HAVE_ARCH_IPV6_CSUM - -static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__ ( - "addcc %3, %4, %%g4\n\t" - "addxcc %5, %%g4, %%g4\n\t" - "ld [%2 + 0x0c], %%g2\n\t" - "ld [%2 + 0x08], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%2 + 0x04], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%2 + 0x00], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%1 + 0x0c], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%1 + 0x08], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "ld [%1 + 0x04], %%g2\n\t" - "addxcc %%g3, %%g4, %%g4\n\t" - "ld [%1 + 0x00], %%g3\n\t" - "addxcc %%g2, %%g4, %%g4\n\t" - "addxcc %%g3, %%g4, %0\n\t" - "addx 0, %0, %0\n" - : "=&r" (sum) - : "r" (saddr), "r" (daddr), - "r"(htonl(len)), "r"(htonl(proto)), "r"(sum) - : "g2", "g3", "g4", "cc"); - - return csum_fold(sum); -} - -/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* !(__SPARC_CHECKSUM_H) */ +#ifndef ___ASM_SPARC_CHECKSUM_H +#define ___ASM_SPARC_CHECKSUM_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/checksum_64.h> +#else +#include <asm-sparc/checksum_32.h> +#endif +#endif diff --git a/include/asm-sparc/checksum_32.h b/include/asm-sparc/checksum_32.h new file mode 100644 index 00000000000..bdbda1453aa --- /dev/null +++ b/include/asm-sparc/checksum_32.h @@ -0,0 +1,241 @@ +#ifndef __SPARC_CHECKSUM_H +#define __SPARC_CHECKSUM_H + +/* checksum.h: IP/UDP/TCP checksum routines on the Sparc. + * + * Copyright(C) 1995 Linus Torvalds + * Copyright(C) 1995 Miguel de Icaza + * Copyright(C) 1996 David S. Miller + * Copyright(C) 1996 Eddie C. Dost + * Copyright(C) 1997 Jakub Jelinek + * + * derived from: + * Alpha checksum c-code + * ix86 inline assembly + * RFC1071 Computing the Internet Checksum + */ + +#include <linux/in6.h> +#include <asm/uaccess.h> + +/* computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +extern __wsum csum_partial(const void *buff, int len, __wsum sum); + +/* the same as csum_partial, but copies from fs:src while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ + +extern unsigned int __csum_partial_copy_sparc_generic (const unsigned char *, unsigned char *); + +static inline __wsum +csum_partial_copy_nocheck(const void *src, void *dst, int len, __wsum sum) +{ + register unsigned int ret asm("o0") = (unsigned int)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + + __asm__ __volatile__ ( + "call __csum_partial_copy_sparc_generic\n\t" + " mov %6, %%g7\n" + : "=&r" (ret), "=&r" (d), "=&r" (l) + : "0" (ret), "1" (d), "2" (l), "r" (sum) + : "o2", "o3", "o4", "o5", "o7", + "g2", "g3", "g4", "g5", "g7", + "memory", "cc"); + return (__force __wsum)ret; +} + +static inline __wsum +csum_partial_copy_from_user(const void __user *src, void *dst, int len, + __wsum sum, int *err) + { + register unsigned long ret asm("o0") = (unsigned long)src; + register char *d asm("o1") = dst; + register int l asm("g1") = len; + register __wsum s asm("g7") = sum; + + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,2\n\t" + ".previous\n" + "1:\n\t" + "call __csum_partial_copy_sparc_generic\n\t" + " st %8, [%%sp + 64]\n" + : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) + : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) + : "o2", "o3", "o4", "o5", "o7", "g2", "g3", "g4", "g5", + "cc", "memory"); + return (__force __wsum)ret; +} + +static inline __wsum +csum_partial_copy_to_user(const void *src, void __user *dst, int len, + __wsum sum, int *err) +{ + if (!access_ok (VERIFY_WRITE, dst, len)) { + *err = -EFAULT; + return sum; + } else { + register unsigned long ret asm("o0") = (unsigned long)src; + register char __user *d asm("o1") = dst; + register int l asm("g1") = len; + register __wsum s asm("g7") = sum; + + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,1\n\t" + ".previous\n" + "1:\n\t" + "call __csum_partial_copy_sparc_generic\n\t" + " st %8, [%%sp + 64]\n" + : "=&r" (ret), "=&r" (d), "=&r" (l), "=&r" (s) + : "0" (ret), "1" (d), "2" (l), "3" (s), "r" (err) + : "o2", "o3", "o4", "o5", "o7", + "g2", "g3", "g4", "g5", + "cc", "memory"); + return (__force __wsum)ret; + } +} + +#define HAVE_CSUM_COPY_USER +#define csum_and_copy_to_user csum_partial_copy_to_user + +/* ihl is always 5 or greater, almost always is 5, and iph is word aligned + * the majority of the time. + */ +static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl) +{ + __sum16 sum; + + /* Note: We must read %2 before we touch %0 for the first time, + * because GCC can legitimately use the same register for + * both operands. + */ + __asm__ __volatile__("sub\t%2, 4, %%g4\n\t" + "ld\t[%1 + 0x00], %0\n\t" + "ld\t[%1 + 0x04], %%g2\n\t" + "ld\t[%1 + 0x08], %%g3\n\t" + "addcc\t%%g2, %0, %0\n\t" + "addxcc\t%%g3, %0, %0\n\t" + "ld\t[%1 + 0x0c], %%g2\n\t" + "ld\t[%1 + 0x10], %%g3\n\t" + "addxcc\t%%g2, %0, %0\n\t" + "addx\t%0, %%g0, %0\n" + "1:\taddcc\t%%g3, %0, %0\n\t" + "add\t%1, 4, %1\n\t" + "addxcc\t%0, %%g0, %0\n\t" + "subcc\t%%g4, 1, %%g4\n\t" + "be,a\t2f\n\t" + "sll\t%0, 16, %%g2\n\t" + "b\t1b\n\t" + "ld\t[%1 + 0x10], %%g3\n" + "2:\taddcc\t%0, %%g2, %%g2\n\t" + "srl\t%%g2, 16, %0\n\t" + "addx\t%0, %%g0, %0\n\t" + "xnor\t%%g0, %0, %0" + : "=r" (sum), "=&r" (iph) + : "r" (ihl), "1" (iph) + : "g2", "g3", "g4", "cc", "memory"); + return sum; +} + +/* Fold a partial checksum without adding pseudo headers. */ +static inline __sum16 csum_fold(__wsum sum) +{ + unsigned int tmp; + + __asm__ __volatile__("addcc\t%0, %1, %1\n\t" + "srl\t%1, 16, %1\n\t" + "addx\t%1, %%g0, %1\n\t" + "xnor\t%%g0, %1, %0" + : "=&r" (sum), "=r" (tmp) + : "0" (sum), "1" ((__force u32)sum<<16) + : "cc"); + return (__force __sum16)sum; +} + +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__("addcc\t%1, %0, %0\n\t" + "addxcc\t%2, %0, %0\n\t" + "addxcc\t%3, %0, %0\n\t" + "addx\t%0, %%g0, %0\n\t" + : "=r" (sum), "=r" (saddr) + : "r" (daddr), "r" (proto + len), "0" (sum), + "1" (saddr) + : "cc"); + return sum; +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +#define _HAVE_ARCH_IPV6_CSUM + +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__ ( + "addcc %3, %4, %%g4\n\t" + "addxcc %5, %%g4, %%g4\n\t" + "ld [%2 + 0x0c], %%g2\n\t" + "ld [%2 + 0x08], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%2 + 0x04], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%2 + 0x00], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%1 + 0x0c], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%1 + 0x08], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "ld [%1 + 0x04], %%g2\n\t" + "addxcc %%g3, %%g4, %%g4\n\t" + "ld [%1 + 0x00], %%g3\n\t" + "addxcc %%g2, %%g4, %%g4\n\t" + "addxcc %%g3, %%g4, %0\n\t" + "addx 0, %0, %0\n" + : "=&r" (sum) + : "r" (saddr), "r" (daddr), + "r"(htonl(len)), "r"(htonl(proto)), "r"(sum) + : "g2", "g3", "g4", "cc"); + + return csum_fold(sum); +} + +/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ + return csum_fold(csum_partial(buff, len, 0)); +} + +#endif /* !(__SPARC_CHECKSUM_H) */ diff --git a/include/asm-sparc/checksum_64.h b/include/asm-sparc/checksum_64.h new file mode 100644 index 00000000000..019b9615e43 --- /dev/null +++ b/include/asm-sparc/checksum_64.h @@ -0,0 +1,167 @@ +#ifndef __SPARC64_CHECKSUM_H +#define __SPARC64_CHECKSUM_H + +/* checksum.h: IP/UDP/TCP checksum routines on the V9. + * + * Copyright(C) 1995 Linus Torvalds + * Copyright(C) 1995 Miguel de Icaza + * Copyright(C) 1996 David S. Miller + * Copyright(C) 1996 Eddie C. Dost + * Copyright(C) 1997 Jakub Jelinek + * + * derived from: + * Alpha checksum c-code + * ix86 inline assembly + * RFC1071 Computing the Internet Checksum + */ + +#include <linux/in6.h> +#include <asm/uaccess.h> + +/* computes the checksum of a memory block at buff, length len, + * and adds in "sum" (32-bit) + * + * returns a 32-bit number suitable for feeding into itself + * or csum_tcpudp_magic + * + * this function must be called with even lengths, except + * for the last fragment, which may be odd + * + * it's best to have buff aligned on a 32-bit boundary + */ +extern __wsum csum_partial(const void * buff, int len, __wsum sum); + +/* the same as csum_partial, but copies from user space while it + * checksums + * + * here even more important to align src and dst on a 32-bit (or even + * better 64-bit) boundary + */ +extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, + int len, __wsum sum); + +extern long __csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum); + +static inline __wsum +csum_partial_copy_from_user(const void __user *src, + void *dst, int len, + __wsum sum, int *err) +{ + long ret = __csum_partial_copy_from_user(src, dst, len, sum); + if (ret < 0) + *err = -EFAULT; + return (__force __wsum) ret; +} + +/* + * Copy and checksum to user + */ +#define HAVE_CSUM_COPY_USER +extern long __csum_partial_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum); + +static inline __wsum +csum_and_copy_to_user(const void *src, + void __user *dst, int len, + __wsum sum, int *err) +{ + long ret = __csum_partial_copy_to_user(src, dst, len, sum); + if (ret < 0) + *err = -EFAULT; + return (__force __wsum) ret; +} + +/* ihl is always 5 or greater, almost always is 5, and iph is word aligned + * the majority of the time. + */ +extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); + +/* Fold a partial checksum without adding pseudo headers. */ +static inline __sum16 csum_fold(__wsum sum) +{ + unsigned int tmp; + + __asm__ __volatile__( +" addcc %0, %1, %1\n" +" srl %1, 16, %1\n" +" addc %1, %%g0, %1\n" +" xnor %%g0, %1, %0\n" + : "=&r" (sum), "=r" (tmp) + : "0" (sum), "1" ((__force u32)sum<<16) + : "cc"); + return (__force __sum16)sum; +} + +static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, + unsigned int len, + unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__( +" addcc %1, %0, %0\n" +" addccc %2, %0, %0\n" +" addccc %3, %0, %0\n" +" addc %0, %%g0, %0\n" + : "=r" (sum), "=r" (saddr) + : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) + : "cc"); + return sum; +} + +/* + * computes the checksum of the TCP/UDP pseudo-header + * returns a 16-bit checksum, already complemented + */ +static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, + unsigned short len, + unsigned short proto, + __wsum sum) +{ + return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); +} + +#define _HAVE_ARCH_IPV6_CSUM + +static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, + const struct in6_addr *daddr, + __u32 len, unsigned short proto, + __wsum sum) +{ + __asm__ __volatile__ ( +" addcc %3, %4, %%g7\n" +" addccc %5, %%g7, %%g7\n" +" lduw [%2 + 0x0c], %%g2\n" +" lduw [%2 + 0x08], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%2 + 0x04], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%2 + 0x00], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%1 + 0x0c], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%1 + 0x08], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" lduw [%1 + 0x04], %%g2\n" +" addccc %%g3, %%g7, %%g7\n" +" lduw [%1 + 0x00], %%g3\n" +" addccc %%g2, %%g7, %%g7\n" +" addccc %%g3, %%g7, %0\n" +" addc 0, %0, %0\n" + : "=&r" (sum) + : "r" (saddr), "r" (daddr), "r"(htonl(len)), + "r"(htonl(proto)), "r"(sum) + : "g2", "g3", "g7", "cc"); + + return csum_fold(sum); +} + +/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ +static inline __sum16 ip_compute_csum(const void *buff, int len) +{ + return csum_fold(csum_partial(buff, len, 0)); +} + +#endif /* !(__SPARC64_CHECKSUM_H) */ diff --git a/include/asm-sparc/cpudata.h b/include/asm-sparc/cpudata.h index a2c4d51d36c..b76fac0c8d8 100644 --- a/include/asm-sparc/cpudata.h +++ b/include/asm-sparc/cpudata.h @@ -1,27 +1,8 @@ -/* cpudata.h: Per-cpu parameters. - * - * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) - * - * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h - * both (C) David S. Miller. - */ - -#ifndef _SPARC_CPUDATA_H -#define _SPARC_CPUDATA_H - -#include <linux/percpu.h> - -typedef struct { - unsigned long udelay_val; - unsigned long clock_tick; - unsigned int multiplier; - unsigned int counter; - int prom_node; - int mid; - int next; -} cpuinfo_sparc; - -DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); -#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) - -#endif /* _SPARC_CPUDATA_H */ +#ifndef ___ASM_SPARC_CPUDATA_H +#define ___ASM_SPARC_CPUDATA_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/cpudata_64.h> +#else +#include <asm-sparc/cpudata_32.h> +#endif +#endif diff --git a/include/asm-sparc/cpudata_32.h b/include/asm-sparc/cpudata_32.h new file mode 100644 index 00000000000..a2c4d51d36c --- /dev/null +++ b/include/asm-sparc/cpudata_32.h @@ -0,0 +1,27 @@ +/* cpudata.h: Per-cpu parameters. + * + * Copyright (C) 2004 Keith M Wesolowski (wesolows@foobazco.org) + * + * Based on include/asm-sparc64/cpudata.h and Linux 2.4 smp.h + * both (C) David S. Miller. + */ + +#ifndef _SPARC_CPUDATA_H +#define _SPARC_CPUDATA_H + +#include <linux/percpu.h> + +typedef struct { + unsigned long udelay_val; + unsigned long clock_tick; + unsigned int multiplier; + unsigned int counter; + int prom_node; + int mid; + int next; +} cpuinfo_sparc; + +DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); +#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) + +#endif /* _SPARC_CPUDATA_H */ diff --git a/include/asm-sparc/cpudata_64.h b/include/asm-sparc/cpudata_64.h new file mode 100644 index 00000000000..532975ecfe1 --- /dev/null +++ b/include/asm-sparc/cpudata_64.h @@ -0,0 +1,240 @@ +/* cpudata.h: Per-cpu parameters. + * + * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_CPUDATA_H +#define _SPARC64_CPUDATA_H + +#include <asm/hypervisor.h> +#include <asm/asi.h> + +#ifndef __ASSEMBLY__ + +#include <linux/percpu.h> +#include <linux/threads.h> + +typedef struct { + /* Dcache line 1 */ + unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ + unsigned int __pad0; + unsigned long clock_tick; /* %tick's per second */ + unsigned long __pad; + unsigned int __pad1; + unsigned int __pad2; + + /* Dcache line 2, rarely used */ + unsigned int dcache_size; + unsigned int dcache_line_size; + unsigned int icache_size; + unsigned int icache_line_size; + unsigned int ecache_size; + unsigned int ecache_line_size; + int core_id; + int proc_id; +} cpuinfo_sparc; + +DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); +#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) +#define local_cpu_data() __get_cpu_var(__cpu_data) + +/* Trap handling code needs to get at a few critical values upon + * trap entry and to process TSB misses. These cannot be in the + * per_cpu() area as we really need to lock them into the TLB and + * thus make them part of the main kernel image. As a result we + * try to make this as small as possible. + * + * This is padded out and aligned to 64-bytes to avoid false sharing + * on SMP. + */ + +/* If you modify the size of this structure, please update + * TRAP_BLOCK_SZ_SHIFT below. + */ +struct thread_info; +struct trap_per_cpu { +/* D-cache line 1: Basic thread information, cpu and device mondo queues */ + struct thread_info *thread; + unsigned long pgd_paddr; + unsigned long cpu_mondo_pa; + unsigned long dev_mondo_pa; + +/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */ + unsigned long resum_mondo_pa; + unsigned long resum_kernel_buf_pa; + unsigned long nonresum_mondo_pa; + unsigned long nonresum_kernel_buf_pa; + +/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */ + struct hv_fault_status fault_info; + +/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ + unsigned long cpu_mondo_block_pa; + unsigned long cpu_list_pa; + unsigned long tsb_huge; + unsigned long tsb_huge_temp; + +/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ + unsigned long irq_worklist_pa; + unsigned int cpu_mondo_qmask; + unsigned int dev_mondo_qmask; + unsigned int resum_qmask; + unsigned int nonresum_qmask; + void *hdesc; +} __attribute__((aligned(64))); +extern struct trap_per_cpu trap_block[NR_CPUS]; +extern void init_cur_cpu_trap(struct thread_info *); +extern void setup_tba(void); +extern int ncpus_probed; +extern void __init cpu_probe(void); +extern const struct seq_operations cpuinfo_op; + +extern unsigned long real_hard_smp_processor_id(void); + +struct cpuid_patch_entry { + unsigned int addr; + unsigned int cheetah_safari[4]; + unsigned int cheetah_jbus[4]; + unsigned int starfire[4]; + unsigned int sun4v[4]; +}; +extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end; + +struct sun4v_1insn_patch_entry { + unsigned int addr; + unsigned int insn; +}; +extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch, + __sun4v_1insn_patch_end; + +struct sun4v_2insn_patch_entry { + unsigned int addr; + unsigned int insns[2]; +}; +extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, + __sun4v_2insn_patch_end; + +#endif /* !(__ASSEMBLY__) */ + +#define TRAP_PER_CPU_THREAD 0x00 +#define TRAP_PER_CPU_PGD_PADDR 0x08 +#define TRAP_PER_CPU_CPU_MONDO_PA 0x10 +#define TRAP_PER_CPU_DEV_MONDO_PA 0x18 +#define TRAP_PER_CPU_RESUM_MONDO_PA 0x20 +#define TRAP_PER_CPU_RESUM_KBUF_PA 0x28 +#define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x30 +#define TRAP_PER_CPU_NONRESUM_KBUF_PA 0x38 +#define TRAP_PER_CPU_FAULT_INFO 0x40 +#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 +#define TRAP_PER_CPU_CPU_LIST_PA 0xc8 +#define TRAP_PER_CPU_TSB_HUGE 0xd0 +#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 +#define TRAP_PER_CPU_IRQ_WORKLIST_PA 0xe0 +#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe8 +#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xec +#define TRAP_PER_CPU_RESUM_QMASK 0xf0 +#define TRAP_PER_CPU_NONRESUM_QMASK 0xf4 + +#define TRAP_BLOCK_SZ_SHIFT 8 + +#include <asm/scratchpad.h> + +#define __GET_CPUID(REG) \ + /* Spitfire implementation (default). */ \ +661: ldxa [%g0] ASI_UPA_CONFIG, REG; \ + srlx REG, 17, REG; \ + and REG, 0x1f, REG; \ + nop; \ + .section .cpuid_patch, "ax"; \ + /* Instruction location. */ \ + .word 661b; \ + /* Cheetah Safari implementation. */ \ + ldxa [%g0] ASI_SAFARI_CONFIG, REG; \ + srlx REG, 17, REG; \ + and REG, 0x3ff, REG; \ + nop; \ + /* Cheetah JBUS implementation. */ \ + ldxa [%g0] ASI_JBUS_CONFIG, REG; \ + srlx REG, 17, REG; \ + and REG, 0x1f, REG; \ + nop; \ + /* Starfire implementation. */ \ + sethi %hi(0x1fff40000d0 >> 9), REG; \ + sllx REG, 9, REG; \ + or REG, 0xd0, REG; \ + lduwa [REG] ASI_PHYS_BYPASS_EC_E, REG;\ + /* sun4v implementation. */ \ + mov SCRATCHPAD_CPUID, REG; \ + ldxa [REG] ASI_SCRATCHPAD, REG; \ + nop; \ + nop; \ + .previous; + +#ifdef CONFIG_SMP + +#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + __GET_CPUID(TMP) \ + sethi %hi(trap_block), DEST; \ + sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ + or DEST, %lo(trap_block), DEST; \ + add DEST, TMP, DEST; \ + +/* Clobbers TMP, current address space PGD phys address into DEST. */ +#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; + +/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ +#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; + +/* Clobbers TMP, loads DEST with current thread info pointer. */ +#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + ldx [DEST + TRAP_PER_CPU_THREAD], DEST; + +/* Given the current thread info pointer in THR, load the per-cpu + * area base of the current processor into DEST. REG1, REG2, and REG3 are + * clobbered. + * + * You absolutely cannot use DEST as a temporary in this code. The + * reason is that traps can happen during execution, and return from + * trap will load the fully resolved DEST per-cpu base. This can corrupt + * the calculations done by the macro mid-stream. + */ +#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ + lduh [THR + TI_CPU], REG1; \ + sethi %hi(__per_cpu_shift), REG3; \ + sethi %hi(__per_cpu_base), REG2; \ + ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ + ldx [REG2 + %lo(__per_cpu_base)], REG2; \ + sllx REG1, REG3, REG3; \ + add REG3, REG2, DEST; + +#else + +#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + sethi %hi(trap_block), DEST; \ + or DEST, %lo(trap_block), DEST; \ + +/* Uniprocessor versions, we know the cpuid is zero. */ +#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; + +/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ +#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; + +#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ + TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ + ldx [DEST + TRAP_PER_CPU_THREAD], DEST; + +/* No per-cpu areas on uniprocessor, so no need to load DEST. */ +#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) + +#endif /* !(CONFIG_SMP) */ + +#endif /* _SPARC64_CPUDATA_H */ diff --git a/include/asm-sparc/delay.h b/include/asm-sparc/delay.h index bc9aba2bead..6210a3ce975 100644 --- a/include/asm-sparc/delay.h +++ b/include/asm-sparc/delay.h @@ -1,34 +1,8 @@ -/* - * delay.h: Linux delay routines on the Sparc. - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu). - */ - -#ifndef __SPARC_DELAY_H -#define __SPARC_DELAY_H - -#include <asm/cpudata.h> - -static inline void __delay(unsigned long loops) -{ - __asm__ __volatile__("cmp %0, 0\n\t" - "1: bne 1b\n\t" - "subcc %0, 1, %0\n" : - "=&r" (loops) : - "0" (loops) : - "cc"); -} - -/* This is too messy with inline asm on the Sparc. */ -extern void __udelay(unsigned long usecs, unsigned long lpj); -extern void __ndelay(unsigned long nsecs, unsigned long lpj); - -#ifdef CONFIG_SMP -#define __udelay_val cpu_data(smp_processor_id()).udelay_val -#else /* SMP */ -#define __udelay_val loops_per_jiffy -#endif /* SMP */ -#define udelay(__usecs) __udelay(__usecs, __udelay_val) -#define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val) - -#endif /* defined(__SPARC_DELAY_H) */ +#ifndef ___ASM_SPARC_DELAY_H +#define ___ASM_SPARC_DELAY_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/delay_64.h> +#else +#include <asm-sparc/delay_32.h> +#endif +#endif diff --git a/include/asm-sparc/delay_32.h b/include/asm-sparc/delay_32.h new file mode 100644 index 00000000000..bc9aba2bead --- /dev/null +++ b/include/asm-sparc/delay_32.h @@ -0,0 +1,34 @@ +/* + * delay.h: Linux delay routines on the Sparc. + * + * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu). + */ + +#ifndef __SPARC_DELAY_H +#define __SPARC_DELAY_H + +#include <asm/cpudata.h> + +static inline void __delay(unsigned long loops) +{ + __asm__ __volatile__("cmp %0, 0\n\t" + "1: bne 1b\n\t" + "subcc %0, 1, %0\n" : + "=&r" (loops) : + "0" (loops) : + "cc"); +} + +/* This is too messy with inline asm on the Sparc. */ +extern void __udelay(unsigned long usecs, unsigned long lpj); +extern void __ndelay(unsigned long nsecs, unsigned long lpj); + +#ifdef CONFIG_SMP +#define __udelay_val cpu_data(smp_processor_id()).udelay_val +#else /* SMP */ +#define __udelay_val loops_per_jiffy +#endif /* SMP */ +#define udelay(__usecs) __udelay(__usecs, __udelay_val) +#define ndelay(__nsecs) __ndelay(__nsecs, __udelay_val) + +#endif /* defined(__SPARC_DELAY_H) */ diff --git a/include/asm-sparc/delay_64.h b/include/asm-sparc/delay_64.h new file mode 100644 index 00000000000..a77aa622d76 --- /dev/null +++ b/include/asm-sparc/delay_64.h @@ -0,0 +1,17 @@ +/* delay.h: Linux delay routines on sparc64. + * + * Copyright (C) 1996, 2004, 2007 David S. Miller (davem@davemloft.net). + */ + +#ifndef _SPARC64_DELAY_H +#define _SPARC64_DELAY_H + +#ifndef __ASSEMBLY__ + +extern void __delay(unsigned long loops); +extern void udelay(unsigned long usecs); +#define mdelay(n) udelay((n) * 1000) + +#endif /* !__ASSEMBLY__ */ + +#endif /* _SPARC64_DELAY_H */ diff --git a/include/asm-sparc/dma-mapping.h b/include/asm-sparc/dma-mapping.h index f3a641e6b2c..7483504259c 100644 --- a/include/asm-sparc/dma-mapping.h +++ b/include/asm-sparc/dma-mapping.h @@ -1,11 +1,8 @@ -#ifndef _ASM_SPARC_DMA_MAPPING_H -#define _ASM_SPARC_DMA_MAPPING_H - - -#ifdef CONFIG_PCI -#include <asm-generic/dma-mapping.h> +#ifndef ___ASM_SPARC_DMA_MAPPING_H +#define ___ASM_SPARC_DMA_MAPPING_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/dma-mapping_64.h> #else -#include <asm-generic/dma-mapping-broken.h> -#endif /* PCI */ - -#endif /* _ASM_SPARC_DMA_MAPPING_H */ +#include <asm-sparc/dma-mapping_32.h> +#endif +#endif diff --git a/include/asm-sparc/dma-mapping_32.h b/include/asm-sparc/dma-mapping_32.h new file mode 100644 index 00000000000..f3a641e6b2c --- /dev/null +++ b/include/asm-sparc/dma-mapping_32.h @@ -0,0 +1,11 @@ +#ifndef _ASM_SPARC_DMA_MAPPING_H +#define _ASM_SPARC_DMA_MAPPING_H + + +#ifdef CONFIG_PCI +#include <asm-generic/dma-mapping.h> +#else +#include <asm-generic/dma-mapping-broken.h> +#endif /* PCI */ + +#endif /* _ASM_SPARC_DMA_MAPPING_H */ diff --git a/include/asm-sparc/dma-mapping_64.h b/include/asm-sparc/dma-mapping_64.h new file mode 100644 index 00000000000..38cbec76a33 --- /dev/null +++ b/include/asm-sparc/dma-mapping_64.h @@ -0,0 +1,154 @@ +#ifndef _ASM_SPARC64_DMA_MAPPING_H +#define _ASM_SPARC64_DMA_MAPPING_H + +#include <linux/scatterlist.h> +#include <linux/mm.h> + +#define DMA_ERROR_CODE (~(dma_addr_t)0x0) + +struct dma_ops { + void *(*alloc_coherent)(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag); + void (*free_coherent)(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle); + dma_addr_t (*map_single)(struct device *dev, void *cpu_addr, + size_t size, + enum dma_data_direction direction); + void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction); + int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction direction); + void (*unmap_sg)(struct device *dev, struct scatterlist *sg, + int nhwentries, + enum dma_data_direction direction); + void (*sync_single_for_cpu)(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction); + void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, + int nelems, + enum dma_data_direction direction); +}; +extern const struct dma_ops *dma_ops; + +extern int dma_supported(struct device *dev, u64 mask); +extern int dma_set_mask(struct device *dev, u64 dma_mask); + +static inline void *dma_alloc_coherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t flag) +{ + return dma_ops->alloc_coherent(dev, size, dma_handle, flag); +} + +static inline void dma_free_coherent(struct device *dev, size_t size, + void *cpu_addr, dma_addr_t dma_handle) +{ + dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); +} + +static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, + size_t size, + enum dma_data_direction direction) +{ + return dma_ops->map_single(dev, cpu_addr, size, direction); +} + +static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, + size_t size, + enum dma_data_direction direction) +{ + dma_ops->unmap_single(dev, dma_addr, size, direction); +} + +static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction direction) +{ + return dma_ops->map_single(dev, page_address(page) + offset, + size, direction); +} + +static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, + size_t size, + enum dma_data_direction direction) +{ + dma_ops->unmap_single(dev, dma_address, size, direction); +} + +static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction) +{ + return dma_ops->map_sg(dev, sg, nents, direction); +} + +static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction direction) +{ + dma_ops->unmap_sg(dev, sg, nents, direction); +} + +static inline void dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction direction) +{ + dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction); +} + +static inline void dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, + size_t size, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void dma_sync_single_range_for_cpu(struct device *dev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); +} + +static inline void dma_sync_single_range_for_device(struct device *dev, + dma_addr_t dma_handle, + unsigned long offset, + size_t size, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + + +static inline void dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction direction) +{ + dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction); +} + +static inline void dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nelems, + enum dma_data_direction direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline int dma_mapping_error(dma_addr_t dma_addr) +{ + return (dma_addr == DMA_ERROR_CODE); +} + +static inline int dma_get_cache_alignment(void) +{ + /* no easy way to get cache size on all processors, so return + * the maximum possible, to be safe */ + return (1 << INTERNODE_CACHE_SHIFT); +} + +#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) +#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) +#define dma_is_consistent(d, h) (1) + +#endif /* _ASM_SPARC64_DMA_MAPPING_H */ diff --git a/include/asm-sparc/dma.h b/include/asm-sparc/dma.h index 959d6c8a71a..8cc69bfaae2 100644 --- a/include/asm-sparc/dma.h +++ b/include/asm-sparc/dma.h @@ -1,288 +1,8 @@ -/* include/asm-sparc/dma.h - * - * Copyright 1995 (C) David S. Miller (davem@davemloft.net) - */ - -#ifndef _ASM_SPARC_DMA_H -#define _ASM_SPARC_DMA_H - -#include <linux/kernel.h> -#include <linux/types.h> - -#include <asm/vac-ops.h> /* for invalidate's, etc. */ -#include <asm/sbus.h> -#include <asm/delay.h> -#include <asm/oplib.h> -#include <asm/system.h> -#include <asm/io.h> -#include <linux/spinlock.h> - -struct page; -extern spinlock_t dma_spin_lock; - -static inline unsigned long claim_dma_lock(void) -{ - unsigned long flags; - spin_lock_irqsave(&dma_spin_lock, flags); - return flags; -} - -static inline void release_dma_lock(unsigned long flags) -{ - spin_unlock_irqrestore(&dma_spin_lock, flags); -} - -/* These are irrelevant for Sparc DMA, but we leave it in so that - * things can compile. - */ -#define MAX_DMA_CHANNELS 8 -#define MAX_DMA_ADDRESS (~0UL) -#define DMA_MODE_READ 1 -#define DMA_MODE_WRITE 2 - -/* Useful constants */ -#define SIZE_16MB (16*1024*1024) -#define SIZE_64K (64*1024) - -/* SBUS DMA controller reg offsets */ -#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ -#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ -#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ -#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ - -/* DVMA chip revisions */ -enum dvma_rev { - dvmarev0, - dvmaesc1, - dvmarev1, - dvmarev2, - dvmarev3, - dvmarevplus, - dvmahme -}; - -#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) - -/* Linux DMA information structure, filled during probe. */ -struct sbus_dma { - struct sbus_dma *next; - struct sbus_dev *sdev; - void __iomem *regs; - - /* Status, misc info */ - int node; /* Prom node for this DMA device */ - int running; /* Are we doing DMA now? */ - int allocated; /* Are we "owned" by anyone yet? */ - - /* Transfer information. */ - unsigned long addr; /* Start address of current transfer */ - int nbytes; /* Size of current transfer */ - int realbytes; /* For splitting up large transfers, etc. */ - - /* DMA revision */ - enum dvma_rev revision; -}; - -extern struct sbus_dma *dma_chain; - -/* Broken hardware... */ -#ifdef CONFIG_SUN4 -/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? - * Or is rev0 present only on sun4 boxes? -jj */ -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) +#ifndef ___ASM_SPARC_DMA_H +#define ___ASM_SPARC_DMA_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/dma_64.h> #else -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) +#include <asm-sparc/dma_32.h> #endif -#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) - -/* Main routines in dma.c */ -extern void dvma_init(struct sbus_bus *); - -/* Fields in the cond_reg register */ -/* First, the version identification bits */ -#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ -#define DMA_VERS0 0x00000000 /* Sunray DMA version */ -#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ -#define DMA_VERS1 0x80000000 /* DMA rev 1 */ -#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ -#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ -#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ - -#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ -#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ -#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ -#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ -#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ -#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ -#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ -#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ -#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ -#define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ -#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ -#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ -#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ -#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ -#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ -#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ -#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ -#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ -#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ -#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ -#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ -#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ -#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ -#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ -#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ -#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ -#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ -#define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ -#define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ -#define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ -#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ -#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ -#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ -#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ -#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ -#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ -#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ -#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ -#define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ -#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ -#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ -#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ -#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ - -/* Values describing the burst-size property from the PROM */ -#define DMA_BURST1 0x01 -#define DMA_BURST2 0x02 -#define DMA_BURST4 0x04 -#define DMA_BURST8 0x08 -#define DMA_BURST16 0x10 -#define DMA_BURST32 0x20 -#define DMA_BURST64 0x40 -#define DMA_BURSTBITS 0x7f - -/* Determine highest possible final transfer address given a base */ -#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) - -/* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) -#define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) -#define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) -#define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) -#define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) -#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) -#define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) -#define DMA_BEGINDMA_W(regs) \ - ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) -#define DMA_BEGINDMA_R(regs) \ - ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) - -/* For certain DMA chips, we need to disable ints upon irq entry - * and turn them back on when we are done. So in any ESP interrupt - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT - * when leaving the handler. You have been warned... - */ -#define DMA_IRQ_ENTRY(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ - } while (0) - -#define DMA_IRQ_EXIT(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ - } while(0) - -#if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ -/* Pause until counter runs out or BIT isn't set in the DMA condition - * register. - */ -static inline void sparc_dma_pause(struct sparc_dma_registers *regs, - unsigned long bit) -{ - int ctr = 50000; /* Let's find some bugs ;) */ - - /* Busy wait until the bit is not set any more */ - while((regs->cond_reg&bit) && (ctr>0)) { - ctr--; - __delay(5); - } - - /* Check for bogus outcome. */ - if(!ctr) - panic("DMA timeout"); -} - -/* Reset the friggin' thing... */ -#define DMA_RESET(dma) do { \ - struct sparc_dma_registers *regs = dma->regs; \ - /* Let the current FIFO drain itself */ \ - sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ - /* Reset the logic */ \ - regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ - __delay(400); /* let the bits set ;) */ \ - regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ - sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ - /* Enable FAST transfers if available */ \ - if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ - dma->running = 0; \ -} while(0) #endif - -#define for_each_dvma(dma) \ - for((dma) = dma_chain; (dma); (dma) = (dma)->next) - -extern int get_dma_list(char *); -extern int request_dma(unsigned int, __const__ char *); -extern void free_dma(unsigned int); - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -/* Routines for data transfer buffers. */ -BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) -BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) - -#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) -#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) - -/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ -BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) -BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) - -#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) -#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) -#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) -#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) - -/* - * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. - * - * The mmu_map_dma_area establishes two mappings in one go. - * These mappings point to pages normally mapped at 'va' (linear address). - * First mapping is for CPU visible address at 'a', uncached. - * This is an alias, but it works because it is an uncached mapping. - * Second mapping is for device visible address, or "bus" address. - * The bus address is returned at '*pba'. - * - * These functions seem distinct, but are hard to split. On sun4c, - * at least for now, 'a' is equal to bus address, and retured in *pba. - * On sun4m, page attributes depend on the CPU type, so we have to - * know if we are mapping RAM or I/O, so it has to be an additional argument - * to a separate mapping function for CPU visible mappings. - */ -BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) -BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) -BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) - -#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) -#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) -#define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) - -#endif /* !(_ASM_SPARC_DMA_H) */ diff --git a/include/asm-sparc/dma_32.h b/include/asm-sparc/dma_32.h new file mode 100644 index 00000000000..959d6c8a71a --- /dev/null +++ b/include/asm-sparc/dma_32.h @@ -0,0 +1,288 @@ +/* include/asm-sparc/dma.h + * + * Copyright 1995 (C) David S. Miller (davem@davemloft.net) + */ + +#ifndef _ASM_SPARC_DMA_H +#define _ASM_SPARC_DMA_H + +#include <linux/kernel.h> +#include <linux/types.h> + +#include <asm/vac-ops.h> /* for invalidate's, etc. */ +#include <asm/sbus.h> +#include <asm/delay.h> +#include <asm/oplib.h> +#include <asm/system.h> +#include <asm/io.h> +#include <linux/spinlock.h> + +struct page; +extern spinlock_t dma_spin_lock; + +static inline unsigned long claim_dma_lock(void) +{ + unsigned long flags; + spin_lock_irqsave(&dma_spin_lock, flags); + return flags; +} + +static inline void release_dma_lock(unsigned long flags) +{ + spin_unlock_irqrestore(&dma_spin_lock, flags); +} + +/* These are irrelevant for Sparc DMA, but we leave it in so that + * things can compile. + */ +#define MAX_DMA_CHANNELS 8 +#define MAX_DMA_ADDRESS (~0UL) +#define DMA_MODE_READ 1 +#define DMA_MODE_WRITE 2 + +/* Useful constants */ +#define SIZE_16MB (16*1024*1024) +#define SIZE_64K (64*1024) + +/* SBUS DMA controller reg offsets */ +#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ +#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ +#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ +#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ + +/* DVMA chip revisions */ +enum dvma_rev { + dvmarev0, + dvmaesc1, + dvmarev1, + dvmarev2, + dvmarev3, + dvmarevplus, + dvmahme +}; + +#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) + +/* Linux DMA information structure, filled during probe. */ +struct sbus_dma { + struct sbus_dma *next; + struct sbus_dev *sdev; + void __iomem *regs; + + /* Status, misc info */ + int node; /* Prom node for this DMA device */ + int running; /* Are we doing DMA now? */ + int allocated; /* Are we "owned" by anyone yet? */ + + /* Transfer information. */ + unsigned long addr; /* Start address of current transfer */ + int nbytes; /* Size of current transfer */ + int realbytes; /* For splitting up large transfers, etc. */ + + /* DMA revision */ + enum dvma_rev revision; +}; + +extern struct sbus_dma *dma_chain; + +/* Broken hardware... */ +#ifdef CONFIG_SUN4 +/* Have to sort this out. Does rev0 work fine on sun4[cmd] without isbroken? + * Or is rev0 present only on sun4 boxes? -jj */ +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev0 || (dma)->revision == dvmarev1) +#else +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) +#endif +#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) + +/* Main routines in dma.c */ +extern void dvma_init(struct sbus_bus *); + +/* Fields in the cond_reg register */ +/* First, the version identification bits */ +#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ +#define DMA_VERS0 0x00000000 /* Sunray DMA version */ +#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ +#define DMA_VERS1 0x80000000 /* DMA rev 1 */ +#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ +#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ +#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ + +#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ +#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ +#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ +#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ +#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ +#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ +#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ +#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ +#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ +#define DMA_RST_BPP DMA_RST_SCSI /* Reset the BPP controller */ +#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ +#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ +#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ +#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ +#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ +#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ +#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ +#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ +#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ +#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ +#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ +#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ +#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ +#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ +#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ +#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ +#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ +#define DMA_BRST64 0x00080000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ +#define DMA_BRST32 0x00040000 /* SCSI/BPP: 32byte bursts */ +#define DMA_BRST16 0x00000000 /* SCSI/BPP: 16byte bursts */ +#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ +#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ +#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ +#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ +#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ +#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ +#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ +#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ +#define DMA_BPP_ON DMA_SCSI_ON /* Enable BPP dma */ +#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ +#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ +#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ +#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ + +/* Values describing the burst-size property from the PROM */ +#define DMA_BURST1 0x01 +#define DMA_BURST2 0x02 +#define DMA_BURST4 0x04 +#define DMA_BURST8 0x08 +#define DMA_BURST16 0x10 +#define DMA_BURST32 0x20 +#define DMA_BURST64 0x40 +#define DMA_BURSTBITS 0x7f + +/* Determine highest possible final transfer address given a base */ +#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) + +/* Yes, I hack a lot of elisp in my spare time... */ +#define DMA_ERROR_P(regs) ((((regs)->cond_reg) & DMA_HNDL_ERROR)) +#define DMA_IRQ_P(regs) ((((regs)->cond_reg) & (DMA_HNDL_INTR | DMA_HNDL_ERROR))) +#define DMA_WRITE_P(regs) ((((regs)->cond_reg) & DMA_ST_WRITE)) +#define DMA_OFF(regs) ((((regs)->cond_reg) &= (~DMA_ENABLE))) +#define DMA_INTSOFF(regs) ((((regs)->cond_reg) &= (~DMA_INT_ENAB))) +#define DMA_INTSON(regs) ((((regs)->cond_reg) |= (DMA_INT_ENAB))) +#define DMA_PUNTFIFO(regs) ((((regs)->cond_reg) |= DMA_FIFO_INV)) +#define DMA_SETSTART(regs, addr) ((((regs)->st_addr) = (char *) addr)) +#define DMA_BEGINDMA_W(regs) \ + ((((regs)->cond_reg |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB)))) +#define DMA_BEGINDMA_R(regs) \ + ((((regs)->cond_reg |= ((DMA_ENABLE|DMA_INT_ENAB)&(~DMA_ST_WRITE))))) + +/* For certain DMA chips, we need to disable ints upon irq entry + * and turn them back on when we are done. So in any ESP interrupt + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT + * when leaving the handler. You have been warned... + */ +#define DMA_IRQ_ENTRY(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ + } while (0) + +#define DMA_IRQ_EXIT(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ + } while(0) + +#if 0 /* P3 this stuff is inline in ledma.c:init_restart_ledma() */ +/* Pause until counter runs out or BIT isn't set in the DMA condition + * register. + */ +static inline void sparc_dma_pause(struct sparc_dma_registers *regs, + unsigned long bit) +{ + int ctr = 50000; /* Let's find some bugs ;) */ + + /* Busy wait until the bit is not set any more */ + while((regs->cond_reg&bit) && (ctr>0)) { + ctr--; + __delay(5); + } + + /* Check for bogus outcome. */ + if(!ctr) + panic("DMA timeout"); +} + +/* Reset the friggin' thing... */ +#define DMA_RESET(dma) do { \ + struct sparc_dma_registers *regs = dma->regs; \ + /* Let the current FIFO drain itself */ \ + sparc_dma_pause(regs, (DMA_FIFO_ISDRAIN)); \ + /* Reset the logic */ \ + regs->cond_reg |= (DMA_RST_SCSI); /* assert */ \ + __delay(400); /* let the bits set ;) */ \ + regs->cond_reg &= ~(DMA_RST_SCSI); /* de-assert */ \ + sparc_dma_enable_interrupts(regs); /* Re-enable interrupts */ \ + /* Enable FAST transfers if available */ \ + if(dma->revision>dvmarev1) regs->cond_reg |= DMA_3CLKS; \ + dma->running = 0; \ +} while(0) +#endif + +#define for_each_dvma(dma) \ + for((dma) = dma_chain; (dma); (dma) = (dma)->next) + +extern int get_dma_list(char *); +extern int request_dma(unsigned int, __const__ char *); +extern void free_dma(unsigned int); + +/* From PCI */ + +#ifdef CONFIG_PCI +extern int isa_dma_bridge_buggy; +#else +#define isa_dma_bridge_buggy (0) +#endif + +/* Routines for data transfer buffers. */ +BTFIXUPDEF_CALL(char *, mmu_lockarea, char *, unsigned long) +BTFIXUPDEF_CALL(void, mmu_unlockarea, char *, unsigned long) + +#define mmu_lockarea(vaddr,len) BTFIXUP_CALL(mmu_lockarea)(vaddr,len) +#define mmu_unlockarea(vaddr,len) BTFIXUP_CALL(mmu_unlockarea)(vaddr,len) + +/* These are implementations for sbus_map_sg/sbus_unmap_sg... collapse later */ +BTFIXUPDEF_CALL(__u32, mmu_get_scsi_one, char *, unsigned long, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_get_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_release_scsi_one, __u32, unsigned long, struct sbus_bus *sbus) +BTFIXUPDEF_CALL(void, mmu_release_scsi_sgl, struct scatterlist *, int, struct sbus_bus *sbus) + +#define mmu_get_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_get_scsi_one)(vaddr,len,sbus) +#define mmu_get_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_get_scsi_sgl)(sg,sz,sbus) +#define mmu_release_scsi_one(vaddr,len,sbus) BTFIXUP_CALL(mmu_release_scsi_one)(vaddr,len,sbus) +#define mmu_release_scsi_sgl(sg,sz,sbus) BTFIXUP_CALL(mmu_release_scsi_sgl)(sg,sz,sbus) + +/* + * mmu_map/unmap are provided by iommu/iounit; Invalid to call on IIep. + * + * The mmu_map_dma_area establishes two mappings in one go. + * These mappings point to pages normally mapped at 'va' (linear address). + * First mapping is for CPU visible address at 'a', uncached. + * This is an alias, but it works because it is an uncached mapping. + * Second mapping is for device visible address, or "bus" address. + * The bus address is returned at '*pba'. + * + * These functions seem distinct, but are hard to split. On sun4c, + * at least for now, 'a' is equal to bus address, and retured in *pba. + * On sun4m, page attributes depend on the CPU type, so we have to + * know if we are mapping RAM or I/O, so it has to be an additional argument + * to a separate mapping function for CPU visible mappings. + */ +BTFIXUPDEF_CALL(int, mmu_map_dma_area, dma_addr_t *, unsigned long, unsigned long, int len) +BTFIXUPDEF_CALL(struct page *, mmu_translate_dvma, unsigned long busa) +BTFIXUPDEF_CALL(void, mmu_unmap_dma_area, unsigned long busa, int len) + +#define mmu_map_dma_area(pba,va,a,len) BTFIXUP_CALL(mmu_map_dma_area)(pba,va,a,len) +#define mmu_unmap_dma_area(ba,len) BTFIXUP_CALL(mmu_unmap_dma_area)(ba,len) +#define mmu_translate_dvma(ba) BTFIXUP_CALL(mmu_translate_dvma)(ba) + +#endif /* !(_ASM_SPARC_DMA_H) */ diff --git a/include/asm-sparc/dma_64.h b/include/asm-sparc/dma_64.h new file mode 100644 index 00000000000..9d4c024bd3b --- /dev/null +++ b/include/asm-sparc/dma_64.h @@ -0,0 +1,205 @@ +/* + * include/asm-sparc64/dma.h + * + * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _ASM_SPARC64_DMA_H +#define _ASM_SPARC64_DMA_H + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/spinlock.h> + +#include <asm/sbus.h> +#include <asm/delay.h> +#include <asm/oplib.h> + +/* These are irrelevant for Sparc DMA, but we leave it in so that + * things can compile. + */ +#define MAX_DMA_CHANNELS 8 +#define DMA_MODE_READ 1 +#define DMA_MODE_WRITE 2 +#define MAX_DMA_ADDRESS (~0UL) + +/* Useful constants */ +#define SIZE_16MB (16*1024*1024) +#define SIZE_64K (64*1024) + +/* SBUS DMA controller reg offsets */ +#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ +#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ +#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ +#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ + +/* DVMA chip revisions */ +enum dvma_rev { + dvmarev0, + dvmaesc1, + dvmarev1, + dvmarev2, + dvmarev3, + dvmarevplus, + dvmahme +}; + +#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) + +/* Linux DMA information structure, filled during probe. */ +struct sbus_dma { + struct sbus_dma *next; + struct sbus_dev *sdev; + void __iomem *regs; + + /* Status, misc info */ + int node; /* Prom node for this DMA device */ + int running; /* Are we doing DMA now? */ + int allocated; /* Are we "owned" by anyone yet? */ + + /* Transfer information. */ + u32 addr; /* Start address of current transfer */ + int nbytes; /* Size of current transfer */ + int realbytes; /* For splitting up large transfers, etc. */ + + /* DMA revision */ + enum dvma_rev revision; +}; + +extern struct sbus_dma *dma_chain; + +/* Broken hardware... */ +#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) +#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) + +/* Main routines in dma.c */ +extern void dvma_init(struct sbus_bus *); + +/* Fields in the cond_reg register */ +/* First, the version identification bits */ +#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ +#define DMA_VERS0 0x00000000 /* Sunray DMA version */ +#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ +#define DMA_VERS1 0x80000000 /* DMA rev 1 */ +#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ +#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ +#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ + +#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ +#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ +#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ +#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ +#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ +#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ +#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ +#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ +#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ +#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ +#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ +#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ +#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ +#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ +#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ +#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ +#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ +#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ +#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ +#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ +#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ +#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ +#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ +#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ +#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ +#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ +#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ +#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ +#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ +#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ +#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ +#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ +#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ +#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ +#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ +#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ +#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ +#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ +#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ +#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ +#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ + +/* Values describing the burst-size property from the PROM */ +#define DMA_BURST1 0x01 +#define DMA_BURST2 0x02 +#define DMA_BURST4 0x04 +#define DMA_BURST8 0x08 +#define DMA_BURST16 0x10 +#define DMA_BURST32 0x20 +#define DMA_BURST64 0x40 +#define DMA_BURSTBITS 0x7f + +/* Determine highest possible final transfer address given a base */ +#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) + +/* Yes, I hack a lot of elisp in my spare time... */ +#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) +#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) +#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) +#define DMA_OFF(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp &= ~DMA_ENABLE; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_INTSOFF(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp &= ~DMA_INT_ENAB; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_INTSON(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= DMA_INT_ENAB; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_PUNTFIFO(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= DMA_FIFO_INV; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_SETSTART(__regs, __addr) \ + sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); +#define DMA_BEGINDMA_W(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) +#define DMA_BEGINDMA_R(__regs) \ +do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ + tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ + tmp &= ~DMA_ST_WRITE; \ + sbus_writel(tmp, (__regs) + DMA_CSR); \ +} while(0) + +/* For certain DMA chips, we need to disable ints upon irq entry + * and turn them back on when we are done. So in any ESP interrupt + * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT + * when leaving the handler. You have been warned... + */ +#define DMA_IRQ_ENTRY(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ + } while (0) + +#define DMA_IRQ_EXIT(dma, dregs) do { \ + if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ + } while(0) + +#define for_each_dvma(dma) \ + for((dma) = dma_chain; (dma); (dma) = (dma)->next) + +/* From PCI */ + +#ifdef CONFIG_PCI +extern int isa_dma_bridge_buggy; +#else +#define isa_dma_bridge_buggy (0) +#endif + +#endif /* !(_ASM_SPARC64_DMA_H) */ diff --git a/include/asm-sparc/ebus.h b/include/asm-sparc/ebus.h index 491f85d662d..a5da2d00cd1 100644 --- a/include/asm-sparc/ebus.h +++ b/include/asm-sparc/ebus.h @@ -1,99 +1,8 @@ -/* - * ebus.h: PCI to Ebus pseudo driver software state. - * - * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) - * - * Adopted for sparc by V. Roganov and G. Raiko. - */ - -#ifndef __SPARC_EBUS_H -#define __SPARC_EBUS_H - -#ifndef _LINUX_IOPORT_H -#include <linux/ioport.h> +#ifndef ___ASM_SPARC_EBUS_H +#define ___ASM_SPARC_EBUS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/ebus_64.h> +#else +#include <asm-sparc/ebus_32.h> +#endif #endif -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> - -struct linux_ebus_child { - struct linux_ebus_child *next; - struct linux_ebus_device *parent; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; - -struct linux_ebus_device { - struct of_device ofdev; - struct linux_ebus_device *next; - struct linux_ebus_child *children; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; -#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) - -struct linux_ebus { - struct of_device ofdev; - struct linux_ebus *next; - struct linux_ebus_device *devices; - struct linux_pbm_info *parent; - struct pci_dev *self; - struct device_node *prom_node; -}; -#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) - -struct linux_ebus_dma { - unsigned int dcsr; - unsigned int dacr; - unsigned int dbcr; -}; - -#define EBUS_DCSR_INT_PEND 0x00000001 -#define EBUS_DCSR_ERR_PEND 0x00000002 -#define EBUS_DCSR_DRAIN 0x00000004 -#define EBUS_DCSR_INT_EN 0x00000010 -#define EBUS_DCSR_RESET 0x00000080 -#define EBUS_DCSR_WRITE 0x00000100 -#define EBUS_DCSR_EN_DMA 0x00000200 -#define EBUS_DCSR_CYC_PEND 0x00000400 -#define EBUS_DCSR_DIAG_RD_DONE 0x00000800 -#define EBUS_DCSR_DIAG_WR_DONE 0x00001000 -#define EBUS_DCSR_EN_CNT 0x00002000 -#define EBUS_DCSR_TC 0x00004000 -#define EBUS_DCSR_DIS_CSR_DRN 0x00010000 -#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000 -#define EBUS_DCSR_BURST_SZ_1 0x00080000 -#define EBUS_DCSR_BURST_SZ_4 0x00000000 -#define EBUS_DCSR_BURST_SZ_8 0x00040000 -#define EBUS_DCSR_BURST_SZ_16 0x000c0000 -#define EBUS_DCSR_DIAG_EN 0x00100000 -#define EBUS_DCSR_DIS_ERR_PEND 0x00400000 -#define EBUS_DCSR_TCI_DIS 0x00800000 -#define EBUS_DCSR_EN_NEXT 0x01000000 -#define EBUS_DCSR_DMA_ON 0x02000000 -#define EBUS_DCSR_A_LOADED 0x04000000 -#define EBUS_DCSR_NA_LOADED 0x08000000 -#define EBUS_DCSR_DEV_ID_MASK 0xf0000000 - -extern struct linux_ebus *ebus_chain; - -extern void ebus_init(void); - -#define for_each_ebus(bus) \ - for((bus) = ebus_chain; (bus); (bus) = (bus)->next) - -#define for_each_ebusdev(dev, bus) \ - for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) - -#define for_each_edevchild(dev, child) \ - for((child) = (dev)->children; (child); (child) = (child)->next) - -#endif /* !(__SPARC_EBUS_H) */ diff --git a/include/asm-sparc/ebus_32.h b/include/asm-sparc/ebus_32.h new file mode 100644 index 00000000000..29cb7dfc6b7 --- /dev/null +++ b/include/asm-sparc/ebus_32.h @@ -0,0 +1,99 @@ +/* + * ebus.h: PCI to Ebus pseudo driver software state. + * + * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) + * + * Adopted for sparc by V. Roganov and G. Raiko. + */ + +#ifndef __SPARC_EBUS_H +#define __SPARC_EBUS_H + +#ifndef _LINUX_IOPORT_H +#include <linux/ioport.h> +#endif +#include <asm/oplib.h> +#include <asm/prom.h> +#include <asm/of_device.h> + +struct linux_ebus_child { + struct linux_ebus_child *next; + struct linux_ebus_device *parent; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; + +struct linux_ebus_device { + struct of_device ofdev; + struct linux_ebus_device *next; + struct linux_ebus_child *children; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; +#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) + +struct linux_ebus { + struct of_device ofdev; + struct linux_ebus *next; + struct linux_ebus_device *devices; + struct linux_pbm_info *parent; + struct pci_dev *self; + struct device_node *prom_node; +}; +#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) + +struct linux_ebus_dma { + unsigned int dcsr; + unsigned int dacr; + unsigned int dbcr; +}; + +#define EBUS_DCSR_INT_PEND 0x00000001 +#define EBUS_DCSR_ERR_PEND 0x00000002 +#define EBUS_DCSR_DRAIN 0x00000004 +#define EBUS_DCSR_INT_EN 0x00000010 +#define EBUS_DCSR_RESET 0x00000080 +#define EBUS_DCSR_WRITE 0x00000100 +#define EBUS_DCSR_EN_DMA 0x00000200 +#define EBUS_DCSR_CYC_PEND 0x00000400 +#define EBUS_DCSR_DIAG_RD_DONE 0x00000800 +#define EBUS_DCSR_DIAG_WR_DONE 0x00001000 +#define EBUS_DCSR_EN_CNT 0x00002000 +#define EBUS_DCSR_TC 0x00004000 +#define EBUS_DCSR_DIS_CSR_DRN 0x00010000 +#define EBUS_DCSR_BURST_SZ_MASK 0x000c0000 +#define EBUS_DCSR_BURST_SZ_1 0x00080000 +#define EBUS_DCSR_BURST_SZ_4 0x00000000 +#define EBUS_DCSR_BURST_SZ_8 0x00040000 +#define EBUS_DCSR_BURST_SZ_16 0x000c0000 +#define EBUS_DCSR_DIAG_EN 0x00100000 +#define EBUS_DCSR_DIS_ERR_PEND 0x00400000 +#define EBUS_DCSR_TCI_DIS 0x00800000 +#define EBUS_DCSR_EN_NEXT 0x01000000 +#define EBUS_DCSR_DMA_ON 0x02000000 +#define EBUS_DCSR_A_LOADED 0x04000000 +#define EBUS_DCSR_NA_LOADED 0x08000000 +#define EBUS_DCSR_DEV_ID_MASK 0xf0000000 + +extern struct linux_ebus *ebus_chain; + +extern void ebus_init(void); + +#define for_each_ebus(bus) \ + for((bus) = ebus_chain; (bus); (bus) = (bus)->next) + +#define for_each_ebusdev(dev, bus) \ + for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) + +#define for_each_edevchild(dev, child) \ + for((child) = (dev)->children; (child); (child) = (child)->next) + +#endif /* !(__SPARC_EBUS_H) */ diff --git a/include/asm-sparc/ebus_64.h b/include/asm-sparc/ebus_64.h new file mode 100644 index 00000000000..fcc62b97ced --- /dev/null +++ b/include/asm-sparc/ebus_64.h @@ -0,0 +1,94 @@ +/* + * ebus.h: PCI to Ebus pseudo driver software state. + * + * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) + * Copyright (C) 1999 David S. Miller (davem@redhat.com) + */ + +#ifndef __SPARC64_EBUS_H +#define __SPARC64_EBUS_H + +#include <asm/oplib.h> +#include <asm/prom.h> +#include <asm/of_device.h> + +struct linux_ebus_child { + struct linux_ebus_child *next; + struct linux_ebus_device *parent; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; + +struct linux_ebus_device { + struct of_device ofdev; + struct linux_ebus_device *next; + struct linux_ebus_child *children; + struct linux_ebus *bus; + struct device_node *prom_node; + struct resource resource[PROMREG_MAX]; + int num_addrs; + unsigned int irqs[PROMINTR_MAX]; + int num_irqs; +}; +#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) + +struct linux_ebus { + struct of_device ofdev; + struct linux_ebus *next; + struct linux_ebus_device *devices; + struct pci_dev *self; + int index; + int is_rio; + struct device_node *prom_node; +}; +#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) + +struct ebus_dma_info { + spinlock_t lock; + void __iomem *regs; + + unsigned int flags; +#define EBUS_DMA_FLAG_USE_EBDMA_HANDLER 0x00000001 +#define EBUS_DMA_FLAG_TCI_DISABLE 0x00000002 + + /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is + * set. + */ + void (*callback)(struct ebus_dma_info *p, int event, void *cookie); + void *client_cookie; + unsigned int irq; +#define EBUS_DMA_EVENT_ERROR 1 +#define EBUS_DMA_EVENT_DMA 2 +#define EBUS_DMA_EVENT_DEVICE 4 + + unsigned char name[64]; +}; + +extern int ebus_dma_register(struct ebus_dma_info *p); +extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on); +extern void ebus_dma_unregister(struct ebus_dma_info *p); +extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, + size_t len); +extern void ebus_dma_prepare(struct ebus_dma_info *p, int write); +extern unsigned int ebus_dma_residue(struct ebus_dma_info *p); +extern unsigned int ebus_dma_addr(struct ebus_dma_info *p); +extern void ebus_dma_enable(struct ebus_dma_info *p, int on); + +extern struct linux_ebus *ebus_chain; + +extern void ebus_init(void); + +#define for_each_ebus(bus) \ + for((bus) = ebus_chain; (bus); (bus) = (bus)->next) + +#define for_each_ebusdev(dev, bus) \ + for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) + +#define for_each_edevchild(dev, child) \ + for((child) = (dev)->children; (child); (child) = (child)->next) + +#endif /* !(__SPARC64_EBUS_H) */ diff --git a/include/asm-sparc/elf.h b/include/asm-sparc/elf.h index d043f80bc2f..f035c45d7b5 100644 --- a/include/asm-sparc/elf.h +++ b/include/asm-sparc/elf.h @@ -1,145 +1,8 @@ -#ifndef __ASMSPARC_ELF_H -#define __ASMSPARC_ELF_H - -/* - * ELF register definitions.. - */ - -#include <asm/ptrace.h> - -/* - * Sparc section types - */ -#define STT_REGISTER 13 - -/* - * Sparc ELF relocation types - */ -#define R_SPARC_NONE 0 -#define R_SPARC_8 1 -#define R_SPARC_16 2 -#define R_SPARC_32 3 -#define R_SPARC_DISP8 4 -#define R_SPARC_DISP16 5 -#define R_SPARC_DISP32 6 -#define R_SPARC_WDISP30 7 -#define R_SPARC_WDISP22 8 -#define R_SPARC_HI22 9 -#define R_SPARC_22 10 -#define R_SPARC_13 11 -#define R_SPARC_LO10 12 -#define R_SPARC_GOT10 13 -#define R_SPARC_GOT13 14 -#define R_SPARC_GOT22 15 -#define R_SPARC_PC10 16 -#define R_SPARC_PC22 17 -#define R_SPARC_WPLT30 18 -#define R_SPARC_COPY 19 -#define R_SPARC_GLOB_DAT 20 -#define R_SPARC_JMP_SLOT 21 -#define R_SPARC_RELATIVE 22 -#define R_SPARC_UA32 23 -#define R_SPARC_PLT32 24 -#define R_SPARC_HIPLT22 25 -#define R_SPARC_LOPLT10 26 -#define R_SPARC_PCPLT32 27 -#define R_SPARC_PCPLT22 28 -#define R_SPARC_PCPLT10 29 -#define R_SPARC_10 30 -#define R_SPARC_11 31 -#define R_SPARC_64 32 -#define R_SPARC_OLO10 33 -#define R_SPARC_WDISP16 40 -#define R_SPARC_WDISP19 41 -#define R_SPARC_7 43 -#define R_SPARC_5 44 -#define R_SPARC_6 45 - -/* Bits present in AT_HWCAP, primarily for Sparc32. */ - -#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ -#define HWCAP_SPARC_STBAR 2 -#define HWCAP_SPARC_SWAP 4 -#define HWCAP_SPARC_MULDIV 8 -#define HWCAP_SPARC_V9 16 -#define HWCAP_SPARC_ULTRA3 32 - -#define CORE_DUMP_USE_REGSET - -/* Format is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * PSR, PC, nPC, Y, WIM, TBR - */ -typedef unsigned long elf_greg_t; -#define ELF_NGREG 38 -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct { - union { - unsigned long pr_regs[32]; - double pr_dregs[16]; - } pr_fr; - unsigned long __unused; - unsigned long pr_fsr; - unsigned char pr_qcnt; - unsigned char pr_q_entrysize; - unsigned char pr_en; - unsigned int pr_q[64]; -} elf_fpregset_t; - -#include <asm/mbus.h> - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == EM_SPARC) - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_ARCH EM_SPARC -#define ELF_CLASS ELFCLASS32 -#define ELF_DATA ELFDATA2MSB - -#define USE_ELF_CORE_DUMP -#ifndef CONFIG_SUN4 -#define ELF_EXEC_PAGESIZE 4096 +#ifndef ___ASM_SPARC_ELF_H +#define ___ASM_SPARC_ELF_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/elf_64.h> #else -#define ELF_EXEC_PAGESIZE 8192 +#include <asm-sparc/elf_32.h> +#endif #endif - - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. This can NOT be done in userspace - on Sparc. */ - -/* Sun4c has none of the capabilities, most sun4m's have them all. - * XXX This is gross, set some global variable at boot time. -DaveM - */ -#define ELF_HWCAP ((ARCH_SUN4C_SUN4) ? 0 : \ - (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ - HWCAP_SPARC_SWAP | \ - ((srmmu_modtype != Cypress && \ - srmmu_modtype != Cypress_vE && \ - srmmu_modtype != Cypress_vD) ? \ - HWCAP_SPARC_MULDIV : 0))) - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) - -#endif /* !(__ASMSPARC_ELF_H) */ diff --git a/include/asm-sparc/elf_32.h b/include/asm-sparc/elf_32.h new file mode 100644 index 00000000000..d043f80bc2f --- /dev/null +++ b/include/asm-sparc/elf_32.h @@ -0,0 +1,145 @@ +#ifndef __ASMSPARC_ELF_H +#define __ASMSPARC_ELF_H + +/* + * ELF register definitions.. + */ + +#include <asm/ptrace.h> + +/* + * Sparc section types + */ +#define STT_REGISTER 13 + +/* + * Sparc ELF relocation types + */ +#define R_SPARC_NONE 0 +#define R_SPARC_8 1 +#define R_SPARC_16 2 +#define R_SPARC_32 3 +#define R_SPARC_DISP8 4 +#define R_SPARC_DISP16 5 +#define R_SPARC_DISP32 6 +#define R_SPARC_WDISP30 7 +#define R_SPARC_WDISP22 8 +#define R_SPARC_HI22 9 +#define R_SPARC_22 10 +#define R_SPARC_13 11 +#define R_SPARC_LO10 12 +#define R_SPARC_GOT10 13 +#define R_SPARC_GOT13 14 +#define R_SPARC_GOT22 15 +#define R_SPARC_PC10 16 +#define R_SPARC_PC22 17 +#define R_SPARC_WPLT30 18 +#define R_SPARC_COPY 19 +#define R_SPARC_GLOB_DAT 20 +#define R_SPARC_JMP_SLOT 21 +#define R_SPARC_RELATIVE 22 +#define R_SPARC_UA32 23 +#define R_SPARC_PLT32 24 +#define R_SPARC_HIPLT22 25 +#define R_SPARC_LOPLT10 26 +#define R_SPARC_PCPLT32 27 +#define R_SPARC_PCPLT22 28 +#define R_SPARC_PCPLT10 29 +#define R_SPARC_10 30 +#define R_SPARC_11 31 +#define R_SPARC_64 32 +#define R_SPARC_OLO10 33 +#define R_SPARC_WDISP16 40 +#define R_SPARC_WDISP19 41 +#define R_SPARC_7 43 +#define R_SPARC_5 44 +#define R_SPARC_6 45 + +/* Bits present in AT_HWCAP, primarily for Sparc32. */ + +#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ +#define HWCAP_SPARC_STBAR 2 +#define HWCAP_SPARC_SWAP 4 +#define HWCAP_SPARC_MULDIV 8 +#define HWCAP_SPARC_V9 16 +#define HWCAP_SPARC_ULTRA3 32 + +#define CORE_DUMP_USE_REGSET + +/* Format is: + * G0 --> G7 + * O0 --> O7 + * L0 --> L7 + * I0 --> I7 + * PSR, PC, nPC, Y, WIM, TBR + */ +typedef unsigned long elf_greg_t; +#define ELF_NGREG 38 +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct { + union { + unsigned long pr_regs[32]; + double pr_dregs[16]; + } pr_fr; + unsigned long __unused; + unsigned long pr_fsr; + unsigned char pr_qcnt; + unsigned char pr_q_entrysize; + unsigned char pr_en; + unsigned int pr_q[64]; +} elf_fpregset_t; + +#include <asm/mbus.h> + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == EM_SPARC) + +/* + * These are used to set parameters in the core dumps. + */ +#define ELF_ARCH EM_SPARC +#define ELF_CLASS ELFCLASS32 +#define ELF_DATA ELFDATA2MSB + +#define USE_ELF_CORE_DUMP +#ifndef CONFIG_SUN4 +#define ELF_EXEC_PAGESIZE 4096 +#else +#define ELF_EXEC_PAGESIZE 8192 +#endif + + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE (TASK_UNMAPPED_BASE) + +/* This yields a mask that user programs can use to figure out what + instruction set this cpu supports. This can NOT be done in userspace + on Sparc. */ + +/* Sun4c has none of the capabilities, most sun4m's have them all. + * XXX This is gross, set some global variable at boot time. -DaveM + */ +#define ELF_HWCAP ((ARCH_SUN4C_SUN4) ? 0 : \ + (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | \ + HWCAP_SPARC_SWAP | \ + ((srmmu_modtype != Cypress && \ + srmmu_modtype != Cypress_vE && \ + srmmu_modtype != Cypress_vD) ? \ + HWCAP_SPARC_MULDIV : 0))) + +/* This yields a string that ld.so will use to load implementation + specific libraries for optimization. This is more specific in + intent than poking at uname or /proc/cpuinfo. */ + +#define ELF_PLATFORM (NULL) + +#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX) + +#endif /* !(__ASMSPARC_ELF_H) */ diff --git a/include/asm-sparc/elf_64.h b/include/asm-sparc/elf_64.h new file mode 100644 index 00000000000..0818a1308f4 --- /dev/null +++ b/include/asm-sparc/elf_64.h @@ -0,0 +1,217 @@ +#ifndef __ASM_SPARC64_ELF_H +#define __ASM_SPARC64_ELF_H + +/* + * ELF register definitions.. + */ + +#include <asm/ptrace.h> +#include <asm/processor.h> +#include <asm/uaccess.h> +#include <asm/spitfire.h> + +/* + * Sparc section types + */ +#define STT_REGISTER 13 + +/* + * Sparc ELF relocation types + */ +#define R_SPARC_NONE 0 +#define R_SPARC_8 1 +#define R_SPARC_16 2 +#define R_SPARC_32 3 +#define R_SPARC_DISP8 4 +#define R_SPARC_DISP16 5 +#define R_SPARC_DISP32 6 +#define R_SPARC_WDISP30 7 +#define R_SPARC_WDISP22 8 +#define R_SPARC_HI22 9 +#define R_SPARC_22 10 +#define R_SPARC_13 11 +#define R_SPARC_LO10 12 +#define R_SPARC_GOT10 13 +#define R_SPARC_GOT13 14 +#define R_SPARC_GOT22 15 +#define R_SPARC_PC10 16 +#define R_SPARC_PC22 17 +#define R_SPARC_WPLT30 18 +#define R_SPARC_COPY 19 +#define R_SPARC_GLOB_DAT 20 +#define R_SPARC_JMP_SLOT 21 +#define R_SPARC_RELATIVE 22 +#define R_SPARC_UA32 23 +#define R_SPARC_PLT32 24 +#define R_SPARC_HIPLT22 25 +#define R_SPARC_LOPLT10 26 +#define R_SPARC_PCPLT32 27 +#define R_SPARC_PCPLT22 28 +#define R_SPARC_PCPLT10 29 +#define R_SPARC_10 30 +#define R_SPARC_11 31 +#define R_SPARC_64 32 +#define R_SPARC_OLO10 33 +#define R_SPARC_WDISP16 40 +#define R_SPARC_WDISP19 41 +#define R_SPARC_7 43 +#define R_SPARC_5 44 +#define R_SPARC_6 45 + +/* Bits present in AT_HWCAP, primarily for Sparc32. */ + +#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ +#define HWCAP_SPARC_STBAR 2 +#define HWCAP_SPARC_SWAP 4 +#define HWCAP_SPARC_MULDIV 8 +#define HWCAP_SPARC_V9 16 +#define HWCAP_SPARC_ULTRA3 32 +#define HWCAP_SPARC_BLKINIT 64 +#define HWCAP_SPARC_N2 128 + +#define CORE_DUMP_USE_REGSET + +/* + * These are used to set parameters in the core dumps. + */ +#define ELF_ARCH EM_SPARCV9 +#define ELF_CLASS ELFCLASS64 +#define ELF_DATA ELFDATA2MSB + +/* Format of 64-bit elf_gregset_t is: + * G0 --> G7 + * O0 --> O7 + * L0 --> L7 + * I0 --> I7 + * TSTATE + * TPC + * TNPC + * Y + */ +typedef unsigned long elf_greg_t; +#define ELF_NGREG 36 +typedef elf_greg_t elf_gregset_t[ELF_NGREG]; + +typedef struct { + unsigned long pr_regs[32]; + unsigned long pr_fsr; + unsigned long pr_gsr; + unsigned long pr_fprs; +} elf_fpregset_t; + +/* Format of 32-bit elf_gregset_t is: + * G0 --> G7 + * O0 --> O7 + * L0 --> L7 + * I0 --> I7 + * PSR, PC, nPC, Y, WIM, TBR + */ +typedef unsigned int compat_elf_greg_t; +#define COMPAT_ELF_NGREG 38 +typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; + +typedef struct { + union { + unsigned int pr_regs[32]; + unsigned long pr_dregs[16]; + } pr_fr; + unsigned int __unused; + unsigned int pr_fsr; + unsigned char pr_qcnt; + unsigned char pr_q_entrysize; + unsigned char pr_en; + unsigned int pr_q[64]; +} compat_elf_fpregset_t; + +/* UltraSparc extensions. Still unused, but will be eventually. */ +typedef struct { + unsigned int pr_type; + unsigned int pr_align; + union { + struct { + union { + unsigned int pr_regs[32]; + unsigned long pr_dregs[16]; + long double pr_qregs[8]; + } pr_xfr; + } pr_v8p; + unsigned int pr_xfsr; + unsigned int pr_fprs; + unsigned int pr_xg[8]; + unsigned int pr_xo[8]; + unsigned long pr_tstate; + unsigned int pr_filler[8]; + } pr_un; +} elf_xregset_t; + +/* + * This is used to ensure we don't load something for the wrong architecture. + */ +#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) +#define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \ + (x)->e_machine == EM_SPARC32PLUS) +#define compat_start_thread start_thread32 + +#define USE_ELF_CORE_DUMP +#define ELF_EXEC_PAGESIZE PAGE_SIZE + +/* This is the location that an ET_DYN program is loaded if exec'ed. Typical + use of this is to invoke "./ld.so someprog" to test out a new version of + the loader. We need to make sure that it is out of the way of the program + that it will "exec", and that there is sufficient room for the brk. */ + +#define ELF_ET_DYN_BASE 0x0000010000000000UL +#define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL + + +/* This yields a mask that user programs can use to figure out what + instruction set this cpu supports. */ + +/* On Ultra, we support all of the v8 capabilities. */ +static inline unsigned int sparc64_elf_hwcap(void) +{ + unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | + HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | + HWCAP_SPARC_V9); + + if (tlb_type == cheetah || tlb_type == cheetah_plus) + cap |= HWCAP_SPARC_ULTRA3; + else if (tlb_type == hypervisor) { + if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || + sun4v_chip_type == SUN4V_CHIP_NIAGARA2) + cap |= HWCAP_SPARC_BLKINIT; + if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2) + cap |= HWCAP_SPARC_N2; + } + + return cap; +} + +#define ELF_HWCAP sparc64_elf_hwcap(); + +/* This yields a string that ld.so will use to load implementation + specific libraries for optimization. This is more specific in + intent than poking at uname or /proc/cpuinfo. */ + +#define ELF_PLATFORM (NULL) + +#define SET_PERSONALITY(ex, ibcs2) \ +do { unsigned long new_flags = current_thread_info()->flags; \ + new_flags &= _TIF_32BIT; \ + if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ + new_flags |= _TIF_32BIT; \ + else \ + new_flags &= ~_TIF_32BIT; \ + if ((current_thread_info()->flags & _TIF_32BIT) \ + != new_flags) \ + set_thread_flag(TIF_ABI_PENDING); \ + else \ + clear_thread_flag(TIF_ABI_PENDING); \ + /* flush_thread will update pgd cache */ \ + if (ibcs2) \ + set_personality(PER_SVR4); \ + else if (current->personality != PER_LINUX32) \ + set_personality(PER_LINUX); \ +} while (0) + +#endif /* !(__ASM_SPARC64_ELF_H) */ diff --git a/include/asm-sparc/floppy.h b/include/asm-sparc/floppy.h index d3978e068e2..6c628ba15a8 100644 --- a/include/asm-sparc/floppy.h +++ b/include/asm-sparc/floppy.h @@ -1,388 +1,8 @@ -/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver. - * - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) - */ - -#ifndef __ASM_SPARC_FLOPPY_H -#define __ASM_SPARC_FLOPPY_H - -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/system.h> -#include <asm/idprom.h> -#include <asm/machines.h> -#include <asm/oplib.h> -#include <asm/auxio.h> -#include <asm/irq.h> - -/* We don't need no stinkin' I/O port allocation crap. */ -#undef release_region -#undef request_region -#define release_region(X, Y) do { } while(0) -#define request_region(X, Y, Z) (1) - -/* References: - * 1) Netbsd Sun floppy driver. - * 2) NCR 82077 controller manual - * 3) Intel 82077 controller manual - */ -struct sun_flpy_controller { - volatile unsigned char status_82072; /* Main Status reg. */ -#define dcr_82072 status_82072 /* Digital Control reg. */ -#define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ - - volatile unsigned char data_82072; /* Data fifo. */ -#define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ - - volatile unsigned char dor_82077; /* Digital Output reg. */ - volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ - - volatile unsigned char status_82077; /* Main Status Register. */ -#define drs_82077 status_82077 /* Digital Rate Select reg. */ - - volatile unsigned char data_82077; /* Data fifo. */ - volatile unsigned char ___unused; - volatile unsigned char dir_82077; /* Digital Input reg. */ -#define dcr_82077 dir_82077 /* Config Control reg. */ -}; - -/* You'll only ever find one controller on a SparcStation anyways. */ -static struct sun_flpy_controller *sun_fdc = NULL; -extern volatile unsigned char *fdc_status; - -struct sun_floppy_ops { - unsigned char (*fd_inb)(int port); - void (*fd_outb)(unsigned char value, int port); -}; - -static struct sun_floppy_ops sun_fdops; - -#define fd_inb(port) sun_fdops.fd_inb(port) -#define fd_outb(value,port) sun_fdops.fd_outb(value,port) -#define fd_enable_dma() sun_fd_enable_dma() -#define fd_disable_dma() sun_fd_disable_dma() -#define fd_request_dma() (0) /* nothing... */ -#define fd_free_dma() /* nothing... */ -#define fd_clear_dma_ff() /* nothing... */ -#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) -#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) -#define fd_set_dma_count(count) sun_fd_set_dma_count(count) -#define fd_enable_irq() /* nothing... */ -#define fd_disable_irq() /* nothing... */ -#define fd_cacheflush(addr, size) /* nothing... */ -#define fd_request_irq() sun_fd_request_irq() -#define fd_free_irq() /* nothing... */ -#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ -#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) -#define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) +#ifndef ___ASM_SPARC_FLOPPY_H +#define ___ASM_SPARC_FLOPPY_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/floppy_64.h> +#else +#include <asm-sparc/floppy_32.h> +#endif #endif - -/* XXX This isn't really correct. XXX */ -#define get_dma_residue(x) (0) - -#define FLOPPY0_TYPE 4 -#define FLOPPY1_TYPE 0 - -/* Super paranoid... */ -#undef HAVE_DISABLE_HLT - -/* Here is where we catch the floppy driver trying to initialize, - * therefore this is where we call the PROM device tree probing - * routine etc. on the Sparc. - */ -#define FDC1 sun_floppy_init() - -#define N_FDC 1 -#define N_DRIVE 8 - -/* No 64k boundary crossing problems on the Sparc. */ -#define CROSS_64KB(a,s) (0) - -/* Routines unique to each controller type on a Sun. */ -static void sun_set_dor(unsigned char value, int fdc_82077) -{ - if (sparc_cpu_model == sun4c) { - unsigned int bits = 0; - if (value & 0x10) - bits |= AUXIO_FLPY_DSEL; - if ((value & 0x80) == 0) - bits |= AUXIO_FLPY_EJCT; - set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); - } - if (fdc_82077) { - sun_fdc->dor_82077 = value; - } -} - -static unsigned char sun_read_dir(void) -{ - if (sparc_cpu_model == sun4c) - return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; - else - return sun_fdc->dir_82077; -} - -static unsigned char sun_82072_fd_inb(int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 4: /* FD_STATUS */ - return sun_fdc->status_82072 & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sun_fdc->data_82072; - case 7: /* FD_DIR */ - return sun_read_dir(); - }; - panic("sun_82072_fd_inb: How did I get here?"); -} - -static void sun_82072_fd_outb(unsigned char value, int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - sun_set_dor(value, 0); - break; - case 5: /* FD_DATA */ - sun_fdc->data_82072 = value; - break; - case 7: /* FD_DCR */ - sun_fdc->dcr_82072 = value; - break; - case 4: /* FD_STATUS */ - sun_fdc->status_82072 = value; - break; - }; - return; -} - -static unsigned char sun_82077_fd_inb(int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 0: /* FD_STATUS_0 */ - return sun_fdc->status1_82077; - case 1: /* FD_STATUS_1 */ - return sun_fdc->status2_82077; - case 2: /* FD_DOR */ - return sun_fdc->dor_82077; - case 3: /* FD_TDR */ - return sun_fdc->tapectl_82077; - case 4: /* FD_STATUS */ - return sun_fdc->status_82077 & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sun_fdc->data_82077; - case 7: /* FD_DIR */ - return sun_read_dir(); - }; - panic("sun_82077_fd_inb: How did I get here?"); -} - -static void sun_82077_fd_outb(unsigned char value, int port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %d\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - sun_set_dor(value, 1); - break; - case 5: /* FD_DATA */ - sun_fdc->data_82077 = value; - break; - case 7: /* FD_DCR */ - sun_fdc->dcr_82077 = value; - break; - case 4: /* FD_STATUS */ - sun_fdc->status_82077 = value; - break; - case 3: /* FD_TDR */ - sun_fdc->tapectl_82077 = value; - break; - }; - return; -} - -/* For pseudo-dma (Sun floppy drives have no real DMA available to - * them so we must eat the data fifo bytes directly ourselves) we have - * three state variables. doing_pdma tells our inline low-level - * assembly floppy interrupt entry point whether it should sit and eat - * bytes from the fifo or just transfer control up to the higher level - * floppy interrupt c-code. I tried very hard but I could not get the - * pseudo-dma to work in c-code without getting many overruns and - * underruns. If non-zero, doing_pdma encodes the direction of - * the transfer for debugging. 1=read 2=write - */ -extern char *pdma_vaddr; -extern unsigned long pdma_size; -extern volatile int doing_pdma; - -/* This is software state */ -extern char *pdma_base; -extern unsigned long pdma_areasize; - -/* Common routines to all controller types on the Sparc. */ -static inline void virtual_dma_init(void) -{ - /* nothing... */ -} - -static inline void sun_fd_disable_dma(void) -{ - doing_pdma = 0; - if (pdma_base) { - mmu_unlockarea(pdma_base, pdma_areasize); - pdma_base = NULL; - } -} - -static inline void sun_fd_set_dma_mode(int mode) -{ - switch(mode) { - case DMA_MODE_READ: - doing_pdma = 1; - break; - case DMA_MODE_WRITE: - doing_pdma = 2; - break; - default: - printk("Unknown dma mode %d\n", mode); - panic("floppy: Giving up..."); - } -} - -static inline void sun_fd_set_dma_addr(char *buffer) -{ - pdma_vaddr = buffer; -} - -static inline void sun_fd_set_dma_count(int length) -{ - pdma_size = length; -} - -static inline void sun_fd_enable_dma(void) -{ - pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); - pdma_base = pdma_vaddr; - pdma_areasize = pdma_size; -} - -/* Our low-level entry point in arch/sparc/kernel/entry.S */ -extern int sparc_floppy_request_irq(int irq, unsigned long flags, - irq_handler_t irq_handler); - -static int sun_fd_request_irq(void) -{ - static int once = 0; - int error; - - if(!once) { - once = 1; - error = sparc_floppy_request_irq(FLOPPY_IRQ, - IRQF_DISABLED, - floppy_interrupt); - return ((error == 0) ? 0 : -1); - } else return 0; -} - -static struct linux_prom_registers fd_regs[2]; - -static int sun_floppy_init(void) -{ - char state[128]; - int tnode, fd_node, num_regs; - struct resource r; - - use_virtual_dma = 1; - - FLOPPY_IRQ = 11; - /* Forget it if we aren't on a machine that could possibly - * ever have a floppy drive. - */ - if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || - ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || - (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { - /* We certainly don't have a floppy controller. */ - goto no_sun_fdc; - } - /* Well, try to find one. */ - tnode = prom_getchild(prom_root_node); - fd_node = prom_searchsiblings(tnode, "obio"); - if(fd_node != 0) { - tnode = prom_getchild(fd_node); - fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); - } else { - fd_node = prom_searchsiblings(tnode, "fd"); - } - if(fd_node == 0) { - goto no_sun_fdc; - } - - /* The sun4m lets us know if the controller is actually usable. */ - if(sparc_cpu_model == sun4m && - prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { - if(!strcmp(state, "disabled")) { - goto no_sun_fdc; - } - } - num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); - num_regs = (num_regs / sizeof(fd_regs[0])); - prom_apply_obio_ranges(fd_regs, num_regs); - memset(&r, 0, sizeof(r)); - r.flags = fd_regs[0].which_io; - r.start = fd_regs[0].phys_addr; - sun_fdc = (struct sun_flpy_controller *) - sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); - - /* Last minute sanity check... */ - if(sun_fdc->status_82072 == 0xff) { - sun_fdc = NULL; - goto no_sun_fdc; - } - - sun_fdops.fd_inb = sun_82077_fd_inb; - sun_fdops.fd_outb = sun_82077_fd_outb; - fdc_status = &sun_fdc->status_82077; - - if (sun_fdc->dor_82077 == 0x80) { - sun_fdc->dor_82077 = 0x02; - if (sun_fdc->dor_82077 == 0x80) { - sun_fdops.fd_inb = sun_82072_fd_inb; - sun_fdops.fd_outb = sun_82072_fd_outb; - fdc_status = &sun_fdc->status_82072; - } - } - - /* Success... */ - allowed_drive_mask = 0x01; - return (int) sun_fdc; - -no_sun_fdc: - return -1; -} - -static int sparc_eject(void) -{ - set_dor(0x00, 0xff, 0x90); - udelay(500); - set_dor(0x00, 0x6f, 0x00); - udelay(500); - return 0; -} - -#define fd_eject(drive) sparc_eject() - -#define EXTRA_FLOPPY_PARAMS - -#endif /* !(__ASM_SPARC_FLOPPY_H) */ diff --git a/include/asm-sparc/floppy_32.h b/include/asm-sparc/floppy_32.h new file mode 100644 index 00000000000..acdd06eafe5 --- /dev/null +++ b/include/asm-sparc/floppy_32.h @@ -0,0 +1,388 @@ +/* asm-sparc/floppy.h: Sparc specific parts of the Floppy driver. + * + * Copyright (C) 1995 David S. Miller (davem@davemloft.net) + */ + +#ifndef __ASM_SPARC_FLOPPY_H +#define __ASM_SPARC_FLOPPY_H + +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/system.h> +#include <asm/idprom.h> +#include <asm/machines.h> +#include <asm/oplib.h> +#include <asm/auxio.h> +#include <asm/irq.h> + +/* We don't need no stinkin' I/O port allocation crap. */ +#undef release_region +#undef request_region +#define release_region(X, Y) do { } while(0) +#define request_region(X, Y, Z) (1) + +/* References: + * 1) Netbsd Sun floppy driver. + * 2) NCR 82077 controller manual + * 3) Intel 82077 controller manual + */ +struct sun_flpy_controller { + volatile unsigned char status_82072; /* Main Status reg. */ +#define dcr_82072 status_82072 /* Digital Control reg. */ +#define status1_82077 status_82072 /* Auxiliary Status reg. 1 */ + + volatile unsigned char data_82072; /* Data fifo. */ +#define status2_82077 data_82072 /* Auxiliary Status reg. 2 */ + + volatile unsigned char dor_82077; /* Digital Output reg. */ + volatile unsigned char tapectl_82077; /* What the? Tape control reg? */ + + volatile unsigned char status_82077; /* Main Status Register. */ +#define drs_82077 status_82077 /* Digital Rate Select reg. */ + + volatile unsigned char data_82077; /* Data fifo. */ + volatile unsigned char ___unused; + volatile unsigned char dir_82077; /* Digital Input reg. */ +#define dcr_82077 dir_82077 /* Config Control reg. */ +}; + +/* You'll only ever find one controller on a SparcStation anyways. */ +static struct sun_flpy_controller *sun_fdc = NULL; +extern volatile unsigned char *fdc_status; + +struct sun_floppy_ops { + unsigned char (*fd_inb)(int port); + void (*fd_outb)(unsigned char value, int port); +}; + +static struct sun_floppy_ops sun_fdops; + +#define fd_inb(port) sun_fdops.fd_inb(port) +#define fd_outb(value,port) sun_fdops.fd_outb(value,port) +#define fd_enable_dma() sun_fd_enable_dma() +#define fd_disable_dma() sun_fd_disable_dma() +#define fd_request_dma() (0) /* nothing... */ +#define fd_free_dma() /* nothing... */ +#define fd_clear_dma_ff() /* nothing... */ +#define fd_set_dma_mode(mode) sun_fd_set_dma_mode(mode) +#define fd_set_dma_addr(addr) sun_fd_set_dma_addr(addr) +#define fd_set_dma_count(count) sun_fd_set_dma_count(count) +#define fd_enable_irq() /* nothing... */ +#define fd_disable_irq() /* nothing... */ +#define fd_cacheflush(addr, size) /* nothing... */ +#define fd_request_irq() sun_fd_request_irq() +#define fd_free_irq() /* nothing... */ +#if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ +#define fd_dma_mem_alloc(size) ((unsigned long) vmalloc(size)) +#define fd_dma_mem_free(addr,size) (vfree((void *)(addr))) +#endif + +/* XXX This isn't really correct. XXX */ +#define get_dma_residue(x) (0) + +#define FLOPPY0_TYPE 4 +#define FLOPPY1_TYPE 0 + +/* Super paranoid... */ +#undef HAVE_DISABLE_HLT + +/* Here is where we catch the floppy driver trying to initialize, + * therefore this is where we call the PROM device tree probing + * routine etc. on the Sparc. + */ +#define FDC1 sun_floppy_init() + +#define N_FDC 1 +#define N_DRIVE 8 + +/* No 64k boundary crossing problems on the Sparc. */ +#define CROSS_64KB(a,s) (0) + +/* Routines unique to each controller type on a Sun. */ +static void sun_set_dor(unsigned char value, int fdc_82077) +{ + if (sparc_cpu_model == sun4c) { + unsigned int bits = 0; + if (value & 0x10) + bits |= AUXIO_FLPY_DSEL; + if ((value & 0x80) == 0) + bits |= AUXIO_FLPY_EJCT; + set_auxio(bits, (~bits) & (AUXIO_FLPY_DSEL|AUXIO_FLPY_EJCT)); + } + if (fdc_82077) { + sun_fdc->dor_82077 = value; + } +} + +static unsigned char sun_read_dir(void) +{ + if (sparc_cpu_model == sun4c) + return (get_auxio() & AUXIO_FLPY_DCHG) ? 0x80 : 0; + else + return sun_fdc->dir_82077; +} + +static unsigned char sun_82072_fd_inb(int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 4: /* FD_STATUS */ + return sun_fdc->status_82072 & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sun_fdc->data_82072; + case 7: /* FD_DIR */ + return sun_read_dir(); + }; + panic("sun_82072_fd_inb: How did I get here?"); +} + +static void sun_82072_fd_outb(unsigned char value, int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + sun_set_dor(value, 0); + break; + case 5: /* FD_DATA */ + sun_fdc->data_82072 = value; + break; + case 7: /* FD_DCR */ + sun_fdc->dcr_82072 = value; + break; + case 4: /* FD_STATUS */ + sun_fdc->status_82072 = value; + break; + }; + return; +} + +static unsigned char sun_82077_fd_inb(int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 0: /* FD_STATUS_0 */ + return sun_fdc->status1_82077; + case 1: /* FD_STATUS_1 */ + return sun_fdc->status2_82077; + case 2: /* FD_DOR */ + return sun_fdc->dor_82077; + case 3: /* FD_TDR */ + return sun_fdc->tapectl_82077; + case 4: /* FD_STATUS */ + return sun_fdc->status_82077 & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sun_fdc->data_82077; + case 7: /* FD_DIR */ + return sun_read_dir(); + }; + panic("sun_82077_fd_inb: How did I get here?"); +} + +static void sun_82077_fd_outb(unsigned char value, int port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %d\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + sun_set_dor(value, 1); + break; + case 5: /* FD_DATA */ + sun_fdc->data_82077 = value; + break; + case 7: /* FD_DCR */ + sun_fdc->dcr_82077 = value; + break; + case 4: /* FD_STATUS */ + sun_fdc->status_82077 = value; + break; + case 3: /* FD_TDR */ + sun_fdc->tapectl_82077 = value; + break; + }; + return; +} + +/* For pseudo-dma (Sun floppy drives have no real DMA available to + * them so we must eat the data fifo bytes directly ourselves) we have + * three state variables. doing_pdma tells our inline low-level + * assembly floppy interrupt entry point whether it should sit and eat + * bytes from the fifo or just transfer control up to the higher level + * floppy interrupt c-code. I tried very hard but I could not get the + * pseudo-dma to work in c-code without getting many overruns and + * underruns. If non-zero, doing_pdma encodes the direction of + * the transfer for debugging. 1=read 2=write + */ +extern char *pdma_vaddr; +extern unsigned long pdma_size; +extern volatile int doing_pdma; + +/* This is software state */ +extern char *pdma_base; +extern unsigned long pdma_areasize; + +/* Common routines to all controller types on the Sparc. */ +static inline void virtual_dma_init(void) +{ + /* nothing... */ +} + +static inline void sun_fd_disable_dma(void) +{ + doing_pdma = 0; + if (pdma_base) { + mmu_unlockarea(pdma_base, pdma_areasize); + pdma_base = NULL; + } +} + +static inline void sun_fd_set_dma_mode(int mode) +{ + switch(mode) { + case DMA_MODE_READ: + doing_pdma = 1; + break; + case DMA_MODE_WRITE: + doing_pdma = 2; + break; + default: + printk("Unknown dma mode %d\n", mode); + panic("floppy: Giving up..."); + } +} + +static inline void sun_fd_set_dma_addr(char *buffer) +{ + pdma_vaddr = buffer; +} + +static inline void sun_fd_set_dma_count(int length) +{ + pdma_size = length; +} + +static inline void sun_fd_enable_dma(void) +{ + pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); + pdma_base = pdma_vaddr; + pdma_areasize = pdma_size; +} + +/* Our low-level entry point in arch/sparc/kernel/entry.S */ +extern int sparc_floppy_request_irq(int irq, unsigned long flags, + irq_handler_t irq_handler); + +static int sun_fd_request_irq(void) +{ + static int once = 0; + int error; + + if(!once) { + once = 1; + error = sparc_floppy_request_irq(FLOPPY_IRQ, + IRQF_DISABLED, + floppy_interrupt); + return ((error == 0) ? 0 : -1); + } else return 0; +} + +static struct linux_prom_registers fd_regs[2]; + +static int sun_floppy_init(void) +{ + char state[128]; + int tnode, fd_node, num_regs; + struct resource r; + + use_virtual_dma = 1; + + FLOPPY_IRQ = 11; + /* Forget it if we aren't on a machine that could possibly + * ever have a floppy drive. + */ + if((sparc_cpu_model != sun4c && sparc_cpu_model != sun4m) || + ((idprom->id_machtype == (SM_SUN4C | SM_4C_SLC)) || + (idprom->id_machtype == (SM_SUN4C | SM_4C_ELC)))) { + /* We certainly don't have a floppy controller. */ + goto no_sun_fdc; + } + /* Well, try to find one. */ + tnode = prom_getchild(prom_root_node); + fd_node = prom_searchsiblings(tnode, "obio"); + if(fd_node != 0) { + tnode = prom_getchild(fd_node); + fd_node = prom_searchsiblings(tnode, "SUNW,fdtwo"); + } else { + fd_node = prom_searchsiblings(tnode, "fd"); + } + if(fd_node == 0) { + goto no_sun_fdc; + } + + /* The sun4m lets us know if the controller is actually usable. */ + if(sparc_cpu_model == sun4m && + prom_getproperty(fd_node, "status", state, sizeof(state)) != -1) { + if(!strcmp(state, "disabled")) { + goto no_sun_fdc; + } + } + num_regs = prom_getproperty(fd_node, "reg", (char *) fd_regs, sizeof(fd_regs)); + num_regs = (num_regs / sizeof(fd_regs[0])); + prom_apply_obio_ranges(fd_regs, num_regs); + memset(&r, 0, sizeof(r)); + r.flags = fd_regs[0].which_io; + r.start = fd_regs[0].phys_addr; + sun_fdc = (struct sun_flpy_controller *) + sbus_ioremap(&r, 0, fd_regs[0].reg_size, "floppy"); + + /* Last minute sanity check... */ + if(sun_fdc->status_82072 == 0xff) { + sun_fdc = NULL; + goto no_sun_fdc; + } + + sun_fdops.fd_inb = sun_82077_fd_inb; + sun_fdops.fd_outb = sun_82077_fd_outb; + fdc_status = &sun_fdc->status_82077; + + if (sun_fdc->dor_82077 == 0x80) { + sun_fdc->dor_82077 = 0x02; + if (sun_fdc->dor_82077 == 0x80) { + sun_fdops.fd_inb = sun_82072_fd_inb; + sun_fdops.fd_outb = sun_82072_fd_outb; + fdc_status = &sun_fdc->status_82072; + } + } + + /* Success... */ + allowed_drive_mask = 0x01; + return (int) sun_fdc; + +no_sun_fdc: + return -1; +} + +static int sparc_eject(void) +{ + set_dor(0x00, 0xff, 0x90); + udelay(500); + set_dor(0x00, 0x6f, 0x00); + udelay(500); + return 0; +} + +#define fd_eject(drive) sparc_eject() + +#define EXTRA_FLOPPY_PARAMS + +#endif /* !(__ASM_SPARC_FLOPPY_H) */ diff --git a/include/asm-sparc/floppy_64.h b/include/asm-sparc/floppy_64.h new file mode 100644 index 00000000000..c39db1060bc --- /dev/null +++ b/include/asm-sparc/floppy_64.h @@ -0,0 +1,782 @@ +/* floppy.h: Sparc specific parts of the Floppy driver. + * + * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) + * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + * + * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) + */ + +#ifndef __ASM_SPARC64_FLOPPY_H +#define __ASM_SPARC64_FLOPPY_H + +#include <linux/init.h> +#include <linux/pci.h> + +#include <asm/page.h> +#include <asm/pgtable.h> +#include <asm/system.h> +#include <asm/idprom.h> +#include <asm/oplib.h> +#include <asm/auxio.h> +#include <asm/sbus.h> +#include <asm/irq.h> + + +/* + * Define this to enable exchanging drive 0 and 1 if only drive 1 is + * probed on PCI machines. + */ +#undef PCI_FDC_SWAP_DRIVES + + +/* References: + * 1) Netbsd Sun floppy driver. + * 2) NCR 82077 controller manual + * 3) Intel 82077 controller manual + */ +struct sun_flpy_controller { + volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */ + volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */ + volatile unsigned char dor_82077; /* Digital Output reg. */ + volatile unsigned char tapectl_82077; /* Tape Control reg */ + volatile unsigned char status_82077; /* Main Status Register. */ +#define drs_82077 status_82077 /* Digital Rate Select reg. */ + volatile unsigned char data_82077; /* Data fifo. */ + volatile unsigned char ___unused; + volatile unsigned char dir_82077; /* Digital Input reg. */ +#define dcr_82077 dir_82077 /* Config Control reg. */ +}; + +/* You'll only ever find one controller on an Ultra anyways. */ +static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1; +unsigned long fdc_status; +static struct sbus_dev *floppy_sdev = NULL; + +struct sun_floppy_ops { + unsigned char (*fd_inb) (unsigned long port); + void (*fd_outb) (unsigned char value, unsigned long port); + void (*fd_enable_dma) (void); + void (*fd_disable_dma) (void); + void (*fd_set_dma_mode) (int); + void (*fd_set_dma_addr) (char *); + void (*fd_set_dma_count) (int); + unsigned int (*get_dma_residue) (void); + int (*fd_request_irq) (void); + void (*fd_free_irq) (void); + int (*fd_eject) (int); +}; + +static struct sun_floppy_ops sun_fdops; + +#define fd_inb(port) sun_fdops.fd_inb(port) +#define fd_outb(value,port) sun_fdops.fd_outb(value,port) +#define fd_enable_dma() sun_fdops.fd_enable_dma() +#define fd_disable_dma() sun_fdops.fd_disable_dma() +#define fd_request_dma() (0) /* nothing... */ +#define fd_free_dma() /* nothing... */ +#define fd_clear_dma_ff() /* nothing... */ +#define fd_set_dma_mode(mode) sun_fdops.fd_set_dma_mode(mode) +#define fd_set_dma_addr(addr) sun_fdops.fd_set_dma_addr(addr) +#define fd_set_dma_count(count) sun_fdops.fd_set_dma_count(count) +#define get_dma_residue(x) sun_fdops.get_dma_residue() +#define fd_cacheflush(addr, size) /* nothing... */ +#define fd_request_irq() sun_fdops.fd_request_irq() +#define fd_free_irq() sun_fdops.fd_free_irq() +#define fd_eject(drive) sun_fdops.fd_eject(drive) + +/* Super paranoid... */ +#undef HAVE_DISABLE_HLT + +static int sun_floppy_types[2] = { 0, 0 }; + +/* Here is where we catch the floppy driver trying to initialize, + * therefore this is where we call the PROM device tree probing + * routine etc. on the Sparc. + */ +#define FLOPPY0_TYPE sun_floppy_init() +#define FLOPPY1_TYPE sun_floppy_types[1] + +#define FDC1 ((unsigned long)sun_fdc) + +#define N_FDC 1 +#define N_DRIVE 8 + +/* No 64k boundary crossing problems on the Sparc. */ +#define CROSS_64KB(a,s) (0) + +static unsigned char sun_82077_fd_inb(unsigned long port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to read unknown port %lx\n", port); + panic("floppy: Port bolixed."); + case 4: /* FD_STATUS */ + return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; + case 5: /* FD_DATA */ + return sbus_readb(&sun_fdc->data_82077); + case 7: /* FD_DIR */ + /* XXX: Is DCL on 0x80 in sun4m? */ + return sbus_readb(&sun_fdc->dir_82077); + }; + panic("sun_82072_fd_inb: How did I get here?"); +} + +static void sun_82077_fd_outb(unsigned char value, unsigned long port) +{ + udelay(5); + switch(port & 7) { + default: + printk("floppy: Asked to write to unknown port %lx\n", port); + panic("floppy: Port bolixed."); + case 2: /* FD_DOR */ + /* Happily, the 82077 has a real DOR register. */ + sbus_writeb(value, &sun_fdc->dor_82077); + break; + case 5: /* FD_DATA */ + sbus_writeb(value, &sun_fdc->data_82077); + break; + case 7: /* FD_DCR */ + sbus_writeb(value, &sun_fdc->dcr_82077); + break; + case 4: /* FD_STATUS */ + sbus_writeb(value, &sun_fdc->status_82077); + break; + }; + return; +} + +/* For pseudo-dma (Sun floppy drives have no real DMA available to + * them so we must eat the data fifo bytes directly ourselves) we have + * three state variables. doing_pdma tells our inline low-level + * assembly floppy interrupt entry point whether it should sit and eat + * bytes from the fifo or just transfer control up to the higher level + * floppy interrupt c-code. I tried very hard but I could not get the + * pseudo-dma to work in c-code without getting many overruns and + * underruns. If non-zero, doing_pdma encodes the direction of + * the transfer for debugging. 1=read 2=write + */ +unsigned char *pdma_vaddr; +unsigned long pdma_size; +volatile int doing_pdma = 0; + +/* This is software state */ +char *pdma_base = NULL; +unsigned long pdma_areasize; + +/* Common routines to all controller types on the Sparc. */ +static void sun_fd_disable_dma(void) +{ + doing_pdma = 0; + if (pdma_base) { + mmu_unlockarea(pdma_base, pdma_areasize); + pdma_base = NULL; + } +} + +static void sun_fd_set_dma_mode(int mode) +{ + switch(mode) { + case DMA_MODE_READ: + doing_pdma = 1; + break; + case DMA_MODE_WRITE: + doing_pdma = 2; + break; + default: + printk("Unknown dma mode %d\n", mode); + panic("floppy: Giving up..."); + } +} + +static void sun_fd_set_dma_addr(char *buffer) +{ + pdma_vaddr = buffer; +} + +static void sun_fd_set_dma_count(int length) +{ + pdma_size = length; +} + +static void sun_fd_enable_dma(void) +{ + pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); + pdma_base = pdma_vaddr; + pdma_areasize = pdma_size; +} + +irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie) +{ + if (likely(doing_pdma)) { + void __iomem *stat = (void __iomem *) fdc_status; + unsigned char *vaddr = pdma_vaddr; + unsigned long size = pdma_size; + u8 val; + + while (size) { + val = readb(stat); + if (unlikely(!(val & 0x80))) { + pdma_vaddr = vaddr; + pdma_size = size; + return IRQ_HANDLED; + } + if (unlikely(!(val & 0x20))) { + pdma_vaddr = vaddr; + pdma_size = size; + doing_pdma = 0; + goto main_interrupt; + } + if (val & 0x40) { + /* read */ + *vaddr++ = readb(stat + 1); + } else { + unsigned char data = *vaddr++; + + /* write */ + writeb(data, stat + 1); + } + size--; + } + + pdma_vaddr = vaddr; + pdma_size = size; + + /* Send Terminal Count pulse to floppy controller. */ + val = readb(auxio_register); + val |= AUXIO_AUX1_FTCNT; + writeb(val, auxio_register); + val &= ~AUXIO_AUX1_FTCNT; + writeb(val, auxio_register); + + doing_pdma = 0; + } + +main_interrupt: + return floppy_interrupt(irq, dev_cookie); +} + +static int sun_fd_request_irq(void) +{ + static int once = 0; + int error; + + if(!once) { + once = 1; + + error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, + IRQF_DISABLED, "floppy", NULL); + + return ((error == 0) ? 0 : -1); + } + return 0; +} + +static void sun_fd_free_irq(void) +{ +} + +static unsigned int sun_get_dma_residue(void) +{ + /* XXX This isn't really correct. XXX */ + return 0; +} + +static int sun_fd_eject(int drive) +{ + set_dor(0x00, 0xff, 0x90); + udelay(500); + set_dor(0x00, 0x6f, 0x00); + udelay(500); + return 0; +} + +#ifdef CONFIG_PCI +#include <asm/ebus.h> +#include <asm/ns87303.h> + +static struct ebus_dma_info sun_pci_fd_ebus_dma; +static struct pci_dev *sun_pci_ebus_dev; +static int sun_pci_broken_drive = -1; + +struct sun_pci_dma_op { + unsigned int addr; + int len; + int direction; + char *buf; +}; +static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL}; +static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL}; + +extern irqreturn_t floppy_interrupt(int irq, void *dev_id); + +static unsigned char sun_pci_fd_inb(unsigned long port) +{ + udelay(5); + return inb(port); +} + +static void sun_pci_fd_outb(unsigned char val, unsigned long port) +{ + udelay(5); + outb(val, port); +} + +static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port) +{ + udelay(5); + /* + * XXX: Due to SUN's broken floppy connector on AX and AXi + * we need to turn on MOTOR_0 also, if the floppy is + * jumpered to DS1 (like most PC floppies are). I hope + * this does not hurt correct hardware like the AXmp. + * (Eddie, Sep 12 1998). + */ + if (port == ((unsigned long)sun_fdc) + 2) { + if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) { + val |= 0x10; + } + } + outb(val, port); +} + +#ifdef PCI_FDC_SWAP_DRIVES +static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port) +{ + udelay(5); + /* + * XXX: Due to SUN's broken floppy connector on AX and AXi + * we need to turn on MOTOR_0 also, if the floppy is + * jumpered to DS1 (like most PC floppies are). I hope + * this does not hurt correct hardware like the AXmp. + * (Eddie, Sep 12 1998). + */ + if (port == ((unsigned long)sun_fdc) + 2) { + if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) { + val &= ~(0x03); + val |= 0x21; + } + } + outb(val, port); +} +#endif /* PCI_FDC_SWAP_DRIVES */ + +static void sun_pci_fd_enable_dma(void) +{ + BUG_ON((NULL == sun_pci_dma_pending.buf) || + (0 == sun_pci_dma_pending.len) || + (0 == sun_pci_dma_pending.direction)); + + sun_pci_dma_current.buf = sun_pci_dma_pending.buf; + sun_pci_dma_current.len = sun_pci_dma_pending.len; + sun_pci_dma_current.direction = sun_pci_dma_pending.direction; + + sun_pci_dma_pending.buf = NULL; + sun_pci_dma_pending.len = 0; + sun_pci_dma_pending.direction = 0; + sun_pci_dma_pending.addr = -1U; + + sun_pci_dma_current.addr = + pci_map_single(sun_pci_ebus_dev, + sun_pci_dma_current.buf, + sun_pci_dma_current.len, + sun_pci_dma_current.direction); + + ebus_dma_enable(&sun_pci_fd_ebus_dma, 1); + + if (ebus_dma_request(&sun_pci_fd_ebus_dma, + sun_pci_dma_current.addr, + sun_pci_dma_current.len)) + BUG(); +} + +static void sun_pci_fd_disable_dma(void) +{ + ebus_dma_enable(&sun_pci_fd_ebus_dma, 0); + if (sun_pci_dma_current.addr != -1U) + pci_unmap_single(sun_pci_ebus_dev, + sun_pci_dma_current.addr, + sun_pci_dma_current.len, + sun_pci_dma_current.direction); + sun_pci_dma_current.addr = -1U; +} + +static void sun_pci_fd_set_dma_mode(int mode) +{ + if (mode == DMA_MODE_WRITE) + sun_pci_dma_pending.direction = PCI_DMA_TODEVICE; + else + sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE; + + ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE); +} + +static void sun_pci_fd_set_dma_count(int length) +{ + sun_pci_dma_pending.len = length; +} + +static void sun_pci_fd_set_dma_addr(char *buffer) +{ + sun_pci_dma_pending.buf = buffer; +} + +static unsigned int sun_pci_get_dma_residue(void) +{ + return ebus_dma_residue(&sun_pci_fd_ebus_dma); +} + +static int sun_pci_fd_request_irq(void) +{ + return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1); +} + +static void sun_pci_fd_free_irq(void) +{ + ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0); +} + +static int sun_pci_fd_eject(int drive) +{ + return -EINVAL; +} + +void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie) +{ + floppy_interrupt(0, NULL); +} + +/* + * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, + * even if this is configured using DS1, thus looks like /dev/fd1 with + * the cabling used in Ultras. + */ +#define DOR (port + 2) +#define MSR (port + 4) +#define FIFO (port + 5) + +static void sun_pci_fd_out_byte(unsigned long port, unsigned char val, + unsigned long reg) +{ + unsigned char status; + int timeout = 1000; + + while (!((status = inb(MSR)) & 0x80) && --timeout) + udelay(100); + outb(val, reg); +} + +static unsigned char sun_pci_fd_sensei(unsigned long port) +{ + unsigned char result[2] = { 0x70, 0x00 }; + unsigned char status; + int i = 0; + + sun_pci_fd_out_byte(port, 0x08, FIFO); + do { + int timeout = 1000; + + while (!((status = inb(MSR)) & 0x80) && --timeout) + udelay(100); + + if (!timeout) + break; + + if ((status & 0xf0) == 0xd0) + result[i++] = inb(FIFO); + else + break; + } while (i < 2); + + return result[0]; +} + +static void sun_pci_fd_reset(unsigned long port) +{ + unsigned char mask = 0x00; + unsigned char status; + int timeout = 10000; + + outb(0x80, MSR); + do { + status = sun_pci_fd_sensei(port); + if ((status & 0xc0) == 0xc0) + mask |= 1 << (status & 0x03); + else + udelay(100); + } while ((mask != 0x0f) && --timeout); +} + +static int sun_pci_fd_test_drive(unsigned long port, int drive) +{ + unsigned char status, data; + int timeout = 1000; + int ready; + + sun_pci_fd_reset(port); + + data = (0x10 << drive) | 0x0c | drive; + sun_pci_fd_out_byte(port, data, DOR); + + sun_pci_fd_out_byte(port, 0x07, FIFO); + sun_pci_fd_out_byte(port, drive & 0x03, FIFO); + + do { + udelay(100); + status = sun_pci_fd_sensei(port); + } while (((status & 0xc0) == 0x80) && --timeout); + + if (!timeout) + ready = 0; + else + ready = (status & 0x10) ? 0 : 1; + + sun_pci_fd_reset(port); + return ready; +} +#undef FIFO +#undef MSR +#undef DOR + +#endif /* CONFIG_PCI */ + +#ifdef CONFIG_PCI +static int __init ebus_fdthree_p(struct linux_ebus_device *edev) +{ + if (!strcmp(edev->prom_node->name, "fdthree")) + return 1; + if (!strcmp(edev->prom_node->name, "floppy")) { + const char *compat; + + compat = of_get_property(edev->prom_node, + "compatible", NULL); + if (compat && !strcmp(compat, "fdthree")) + return 1; + } + return 0; +} +#endif + +static unsigned long __init sun_floppy_init(void) +{ + char state[128]; + struct sbus_bus *bus; + struct sbus_dev *sdev = NULL; + static int initialized = 0; + + if (initialized) + return sun_floppy_types[0]; + initialized = 1; + + for_all_sbusdev (sdev, bus) { + if (!strcmp(sdev->prom_name, "SUNW,fdtwo")) + break; + } + if(sdev) { + floppy_sdev = sdev; + FLOPPY_IRQ = sdev->irqs[0]; + } else { +#ifdef CONFIG_PCI + struct linux_ebus *ebus; + struct linux_ebus_device *edev = NULL; + unsigned long config = 0; + void __iomem *auxio_reg; + const char *state_prop; + + for_each_ebus(ebus) { + for_each_ebusdev(edev, ebus) { + if (ebus_fdthree_p(edev)) + goto ebus_done; + } + } + ebus_done: + if (!edev) + return 0; + + state_prop = of_get_property(edev->prom_node, "status", NULL); + if (state_prop && !strncmp(state_prop, "disabled", 8)) + return 0; + + FLOPPY_IRQ = edev->irqs[0]; + + /* Make sure the high density bit is set, some systems + * (most notably Ultra5/Ultra10) come up with it clear. + */ + auxio_reg = (void __iomem *) edev->resource[2].start; + writel(readl(auxio_reg)|0x2, auxio_reg); + + sun_pci_ebus_dev = ebus->self; + + spin_lock_init(&sun_pci_fd_ebus_dma.lock); + + /* XXX ioremap */ + sun_pci_fd_ebus_dma.regs = (void __iomem *) + edev->resource[1].start; + if (!sun_pci_fd_ebus_dma.regs) + return 0; + + sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER | + EBUS_DMA_FLAG_TCI_DISABLE); + sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; + sun_pci_fd_ebus_dma.client_cookie = NULL; + sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; + strcpy(sun_pci_fd_ebus_dma.name, "floppy"); + if (ebus_dma_register(&sun_pci_fd_ebus_dma)) + return 0; + + /* XXX ioremap */ + sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start; + + sun_fdops.fd_inb = sun_pci_fd_inb; + sun_fdops.fd_outb = sun_pci_fd_outb; + + can_use_virtual_dma = use_virtual_dma = 0; + sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma; + sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma; + sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode; + sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr; + sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count; + sun_fdops.get_dma_residue = sun_pci_get_dma_residue; + + sun_fdops.fd_request_irq = sun_pci_fd_request_irq; + sun_fdops.fd_free_irq = sun_pci_fd_free_irq; + + sun_fdops.fd_eject = sun_pci_fd_eject; + + fdc_status = (unsigned long) &sun_fdc->status_82077; + + /* + * XXX: Find out on which machines this is really needed. + */ + if (1) { + sun_pci_broken_drive = 1; + sun_fdops.fd_outb = sun_pci_fd_broken_outb; + } + + allowed_drive_mask = 0; + if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0)) + sun_floppy_types[0] = 4; + if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1)) + sun_floppy_types[1] = 4; + + /* + * Find NS87303 SuperIO config registers (through ecpp). + */ + for_each_ebus(ebus) { + for_each_ebusdev(edev, ebus) { + if (!strcmp(edev->prom_node->name, "ecpp")) { + config = edev->resource[1].start; + goto config_done; + } + } + } + config_done: + + /* + * Sanity check, is this really the NS87303? + */ + switch (config & 0x3ff) { + case 0x02e: + case 0x15c: + case 0x26e: + case 0x398: + break; + default: + config = 0; + } + + if (!config) + return sun_floppy_types[0]; + + /* Enable PC-AT mode. */ + ns87303_modify(config, ASC, 0, 0xc0); + +#ifdef PCI_FDC_SWAP_DRIVES + /* + * If only Floppy 1 is present, swap drives. + */ + if (!sun_floppy_types[0] && sun_floppy_types[1]) { + /* + * Set the drive exchange bit in FCR on NS87303, + * make sure other bits are sane before doing so. + */ + ns87303_modify(config, FER, FER_EDM, 0); + ns87303_modify(config, ASC, ASC_DRV2_SEL, 0); + ns87303_modify(config, FCR, 0, FCR_LDE); + + config = sun_floppy_types[0]; + sun_floppy_types[0] = sun_floppy_types[1]; + sun_floppy_types[1] = config; + + if (sun_pci_broken_drive != -1) { + sun_pci_broken_drive = 1 - sun_pci_broken_drive; + sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb; + } + } +#endif /* PCI_FDC_SWAP_DRIVES */ + + return sun_floppy_types[0]; +#else + return 0; +#endif + } + prom_getproperty(sdev->prom_node, "status", state, sizeof(state)); + if(!strncmp(state, "disabled", 8)) + return 0; + + /* + * We cannot do sbus_ioremap here: it does request_region, + * which the generic floppy driver tries to do once again. + * But we must use the sdev resource values as they have + * had parent ranges applied. + */ + sun_fdc = (struct sun_flpy_controller *) + (sdev->resource[0].start + + ((sdev->resource[0].flags & 0x1ffUL) << 32UL)); + + /* Last minute sanity check... */ + if(sbus_readb(&sun_fdc->status1_82077) == 0xff) { + sun_fdc = (struct sun_flpy_controller *)-1; + return 0; + } + + sun_fdops.fd_inb = sun_82077_fd_inb; + sun_fdops.fd_outb = sun_82077_fd_outb; + + can_use_virtual_dma = use_virtual_dma = 1; + sun_fdops.fd_enable_dma = sun_fd_enable_dma; + sun_fdops.fd_disable_dma = sun_fd_disable_dma; + sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode; + sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr; + sun_fdops.fd_set_dma_count = sun_fd_set_dma_count; + sun_fdops.get_dma_residue = sun_get_dma_residue; + + sun_fdops.fd_request_irq = sun_fd_request_irq; + sun_fdops.fd_free_irq = sun_fd_free_irq; + + sun_fdops.fd_eject = sun_fd_eject; + + fdc_status = (unsigned long) &sun_fdc->status_82077; + + /* Success... */ + allowed_drive_mask = 0x01; + sun_floppy_types[0] = 4; + sun_floppy_types[1] = 0; + + return sun_floppy_types[0]; +} + +#define EXTRA_FLOPPY_PARAMS + +static DEFINE_SPINLOCK(dma_spin_lock); + +#define claim_dma_lock() \ +({ unsigned long flags; \ + spin_lock_irqsave(&dma_spin_lock, flags); \ + flags; \ +}) + +#define release_dma_lock(__flags) \ + spin_unlock_irqrestore(&dma_spin_lock, __flags); + +#endif /* !(__ASM_SPARC64_FLOPPY_H) */ diff --git a/include/asm-sparc/futex.h b/include/asm-sparc/futex.h index 6a332a9f099..c6a9f038c53 100644 --- a/include/asm-sparc/futex.h +++ b/include/asm-sparc/futex.h @@ -1,6 +1,8 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H - -#include <asm-generic/futex.h> - +#ifndef ___ASM_SPARC_FUTEX_H +#define ___ASM_SPARC_FUTEX_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/futex_64.h> +#else +#include <asm-sparc/futex_32.h> +#endif #endif diff --git a/include/asm-sparc/futex_32.h b/include/asm-sparc/futex_32.h new file mode 100644 index 00000000000..6a332a9f099 --- /dev/null +++ b/include/asm-sparc/futex_32.h @@ -0,0 +1,6 @@ +#ifndef _ASM_FUTEX_H +#define _ASM_FUTEX_H + +#include <asm-generic/futex.h> + +#endif diff --git a/include/asm-sparc/futex_64.h b/include/asm-sparc/futex_64.h new file mode 100644 index 00000000000..d8378935ae9 --- /dev/null +++ b/include/asm-sparc/futex_64.h @@ -0,0 +1,110 @@ +#ifndef _SPARC64_FUTEX_H +#define _SPARC64_FUTEX_H + +#include <linux/futex.h> +#include <linux/uaccess.h> +#include <asm/errno.h> +#include <asm/system.h> + +#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \ + __asm__ __volatile__( \ + "\n1: lduwa [%3] %%asi, %2\n" \ + " " insn "\n" \ + "2: casa [%3] %%asi, %2, %1\n" \ + " cmp %2, %1\n" \ + " bne,pn %%icc, 1b\n" \ + " mov 0, %0\n" \ + "3:\n" \ + " .section .fixup,#alloc,#execinstr\n" \ + " .align 4\n" \ + "4: sethi %%hi(3b), %0\n" \ + " jmpl %0 + %%lo(3b), %%g0\n" \ + " mov %5, %0\n" \ + " .previous\n" \ + " .section __ex_table,\"a\"\n" \ + " .align 4\n" \ + " .word 1b, 4b\n" \ + " .word 2b, 4b\n" \ + " .previous\n" \ + : "=&r" (ret), "=&r" (oldval), "=&r" (tem) \ + : "r" (uaddr), "r" (oparg), "i" (-EFAULT) \ + : "memory") + +static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) +{ + int op = (encoded_op >> 28) & 7; + int cmp = (encoded_op >> 24) & 15; + int oparg = (encoded_op << 8) >> 20; + int cmparg = (encoded_op << 20) >> 20; + int oldval = 0, ret, tem; + + if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))) + return -EFAULT; + if (unlikely((((unsigned long) uaddr) & 0x3UL))) + return -EINVAL; + + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + + pagefault_disable(); + + switch (op) { + case FUTEX_OP_SET: + __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_ADD: + __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_OR: + __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_ANDN: + __futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg); + break; + case FUTEX_OP_XOR: + __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg); + break; + default: + ret = -ENOSYS; + } + + pagefault_enable(); + + if (!ret) { + switch (cmp) { + case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; + case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; + case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; + case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; + case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; + case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; + default: ret = -ENOSYS; + } + } + return ret; +} + +static inline int +futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) +{ + __asm__ __volatile__( + "\n1: casa [%3] %%asi, %2, %0\n" + "2:\n" + " .section .fixup,#alloc,#execinstr\n" + " .align 4\n" + "3: sethi %%hi(2b), %0\n" + " jmpl %0 + %%lo(2b), %%g0\n" + " mov %4, %0\n" + " .previous\n" + " .section __ex_table,\"a\"\n" + " .align 4\n" + " .word 1b, 3b\n" + " .previous\n" + : "=r" (newval) + : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT) + : "memory"); + + return newval; +} + +#endif /* !(_SPARC64_FUTEX_H) */ diff --git a/include/asm-sparc/hardirq.h b/include/asm-sparc/hardirq.h index 4f63ed8df55..15647877310 100644 --- a/include/asm-sparc/hardirq.h +++ b/include/asm-sparc/hardirq.h @@ -1,23 +1,8 @@ -/* hardirq.h: 32-bit Sparc hard IRQ support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org) - */ - -#ifndef __SPARC_HARDIRQ_H -#define __SPARC_HARDIRQ_H - -#include <linux/threads.h> -#include <linux/spinlock.h> -#include <linux/cache.h> - -/* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */ -typedef struct { - unsigned int __softirq_pending; -} ____cacheline_aligned irq_cpustat_t; - -#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ - -#define HARDIRQ_BITS 8 - -#endif /* __SPARC_HARDIRQ_H */ +#ifndef ___ASM_SPARC_HARDIRQ_H +#define ___ASM_SPARC_HARDIRQ_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/hardirq_64.h> +#else +#include <asm-sparc/hardirq_32.h> +#endif +#endif diff --git a/include/asm-sparc/hardirq_32.h b/include/asm-sparc/hardirq_32.h new file mode 100644 index 00000000000..4f63ed8df55 --- /dev/null +++ b/include/asm-sparc/hardirq_32.h @@ -0,0 +1,23 @@ +/* hardirq.h: 32-bit Sparc hard IRQ support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998-2000 Anton Blanchard (anton@samba.org) + */ + +#ifndef __SPARC_HARDIRQ_H +#define __SPARC_HARDIRQ_H + +#include <linux/threads.h> +#include <linux/spinlock.h> +#include <linux/cache.h> + +/* entry.S is sensitive to the offsets of these fields */ /* XXX P3 Is it? */ +typedef struct { + unsigned int __softirq_pending; +} ____cacheline_aligned irq_cpustat_t; + +#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ + +#define HARDIRQ_BITS 8 + +#endif /* __SPARC_HARDIRQ_H */ diff --git a/include/asm-sparc/hardirq_64.h b/include/asm-sparc/hardirq_64.h new file mode 100644 index 00000000000..7c29fd1a87a --- /dev/null +++ b/include/asm-sparc/hardirq_64.h @@ -0,0 +1,19 @@ +/* hardirq.h: 64-bit Sparc hard IRQ support. + * + * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net) + */ + +#ifndef __SPARC64_HARDIRQ_H +#define __SPARC64_HARDIRQ_H + +#include <asm/cpudata.h> + +#define __ARCH_IRQ_STAT +#define local_softirq_pending() \ + (local_cpu_data().__softirq_pending) + +void ack_bad_irq(unsigned int irq); + +#define HARDIRQ_BITS 8 + +#endif /* !(__SPARC64_HARDIRQ_H) */ diff --git a/include/asm-sparc/head.h b/include/asm-sparc/head.h index 7c35491a8b5..14652abdea3 100644 --- a/include/asm-sparc/head.h +++ b/include/asm-sparc/head.h @@ -1,102 +1,8 @@ -#ifndef __SPARC_HEAD_H -#define __SPARC_HEAD_H - -#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */ -#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */ -#define SUN4C_SEGSZ (1 << 18) -#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */ -#define INTS_ENAB 0x01 /* entry.S uses this. */ - -#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */ - -#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */ -#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */ - -/* Here are some trap goodies */ - -/* Generic trap entry. */ -#define TRAP_ENTRY(type, label) \ - rd %psr, %l0; b label; rd %wim, %l3; nop; - -/* Data/text faults. Defaults to sun4c version at boot time. */ -#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7; -#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7; -#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; -#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; - -/* This is for traps we should NEVER get. */ -#define BAD_TRAP(num) \ - rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; - -/* This is for traps when we want just skip the instruction which caused it */ -#define SKIP_TRAP(type, name) \ - jmpl %l2, %g0; rett %l2 + 4; nop; nop; - -/* Notice that for the system calls we pull a trick. We load up a - * different pointer to the system call vector table in %l7, but call - * the same generic system call low-level entry point. The trap table - * entry sequences are also HyperSparc pipeline friendly ;-) - */ - -/* Software trap for Linux system calls. */ -#define LINUX_SYSCALL_TRAP \ - sethi %hi(sys_call_table), %l7; \ - or %l7, %lo(sys_call_table), %l7; \ - b linux_sparc_syscall; \ - rd %psr, %l0; - -#define BREAKPOINT_TRAP \ - b breakpoint_trap; \ - rd %psr,%l0; \ - nop; \ - nop; - -#ifdef CONFIG_KGDB -#define KGDB_TRAP(num) \ - b kgdb_trap_low; \ - rd %psr,%l0; \ - nop; \ - nop; +#ifndef ___ASM_SPARC_HEAD_H +#define ___ASM_SPARC_HEAD_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/head_64.h> #else -#define KGDB_TRAP(num) \ - BAD_TRAP(num) +#include <asm-sparc/head_32.h> +#endif #endif - -/* The Get Condition Codes software trap for userland. */ -#define GETCC_TRAP \ - b getcc_trap_handler; mov %psr, %l0; nop; nop; - -/* The Set Condition Codes software trap for userland. */ -#define SETCC_TRAP \ - b setcc_trap_handler; mov %psr, %l0; nop; nop; - -/* The Get PSR software trap for userland. */ -#define GETPSR_TRAP \ - mov %psr, %i0; jmp %l2; rett %l2 + 4; nop; - -/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and - * gets handled with another macro. - */ -#define TRAP_ENTRY_INTERRUPT(int_level) \ - mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; - -/* NMI's (Non Maskable Interrupts) are special, you can't keep them - * from coming in, and basically if you get one, the shows over. ;( - * On the sun4c they are usually asynchronous memory errors, on the - * the sun4m they could be either due to mem errors or a software - * initiated interrupt from the prom/kern on an SMP box saying "I - * command you to do CPU tricks, read your mailbox for more info." - */ -#define NMI_TRAP \ - rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop; - -/* Window overflows/underflows are special and we need to try to be as - * efficient as possible here.... - */ -#define WINDOW_SPILL \ - rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; - -#define WINDOW_FILL \ - rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; - -#endif /* __SPARC_HEAD_H */ diff --git a/include/asm-sparc/head_32.h b/include/asm-sparc/head_32.h new file mode 100644 index 00000000000..7c35491a8b5 --- /dev/null +++ b/include/asm-sparc/head_32.h @@ -0,0 +1,102 @@ +#ifndef __SPARC_HEAD_H +#define __SPARC_HEAD_H + +#define KERNBASE 0xf0000000 /* First address the kernel will eventually be */ +#define LOAD_ADDR 0x4000 /* prom jumps to us here unless this is elf /boot */ +#define SUN4C_SEGSZ (1 << 18) +#define SRMMU_L1_KBASE_OFFSET ((KERNBASE>>24)<<2) /* Used in boot remapping. */ +#define INTS_ENAB 0x01 /* entry.S uses this. */ + +#define SUN4_PROM_VECTOR 0xFFE81000 /* SUN4 PROM needs to be hardwired */ + +#define WRITE_PAUSE nop; nop; nop; /* Have to do this after %wim/%psr chg */ +#define NOP_INSN 0x01000000 /* Used to patch sparc_save_state */ + +/* Here are some trap goodies */ + +/* Generic trap entry. */ +#define TRAP_ENTRY(type, label) \ + rd %psr, %l0; b label; rd %wim, %l3; nop; + +/* Data/text faults. Defaults to sun4c version at boot time. */ +#define SPARC_TFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 1, %l7; +#define SPARC_DFAULT rd %psr, %l0; rd %wim, %l3; b sun4c_fault; mov 0, %l7; +#define SRMMU_TFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 1, %l7; +#define SRMMU_DFAULT rd %psr, %l0; rd %wim, %l3; b srmmu_fault; mov 0, %l7; + +/* This is for traps we should NEVER get. */ +#define BAD_TRAP(num) \ + rd %psr, %l0; mov num, %l7; b bad_trap_handler; rd %wim, %l3; + +/* This is for traps when we want just skip the instruction which caused it */ +#define SKIP_TRAP(type, name) \ + jmpl %l2, %g0; rett %l2 + 4; nop; nop; + +/* Notice that for the system calls we pull a trick. We load up a + * different pointer to the system call vector table in %l7, but call + * the same generic system call low-level entry point. The trap table + * entry sequences are also HyperSparc pipeline friendly ;-) + */ + +/* Software trap for Linux system calls. */ +#define LINUX_SYSCALL_TRAP \ + sethi %hi(sys_call_table), %l7; \ + or %l7, %lo(sys_call_table), %l7; \ + b linux_sparc_syscall; \ + rd %psr, %l0; + +#define BREAKPOINT_TRAP \ + b breakpoint_trap; \ + rd %psr,%l0; \ + nop; \ + nop; + +#ifdef CONFIG_KGDB +#define KGDB_TRAP(num) \ + b kgdb_trap_low; \ + rd %psr,%l0; \ + nop; \ + nop; +#else +#define KGDB_TRAP(num) \ + BAD_TRAP(num) +#endif + +/* The Get Condition Codes software trap for userland. */ +#define GETCC_TRAP \ + b getcc_trap_handler; mov %psr, %l0; nop; nop; + +/* The Set Condition Codes software trap for userland. */ +#define SETCC_TRAP \ + b setcc_trap_handler; mov %psr, %l0; nop; nop; + +/* The Get PSR software trap for userland. */ +#define GETPSR_TRAP \ + mov %psr, %i0; jmp %l2; rett %l2 + 4; nop; + +/* This is for hard interrupts from level 1-14, 15 is non-maskable (nmi) and + * gets handled with another macro. + */ +#define TRAP_ENTRY_INTERRUPT(int_level) \ + mov int_level, %l7; rd %psr, %l0; b real_irq_entry; rd %wim, %l3; + +/* NMI's (Non Maskable Interrupts) are special, you can't keep them + * from coming in, and basically if you get one, the shows over. ;( + * On the sun4c they are usually asynchronous memory errors, on the + * the sun4m they could be either due to mem errors or a software + * initiated interrupt from the prom/kern on an SMP box saying "I + * command you to do CPU tricks, read your mailbox for more info." + */ +#define NMI_TRAP \ + rd %wim, %l3; b linux_trap_nmi_sun4c; mov %psr, %l0; nop; + +/* Window overflows/underflows are special and we need to try to be as + * efficient as possible here.... + */ +#define WINDOW_SPILL \ + rd %psr, %l0; rd %wim, %l3; b spill_window_entry; andcc %l0, PSR_PS, %g0; + +#define WINDOW_FILL \ + rd %psr, %l0; rd %wim, %l3; b fill_window_entry; andcc %l0, PSR_PS, %g0; + +#endif /* __SPARC_HEAD_H */ diff --git a/include/asm-sparc/head_64.h b/include/asm-sparc/head_64.h new file mode 100644 index 00000000000..10e9dabc4c4 --- /dev/null +++ b/include/asm-sparc/head_64.h @@ -0,0 +1,76 @@ +#ifndef _SPARC64_HEAD_H +#define _SPARC64_HEAD_H + +#include <asm/pstate.h> + + /* wrpr %g0, val, %gl */ +#define SET_GL(val) \ + .word 0xa1902000 | val + + /* rdpr %gl, %gN */ +#define GET_GL_GLOBAL(N) \ + .word 0x81540000 | (N << 25) + +#define KERNBASE 0x400000 + +#define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ) + +#define __CHEETAH_ID 0x003e0014 +#define __JALAPENO_ID 0x003e0016 +#define __SERRANO_ID 0x003e0022 + +#define CHEETAH_MANUF 0x003e +#define CHEETAH_IMPL 0x0014 /* Ultra-III */ +#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ +#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ +#define JAGUAR_IMPL 0x0018 /* Ultra-IV */ +#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ +#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ + +#define BRANCH_IF_SUN4V(tmp1,label) \ + sethi %hi(is_sun4v), %tmp1; \ + lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \ + brnz,pn %tmp1, label; \ + nop + +#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ + rdpr %ver, %tmp1; \ + sethi %hi(__CHEETAH_ID), %tmp2; \ + srlx %tmp1, 32, %tmp1; \ + or %tmp2, %lo(__CHEETAH_ID), %tmp2;\ + cmp %tmp1, %tmp2; \ + be,pn %icc, label; \ + nop; + +#define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ + rdpr %ver, %tmp1; \ + sethi %hi(__JALAPENO_ID), %tmp2; \ + srlx %tmp1, 32, %tmp1; \ + or %tmp2, %lo(__JALAPENO_ID), %tmp2;\ + cmp %tmp1, %tmp2; \ + be,pn %icc, label; \ + nop; + +#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \ + rdpr %ver, %tmp1; \ + srlx %tmp1, (32 + 16), %tmp2; \ + cmp %tmp2, CHEETAH_MANUF; \ + bne,pt %xcc, 99f; \ + sllx %tmp1, 16, %tmp1; \ + srlx %tmp1, (32 + 16), %tmp2; \ + cmp %tmp2, CHEETAH_PLUS_IMPL; \ + bgeu,pt %xcc, label; \ +99: nop; + +#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \ + rdpr %ver, %tmp1; \ + srlx %tmp1, (32 + 16), %tmp2; \ + cmp %tmp2, CHEETAH_MANUF; \ + bne,pt %xcc, 99f; \ + sllx %tmp1, 16, %tmp1; \ + srlx %tmp1, (32 + 16), %tmp2; \ + cmp %tmp2, CHEETAH_IMPL; \ + bgeu,pt %xcc, label; \ +99: nop; + +#endif /* !(_SPARC64_HEAD_H) */ diff --git a/include/asm-sparc/ide.h b/include/asm-sparc/ide.h index afd1736ed48..a3c7f5ff270 100644 --- a/include/asm-sparc/ide.h +++ b/include/asm-sparc/ide.h @@ -1,95 +1,8 @@ -/* ide.h: SPARC PCI specific IDE glue. - * - * Copyright (C) 1997 David S. Miller (davem@davemloft.net) - * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) - * Adaptation from sparc64 version to sparc by Pete Zaitcev. - */ - -#ifndef _SPARC_IDE_H -#define _SPARC_IDE_H - -#ifdef __KERNEL__ - -#include <asm/pgtable.h> -#include <asm/io.h> -#include <asm/psr.h> - -#undef MAX_HWIFS -#define MAX_HWIFS 2 - -#define __ide_insl(data_reg, buffer, wcount) \ - __ide_insw(data_reg, buffer, (wcount)<<1) -#define __ide_outsl(data_reg, buffer, wcount) \ - __ide_outsw(data_reg, buffer, (wcount)<<1) - -/* On sparc, I/O ports and MMIO registers are accessed identically. */ -#define __ide_mm_insw __ide_insw -#define __ide_mm_insl __ide_insl -#define __ide_mm_outsw __ide_outsw -#define __ide_mm_outsl __ide_outsl - -static inline void __ide_insw(unsigned long port, - void *dst, - unsigned long count) -{ - volatile unsigned short *data_port; - /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */ - u16 *ps = dst; - u32 *pi; - - data_port = (volatile unsigned short *)port; - - if(((unsigned long)ps) & 0x2) { - *ps++ = *data_port; - count--; - } - pi = (u32 *)ps; - while(count >= 2) { - u32 w; - - w = (*data_port) << 16; - w |= (*data_port); - *pi++ = w; - count -= 2; - } - ps = (u16 *)pi; - if(count) - *ps++ = *data_port; - - /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */ -} - -static inline void __ide_outsw(unsigned long port, - const void *src, - unsigned long count) -{ - volatile unsigned short *data_port; - /* unsigned long end = (unsigned long)src + (count << 1); */ - const u16 *ps = src; - const u32 *pi; - - data_port = (volatile unsigned short *)port; - - if(((unsigned long)src) & 0x2) { - *data_port = *ps++; - count--; - } - pi = (const u32 *)ps; - while(count >= 2) { - u32 w; - - w = *pi++; - *data_port = (w >> 16); - *data_port = w; - count -= 2; - } - ps = (const u16 *)pi; - if(count) - *data_port = *ps; - - /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */ -} - -#endif /* __KERNEL__ */ - -#endif /* _SPARC_IDE_H */ +#ifndef ___ASM_SPARC_IDE_H +#define ___ASM_SPARC_IDE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/ide_64.h> +#else +#include <asm-sparc/ide_32.h> +#endif +#endif diff --git a/include/asm-sparc/ide_32.h b/include/asm-sparc/ide_32.h new file mode 100644 index 00000000000..afd1736ed48 --- /dev/null +++ b/include/asm-sparc/ide_32.h @@ -0,0 +1,95 @@ +/* ide.h: SPARC PCI specific IDE glue. + * + * Copyright (C) 1997 David S. Miller (davem@davemloft.net) + * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) + * Adaptation from sparc64 version to sparc by Pete Zaitcev. + */ + +#ifndef _SPARC_IDE_H +#define _SPARC_IDE_H + +#ifdef __KERNEL__ + +#include <asm/pgtable.h> +#include <asm/io.h> +#include <asm/psr.h> + +#undef MAX_HWIFS +#define MAX_HWIFS 2 + +#define __ide_insl(data_reg, buffer, wcount) \ + __ide_insw(data_reg, buffer, (wcount)<<1) +#define __ide_outsl(data_reg, buffer, wcount) \ + __ide_outsw(data_reg, buffer, (wcount)<<1) + +/* On sparc, I/O ports and MMIO registers are accessed identically. */ +#define __ide_mm_insw __ide_insw +#define __ide_mm_insl __ide_insl +#define __ide_mm_outsw __ide_outsw +#define __ide_mm_outsl __ide_outsl + +static inline void __ide_insw(unsigned long port, + void *dst, + unsigned long count) +{ + volatile unsigned short *data_port; + /* unsigned long end = (unsigned long)dst + (count << 1); */ /* P3 */ + u16 *ps = dst; + u32 *pi; + + data_port = (volatile unsigned short *)port; + + if(((unsigned long)ps) & 0x2) { + *ps++ = *data_port; + count--; + } + pi = (u32 *)ps; + while(count >= 2) { + u32 w; + + w = (*data_port) << 16; + w |= (*data_port); + *pi++ = w; + count -= 2; + } + ps = (u16 *)pi; + if(count) + *ps++ = *data_port; + + /* __flush_dcache_range((unsigned long)dst, end); */ /* P3 see hme */ +} + +static inline void __ide_outsw(unsigned long port, + const void *src, + unsigned long count) +{ + volatile unsigned short *data_port; + /* unsigned long end = (unsigned long)src + (count << 1); */ + const u16 *ps = src; + const u32 *pi; + + data_port = (volatile unsigned short *)port; + + if(((unsigned long)src) & 0x2) { + *data_port = *ps++; + count--; + } + pi = (const u32 *)ps; + while(count >= 2) { + u32 w; + + w = *pi++; + *data_port = (w >> 16); + *data_port = w; + count -= 2; + } + ps = (const u16 *)pi; + if(count) + *data_port = *ps; + + /* __flush_dcache_range((unsigned long)src, end); */ /* P3 see hme */ +} + +#endif /* __KERNEL__ */ + +#endif /* _SPARC_IDE_H */ diff --git a/include/asm-sparc/ide_64.h b/include/asm-sparc/ide_64.h new file mode 100644 index 00000000000..1282676da1c --- /dev/null +++ b/include/asm-sparc/ide_64.h @@ -0,0 +1,118 @@ +/* + * ide.h: Ultra/PCI specific IDE glue. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) + */ + +#ifndef _SPARC64_IDE_H +#define _SPARC64_IDE_H + +#ifdef __KERNEL__ + +#include <asm/pgalloc.h> +#include <asm/io.h> +#include <asm/spitfire.h> +#include <asm/cacheflush.h> +#include <asm/page.h> + +#ifndef MAX_HWIFS +# ifdef CONFIG_BLK_DEV_IDEPCI +#define MAX_HWIFS 10 +# else +#define MAX_HWIFS 2 +# endif +#endif + +#define __ide_insl(data_reg, buffer, wcount) \ + __ide_insw(data_reg, buffer, (wcount)<<1) +#define __ide_outsl(data_reg, buffer, wcount) \ + __ide_outsw(data_reg, buffer, (wcount)<<1) + +/* On sparc64, I/O ports and MMIO registers are accessed identically. */ +#define __ide_mm_insw __ide_insw +#define __ide_mm_insl __ide_insl +#define __ide_mm_outsw __ide_outsw +#define __ide_mm_outsl __ide_outsl + +static inline unsigned int inw_be(void __iomem *addr) +{ + unsigned int ret; + + __asm__ __volatile__("lduha [%1] %2, %0" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline void __ide_insw(void __iomem *port, void *dst, u32 count) +{ +#ifdef DCACHE_ALIASING_POSSIBLE + unsigned long end = (unsigned long)dst + (count << 1); +#endif + u16 *ps = dst; + u32 *pi; + + if(((u64)ps) & 0x2) { + *ps++ = inw_be(port); + count--; + } + pi = (u32 *)ps; + while(count >= 2) { + u32 w; + + w = inw_be(port) << 16; + w |= inw_be(port); + *pi++ = w; + count -= 2; + } + ps = (u16 *)pi; + if(count) + *ps++ = inw_be(port); + +#ifdef DCACHE_ALIASING_POSSIBLE + __flush_dcache_range((unsigned long)dst, end); +#endif +} + +static inline void outw_be(unsigned short w, void __iomem *addr) +{ + __asm__ __volatile__("stha %0, [%1] %2" + : /* no outputs */ + : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void __ide_outsw(void __iomem *port, void *src, u32 count) +{ +#ifdef DCACHE_ALIASING_POSSIBLE + unsigned long end = (unsigned long)src + (count << 1); +#endif + const u16 *ps = src; + const u32 *pi; + + if(((u64)src) & 0x2) { + outw_be(*ps++, port); + count--; + } + pi = (const u32 *)ps; + while(count >= 2) { + u32 w; + + w = *pi++; + outw_be((w >> 16), port); + outw_be(w, port); + count -= 2; + } + ps = (const u16 *)pi; + if(count) + outw_be(*ps, port); + +#ifdef DCACHE_ALIASING_POSSIBLE + __flush_dcache_range((unsigned long)src, end); +#endif +} + +#endif /* __KERNEL__ */ + +#endif /* _SPARC64_IDE_H */ diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h index 3a3e7bdb06b..fc9024d3dfc 100644 --- a/include/asm-sparc/io.h +++ b/include/asm-sparc/io.h @@ -1,325 +1,8 @@ -#ifndef __SPARC_IO_H -#define __SPARC_IO_H - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/ioport.h> /* struct resource */ - -#include <asm/page.h> /* IO address mapping routines need this */ -#include <asm/system.h> - -#define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) - -static inline u32 flip_dword (u32 l) -{ - return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); -} - -static inline u16 flip_word (u16 w) -{ - return ((w&0xff) << 8) | ((w>>8)&0xff); -} - -#define mmiowb() - -/* - * Memory mapped I/O to PCI - */ - -static inline u8 __raw_readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 __raw_readw(const volatile void __iomem *addr) -{ - return *(__force volatile u16 *)addr; -} - -static inline u32 __raw_readl(const volatile void __iomem *addr) -{ - return *(__force volatile u32 *)addr; -} - -static inline void __raw_writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void __raw_writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = w; -} - -static inline void __raw_writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = l; -} - -static inline u8 __readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 __readw(const volatile void __iomem *addr) -{ - return flip_word(*(__force volatile u16 *)addr); -} - -static inline u32 __readl(const volatile void __iomem *addr) -{ - return flip_dword(*(__force volatile u32 *)addr); -} - -static inline void __writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void __writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = flip_word(w); -} - -static inline void __writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = flip_dword(l); -} - -#define readb(__addr) __readb(__addr) -#define readw(__addr) __readw(__addr) -#define readl(__addr) __readl(__addr) -#define readb_relaxed(__addr) readb(__addr) -#define readw_relaxed(__addr) readw(__addr) -#define readl_relaxed(__addr) readl(__addr) - -#define writeb(__b, __addr) __writeb((__b),(__addr)) -#define writew(__w, __addr) __writew((__w),(__addr)) -#define writel(__l, __addr) __writel((__l),(__addr)) - -/* - * I/O space operations - * - * Arrangement on a Sun is somewhat complicated. - * - * First of all, we want to use standard Linux drivers - * for keyboard, PC serial, etc. These drivers think - * they access I/O space and use inb/outb. - * On the other hand, EBus bridge accepts PCI *memory* - * cycles and converts them into ISA *I/O* cycles. - * Ergo, we want inb & outb to generate PCI memory cycles. - * - * If we want to issue PCI *I/O* cycles, we do this - * with a low 64K fixed window in PCIC. This window gets - * mapped somewhere into virtual kernel space and we - * can use inb/outb again. - */ -#define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) -#define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) -#define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) -#define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) - -#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) -#define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) -#define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) -#define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) - -#define inb_p(__addr) inb(__addr) -#define outb_p(__b, __addr) outb(__b, __addr) -#define inw_p(__addr) inw(__addr) -#define outw_p(__w, __addr) outw(__w, __addr) -#define inl_p(__addr) inl(__addr) -#define outl_p(__l, __addr) outl(__l, __addr) - -void outsb(unsigned long addr, const void *src, unsigned long cnt); -void outsw(unsigned long addr, const void *src, unsigned long cnt); -void outsl(unsigned long addr, const void *src, unsigned long cnt); -void insb(unsigned long addr, void *dst, unsigned long count); -void insw(unsigned long addr, void *dst, unsigned long count); -void insl(unsigned long addr, void *dst, unsigned long count); - -#define IO_SPACE_LIMIT 0xffffffff - -/* - * SBus accessors. - * - * SBus has only one, memory mapped, I/O space. - * We do not need to flip bytes for SBus of course. - */ -static inline u8 _sbus_readb(const volatile void __iomem *addr) -{ - return *(__force volatile u8 *)addr; -} - -static inline u16 _sbus_readw(const volatile void __iomem *addr) -{ - return *(__force volatile u16 *)addr; -} - -static inline u32 _sbus_readl(const volatile void __iomem *addr) -{ - return *(__force volatile u32 *)addr; -} - -static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) -{ - *(__force volatile u8 *)addr = b; -} - -static inline void _sbus_writew(u16 w, volatile void __iomem *addr) -{ - *(__force volatile u16 *)addr = w; -} - -static inline void _sbus_writel(u32 l, volatile void __iomem *addr) -{ - *(__force volatile u32 *)addr = l; -} - -/* - * The only reason for #define's is to hide casts to unsigned long. - */ -#define sbus_readb(__addr) _sbus_readb(__addr) -#define sbus_readw(__addr) _sbus_readw(__addr) -#define sbus_readl(__addr) _sbus_readl(__addr) -#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) -#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) -#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) - -static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) -{ - while(n--) { - sbus_writeb(c, __dst); - __dst++; - } -} - -static inline void -_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - volatile void __iomem *d = dst; - - while (n--) { - writeb(c, d); - d++; - } -} - -#define memset_io(d,c,sz) _memset_io(d,c,sz) - -static inline void -_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) -{ - char *d = dst; - - while (n--) { - char tmp = readb(src); - *d++ = tmp; - src++; - } -} - -#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) - -static inline void -_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) -{ - const char *s = src; - volatile void __iomem *d = dst; - - while (n--) { - char tmp = *s++; - writeb(tmp, d); - d++; - } -} - -#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) - -#ifdef __KERNEL__ - -/* - * Bus number may be embedded in the higher bits of the physical address. - * This is why we have no bus number argument to ioremap(). - */ -extern void __iomem *ioremap(unsigned long offset, unsigned long size); -#define ioremap_nocache(X,Y) ioremap((X),(Y)) -extern void iounmap(volatile void __iomem *addr); - -#define ioread8(X) readb(X) -#define ioread16(X) readw(X) -#define ioread32(X) readl(X) -#define iowrite8(val,X) writeb(val,X) -#define iowrite16(val,X) writew(val,X) -#define iowrite32(val,X) writel(val,X) - -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) -{ - insb((unsigned long __force)port, buf, count); -} -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) -{ - insw((unsigned long __force)port, buf, count); -} - -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) -{ - insl((unsigned long __force)port, buf, count); -} - -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsb((unsigned long __force)port, buf, count); -} - -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsw((unsigned long __force)port, buf, count); -} - -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsl((unsigned long __force)port, buf, count); -} - -/* Create a virtual mapping cookie for an IO port range */ -extern void __iomem *ioport_map(unsigned long port, unsigned int nr); -extern void ioport_unmap(void __iomem *); - -/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ -struct pci_dev; -extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); -extern void pci_iounmap(struct pci_dev *dev, void __iomem *); - -/* - * Bus number may be in res->flags... somewhere. - */ -extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, - unsigned long size, char *name); -extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); - - -/* - * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, - * so rtc_port is static in it. This should not change unless a new - * hardware pops up. - */ -#define RTC_PORT(x) (rtc_port + (x)) -#define RTC_ALWAYS_BCD 0 - +#ifndef ___ASM_SPARC_IO_H +#define ___ASM_SPARC_IO_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/io_64.h> +#else +#include <asm-sparc/io_32.h> +#endif #endif - -#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif /* !(__SPARC_IO_H) */ diff --git a/include/asm-sparc/io_32.h b/include/asm-sparc/io_32.h new file mode 100644 index 00000000000..c43af722ae8 --- /dev/null +++ b/include/asm-sparc/io_32.h @@ -0,0 +1,325 @@ +#ifndef __SPARC_IO_H +#define __SPARC_IO_H + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/ioport.h> /* struct resource */ + +#include <asm/page.h> /* IO address mapping routines need this */ +#include <asm/system.h> + +#define page_to_phys(page) (((page) - mem_map) << PAGE_SHIFT) + +static inline u32 flip_dword (u32 l) +{ + return ((l&0xff)<<24) | (((l>>8)&0xff)<<16) | (((l>>16)&0xff)<<8)| ((l>>24)&0xff); +} + +static inline u16 flip_word (u16 w) +{ + return ((w&0xff) << 8) | ((w>>8)&0xff); +} + +#define mmiowb() + +/* + * Memory mapped I/O to PCI + */ + +static inline u8 __raw_readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 __raw_readw(const volatile void __iomem *addr) +{ + return *(__force volatile u16 *)addr; +} + +static inline u32 __raw_readl(const volatile void __iomem *addr) +{ + return *(__force volatile u32 *)addr; +} + +static inline void __raw_writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void __raw_writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = w; +} + +static inline void __raw_writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = l; +} + +static inline u8 __readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 __readw(const volatile void __iomem *addr) +{ + return flip_word(*(__force volatile u16 *)addr); +} + +static inline u32 __readl(const volatile void __iomem *addr) +{ + return flip_dword(*(__force volatile u32 *)addr); +} + +static inline void __writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void __writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = flip_word(w); +} + +static inline void __writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = flip_dword(l); +} + +#define readb(__addr) __readb(__addr) +#define readw(__addr) __readw(__addr) +#define readl(__addr) __readl(__addr) +#define readb_relaxed(__addr) readb(__addr) +#define readw_relaxed(__addr) readw(__addr) +#define readl_relaxed(__addr) readl(__addr) + +#define writeb(__b, __addr) __writeb((__b),(__addr)) +#define writew(__w, __addr) __writew((__w),(__addr)) +#define writel(__l, __addr) __writel((__l),(__addr)) + +/* + * I/O space operations + * + * Arrangement on a Sun is somewhat complicated. + * + * First of all, we want to use standard Linux drivers + * for keyboard, PC serial, etc. These drivers think + * they access I/O space and use inb/outb. + * On the other hand, EBus bridge accepts PCI *memory* + * cycles and converts them into ISA *I/O* cycles. + * Ergo, we want inb & outb to generate PCI memory cycles. + * + * If we want to issue PCI *I/O* cycles, we do this + * with a low 64K fixed window in PCIC. This window gets + * mapped somewhere into virtual kernel space and we + * can use inb/outb again. + */ +#define inb_local(__addr) __readb((void __iomem *)(unsigned long)(__addr)) +#define inb(__addr) __readb((void __iomem *)(unsigned long)(__addr)) +#define inw(__addr) __readw((void __iomem *)(unsigned long)(__addr)) +#define inl(__addr) __readl((void __iomem *)(unsigned long)(__addr)) + +#define outb_local(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) +#define outb(__b, __addr) __writeb(__b, (void __iomem *)(unsigned long)(__addr)) +#define outw(__w, __addr) __writew(__w, (void __iomem *)(unsigned long)(__addr)) +#define outl(__l, __addr) __writel(__l, (void __iomem *)(unsigned long)(__addr)) + +#define inb_p(__addr) inb(__addr) +#define outb_p(__b, __addr) outb(__b, __addr) +#define inw_p(__addr) inw(__addr) +#define outw_p(__w, __addr) outw(__w, __addr) +#define inl_p(__addr) inl(__addr) +#define outl_p(__l, __addr) outl(__l, __addr) + +void outsb(unsigned long addr, const void *src, unsigned long cnt); +void outsw(unsigned long addr, const void *src, unsigned long cnt); +void outsl(unsigned long addr, const void *src, unsigned long cnt); +void insb(unsigned long addr, void *dst, unsigned long count); +void insw(unsigned long addr, void *dst, unsigned long count); +void insl(unsigned long addr, void *dst, unsigned long count); + +#define IO_SPACE_LIMIT 0xffffffff + +/* + * SBus accessors. + * + * SBus has only one, memory mapped, I/O space. + * We do not need to flip bytes for SBus of course. + */ +static inline u8 _sbus_readb(const volatile void __iomem *addr) +{ + return *(__force volatile u8 *)addr; +} + +static inline u16 _sbus_readw(const volatile void __iomem *addr) +{ + return *(__force volatile u16 *)addr; +} + +static inline u32 _sbus_readl(const volatile void __iomem *addr) +{ + return *(__force volatile u32 *)addr; +} + +static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) +{ + *(__force volatile u8 *)addr = b; +} + +static inline void _sbus_writew(u16 w, volatile void __iomem *addr) +{ + *(__force volatile u16 *)addr = w; +} + +static inline void _sbus_writel(u32 l, volatile void __iomem *addr) +{ + *(__force volatile u32 *)addr = l; +} + +/* + * The only reason for #define's is to hide casts to unsigned long. + */ +#define sbus_readb(__addr) _sbus_readb(__addr) +#define sbus_readw(__addr) _sbus_readw(__addr) +#define sbus_readl(__addr) _sbus_readl(__addr) +#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) +#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) +#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) + +static inline void sbus_memset_io(volatile void __iomem *__dst, int c, __kernel_size_t n) +{ + while(n--) { + sbus_writeb(c, __dst); + __dst++; + } +} + +static inline void +_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + volatile void __iomem *d = dst; + + while (n--) { + writeb(c, d); + d++; + } +} + +#define memset_io(d,c,sz) _memset_io(d,c,sz) + +static inline void +_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) +{ + char *d = dst; + + while (n--) { + char tmp = readb(src); + *d++ = tmp; + src++; + } +} + +#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) + +static inline void +_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) +{ + const char *s = src; + volatile void __iomem *d = dst; + + while (n--) { + char tmp = *s++; + writeb(tmp, d); + d++; + } +} + +#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) + +#ifdef __KERNEL__ + +/* + * Bus number may be embedded in the higher bits of the physical address. + * This is why we have no bus number argument to ioremap(). + */ +extern void __iomem *ioremap(unsigned long offset, unsigned long size); +#define ioremap_nocache(X,Y) ioremap((X),(Y)) +extern void iounmap(volatile void __iomem *addr); + +#define ioread8(X) readb(X) +#define ioread16(X) readw(X) +#define ioread32(X) readl(X) +#define iowrite8(val,X) writeb(val,X) +#define iowrite16(val,X) writew(val,X) +#define iowrite32(val,X) writel(val,X) + +static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) +{ + insb((unsigned long __force)port, buf, count); +} +static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) +{ + insw((unsigned long __force)port, buf, count); +} + +static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) +{ + insl((unsigned long __force)port, buf, count); +} + +static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsb((unsigned long __force)port, buf, count); +} + +static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsw((unsigned long __force)port, buf, count); +} + +static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsl((unsigned long __force)port, buf, count); +} + +/* Create a virtual mapping cookie for an IO port range */ +extern void __iomem *ioport_map(unsigned long port, unsigned int nr); +extern void ioport_unmap(void __iomem *); + +/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ +struct pci_dev; +extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); +extern void pci_iounmap(struct pci_dev *dev, void __iomem *); + +/* + * Bus number may be in res->flags... somewhere. + */ +extern void __iomem *sbus_ioremap(struct resource *res, unsigned long offset, + unsigned long size, char *name); +extern void sbus_iounmap(volatile void __iomem *vaddr, unsigned long size); + + +/* + * At the moment, we do not use CMOS_READ anywhere outside of rtc.c, + * so rtc_port is static in it. This should not change unless a new + * hardware pops up. + */ +#define RTC_PORT(x) (rtc_port + (x)) +#define RTC_ALWAYS_BCD 0 + +#endif + +#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 + +/* + * Convert a physical pointer to a virtual kernel pointer for /dev/mem + * access + */ +#define xlate_dev_mem_ptr(p) __va(p) + +/* + * Convert a virtual cached pointer to an uncached pointer + */ +#define xlate_dev_kmem_ptr(p) p + +#endif /* !(__SPARC_IO_H) */ diff --git a/include/asm-sparc/io_64.h b/include/asm-sparc/io_64.h new file mode 100644 index 00000000000..f4907414b39 --- /dev/null +++ b/include/asm-sparc/io_64.h @@ -0,0 +1,511 @@ +#ifndef __SPARC64_IO_H +#define __SPARC64_IO_H + +#include <linux/kernel.h> +#include <linux/compiler.h> +#include <linux/types.h> + +#include <asm/page.h> /* IO address mapping routines need this */ +#include <asm/system.h> +#include <asm/asi.h> + +/* PC crapola... */ +#define __SLOW_DOWN_IO do { } while (0) +#define SLOW_DOWN_IO do { } while (0) + +/* BIO layer definitions. */ +extern unsigned long kern_base, kern_size; +#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) +#define BIO_VMERGE_BOUNDARY 8192 + +static inline u8 _inb(unsigned long addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u16 _inw(unsigned long addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u32 _inl(unsigned long addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline void _outb(u8 b, unsigned long addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _outw(u16 w, unsigned long addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _outl(u32 l, unsigned long addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +#define inb(__addr) (_inb((unsigned long)(__addr))) +#define inw(__addr) (_inw((unsigned long)(__addr))) +#define inl(__addr) (_inl((unsigned long)(__addr))) +#define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr))) +#define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr))) +#define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr))) + +#define inb_p(__addr) inb(__addr) +#define outb_p(__b, __addr) outb(__b, __addr) +#define inw_p(__addr) inw(__addr) +#define outw_p(__w, __addr) outw(__w, __addr) +#define inl_p(__addr) inl(__addr) +#define outl_p(__l, __addr) outl(__l, __addr) + +extern void outsb(unsigned long, const void *, unsigned long); +extern void outsw(unsigned long, const void *, unsigned long); +extern void outsl(unsigned long, const void *, unsigned long); +extern void insb(unsigned long, void *, unsigned long); +extern void insw(unsigned long, void *, unsigned long); +extern void insl(unsigned long, void *, unsigned long); + +static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) +{ + insb((unsigned long __force)port, buf, count); +} +static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) +{ + insw((unsigned long __force)port, buf, count); +} + +static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) +{ + insl((unsigned long __force)port, buf, count); +} + +static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsb((unsigned long __force)port, buf, count); +} + +static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsw((unsigned long __force)port, buf, count); +} + +static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) +{ + outsl((unsigned long __force)port, buf, count); +} + +/* Memory functions, same as I/O accesses on Ultra. */ +static inline u8 _readb(const volatile void __iomem *addr) +{ u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + return ret; +} + +static inline u16 _readw(const volatile void __iomem *addr) +{ u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u32 _readl(const volatile void __iomem *addr) +{ u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline u64 _readq(const volatile void __iomem *addr) +{ u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); + + return ret; +} + +static inline void _writeb(u8 b, volatile void __iomem *addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writew(u16 w, volatile void __iomem *addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writel(u32 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +static inline void _writeq(u64 q, volatile void __iomem *addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" + : /* no outputs */ + : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) + : "memory"); +} + +#define readb(__addr) _readb(__addr) +#define readw(__addr) _readw(__addr) +#define readl(__addr) _readl(__addr) +#define readq(__addr) _readq(__addr) +#define readb_relaxed(__addr) _readb(__addr) +#define readw_relaxed(__addr) _readw(__addr) +#define readl_relaxed(__addr) _readl(__addr) +#define readq_relaxed(__addr) _readq(__addr) +#define writeb(__b, __addr) _writeb(__b, __addr) +#define writew(__w, __addr) _writew(__w, __addr) +#define writel(__l, __addr) _writel(__l, __addr) +#define writeq(__q, __addr) _writeq(__q, __addr) + +/* Now versions without byte-swapping. */ +static inline u8 _raw_readb(unsigned long addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u16 _raw_readw(unsigned long addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u32 _raw_readl(unsigned long addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline u64 _raw_readq(unsigned long addr) +{ + u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + + return ret; +} + +static inline void _raw_writeb(u8 b, unsigned long addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writew(u16 w, unsigned long addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writel(u32 l, unsigned long addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +static inline void _raw_writeq(u64 q, unsigned long addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" + : /* no outputs */ + : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +#define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr))) +#define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr))) +#define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr))) +#define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr))) +#define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr))) +#define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr))) +#define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr))) +#define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr))) + +/* Valid I/O Space regions are anywhere, because each PCI bus supported + * can live in an arbitrary area of the physical address range. + */ +#define IO_SPACE_LIMIT 0xffffffffffffffffUL + +/* Now, SBUS variants, only difference from PCI is that we do + * not use little-endian ASIs. + */ +static inline u8 _sbus_readb(const volatile void __iomem *addr) +{ + u8 ret; + + __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u16 _sbus_readw(const volatile void __iomem *addr) +{ + u16 ret; + + __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u32 _sbus_readl(const volatile void __iomem *addr) +{ + u32 ret; + + __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline u64 _sbus_readq(const volatile void __iomem *addr) +{ + u64 ret; + + __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); + + return ret; +} + +static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) +{ + __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" + : /* no outputs */ + : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writew(u16 w, volatile void __iomem *addr) +{ + __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" + : /* no outputs */ + : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writel(u32 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) +{ + __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" + : /* no outputs */ + : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) + : "memory"); +} + +#define sbus_readb(__addr) _sbus_readb(__addr) +#define sbus_readw(__addr) _sbus_readw(__addr) +#define sbus_readl(__addr) _sbus_readl(__addr) +#define sbus_readq(__addr) _sbus_readq(__addr) +#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) +#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) +#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) +#define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr) + +static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + while(n--) { + sbus_writeb(c, dst); + dst++; + } +} + +#define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz) + +static inline void +_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) +{ + volatile void __iomem *d = dst; + + while (n--) { + writeb(c, d); + d++; + } +} + +#define memset_io(d,c,sz) _memset_io(d,c,sz) + +static inline void +_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) +{ + char *d = dst; + + while (n--) { + char tmp = readb(src); + *d++ = tmp; + src++; + } +} + +#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) + +static inline void +_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) +{ + const char *s = src; + volatile void __iomem *d = dst; + + while (n--) { + char tmp = *s++; + writeb(tmp, d); + d++; + } +} + +#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) + +#define mmiowb() + +#ifdef __KERNEL__ + +/* On sparc64 we have the whole physical IO address space accessible + * using physically addressed loads and stores, so this does nothing. + */ +static inline void __iomem *ioremap(unsigned long offset, unsigned long size) +{ + return (void __iomem *)offset; +} + +#define ioremap_nocache(X,Y) ioremap((X),(Y)) + +static inline void iounmap(volatile void __iomem *addr) +{ +} + +#define ioread8(X) readb(X) +#define ioread16(X) readw(X) +#define ioread32(X) readl(X) +#define iowrite8(val,X) writeb(val,X) +#define iowrite16(val,X) writew(val,X) +#define iowrite32(val,X) writel(val,X) + +/* Create a virtual mapping cookie for an IO port range */ +extern void __iomem *ioport_map(unsigned long port, unsigned int nr); +extern void ioport_unmap(void __iomem *); + +/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ +struct pci_dev; +extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); +extern void pci_iounmap(struct pci_dev *dev, void __iomem *); + +/* Similarly for SBUS. */ +#define sbus_ioremap(__res, __offset, __size, __name) \ +({ unsigned long __ret; \ + __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \ + __ret += (unsigned long) (__offset); \ + if (! request_region((__ret), (__size), (__name))) \ + __ret = 0UL; \ + (void __iomem *) __ret; \ +}) + +#define sbus_iounmap(__addr, __size) \ + release_region((unsigned long)(__addr), (__size)) + +/* + * Convert a physical pointer to a virtual kernel pointer for /dev/mem + * access + */ +#define xlate_dev_mem_ptr(p) __va(p) + +/* + * Convert a virtual cached pointer to an uncached pointer + */ +#define xlate_dev_kmem_ptr(p) p + +#endif + +#endif /* !(__SPARC64_IO_H) */ diff --git a/include/asm-sparc/iommu.h b/include/asm-sparc/iommu.h index 70c589c05a1..91b072b0d7a 100644 --- a/include/asm-sparc/iommu.h +++ b/include/asm-sparc/iommu.h @@ -1,121 +1,8 @@ -/* iommu.h: Definitions for the sun4m IOMMU. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_IOMMU_H -#define _SPARC_IOMMU_H - -#include <asm/page.h> -#include <asm/bitext.h> - -/* The iommu handles all virtual to physical address translations - * that occur between the SBUS and physical memory. Access by - * the cpu to IO registers and similar go over the mbus so are - * translated by the on chip SRMMU. The iommu and the srmmu do - * not need to have the same translations at all, in fact most - * of the time the translations they handle are a disjunct set. - * Basically the iommu handles all dvma sbus activity. - */ - -/* The IOMMU registers occupy three pages in IO space. */ -struct iommu_regs { - /* First page */ - volatile unsigned long control; /* IOMMU control */ - volatile unsigned long base; /* Physical base of iopte page table */ - volatile unsigned long _unused1[3]; - volatile unsigned long tlbflush; /* write only */ - volatile unsigned long pageflush; /* write only */ - volatile unsigned long _unused2[1017]; - /* Second page */ - volatile unsigned long afsr; /* Async-fault status register */ - volatile unsigned long afar; /* Async-fault physical address */ - volatile unsigned long _unused3[2]; - volatile unsigned long sbuscfg0; /* SBUS configuration registers, per-slot */ - volatile unsigned long sbuscfg1; - volatile unsigned long sbuscfg2; - volatile unsigned long sbuscfg3; - volatile unsigned long mfsr; /* Memory-fault status register */ - volatile unsigned long mfar; /* Memory-fault physical address */ - volatile unsigned long _unused4[1014]; - /* Third page */ - volatile unsigned long mid; /* IOMMU module-id */ -}; - -#define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */ -#define IOMMU_CTRL_VERS 0x0f000000 /* Version */ -#define IOMMU_CTRL_RNGE 0x0000001c /* Mapping RANGE */ -#define IOMMU_RNGE_16MB 0x00000000 /* 0xff000000 -> 0xffffffff */ -#define IOMMU_RNGE_32MB 0x00000004 /* 0xfe000000 -> 0xffffffff */ -#define IOMMU_RNGE_64MB 0x00000008 /* 0xfc000000 -> 0xffffffff */ -#define IOMMU_RNGE_128MB 0x0000000c /* 0xf8000000 -> 0xffffffff */ -#define IOMMU_RNGE_256MB 0x00000010 /* 0xf0000000 -> 0xffffffff */ -#define IOMMU_RNGE_512MB 0x00000014 /* 0xe0000000 -> 0xffffffff */ -#define IOMMU_RNGE_1GB 0x00000018 /* 0xc0000000 -> 0xffffffff */ -#define IOMMU_RNGE_2GB 0x0000001c /* 0x80000000 -> 0xffffffff */ -#define IOMMU_CTRL_ENAB 0x00000001 /* IOMMU Enable */ - -#define IOMMU_AFSR_ERR 0x80000000 /* LE, TO, or BE asserted */ -#define IOMMU_AFSR_LE 0x40000000 /* SBUS reports error after transaction */ -#define IOMMU_AFSR_TO 0x20000000 /* Write access took more than 12.8 us. */ -#define IOMMU_AFSR_BE 0x10000000 /* Write access received error acknowledge */ -#define IOMMU_AFSR_SIZE 0x0e000000 /* Size of transaction causing error */ -#define IOMMU_AFSR_S 0x01000000 /* Sparc was in supervisor mode */ -#define IOMMU_AFSR_RESV 0x00f00000 /* Reserver, forced to 0x8 by hardware */ -#define IOMMU_AFSR_ME 0x00080000 /* Multiple errors occurred */ -#define IOMMU_AFSR_RD 0x00040000 /* A read operation was in progress */ -#define IOMMU_AFSR_FAV 0x00020000 /* IOMMU afar has valid contents */ - -#define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when bypass enabled */ -#define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */ -#define IOMMU_SBCFG_BA8 0x00000002 /* Slave supports 8 byte bursts */ -#define IOMMU_SBCFG_BYPASS 0x00000001 /* Bypass IOMMU, treat all addresses - produced by this device as pure - physical. */ - -#define IOMMU_MFSR_ERR 0x80000000 /* One or more of PERR1 or PERR0 */ -#define IOMMU_MFSR_S 0x01000000 /* Sparc was in supervisor mode */ -#define IOMMU_MFSR_CPU 0x00800000 /* CPU transaction caused parity error */ -#define IOMMU_MFSR_ME 0x00080000 /* Multiple parity errors occurred */ -#define IOMMU_MFSR_PERR 0x00006000 /* high bit indicates parity error occurred - on the even word of the access, low bit - indicated odd word caused the parity error */ -#define IOMMU_MFSR_BM 0x00001000 /* Error occurred while in boot mode */ -#define IOMMU_MFSR_C 0x00000800 /* Address causing error was marked cacheable */ -#define IOMMU_MFSR_RTYP 0x000000f0 /* Memory request transaction type */ - -#define IOMMU_MID_SBAE 0x001f0000 /* SBus arbitration enable */ -#define IOMMU_MID_SE 0x00100000 /* Enables SCSI/ETHERNET arbitration */ -#define IOMMU_MID_SB3 0x00080000 /* Enable SBUS device 3 arbitration */ -#define IOMMU_MID_SB2 0x00040000 /* Enable SBUS device 2 arbitration */ -#define IOMMU_MID_SB1 0x00020000 /* Enable SBUS device 1 arbitration */ -#define IOMMU_MID_SB0 0x00010000 /* Enable SBUS device 0 arbitration */ -#define IOMMU_MID_MID 0x0000000f /* Module-id, hardcoded to 0x8 */ - -/* The format of an iopte in the page tables */ -#define IOPTE_PAGE 0x07ffff00 /* Physical page number (PA[30:12]) */ -#define IOPTE_CACHE 0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */ -#define IOPTE_WRITE 0x00000004 /* Writeable */ -#define IOPTE_VALID 0x00000002 /* IOPTE is valid */ -#define IOPTE_WAZ 0x00000001 /* Write as zeros */ - -struct iommu_struct { - struct iommu_regs *regs; - iopte_t *page_table; - /* For convenience */ - unsigned long start; /* First managed virtual address */ - unsigned long end; /* Last managed virtual address */ - - struct bit_map usemap; -}; - -static inline void iommu_invalidate(struct iommu_regs *regs) -{ - regs->tlbflush = 0; -} - -static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) -{ - regs->pageflush = (ba & PAGE_MASK); -} - -#endif /* !(_SPARC_IOMMU_H) */ +#ifndef ___ASM_SPARC_IOMMU_H +#define ___ASM_SPARC_IOMMU_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/iommu_64.h> +#else +#include <asm-sparc/iommu_32.h> +#endif +#endif diff --git a/include/asm-sparc/iommu_32.h b/include/asm-sparc/iommu_32.h new file mode 100644 index 00000000000..70c589c05a1 --- /dev/null +++ b/include/asm-sparc/iommu_32.h @@ -0,0 +1,121 @@ +/* iommu.h: Definitions for the sun4m IOMMU. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ +#ifndef _SPARC_IOMMU_H +#define _SPARC_IOMMU_H + +#include <asm/page.h> +#include <asm/bitext.h> + +/* The iommu handles all virtual to physical address translations + * that occur between the SBUS and physical memory. Access by + * the cpu to IO registers and similar go over the mbus so are + * translated by the on chip SRMMU. The iommu and the srmmu do + * not need to have the same translations at all, in fact most + * of the time the translations they handle are a disjunct set. + * Basically the iommu handles all dvma sbus activity. + */ + +/* The IOMMU registers occupy three pages in IO space. */ +struct iommu_regs { + /* First page */ + volatile unsigned long control; /* IOMMU control */ + volatile unsigned long base; /* Physical base of iopte page table */ + volatile unsigned long _unused1[3]; + volatile unsigned long tlbflush; /* write only */ + volatile unsigned long pageflush; /* write only */ + volatile unsigned long _unused2[1017]; + /* Second page */ + volatile unsigned long afsr; /* Async-fault status register */ + volatile unsigned long afar; /* Async-fault physical address */ + volatile unsigned long _unused3[2]; + volatile unsigned long sbuscfg0; /* SBUS configuration registers, per-slot */ + volatile unsigned long sbuscfg1; + volatile unsigned long sbuscfg2; + volatile unsigned long sbuscfg3; + volatile unsigned long mfsr; /* Memory-fault status register */ + volatile unsigned long mfar; /* Memory-fault physical address */ + volatile unsigned long _unused4[1014]; + /* Third page */ + volatile unsigned long mid; /* IOMMU module-id */ +}; + +#define IOMMU_CTRL_IMPL 0xf0000000 /* Implementation */ +#define IOMMU_CTRL_VERS 0x0f000000 /* Version */ +#define IOMMU_CTRL_RNGE 0x0000001c /* Mapping RANGE */ +#define IOMMU_RNGE_16MB 0x00000000 /* 0xff000000 -> 0xffffffff */ +#define IOMMU_RNGE_32MB 0x00000004 /* 0xfe000000 -> 0xffffffff */ +#define IOMMU_RNGE_64MB 0x00000008 /* 0xfc000000 -> 0xffffffff */ +#define IOMMU_RNGE_128MB 0x0000000c /* 0xf8000000 -> 0xffffffff */ +#define IOMMU_RNGE_256MB 0x00000010 /* 0xf0000000 -> 0xffffffff */ +#define IOMMU_RNGE_512MB 0x00000014 /* 0xe0000000 -> 0xffffffff */ +#define IOMMU_RNGE_1GB 0x00000018 /* 0xc0000000 -> 0xffffffff */ +#define IOMMU_RNGE_2GB 0x0000001c /* 0x80000000 -> 0xffffffff */ +#define IOMMU_CTRL_ENAB 0x00000001 /* IOMMU Enable */ + +#define IOMMU_AFSR_ERR 0x80000000 /* LE, TO, or BE asserted */ +#define IOMMU_AFSR_LE 0x40000000 /* SBUS reports error after transaction */ +#define IOMMU_AFSR_TO 0x20000000 /* Write access took more than 12.8 us. */ +#define IOMMU_AFSR_BE 0x10000000 /* Write access received error acknowledge */ +#define IOMMU_AFSR_SIZE 0x0e000000 /* Size of transaction causing error */ +#define IOMMU_AFSR_S 0x01000000 /* Sparc was in supervisor mode */ +#define IOMMU_AFSR_RESV 0x00f00000 /* Reserver, forced to 0x8 by hardware */ +#define IOMMU_AFSR_ME 0x00080000 /* Multiple errors occurred */ +#define IOMMU_AFSR_RD 0x00040000 /* A read operation was in progress */ +#define IOMMU_AFSR_FAV 0x00020000 /* IOMMU afar has valid contents */ + +#define IOMMU_SBCFG_SAB30 0x00010000 /* Phys-address bit 30 when bypass enabled */ +#define IOMMU_SBCFG_BA16 0x00000004 /* Slave supports 16 byte bursts */ +#define IOMMU_SBCFG_BA8 0x00000002 /* Slave supports 8 byte bursts */ +#define IOMMU_SBCFG_BYPASS 0x00000001 /* Bypass IOMMU, treat all addresses + produced by this device as pure + physical. */ + +#define IOMMU_MFSR_ERR 0x80000000 /* One or more of PERR1 or PERR0 */ +#define IOMMU_MFSR_S 0x01000000 /* Sparc was in supervisor mode */ +#define IOMMU_MFSR_CPU 0x00800000 /* CPU transaction caused parity error */ +#define IOMMU_MFSR_ME 0x00080000 /* Multiple parity errors occurred */ +#define IOMMU_MFSR_PERR 0x00006000 /* high bit indicates parity error occurred + on the even word of the access, low bit + indicated odd word caused the parity error */ +#define IOMMU_MFSR_BM 0x00001000 /* Error occurred while in boot mode */ +#define IOMMU_MFSR_C 0x00000800 /* Address causing error was marked cacheable */ +#define IOMMU_MFSR_RTYP 0x000000f0 /* Memory request transaction type */ + +#define IOMMU_MID_SBAE 0x001f0000 /* SBus arbitration enable */ +#define IOMMU_MID_SE 0x00100000 /* Enables SCSI/ETHERNET arbitration */ +#define IOMMU_MID_SB3 0x00080000 /* Enable SBUS device 3 arbitration */ +#define IOMMU_MID_SB2 0x00040000 /* Enable SBUS device 2 arbitration */ +#define IOMMU_MID_SB1 0x00020000 /* Enable SBUS device 1 arbitration */ +#define IOMMU_MID_SB0 0x00010000 /* Enable SBUS device 0 arbitration */ +#define IOMMU_MID_MID 0x0000000f /* Module-id, hardcoded to 0x8 */ + +/* The format of an iopte in the page tables */ +#define IOPTE_PAGE 0x07ffff00 /* Physical page number (PA[30:12]) */ +#define IOPTE_CACHE 0x00000080 /* Cached (in vme IOCACHE or Viking/MXCC) */ +#define IOPTE_WRITE 0x00000004 /* Writeable */ +#define IOPTE_VALID 0x00000002 /* IOPTE is valid */ +#define IOPTE_WAZ 0x00000001 /* Write as zeros */ + +struct iommu_struct { + struct iommu_regs *regs; + iopte_t *page_table; + /* For convenience */ + unsigned long start; /* First managed virtual address */ + unsigned long end; /* Last managed virtual address */ + + struct bit_map usemap; +}; + +static inline void iommu_invalidate(struct iommu_regs *regs) +{ + regs->tlbflush = 0; +} + +static inline void iommu_invalidate_page(struct iommu_regs *regs, unsigned long ba) +{ + regs->pageflush = (ba & PAGE_MASK); +} + +#endif /* !(_SPARC_IOMMU_H) */ diff --git a/include/asm-sparc/iommu_64.h b/include/asm-sparc/iommu_64.h new file mode 100644 index 00000000000..d7b9afcba08 --- /dev/null +++ b/include/asm-sparc/iommu_64.h @@ -0,0 +1,62 @@ +/* iommu.h: Definitions for the sun5 IOMMU. + * + * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) + */ +#ifndef _SPARC64_IOMMU_H +#define _SPARC64_IOMMU_H + +/* The format of an iopte in the page tables. */ +#define IOPTE_VALID 0x8000000000000000UL +#define IOPTE_64K 0x2000000000000000UL +#define IOPTE_STBUF 0x1000000000000000UL +#define IOPTE_INTRA 0x0800000000000000UL +#define IOPTE_CONTEXT 0x07ff800000000000UL +#define IOPTE_PAGE 0x00007fffffffe000UL +#define IOPTE_CACHE 0x0000000000000010UL +#define IOPTE_WRITE 0x0000000000000002UL + +#define IOMMU_NUM_CTXS 4096 + +struct iommu_arena { + unsigned long *map; + unsigned int hint; + unsigned int limit; +}; + +struct iommu { + spinlock_t lock; + struct iommu_arena arena; + void (*flush_all)(struct iommu *); + iopte_t *page_table; + u32 page_table_map_base; + unsigned long iommu_control; + unsigned long iommu_tsbbase; + unsigned long iommu_flush; + unsigned long iommu_flushinv; + unsigned long iommu_tags; + unsigned long iommu_ctxflush; + unsigned long write_complete_reg; + unsigned long dummy_page; + unsigned long dummy_page_pa; + unsigned long ctx_lowest_free; + DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS); + u32 dma_addr_mask; +}; + +struct strbuf { + int strbuf_enabled; + unsigned long strbuf_control; + unsigned long strbuf_pflush; + unsigned long strbuf_fsync; + unsigned long strbuf_ctxflush; + unsigned long strbuf_ctxmatch_base; + unsigned long strbuf_flushflag_pa; + volatile unsigned long *strbuf_flushflag; + volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)]; +}; + +extern int iommu_table_init(struct iommu *iommu, int tsbsize, + u32 dma_offset, u32 dma_addr_mask, + int numa_node); + +#endif /* !(_SPARC64_IOMMU_H) */ diff --git a/include/asm-sparc/ipcbuf.h b/include/asm-sparc/ipcbuf.h index 9bef02d04e4..037605d986e 100644 --- a/include/asm-sparc/ipcbuf.h +++ b/include/asm-sparc/ipcbuf.h @@ -1,31 +1,8 @@ -#ifndef _SPARC_IPCBUF_H -#define _SPARC_IPCBUF_H - -/* - * The ipc64_perm structure for sparc architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit mode - * - 32-bit seq - * - 2 miscellaneous 64-bit values (so that this structure matches - * sparc64 ipc64_perm) - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid32_t uid; - __kernel_gid32_t gid; - __kernel_uid32_t cuid; - __kernel_gid32_t cgid; - unsigned short __pad1; - __kernel_mode_t mode; - unsigned short __pad2; - unsigned short seq; - unsigned long long __unused1; - unsigned long long __unused2; -}; - -#endif /* _SPARC_IPCBUF_H */ +#ifndef ___ASM_SPARC_IPCBUF_H +#define ___ASM_SPARC_IPCBUF_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/ipcbuf_64.h> +#else +#include <asm-sparc/ipcbuf_32.h> +#endif +#endif diff --git a/include/asm-sparc/ipcbuf_32.h b/include/asm-sparc/ipcbuf_32.h new file mode 100644 index 00000000000..6387209518f --- /dev/null +++ b/include/asm-sparc/ipcbuf_32.h @@ -0,0 +1,31 @@ +#ifndef _SPARC_IPCBUF_H +#define _SPARC_IPCBUF_H + +/* + * The ipc64_perm structure for sparc architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit mode + * - 32-bit seq + * - 2 miscellaneous 64-bit values (so that this structure matches + * sparc64 ipc64_perm) + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid32_t uid; + __kernel_gid32_t gid; + __kernel_uid32_t cuid; + __kernel_gid32_t cgid; + unsigned short __pad1; + __kernel_mode_t mode; + unsigned short __pad2; + unsigned short seq; + unsigned long long __unused1; + unsigned long long __unused2; +}; + +#endif /* _SPARC_IPCBUF_H */ diff --git a/include/asm-sparc/ipcbuf_64.h b/include/asm-sparc/ipcbuf_64.h new file mode 100644 index 00000000000..a44b855b98d --- /dev/null +++ b/include/asm-sparc/ipcbuf_64.h @@ -0,0 +1,28 @@ +#ifndef _SPARC64_IPCBUF_H +#define _SPARC64_IPCBUF_H + +/* + * The ipc64_perm structure for sparc64 architecture. + * Note extra padding because this structure is passed back and forth + * between kernel and user space. + * + * Pad space is left for: + * - 32-bit seq + * - 2 miscellaneous 64-bit values + */ + +struct ipc64_perm +{ + __kernel_key_t key; + __kernel_uid_t uid; + __kernel_gid_t gid; + __kernel_uid_t cuid; + __kernel_gid_t cgid; + __kernel_mode_t mode; + unsigned short __pad1; + unsigned short seq; + unsigned long __unused1; + unsigned long __unused2; +}; + +#endif /* _SPARC64_IPCBUF_H */ diff --git a/include/asm-sparc/irq.h b/include/asm-sparc/irq.h index fe205cc444b..7af6bb4aa09 100644 --- a/include/asm-sparc/irq.h +++ b/include/asm-sparc/irq.h @@ -1,15 +1,8 @@ -/* irq.h: IRQ registers on the Sparc. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC_IRQ_H -#define _SPARC_IRQ_H - -#include <linux/interrupt.h> - -#define NR_IRQS 16 - -#define irq_canonicalize(irq) (irq) - +#ifndef ___ASM_SPARC_IRQ_H +#define ___ASM_SPARC_IRQ_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/irq_64.h> +#else +#include <asm-sparc/irq_32.h> +#endif #endif diff --git a/include/asm-sparc/irq_32.h b/include/asm-sparc/irq_32.h new file mode 100644 index 00000000000..fe205cc444b --- /dev/null +++ b/include/asm-sparc/irq_32.h @@ -0,0 +1,15 @@ +/* irq.h: IRQ registers on the Sparc. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC_IRQ_H +#define _SPARC_IRQ_H + +#include <linux/interrupt.h> + +#define NR_IRQS 16 + +#define irq_canonicalize(irq) (irq) + +#endif diff --git a/include/asm-sparc/irq_64.h b/include/asm-sparc/irq_64.h new file mode 100644 index 00000000000..0bb9bf53174 --- /dev/null +++ b/include/asm-sparc/irq_64.h @@ -0,0 +1,93 @@ +/* irq.h: IRQ registers on the 64-bit Sparc. + * + * Copyright (C) 1996 David S. Miller (davem@davemloft.net) + * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) + */ + +#ifndef _SPARC64_IRQ_H +#define _SPARC64_IRQ_H + +#include <linux/linkage.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/interrupt.h> +#include <asm/pil.h> +#include <asm/ptrace.h> + +/* IMAP/ICLR register defines */ +#define IMAP_VALID 0x80000000UL /* IRQ Enabled */ +#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */ +#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */ +#define IMAP_TID_SHIFT 26 +#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */ +#define IMAP_AID_SHIFT 26 +#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */ +#define IMAP_NID_SHIFT 21 +#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */ +#define IMAP_INO 0x0000003fUL /* IRQ Number */ +#define IMAP_INR 0x000007ffUL /* Full interrupt number*/ + +#define ICLR_IDLE 0x00000000UL /* Idle state */ +#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */ +#define ICLR_PENDING 0x00000003UL /* Pending state */ + +/* The largest number of unique interrupt sources we support. + * If this needs to ever be larger than 255, you need to change + * the type of ino_bucket->virt_irq as appropriate. + * + * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq(). + */ +#define NR_IRQS 255 + +extern void irq_install_pre_handler(int virt_irq, + void (*func)(unsigned int, void *, void *), + void *arg1, void *arg2); +#define irq_canonicalize(irq) (irq) +extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); +extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); +extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino); +extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, + unsigned int msi_devino_start, + unsigned int msi_devino_end); +extern void sun4v_destroy_msi(unsigned int virt_irq); +extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p, + unsigned int msi_devino_start, + unsigned int msi_devino_end, + unsigned long imap_base, + unsigned long iclr_base); +extern void sun4u_destroy_msi(unsigned int virt_irq); +extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); + +extern unsigned char virt_irq_alloc(unsigned int dev_handle, + unsigned int dev_ino); +#ifdef CONFIG_PCI_MSI +extern void virt_irq_free(unsigned int virt_irq); +#endif + +extern void __init init_IRQ(void); +extern void fixup_irqs(void); + +static inline void set_softint(unsigned long bits) +{ + __asm__ __volatile__("wr %0, 0x0, %%set_softint" + : /* No outputs */ + : "r" (bits)); +} + +static inline void clear_softint(unsigned long bits) +{ + __asm__ __volatile__("wr %0, 0x0, %%clear_softint" + : /* No outputs */ + : "r" (bits)); +} + +static inline unsigned long get_softint(void) +{ + unsigned long retval; + + __asm__ __volatile__("rd %%softint, %0" + : "=r" (retval)); + return retval; +} + +#endif diff --git a/include/asm-sparc/irqflags.h b/include/asm-sparc/irqflags.h index db398fb3282..c6402b187e2 100644 --- a/include/asm-sparc/irqflags.h +++ b/include/asm-sparc/irqflags.h @@ -1,39 +1,8 @@ -/* - * include/asm-sparc/irqflags.h - * - * IRQ flags handling - * - * This file gets included from lowlevel asm headers too, to provide - * wrapped versions of the local_irq_*() APIs, based on the - * raw_local_irq_*() functions from the lowlevel headers. - */ -#ifndef _ASM_IRQFLAGS_H -#define _ASM_IRQFLAGS_H - -#ifndef __ASSEMBLY__ - -extern void raw_local_irq_restore(unsigned long); -extern unsigned long __raw_local_irq_save(void); -extern void raw_local_irq_enable(void); - -static inline unsigned long getipl(void) -{ - unsigned long retval; - - __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); - return retval; -} - -#define raw_local_save_flags(flags) ((flags) = getipl()) -#define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) -#define raw_local_irq_disable() ((void) __raw_local_irq_save()) -#define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return ((flags & PSR_PIL) != 0); -} - -#endif /* (__ASSEMBLY__) */ - -#endif /* !(_ASM_IRQFLAGS_H) */ +#ifndef ___ASM_SPARC_IRQFLAGS_H +#define ___ASM_SPARC_IRQFLAGS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/irqflags_64.h> +#else +#include <asm-sparc/irqflags_32.h> +#endif +#endif diff --git a/include/asm-sparc/irqflags_32.h b/include/asm-sparc/irqflags_32.h new file mode 100644 index 00000000000..db398fb3282 --- /dev/null +++ b/include/asm-sparc/irqflags_32.h @@ -0,0 +1,39 @@ +/* + * include/asm-sparc/irqflags.h + * + * IRQ flags handling + * + * This file gets included from lowlevel asm headers too, to provide + * wrapped versions of the local_irq_*() APIs, based on the + * raw_local_irq_*() functions from the lowlevel headers. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +extern void raw_local_irq_restore(unsigned long); +extern unsigned long __raw_local_irq_save(void); +extern void raw_local_irq_enable(void); + +static inline unsigned long getipl(void) +{ + unsigned long retval; + + __asm__ __volatile__("rd %%psr, %0" : "=r" (retval)); + return retval; +} + +#define raw_local_save_flags(flags) ((flags) = getipl()) +#define raw_local_irq_save(flags) ((flags) = __raw_local_irq_save()) +#define raw_local_irq_disable() ((void) __raw_local_irq_save()) +#define raw_irqs_disabled() ((getipl() & PSR_PIL) != 0) + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return ((flags & PSR_PIL) != 0); +} + +#endif /* (__ASSEMBLY__) */ + +#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc/irqflags_64.h b/include/asm-sparc/irqflags_64.h new file mode 100644 index 00000000000..024fc54d068 --- /dev/null +++ b/include/asm-sparc/irqflags_64.h @@ -0,0 +1,89 @@ +/* + * include/asm-sparc64/irqflags.h + * + * IRQ flags handling + * + * This file gets included from lowlevel asm headers too, to provide + * wrapped versions of the local_irq_*() APIs, based on the + * raw_local_irq_*() functions from the lowlevel headers. + */ +#ifndef _ASM_IRQFLAGS_H +#define _ASM_IRQFLAGS_H + +#ifndef __ASSEMBLY__ + +static inline unsigned long __raw_local_save_flags(void) +{ + unsigned long flags; + + __asm__ __volatile__( + "rdpr %%pil, %0" + : "=r" (flags) + ); + + return flags; +} + +#define raw_local_save_flags(flags) \ + do { (flags) = __raw_local_save_flags(); } while (0) + +static inline void raw_local_irq_restore(unsigned long flags) +{ + __asm__ __volatile__( + "wrpr %0, %%pil" + : /* no output */ + : "r" (flags) + : "memory" + ); +} + +static inline void raw_local_irq_disable(void) +{ + __asm__ __volatile__( + "wrpr 15, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline void raw_local_irq_enable(void) +{ + __asm__ __volatile__( + "wrpr 0, %%pil" + : /* no outputs */ + : /* no inputs */ + : "memory" + ); +} + +static inline int raw_irqs_disabled_flags(unsigned long flags) +{ + return (flags > 0); +} + +static inline int raw_irqs_disabled(void) +{ + unsigned long flags = __raw_local_save_flags(); + + return raw_irqs_disabled_flags(flags); +} + +/* + * For spinlocks, etc: + */ +static inline unsigned long __raw_local_irq_save(void) +{ + unsigned long flags = __raw_local_save_flags(); + + raw_local_irq_disable(); + + return flags; +} + +#define raw_local_irq_save(flags) \ + do { (flags) = __raw_local_irq_save(); } while (0) + +#endif /* (__ASSEMBLY__) */ + +#endif /* !(_ASM_IRQFLAGS_H) */ diff --git a/include/asm-sparc/kdebug.h b/include/asm-sparc/kdebug.h index f69fe7d84b3..fe07d00d053 100644 --- a/include/asm-sparc/kdebug.h +++ b/include/asm-sparc/kdebug.h @@ -1,73 +1,8 @@ -/* - * kdebug.h: Defines and definitions for debugging the Linux kernel - * under various kernel debuggers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ -#ifndef _SPARC_KDEBUG_H -#define _SPARC_KDEBUG_H - -#include <asm/openprom.h> -#include <asm/vaddrs.h> - -/* Breakpoints are enter through trap table entry 126. So in sparc assembly - * if you want to drop into the debugger you do: - * - * t DEBUG_BP_TRAP - */ - -#define DEBUG_BP_TRAP 126 - -#ifndef __ASSEMBLY__ -/* The debug vector is passed in %o1 at boot time. It is a pointer to - * a structure in the debuggers address space. Here is its format. - */ - -typedef unsigned int (*debugger_funct)(void); - -struct kernel_debug { - /* First the entry point into the debugger. You jump here - * to give control over to the debugger. - */ - unsigned long kdebug_entry; - unsigned long kdebug_trapme; /* Figure out later... */ - /* The following is the number of pages that the debugger has - * taken from to total pool. - */ - unsigned long *kdebug_stolen_pages; - /* Ok, after you remap yourself and/or change the trap table - * from what you were left with at boot time you have to call - * this synchronization function so the debugger can check out - * what you have done. - */ - debugger_funct teach_debugger; -}; /* I think that is it... */ - -extern struct kernel_debug *linux_dbvec; - -/* Use this macro in C-code to enter the debugger. */ -static inline void sp_enter_debugger(void) -{ - __asm__ __volatile__("jmpl %0, %%o7\n\t" - "nop\n\t" : : - "r" (linux_dbvec) : "o7", "memory"); -} - -#define SP_ENTER_DEBUGGER do { \ - if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \ - sp_enter_debugger(); \ - } while(0) - -enum die_val { - DIE_UNUSED, -}; - -#endif /* !(__ASSEMBLY__) */ - -/* Some nice offset defines for assembler code. */ -#define KDEBUG_ENTRY_OFF 0x0 -#define KDEBUG_DUNNO_OFF 0x4 -#define KDEBUG_DUNNO2_OFF 0x8 -#define KDEBUG_TEACH_OFF 0xc - -#endif /* !(_SPARC_KDEBUG_H) */ +#ifndef ___ASM_SPARC_KDEBUG_H +#define ___ASM_SPARC_KDEBUG_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/kdebug_64.h> +#else +#include <asm-sparc/kdebug_32.h> +#endif +#endif diff --git a/include/asm-sparc/kdebug_32.h b/include/asm-sparc/kdebug_32.h new file mode 100644 index 00000000000..f69fe7d84b3 --- /dev/null +++ b/include/asm-sparc/kdebug_32.h @@ -0,0 +1,73 @@ +/* + * kdebug.h: Defines and definitions for debugging the Linux kernel + * under various kernel debuggers. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ +#ifndef _SPARC_KDEBUG_H +#define _SPARC_KDEBUG_H + +#include <asm/openprom.h> +#include <asm/vaddrs.h> + +/* Breakpoints are enter through trap table entry 126. So in sparc assembly + * if you want to drop into the debugger you do: + * + * t DEBUG_BP_TRAP + */ + +#define DEBUG_BP_TRAP 126 + +#ifndef __ASSEMBLY__ +/* The debug vector is passed in %o1 at boot time. It is a pointer to + * a structure in the debuggers address space. Here is its format. + */ + +typedef unsigned int (*debugger_funct)(void); + +struct kernel_debug { + /* First the entry point into the debugger. You jump here + * to give control over to the debugger. + */ + unsigned long kdebug_entry; + unsigned long kdebug_trapme; /* Figure out later... */ + /* The following is the number of pages that the debugger has + * taken from to total pool. + */ + unsigned long *kdebug_stolen_pages; + /* Ok, after you remap yourself and/or change the trap table + * from what you were left with at boot time you have to call + * this synchronization function so the debugger can check out + * what you have done. + */ + debugger_funct teach_debugger; +}; /* I think that is it... */ + +extern struct kernel_debug *linux_dbvec; + +/* Use this macro in C-code to enter the debugger. */ +static inline void sp_enter_debugger(void) +{ + __asm__ __volatile__("jmpl %0, %%o7\n\t" + "nop\n\t" : : + "r" (linux_dbvec) : "o7", "memory"); +} + +#define SP_ENTER_DEBUGGER do { \ + if((linux_dbvec!=0) && ((*(short *)linux_dbvec)!=-1)) \ + sp_enter_debugger(); \ + } while(0) + +enum die_val { + DIE_UNUSED, +}; + +#endif /* !(__ASSEMBLY__) */ + +/* Some nice offset defines for assembler code. */ +#define KDEBUG_ENTRY_OFF 0x0 +#define KDEBUG_DUNNO_OFF 0x4 +#define KDEBUG_DUNNO2_OFF 0x8 +#define KDEBUG_TEACH_OFF 0xc + +#endif /* !(_SPARC_KDEBUG_H) */ diff --git a/include/asm-sparc/kdebug_64.h b/include/asm-sparc/kdebug_64.h new file mode 100644 index 00000000000..f905b773235 --- /dev/null +++ b/include/asm-sparc/kdebug_64.h @@ -0,0 +1,19 @@ +#ifndef _SPARC64_KDEBUG_H +#define _SPARC64_KDEBUG_H + +struct pt_regs; + +extern void bad_trap(struct pt_regs *, long); + +/* Grossly misnamed. */ +enum die_val { + DIE_OOPS = 1, + DIE_DEBUG, /* ta 0x70 */ + DIE_DEBUG_2, /* ta 0x71 */ + DIE_DIE, + DIE_TRAP, + DIE_TRAP_TL1, + DIE_CALL, +}; + +#endif diff --git a/include/asm-sparc/mc146818rtc.h b/include/asm-sparc/mc146818rtc.h index fa7eac92658..9ab65c21e9e 100644 --- a/include/asm-sparc/mc146818rtc.h +++ b/include/asm-sparc/mc146818rtc.h @@ -1,29 +1,8 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef __ASM_SPARC_MC146818RTC_H -#define __ASM_SPARC_MC146818RTC_H - -#include <asm/io.h> - -#ifndef RTC_PORT -#define RTC_PORT(x) (0x70 + (x)) -#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ +#ifndef ___ASM_SPARC_MC146818RTC_H +#define ___ASM_SPARC_MC146818RTC_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/mc146818rtc_64.h> +#else +#include <asm-sparc/mc146818rtc_32.h> +#endif #endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#define RTC_IRQ 8 - -#endif /* __ASM_SPARC_MC146818RTC_H */ diff --git a/include/asm-sparc/mc146818rtc_32.h b/include/asm-sparc/mc146818rtc_32.h new file mode 100644 index 00000000000..fa7eac92658 --- /dev/null +++ b/include/asm-sparc/mc146818rtc_32.h @@ -0,0 +1,29 @@ +/* + * Machine dependent access functions for RTC registers. + */ +#ifndef __ASM_SPARC_MC146818RTC_H +#define __ASM_SPARC_MC146818RTC_H + +#include <asm/io.h> + +#ifndef RTC_PORT +#define RTC_PORT(x) (0x70 + (x)) +#define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ +#endif + +/* + * The yet supported machines all access the RTC index register via + * an ISA port access but the way to access the date register differs ... + */ +#define CMOS_READ(addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +inb_p(RTC_PORT(1)); \ +}) +#define CMOS_WRITE(val, addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +outb_p((val),RTC_PORT(1)); \ +}) + +#define RTC_IRQ 8 + +#endif /* __ASM_SPARC_MC146818RTC_H */ diff --git a/include/asm-sparc/mc146818rtc_64.h b/include/asm-sparc/mc146818rtc_64.h new file mode 100644 index 00000000000..e9c0fcc25c6 --- /dev/null +++ b/include/asm-sparc/mc146818rtc_64.h @@ -0,0 +1,34 @@ +/* + * Machine dependent access functions for RTC registers. + */ +#ifndef __ASM_SPARC64_MC146818RTC_H +#define __ASM_SPARC64_MC146818RTC_H + +#include <asm/io.h> + +#ifndef RTC_PORT +#ifdef CONFIG_PCI +extern unsigned long ds1287_regs; +#else +#define ds1287_regs (0UL) +#endif +#define RTC_PORT(x) (ds1287_regs + (x)) +#define RTC_ALWAYS_BCD 0 +#endif + +/* + * The yet supported machines all access the RTC index register via + * an ISA port access but the way to access the date register differs ... + */ +#define CMOS_READ(addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +inb_p(RTC_PORT(1)); \ +}) +#define CMOS_WRITE(val, addr) ({ \ +outb_p((addr),RTC_PORT(0)); \ +outb_p((val),RTC_PORT(1)); \ +}) + +#define RTC_IRQ 8 + +#endif /* __ASM_SPARC64_MC146818RTC_H */ diff --git a/include/asm-sparc/mmu.h b/include/asm-sparc/mmu.h index ccd36d26615..ee66bf6dcbd 100644 --- a/include/asm-sparc/mmu.h +++ b/include/asm-sparc/mmu.h @@ -1,7 +1,8 @@ -#ifndef __MMU_H -#define __MMU_H - -/* Default "unsigned long" context */ -typedef unsigned long mm_context_t; - +#ifndef ___ASM_SPARC_MMU_H +#define ___ASM_SPARC_MMU_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/mmu_64.h> +#else +#include <asm-sparc/mmu_32.h> +#endif #endif diff --git a/include/asm-sparc/mmu_32.h b/include/asm-sparc/mmu_32.h new file mode 100644 index 00000000000..ccd36d26615 --- /dev/null +++ b/include/asm-sparc/mmu_32.h @@ -0,0 +1,7 @@ +#ifndef __MMU_H +#define __MMU_H + +/* Default "unsigned long" context */ +typedef unsigned long mm_context_t; + +#endif diff --git a/include/asm-sparc/mmu_64.h b/include/asm-sparc/mmu_64.h new file mode 100644 index 00000000000..8abc58f0f9d --- /dev/null +++ b/include/asm-sparc/mmu_64.h @@ -0,0 +1,127 @@ +#ifndef __MMU_H +#define __MMU_H + +#include <linux/const.h> +#include <asm/page.h> +#include <asm/hypervisor.h> + +#define CTX_NR_BITS 13 + +#define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) + +/* UltraSPARC-III+ and later have a feature whereby you can + * select what page size the various Data-TLB instances in the + * chip. In order to gracefully support this, we put the version + * field in a spot outside of the areas of the context register + * where this parameter is specified. + */ +#define CTX_VERSION_SHIFT 22 +#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT) + +#define CTX_PGSZ_8KB _AC(0x0,UL) +#define CTX_PGSZ_64KB _AC(0x1,UL) +#define CTX_PGSZ_512KB _AC(0x2,UL) +#define CTX_PGSZ_4MB _AC(0x3,UL) +#define CTX_PGSZ_BITS _AC(0x7,UL) +#define CTX_PGSZ0_NUC_SHIFT 61 +#define CTX_PGSZ1_NUC_SHIFT 58 +#define CTX_PGSZ0_SHIFT 16 +#define CTX_PGSZ1_SHIFT 19 +#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ + (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) + +#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) +#define CTX_PGSZ_BASE CTX_PGSZ_8KB +#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) +#define CTX_PGSZ_BASE CTX_PGSZ_64KB +#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) +#define CTX_PGSZ_BASE CTX_PGSZ_512KB +#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) +#define CTX_PGSZ_BASE CTX_PGSZ_4MB +#else +#error No page size specified in kernel configuration +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define CTX_PGSZ_HUGE CTX_PGSZ_4MB +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define CTX_PGSZ_HUGE CTX_PGSZ_512KB +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define CTX_PGSZ_HUGE CTX_PGSZ_64KB +#endif + +#define CTX_PGSZ_KERN CTX_PGSZ_4MB + +/* Thus, when running on UltraSPARC-III+ and later, we use the following + * PRIMARY_CONTEXT register values for the kernel context. + */ +#define CTX_CHEETAH_PLUS_NUC \ + ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \ + (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT)) + +#define CTX_CHEETAH_PLUS_CTX0 \ + ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \ + (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT)) + +/* If you want "the TLB context number" use CTX_NR_MASK. If you + * want "the bits I program into the context registers" use + * CTX_HW_MASK. + */ +#define CTX_NR_MASK TAG_CONTEXT_BITS +#define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) + +#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) +#define CTX_VALID(__ctx) \ + (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) +#define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) +#define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) + +#ifndef __ASSEMBLY__ + +#define TSB_ENTRY_ALIGNMENT 16 + +struct tsb { + unsigned long tag; + unsigned long pte; +} __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); + +extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); +extern void tsb_flush(unsigned long ent, unsigned long tag); +extern void tsb_init(struct tsb *tsb, unsigned long size); + +struct tsb_config { + struct tsb *tsb; + unsigned long tsb_rss_limit; + unsigned long tsb_nentries; + unsigned long tsb_reg_val; + unsigned long tsb_map_vaddr; + unsigned long tsb_map_pte; +}; + +#define MM_TSB_BASE 0 + +#ifdef CONFIG_HUGETLB_PAGE +#define MM_TSB_HUGE 1 +#define MM_NUM_TSBS 2 +#else +#define MM_NUM_TSBS 1 +#endif + +typedef struct { + spinlock_t lock; + unsigned long sparc64_ctx_val; + unsigned long huge_pte_count; + struct tsb_config tsb_block[MM_NUM_TSBS]; + struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; +} mm_context_t; + +#endif /* !__ASSEMBLY__ */ + +#define TSB_CONFIG_TSB 0x00 +#define TSB_CONFIG_RSS_LIMIT 0x08 +#define TSB_CONFIG_NENTRIES 0x10 +#define TSB_CONFIG_REG_VAL 0x18 +#define TSB_CONFIG_MAP_VADDR 0x20 +#define TSB_CONFIG_MAP_PTE 0x28 + +#endif /* __MMU_H */ diff --git a/include/asm-sparc/mmu_context.h b/include/asm-sparc/mmu_context.h index 671a997b9e6..e14efb9532f 100644 --- a/include/asm-sparc/mmu_context.h +++ b/include/asm-sparc/mmu_context.h @@ -1,42 +1,8 @@ -#ifndef __SPARC_MMU_CONTEXT_H -#define __SPARC_MMU_CONTEXT_H - -#include <asm/btfixup.h> - -#ifndef __ASSEMBLY__ - -#include <asm-generic/mm_hooks.h> - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -/* - * Initialize a new mmu context. This is invoked when a new - * address space instance (unique or shared) is instantiated. - */ -#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) - -/* - * Destroy a dead context. This occurs when mmput drops the - * mm_users count to zero, the mmaps have been released, and - * all the page tables have been flushed. Our job is to destroy - * any remaining processor-specific state. - */ -BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *) - -#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm) - -/* Switch the current MM context. */ -BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *) - -#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk) - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* Activate a new MM instance for the current task. */ -#define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL) - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC_MMU_CONTEXT_H) */ +#ifndef ___ASM_SPARC_MMU_CONTEXT_H +#define ___ASM_SPARC_MMU_CONTEXT_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/mmu_context_64.h> +#else +#include <asm-sparc/mmu_context_32.h> +#endif +#endif diff --git a/include/asm-sparc/mmu_context_32.h b/include/asm-sparc/mmu_context_32.h new file mode 100644 index 00000000000..671a997b9e6 --- /dev/null +++ b/include/asm-sparc/mmu_context_32.h @@ -0,0 +1,42 @@ +#ifndef __SPARC_MMU_CONTEXT_H +#define __SPARC_MMU_CONTEXT_H + +#include <asm/btfixup.h> + +#ifndef __ASSEMBLY__ + +#include <asm-generic/mm_hooks.h> + +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +/* + * Initialize a new mmu context. This is invoked when a new + * address space instance (unique or shared) is instantiated. + */ +#define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0) + +/* + * Destroy a dead context. This occurs when mmput drops the + * mm_users count to zero, the mmaps have been released, and + * all the page tables have been flushed. Our job is to destroy + * any remaining processor-specific state. + */ +BTFIXUPDEF_CALL(void, destroy_context, struct mm_struct *) + +#define destroy_context(mm) BTFIXUP_CALL(destroy_context)(mm) + +/* Switch the current MM context. */ +BTFIXUPDEF_CALL(void, switch_mm, struct mm_struct *, struct mm_struct *, struct task_struct *) + +#define switch_mm(old_mm, mm, tsk) BTFIXUP_CALL(switch_mm)(old_mm, mm, tsk) + +#define deactivate_mm(tsk,mm) do { } while (0) + +/* Activate a new MM instance for the current task. */ +#define activate_mm(active_mm, mm) switch_mm((active_mm), (mm), NULL) + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC_MMU_CONTEXT_H) */ diff --git a/include/asm-sparc/mmu_context_64.h b/include/asm-sparc/mmu_context_64.h new file mode 100644 index 00000000000..5693ab48260 --- /dev/null +++ b/include/asm-sparc/mmu_context_64.h @@ -0,0 +1,155 @@ +#ifndef __SPARC64_MMU_CONTEXT_H +#define __SPARC64_MMU_CONTEXT_H + +/* Derived heavily from Linus's Alpha/AXP ASN code... */ + +#ifndef __ASSEMBLY__ + +#include <linux/spinlock.h> +#include <asm/system.h> +#include <asm/spitfire.h> +#include <asm-generic/mm_hooks.h> + +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +extern spinlock_t ctx_alloc_lock; +extern unsigned long tlb_context_cache; +extern unsigned long mmu_context_bmap[]; + +extern void get_new_mmu_context(struct mm_struct *mm); +#ifdef CONFIG_SMP +extern void smp_new_mmu_context_version(void); +#else +#define smp_new_mmu_context_version() do { } while (0) +#endif + +extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); +extern void destroy_context(struct mm_struct *mm); + +extern void __tsb_context_switch(unsigned long pgd_pa, + struct tsb_config *tsb_base, + struct tsb_config *tsb_huge, + unsigned long tsb_descr_pa); + +static inline void tsb_context_switch(struct mm_struct *mm) +{ + __tsb_context_switch(__pa(mm->pgd), + &mm->context.tsb_block[0], +#ifdef CONFIG_HUGETLB_PAGE + (mm->context.tsb_block[1].tsb ? + &mm->context.tsb_block[1] : + NULL) +#else + NULL +#endif + , __pa(&mm->context.tsb_descr[0])); +} + +extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss); +#ifdef CONFIG_SMP +extern void smp_tsb_sync(struct mm_struct *mm); +#else +#define smp_tsb_sync(__mm) do { } while (0) +#endif + +/* Set MMU context in the actual hardware. */ +#define load_secondary_context(__mm) \ + __asm__ __volatile__( \ + "\n661: stxa %0, [%1] %2\n" \ + " .section .sun4v_1insn_patch, \"ax\"\n" \ + " .word 661b\n" \ + " stxa %0, [%1] %3\n" \ + " .previous\n" \ + " flush %%g6\n" \ + : /* No outputs */ \ + : "r" (CTX_HWBITS((__mm)->context)), \ + "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU)) + +extern void __flush_tlb_mm(unsigned long, unsigned long); + +/* Switch the current MM context. Interrupts are disabled. */ +static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) +{ + unsigned long ctx_valid, flags; + int cpu; + + if (unlikely(mm == &init_mm)) + return; + + spin_lock_irqsave(&mm->context.lock, flags); + ctx_valid = CTX_VALID(mm->context); + if (!ctx_valid) + get_new_mmu_context(mm); + + /* We have to be extremely careful here or else we will miss + * a TSB grow if we switch back and forth between a kernel + * thread and an address space which has it's TSB size increased + * on another processor. + * + * It is possible to play some games in order to optimize the + * switch, but the safest thing to do is to unconditionally + * perform the secondary context load and the TSB context switch. + * + * For reference the bad case is, for address space "A": + * + * CPU 0 CPU 1 + * run address space A + * set cpu0's bits in cpu_vm_mask + * switch to kernel thread, borrow + * address space A via entry_lazy_tlb + * run address space A + * set cpu1's bit in cpu_vm_mask + * flush_tlb_pending() + * reset cpu_vm_mask to just cpu1 + * TSB grow + * run address space A + * context was valid, so skip + * TSB context switch + * + * At that point cpu0 continues to use a stale TSB, the one from + * before the TSB grow performed on cpu1. cpu1 did not cross-call + * cpu0 to update it's TSB because at that point the cpu_vm_mask + * only had cpu1 set in it. + */ + load_secondary_context(mm); + tsb_context_switch(mm); + + /* Any time a processor runs a context on an address space + * for the first time, we must flush that context out of the + * local TLB. + */ + cpu = smp_processor_id(); + if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { + cpu_set(cpu, mm->cpu_vm_mask); + __flush_tlb_mm(CTX_HWBITS(mm->context), + SECONDARY_CONTEXT); + } + spin_unlock_irqrestore(&mm->context.lock, flags); +} + +#define deactivate_mm(tsk,mm) do { } while (0) + +/* Activate a new MM instance for the current task. */ +static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) +{ + unsigned long flags; + int cpu; + + spin_lock_irqsave(&mm->context.lock, flags); + if (!CTX_VALID(mm->context)) + get_new_mmu_context(mm); + cpu = smp_processor_id(); + if (!cpu_isset(cpu, mm->cpu_vm_mask)) + cpu_set(cpu, mm->cpu_vm_mask); + + load_secondary_context(mm); + __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); + tsb_context_switch(mm); + spin_unlock_irqrestore(&mm->context.lock, flags); +} + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC64_MMU_CONTEXT_H) */ diff --git a/include/asm-sparc/module.h b/include/asm-sparc/module.h index cbd9e67b0c0..516138fe681 100644 --- a/include/asm-sparc/module.h +++ b/include/asm-sparc/module.h @@ -1,7 +1,8 @@ -#ifndef _ASM_SPARC_MODULE_H -#define _ASM_SPARC_MODULE_H -struct mod_arch_specific { }; -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr -#endif /* _ASM_SPARC_MODULE_H */ +#ifndef ___ASM_SPARC_MODULE_H +#define ___ASM_SPARC_MODULE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/module_64.h> +#else +#include <asm-sparc/module_32.h> +#endif +#endif diff --git a/include/asm-sparc/module_32.h b/include/asm-sparc/module_32.h new file mode 100644 index 00000000000..cbd9e67b0c0 --- /dev/null +++ b/include/asm-sparc/module_32.h @@ -0,0 +1,7 @@ +#ifndef _ASM_SPARC_MODULE_H +#define _ASM_SPARC_MODULE_H +struct mod_arch_specific { }; +#define Elf_Shdr Elf32_Shdr +#define Elf_Sym Elf32_Sym +#define Elf_Ehdr Elf32_Ehdr +#endif /* _ASM_SPARC_MODULE_H */ diff --git a/include/asm-sparc/module_64.h b/include/asm-sparc/module_64.h new file mode 100644 index 00000000000..3d77ba46578 --- /dev/null +++ b/include/asm-sparc/module_64.h @@ -0,0 +1,7 @@ +#ifndef _ASM_SPARC64_MODULE_H +#define _ASM_SPARC64_MODULE_H +struct mod_arch_specific { }; +#define Elf_Shdr Elf64_Shdr +#define Elf_Sym Elf64_Sym +#define Elf_Ehdr Elf64_Ehdr +#endif /* _ASM_SPARC64_MODULE_H */ diff --git a/include/asm-sparc/mostek.h b/include/asm-sparc/mostek.h index c35c916162f..5b9f7fec7ee 100644 --- a/include/asm-sparc/mostek.h +++ b/include/asm-sparc/mostek.h @@ -1,171 +1,8 @@ -/* - * mostek.h: Describes the various Mostek time of day clock registers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca) - */ - -#ifndef _SPARC_MOSTEK_H -#define _SPARC_MOSTEK_H - -#include <asm/idprom.h> -#include <asm/io.h> - -/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) - * - * Data - * Address Function - * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 - * 7ff - - - - - - - - Year 00-99 - * 7fe 0 0 0 - - - - - Month 01-12 - * 7fd 0 0 - - - - - - Date 01-31 - * 7fc 0 FT 0 0 0 - - - Day 01-07 - * 7fb KS 0 - - - - - - Hours 00-23 - * 7fa 0 - - - - - - - Minutes 00-59 - * 7f9 ST - - - - - - - Seconds 00-59 - * 7f8 W R S - - - - - Control - * - * * ST is STOP BIT - * * W is WRITE BIT - * * R is READ BIT - * * S is SIGN BIT - * * FT is FREQ TEST BIT - * * KS is KICK START BIT - */ - -/* The Mostek 48t02 real time clock and NVRAM chip. The registers - * other than the control register are in binary coded decimal. Some - * control bits also live outside the control register. - */ -#define mostek_read(_addr) readb(_addr) -#define mostek_write(_addr,_val) writeb(_val, _addr) -#define MOSTEK_EEPROM 0x0000UL -#define MOSTEK_IDPROM 0x07d8UL -#define MOSTEK_CREG 0x07f8UL -#define MOSTEK_SEC 0x07f9UL -#define MOSTEK_MIN 0x07faUL -#define MOSTEK_HOUR 0x07fbUL -#define MOSTEK_DOW 0x07fcUL -#define MOSTEK_DOM 0x07fdUL -#define MOSTEK_MONTH 0x07feUL -#define MOSTEK_YEAR 0x07ffUL - -struct mostek48t02 { - volatile char eeprom[2008]; /* This is the eeprom, don't touch! */ - struct idprom idprom; /* The idprom lives here. */ - volatile unsigned char creg; /* Control register */ - volatile unsigned char sec; /* Seconds (0-59) */ - volatile unsigned char min; /* Minutes (0-59) */ - volatile unsigned char hour; /* Hour (0-23) */ - volatile unsigned char dow; /* Day of the week (1-7) */ - volatile unsigned char dom; /* Day of the month (1-31) */ - volatile unsigned char month; /* Month of year (1-12) */ - volatile unsigned char year; /* Year (0-99) */ -}; - -extern spinlock_t mostek_lock; -extern void __iomem *mstk48t02_regs; - -/* Control register values. */ -#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ -#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ -#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ - -/* Control bits that live in the other registers. */ -#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ -#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ -#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ - -#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ -#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) - -/* Masks that define how much space each value takes up. */ -#define MSTK_SEC_MASK 0x7f -#define MSTK_MIN_MASK 0x7f -#define MSTK_HOUR_MASK 0x3f -#define MSTK_DOW_MASK 0x07 -#define MSTK_DOM_MASK 0x3f -#define MSTK_MONTH_MASK 0x1f -#define MSTK_YEAR_MASK 0xffU - -/* Binary coded decimal conversion macros. */ -#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) -#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) - -/* Generic register set and get macros for internal use. */ -#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK)) -#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0) - -/* Macros to make register access easier on our fingers. These give you - * the decimal value of the register requested if applicable. You pass - * the a pointer to a 'struct mostek48t02'. - */ -#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg) -#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC) -#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN) -#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR) -#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW) -#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM) -#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH) -#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR) - -#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC) -#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN) -#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR) -#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW) -#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM) -#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH) -#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR) - - -/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the - * same (basically) layout of the 48t02 chip except for the extra - * NVRAM on board (8 KB against the 48t02's 2 KB). - */ -struct mostek48t08 { - char offset[6*1024]; /* Magic things may be here, who knows? */ - struct mostek48t02 regs; /* Here is what we are interested in. */ -}; - -#ifdef CONFIG_SUN4 -enum sparc_clock_type { MSTK48T02, MSTK48T08, \ -INTERSIL, MSTK_INVALID }; +#ifndef ___ASM_SPARC_MOSTEK_H +#define ___ASM_SPARC_MOSTEK_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/mostek_64.h> #else -enum sparc_clock_type { MSTK48T02, MSTK48T08, \ -MSTK_INVALID }; +#include <asm-sparc/mostek_32.h> #endif - -#ifdef CONFIG_SUN4 -/* intersil on a sun 4/260 code data from harris doc */ -struct intersil_dt { - volatile unsigned char int_csec; - volatile unsigned char int_hour; - volatile unsigned char int_min; - volatile unsigned char int_sec; - volatile unsigned char int_month; - volatile unsigned char int_day; - volatile unsigned char int_year; - volatile unsigned char int_dow; -}; - -struct intersil { - struct intersil_dt clk; - struct intersil_dt cmp; - volatile unsigned char int_intr_reg; - volatile unsigned char int_cmd_reg; -}; - -#define INTERSIL_STOP 0x0 -#define INTERSIL_START 0x8 -#define INTERSIL_INTR_DISABLE 0x0 -#define INTERSIL_INTR_ENABLE 0x10 -#define INTERSIL_32K 0x0 -#define INTERSIL_NORMAL 0x0 -#define INTERSIL_24H 0x4 -#define INTERSIL_INT_100HZ 0x2 - -/* end of intersil info */ #endif - -#endif /* !(_SPARC_MOSTEK_H) */ diff --git a/include/asm-sparc/mostek_32.h b/include/asm-sparc/mostek_32.h new file mode 100644 index 00000000000..a99590c4c50 --- /dev/null +++ b/include/asm-sparc/mostek_32.h @@ -0,0 +1,171 @@ +/* + * mostek.h: Describes the various Mostek time of day clock registers. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) + * Added intersil code 05/25/98 Chris Davis (cdavis@cois.on.ca) + */ + +#ifndef _SPARC_MOSTEK_H +#define _SPARC_MOSTEK_H + +#include <asm/idprom.h> +#include <asm/io.h> + +/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) + * + * Data + * Address Function + * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 + * 7ff - - - - - - - - Year 00-99 + * 7fe 0 0 0 - - - - - Month 01-12 + * 7fd 0 0 - - - - - - Date 01-31 + * 7fc 0 FT 0 0 0 - - - Day 01-07 + * 7fb KS 0 - - - - - - Hours 00-23 + * 7fa 0 - - - - - - - Minutes 00-59 + * 7f9 ST - - - - - - - Seconds 00-59 + * 7f8 W R S - - - - - Control + * + * * ST is STOP BIT + * * W is WRITE BIT + * * R is READ BIT + * * S is SIGN BIT + * * FT is FREQ TEST BIT + * * KS is KICK START BIT + */ + +/* The Mostek 48t02 real time clock and NVRAM chip. The registers + * other than the control register are in binary coded decimal. Some + * control bits also live outside the control register. + */ +#define mostek_read(_addr) readb(_addr) +#define mostek_write(_addr,_val) writeb(_val, _addr) +#define MOSTEK_EEPROM 0x0000UL +#define MOSTEK_IDPROM 0x07d8UL +#define MOSTEK_CREG 0x07f8UL +#define MOSTEK_SEC 0x07f9UL +#define MOSTEK_MIN 0x07faUL +#define MOSTEK_HOUR 0x07fbUL +#define MOSTEK_DOW 0x07fcUL +#define MOSTEK_DOM 0x07fdUL +#define MOSTEK_MONTH 0x07feUL +#define MOSTEK_YEAR 0x07ffUL + +struct mostek48t02 { + volatile char eeprom[2008]; /* This is the eeprom, don't touch! */ + struct idprom idprom; /* The idprom lives here. */ + volatile unsigned char creg; /* Control register */ + volatile unsigned char sec; /* Seconds (0-59) */ + volatile unsigned char min; /* Minutes (0-59) */ + volatile unsigned char hour; /* Hour (0-23) */ + volatile unsigned char dow; /* Day of the week (1-7) */ + volatile unsigned char dom; /* Day of the month (1-31) */ + volatile unsigned char month; /* Month of year (1-12) */ + volatile unsigned char year; /* Year (0-99) */ +}; + +extern spinlock_t mostek_lock; +extern void __iomem *mstk48t02_regs; + +/* Control register values. */ +#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ +#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ +#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ + +/* Control bits that live in the other registers. */ +#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ +#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ +#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ + +#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ +#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) + +/* Masks that define how much space each value takes up. */ +#define MSTK_SEC_MASK 0x7f +#define MSTK_MIN_MASK 0x7f +#define MSTK_HOUR_MASK 0x3f +#define MSTK_DOW_MASK 0x07 +#define MSTK_DOM_MASK 0x3f +#define MSTK_MONTH_MASK 0x1f +#define MSTK_YEAR_MASK 0xffU + +/* Binary coded decimal conversion macros. */ +#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) +#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) + +/* Generic register set and get macros for internal use. */ +#define MSTK_GET(regs,var,mask) (MSTK_REGVAL_TO_DECIMAL(((struct mostek48t02 *)regs)->var & MSTK_ ## mask ## _MASK)) +#define MSTK_SET(regs,var,value,mask) do { ((struct mostek48t02 *)regs)->var &= ~(MSTK_ ## mask ## _MASK); ((struct mostek48t02 *)regs)->var |= MSTK_DECIMAL_TO_REGVAL(value) & (MSTK_ ## mask ## _MASK); } while (0) + +/* Macros to make register access easier on our fingers. These give you + * the decimal value of the register requested if applicable. You pass + * the a pointer to a 'struct mostek48t02'. + */ +#define MSTK_REG_CREG(regs) (((struct mostek48t02 *)regs)->creg) +#define MSTK_REG_SEC(regs) MSTK_GET(regs,sec,SEC) +#define MSTK_REG_MIN(regs) MSTK_GET(regs,min,MIN) +#define MSTK_REG_HOUR(regs) MSTK_GET(regs,hour,HOUR) +#define MSTK_REG_DOW(regs) MSTK_GET(regs,dow,DOW) +#define MSTK_REG_DOM(regs) MSTK_GET(regs,dom,DOM) +#define MSTK_REG_MONTH(regs) MSTK_GET(regs,month,MONTH) +#define MSTK_REG_YEAR(regs) MSTK_GET(regs,year,YEAR) + +#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,sec,value,SEC) +#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,min,value,MIN) +#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,hour,value,HOUR) +#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,dow,value,DOW) +#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,dom,value,DOM) +#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,month,value,MONTH) +#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,year,value,YEAR) + + +/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the + * same (basically) layout of the 48t02 chip except for the extra + * NVRAM on board (8 KB against the 48t02's 2 KB). + */ +struct mostek48t08 { + char offset[6*1024]; /* Magic things may be here, who knows? */ + struct mostek48t02 regs; /* Here is what we are interested in. */ +}; + +#ifdef CONFIG_SUN4 +enum sparc_clock_type { MSTK48T02, MSTK48T08, \ +INTERSIL, MSTK_INVALID }; +#else +enum sparc_clock_type { MSTK48T02, MSTK48T08, \ +MSTK_INVALID }; +#endif + +#ifdef CONFIG_SUN4 +/* intersil on a sun 4/260 code data from harris doc */ +struct intersil_dt { + volatile unsigned char int_csec; + volatile unsigned char int_hour; + volatile unsigned char int_min; + volatile unsigned char int_sec; + volatile unsigned char int_month; + volatile unsigned char int_day; + volatile unsigned char int_year; + volatile unsigned char int_dow; +}; + +struct intersil { + struct intersil_dt clk; + struct intersil_dt cmp; + volatile unsigned char int_intr_reg; + volatile unsigned char int_cmd_reg; +}; + +#define INTERSIL_STOP 0x0 +#define INTERSIL_START 0x8 +#define INTERSIL_INTR_DISABLE 0x0 +#define INTERSIL_INTR_ENABLE 0x10 +#define INTERSIL_32K 0x0 +#define INTERSIL_NORMAL 0x0 +#define INTERSIL_24H 0x4 +#define INTERSIL_INT_100HZ 0x2 + +/* end of intersil info */ +#endif + +#endif /* !(_SPARC_MOSTEK_H) */ diff --git a/include/asm-sparc/mostek_64.h b/include/asm-sparc/mostek_64.h new file mode 100644 index 00000000000..c5652de2ace --- /dev/null +++ b/include/asm-sparc/mostek_64.h @@ -0,0 +1,143 @@ +/* mostek.h: Describes the various Mostek time of day clock registers. + * + * Copyright (C) 1995 David S. Miller (davem@davemloft.net) + * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) + */ + +#ifndef _SPARC64_MOSTEK_H +#define _SPARC64_MOSTEK_H + +#include <asm/idprom.h> + +/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) + * + * Data + * Address Function + * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 + * 7ff - - - - - - - - Year 00-99 + * 7fe 0 0 0 - - - - - Month 01-12 + * 7fd 0 0 - - - - - - Date 01-31 + * 7fc 0 FT 0 0 0 - - - Day 01-07 + * 7fb KS 0 - - - - - - Hours 00-23 + * 7fa 0 - - - - - - - Minutes 00-59 + * 7f9 ST - - - - - - - Seconds 00-59 + * 7f8 W R S - - - - - Control + * + * * ST is STOP BIT + * * W is WRITE BIT + * * R is READ BIT + * * S is SIGN BIT + * * FT is FREQ TEST BIT + * * KS is KICK START BIT + */ + +/* The Mostek 48t02 real time clock and NVRAM chip. The registers + * other than the control register are in binary coded decimal. Some + * control bits also live outside the control register. + * + * We now deal with physical addresses for I/O to the chip. -DaveM + */ +static inline u8 mostek_read(void __iomem *addr) +{ + u8 ret; + + __asm__ __volatile__("lduba [%1] %2, %0" + : "=r" (ret) + : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); + return ret; +} + +static inline void mostek_write(void __iomem *addr, u8 val) +{ + __asm__ __volatile__("stba %0, [%1] %2" + : /* no outputs */ + : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); +} + +#define MOSTEK_EEPROM 0x0000UL +#define MOSTEK_IDPROM 0x07d8UL +#define MOSTEK_CREG 0x07f8UL +#define MOSTEK_SEC 0x07f9UL +#define MOSTEK_MIN 0x07faUL +#define MOSTEK_HOUR 0x07fbUL +#define MOSTEK_DOW 0x07fcUL +#define MOSTEK_DOM 0x07fdUL +#define MOSTEK_MONTH 0x07feUL +#define MOSTEK_YEAR 0x07ffUL + +extern spinlock_t mostek_lock; +extern void __iomem *mstk48t02_regs; + +/* Control register values. */ +#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ +#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ +#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ + +/* Control bits that live in the other registers. */ +#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ +#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ +#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ + +#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ +#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) + +/* Masks that define how much space each value takes up. */ +#define MSTK_SEC_MASK 0x7f +#define MSTK_MIN_MASK 0x7f +#define MSTK_HOUR_MASK 0x3f +#define MSTK_DOW_MASK 0x07 +#define MSTK_DOM_MASK 0x3f +#define MSTK_MONTH_MASK 0x1f +#define MSTK_YEAR_MASK 0xffU + +/* Binary coded decimal conversion macros. */ +#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) +#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) + +/* Generic register set and get macros for internal use. */ +#define MSTK_GET(regs,name) \ + (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK)) +#define MSTK_SET(regs,name,value) \ +do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \ + __val &= ~(MSTK_ ## name ## _MASK); \ + __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \ + (MSTK_ ## name ## _MASK)); \ + mostek_write(regs + MOSTEK_ ## name, __val); \ +} while(0) + +/* Macros to make register access easier on our fingers. These give you + * the decimal value of the register requested if applicable. You pass + * the a pointer to a 'struct mostek48t02'. + */ +#define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG)) +#define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC) +#define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN) +#define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR) +#define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW) +#define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM) +#define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH) +#define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR) + +#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value) +#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value) +#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value) +#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value) +#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value) +#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value) +#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value) + + +/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the + * same (basically) layout of the 48t02 chip except for the extra + * NVRAM on board (8 KB against the 48t02's 2 KB). + */ +#define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */ +#define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */ + +/* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older + * clock chip definitions around just in case. + */ +#define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */ +#define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */ + +#endif /* !(_SPARC64_MOSTEK_H) */ diff --git a/include/asm-sparc/namei.h b/include/asm-sparc/namei.h index 0646102fb02..eff944b8e32 100644 --- a/include/asm-sparc/namei.h +++ b/include/asm-sparc/namei.h @@ -1,13 +1,8 @@ -/* - * linux/include/asm-sparc/namei.h - * - * Routines to handle famous /usr/gnemul/s*. - * Included from linux/fs/namei.c - */ - -#ifndef __SPARC_NAMEI_H -#define __SPARC_NAMEI_H - -#define __emul_prefix() NULL - -#endif /* __SPARC_NAMEI_H */ +#ifndef ___ASM_SPARC_NAMEI_H +#define ___ASM_SPARC_NAMEI_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/namei_64.h> +#else +#include <asm-sparc/namei_32.h> +#endif +#endif diff --git a/include/asm-sparc/namei_32.h b/include/asm-sparc/namei_32.h new file mode 100644 index 00000000000..0646102fb02 --- /dev/null +++ b/include/asm-sparc/namei_32.h @@ -0,0 +1,13 @@ +/* + * linux/include/asm-sparc/namei.h + * + * Routines to handle famous /usr/gnemul/s*. + * Included from linux/fs/namei.c + */ + +#ifndef __SPARC_NAMEI_H +#define __SPARC_NAMEI_H + +#define __emul_prefix() NULL + +#endif /* __SPARC_NAMEI_H */ diff --git a/include/asm-sparc/namei_64.h b/include/asm-sparc/namei_64.h new file mode 100644 index 00000000000..cbc1b4c0689 --- /dev/null +++ b/include/asm-sparc/namei_64.h @@ -0,0 +1,13 @@ +/* + * linux/include/asm-sparc64/namei.h + * + * Routines to handle famous /usr/gnemul/s*. + * Included from linux/fs/namei.c + */ + +#ifndef __SPARC64_NAMEI_H +#define __SPARC64_NAMEI_H + +#define __emul_prefix() NULL + +#endif /* __SPARC64_NAMEI_H */ diff --git a/include/asm-sparc/of_platform.h b/include/asm-sparc/of_platform.h index 38334351c36..851eb84d737 100644 --- a/include/asm-sparc/of_platform.h +++ b/include/asm-sparc/of_platform.h @@ -1,24 +1,8 @@ -#ifndef _ASM_SPARC_OF_PLATFORM_H -#define _ASM_SPARC_OF_PLATFORM_H -/* - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. - * <benh@kernel.crashing.org> - * Modified for Sparc by merging parts of asm-sparc/of_device.h - * by Stephen Rothwell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -/* This is just here during the transition */ -#include <linux/of_platform.h> - -extern struct bus_type ebus_bus_type; -extern struct bus_type sbus_bus_type; - -#define of_bus_type of_platform_bus_type /* for compatibility */ - -#endif /* _ASM_SPARC_OF_PLATFORM_H */ +#ifndef ___ASM_SPARC_OF_PLATFORM_H +#define ___ASM_SPARC_OF_PLATFORM_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/of_platform_64.h> +#else +#include <asm-sparc/of_platform_32.h> +#endif +#endif diff --git a/include/asm-sparc/of_platform_32.h b/include/asm-sparc/of_platform_32.h new file mode 100644 index 00000000000..38334351c36 --- /dev/null +++ b/include/asm-sparc/of_platform_32.h @@ -0,0 +1,24 @@ +#ifndef _ASM_SPARC_OF_PLATFORM_H +#define _ASM_SPARC_OF_PLATFORM_H +/* + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * Modified for Sparc by merging parts of asm-sparc/of_device.h + * by Stephen Rothwell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +/* This is just here during the transition */ +#include <linux/of_platform.h> + +extern struct bus_type ebus_bus_type; +extern struct bus_type sbus_bus_type; + +#define of_bus_type of_platform_bus_type /* for compatibility */ + +#endif /* _ASM_SPARC_OF_PLATFORM_H */ diff --git a/include/asm-sparc/of_platform_64.h b/include/asm-sparc/of_platform_64.h new file mode 100644 index 00000000000..78aa032b674 --- /dev/null +++ b/include/asm-sparc/of_platform_64.h @@ -0,0 +1,25 @@ +#ifndef _ASM_SPARC64_OF_PLATFORM_H +#define _ASM_SPARC64_OF_PLATFORM_H +/* + * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. + * <benh@kernel.crashing.org> + * Modified for Sparc by merging parts of asm-sparc/of_device.h + * by Stephen Rothwell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +/* This is just here during the transition */ +#include <linux/of_platform.h> + +extern struct bus_type isa_bus_type; +extern struct bus_type ebus_bus_type; +extern struct bus_type sbus_bus_type; + +#define of_bus_type of_platform_bus_type /* for compatibility */ + +#endif /* _ASM_SPARC64_OF_PLATFORM_H */ diff --git a/include/asm-sparc/openprom.h b/include/asm-sparc/openprom.h index e812cf3b0de..8c349f06199 100644 --- a/include/asm-sparc/openprom.h +++ b/include/asm-sparc/openprom.h @@ -1,255 +1,8 @@ -#ifndef __SPARC_OPENPROM_H -#define __SPARC_OPENPROM_H - -/* openprom.h: Prom structures and defines for access to the OPENBOOT - * prom routines and data areas. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -/* Empirical constants... */ -#define LINUX_OPPROM_MAGIC 0x10010407 - -#ifndef __ASSEMBLY__ -/* V0 prom device operations. */ -struct linux_dev_v0_funcs { - int (*v0_devopen)(char *device_str); - int (*v0_devclose)(int dev_desc); - int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_seekdev)(int dev_desc, long logical_offst, int from); -}; - -/* V2 and later prom device operations. */ -struct linux_dev_v2_funcs { - int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ - char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); - void (*v2_dumb_mem_free)(char *va, unsigned sz); - - /* To map devices into virtual I/O space. */ - char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); - void (*v2_dumb_munmap)(char *virta, unsigned size); - - int (*v2_dev_open)(char *devpath); - void (*v2_dev_close)(int d); - int (*v2_dev_read)(int d, char *buf, int nbytes); - int (*v2_dev_write)(int d, char *buf, int nbytes); - int (*v2_dev_seek)(int d, int hi, int lo); - - /* Never issued (multistage load support) */ - void (*v2_wheee2)(void); - void (*v2_wheee3)(void); -}; - -struct linux_mlist_v0 { - struct linux_mlist_v0 *theres_more; - char *start_adr; - unsigned num_bytes; -}; - -struct linux_mem_v0 { - struct linux_mlist_v0 **v0_totphys; - struct linux_mlist_v0 **v0_prommap; - struct linux_mlist_v0 **v0_available; /* What we can use */ -}; - -/* Arguments sent to the kernel from the boot prompt. */ -struct linux_arguments_v0 { - char *argv[8]; - char args[100]; - char boot_dev[2]; - int boot_dev_ctrl; - int boot_dev_unit; - int dev_partition; - char *kernel_file_name; - void *aieee1; /* XXX */ -}; - -/* V2 and up boot things. */ -struct linux_bootargs_v2 { - char **bootpath; - char **bootargs; - int *fd_stdin; - int *fd_stdout; -}; - -/* The top level PROM vector. */ -struct linux_romvec { - /* Version numbers. */ - unsigned int pv_magic_cookie; - unsigned int pv_romvers; - unsigned int pv_plugin_revision; - unsigned int pv_printrev; - - /* Version 0 memory descriptors. */ - struct linux_mem_v0 pv_v0mem; - - /* Node operations. */ - struct linux_nodeops *pv_nodeops; - - char **pv_bootstr; - struct linux_dev_v0_funcs pv_v0devops; - - char *pv_stdin; - char *pv_stdout; -#define PROMDEV_KBD 0 /* input from keyboard */ -#define PROMDEV_SCREEN 0 /* output to screen */ -#define PROMDEV_TTYA 1 /* in/out to ttya */ -#define PROMDEV_TTYB 2 /* in/out to ttyb */ - - /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ - int (*pv_getchar)(void); - void (*pv_putchar)(int ch); - - /* Non-blocking variants. */ - int (*pv_nbgetchar)(void); - int (*pv_nbputchar)(int ch); - - void (*pv_putstr)(char *str, int len); - - /* Miscellany. */ - void (*pv_reboot)(char *bootstr); - void (*pv_printf)(__const__ char *fmt, ...); - void (*pv_abort)(void); - __volatile__ int *pv_ticks; - void (*pv_halt)(void); - void (**pv_synchook)(void); - - /* Evaluate a forth string, not different proto for V0 and V2->up. */ - union { - void (*v0_eval)(int len, char *str); - void (*v2_eval)(char *str); - } pv_fortheval; - - struct linux_arguments_v0 **pv_v0bootargs; - - /* Get ether address. */ - unsigned int (*pv_enaddr)(int d, char *enaddr); - - struct linux_bootargs_v2 pv_v2bootargs; - struct linux_dev_v2_funcs pv_v2devops; - - int filler[15]; - - /* This one is sun4c/sun4 only. */ - void (*pv_setctxt)(int ctxt, char *va, int pmeg); - - /* Prom version 3 Multiprocessor routines. This stuff is crazy. - * No joke. Calling these when there is only one cpu probably - * crashes the machine, have to test this. :-) - */ - - /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context - * 'thiscontext' executing at address 'prog_counter' - */ - int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, - int thiscontext, char *prog_counter); - - /* v3_cpustop() will cause cpu 'whichcpu' to stop executing - * until a resume cpu call is made. - */ - int (*v3_cpustop)(unsigned int whichcpu); - - /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or - * resume cpu call is made. - */ - int (*v3_cpuidle)(unsigned int whichcpu); - - /* v3_cpuresume() will resume processor 'whichcpu' executing - * starting with whatever 'pc' and 'npc' were left at the - * last 'idle' or 'stop' call. - */ - int (*v3_cpuresume)(unsigned int whichcpu); -}; - -/* Routines for traversing the prom device tree. */ -struct linux_nodeops { - int (*no_nextnode)(int node); - int (*no_child)(int node); - int (*no_proplen)(int node, char *name); - int (*no_getprop)(int node, char *name, char *val); - int (*no_setprop)(int node, char *name, char *val, int len); - char * (*no_nextprop)(int node, char *name); -}; - -/* More fun PROM structures for device probing. */ -#define PROMREG_MAX 16 -#define PROMVADDR_MAX 16 -#define PROMINTR_MAX 15 - -struct linux_prom_registers { - unsigned int which_io; /* is this in OBIO space? */ - unsigned int phys_addr; /* The physical address of this register */ - unsigned int reg_size; /* How many bytes does this register take up? */ -}; - -struct linux_prom_irqs { - int pri; /* IRQ priority */ - int vector; /* This is foobar, what does it do? */ -}; - -/* Element of the "ranges" vector */ -struct linux_prom_ranges { - unsigned int ot_child_space; - unsigned int ot_child_base; /* Bus feels this */ - unsigned int ot_parent_space; - unsigned int ot_parent_base; /* CPU looks from here */ - unsigned int or_size; -}; - -/* Ranges and reg properties are a bit different for PCI. */ -struct linux_prom_pci_registers { - /* - * We don't know what information this field contain. - * We guess, PCI device function is in bits 15:8 - * So, ... - */ - unsigned int which_io; /* Let it be which_io */ - - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_ranges { - unsigned int child_phys_hi; /* Only certain bits are encoded here. */ - unsigned int child_phys_mid; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_assigned_addresses { - unsigned int which_io; - - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_ebus_ranges { - unsigned int child_phys_hi; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_mid; - unsigned int parent_phys_lo; - - unsigned int size; -}; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC_OPENPROM_H) */ +#ifndef ___ASM_SPARC_OPENPROM_H +#define ___ASM_SPARC_OPENPROM_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/openprom_64.h> +#else +#include <asm-sparc/openprom_32.h> +#endif +#endif diff --git a/include/asm-sparc/openprom_32.h b/include/asm-sparc/openprom_32.h new file mode 100644 index 00000000000..8b1649f29ed --- /dev/null +++ b/include/asm-sparc/openprom_32.h @@ -0,0 +1,255 @@ +#ifndef __SPARC_OPENPROM_H +#define __SPARC_OPENPROM_H + +/* openprom.h: Prom structures and defines for access to the OPENBOOT + * prom routines and data areas. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +/* Empirical constants... */ +#define LINUX_OPPROM_MAGIC 0x10010407 + +#ifndef __ASSEMBLY__ +/* V0 prom device operations. */ +struct linux_dev_v0_funcs { + int (*v0_devopen)(char *device_str); + int (*v0_devclose)(int dev_desc); + int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_seekdev)(int dev_desc, long logical_offst, int from); +}; + +/* V2 and later prom device operations. */ +struct linux_dev_v2_funcs { + int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ + char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); + void (*v2_dumb_mem_free)(char *va, unsigned sz); + + /* To map devices into virtual I/O space. */ + char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); + void (*v2_dumb_munmap)(char *virta, unsigned size); + + int (*v2_dev_open)(char *devpath); + void (*v2_dev_close)(int d); + int (*v2_dev_read)(int d, char *buf, int nbytes); + int (*v2_dev_write)(int d, char *buf, int nbytes); + int (*v2_dev_seek)(int d, int hi, int lo); + + /* Never issued (multistage load support) */ + void (*v2_wheee2)(void); + void (*v2_wheee3)(void); +}; + +struct linux_mlist_v0 { + struct linux_mlist_v0 *theres_more; + char *start_adr; + unsigned num_bytes; +}; + +struct linux_mem_v0 { + struct linux_mlist_v0 **v0_totphys; + struct linux_mlist_v0 **v0_prommap; + struct linux_mlist_v0 **v0_available; /* What we can use */ +}; + +/* Arguments sent to the kernel from the boot prompt. */ +struct linux_arguments_v0 { + char *argv[8]; + char args[100]; + char boot_dev[2]; + int boot_dev_ctrl; + int boot_dev_unit; + int dev_partition; + char *kernel_file_name; + void *aieee1; /* XXX */ +}; + +/* V2 and up boot things. */ +struct linux_bootargs_v2 { + char **bootpath; + char **bootargs; + int *fd_stdin; + int *fd_stdout; +}; + +/* The top level PROM vector. */ +struct linux_romvec { + /* Version numbers. */ + unsigned int pv_magic_cookie; + unsigned int pv_romvers; + unsigned int pv_plugin_revision; + unsigned int pv_printrev; + + /* Version 0 memory descriptors. */ + struct linux_mem_v0 pv_v0mem; + + /* Node operations. */ + struct linux_nodeops *pv_nodeops; + + char **pv_bootstr; + struct linux_dev_v0_funcs pv_v0devops; + + char *pv_stdin; + char *pv_stdout; +#define PROMDEV_KBD 0 /* input from keyboard */ +#define PROMDEV_SCREEN 0 /* output to screen */ +#define PROMDEV_TTYA 1 /* in/out to ttya */ +#define PROMDEV_TTYB 2 /* in/out to ttyb */ + + /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ + int (*pv_getchar)(void); + void (*pv_putchar)(int ch); + + /* Non-blocking variants. */ + int (*pv_nbgetchar)(void); + int (*pv_nbputchar)(int ch); + + void (*pv_putstr)(char *str, int len); + + /* Miscellany. */ + void (*pv_reboot)(char *bootstr); + void (*pv_printf)(__const__ char *fmt, ...); + void (*pv_abort)(void); + __volatile__ int *pv_ticks; + void (*pv_halt)(void); + void (**pv_synchook)(void); + + /* Evaluate a forth string, not different proto for V0 and V2->up. */ + union { + void (*v0_eval)(int len, char *str); + void (*v2_eval)(char *str); + } pv_fortheval; + + struct linux_arguments_v0 **pv_v0bootargs; + + /* Get ether address. */ + unsigned int (*pv_enaddr)(int d, char *enaddr); + + struct linux_bootargs_v2 pv_v2bootargs; + struct linux_dev_v2_funcs pv_v2devops; + + int filler[15]; + + /* This one is sun4c/sun4 only. */ + void (*pv_setctxt)(int ctxt, char *va, int pmeg); + + /* Prom version 3 Multiprocessor routines. This stuff is crazy. + * No joke. Calling these when there is only one cpu probably + * crashes the machine, have to test this. :-) + */ + + /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context + * 'thiscontext' executing at address 'prog_counter' + */ + int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, + int thiscontext, char *prog_counter); + + /* v3_cpustop() will cause cpu 'whichcpu' to stop executing + * until a resume cpu call is made. + */ + int (*v3_cpustop)(unsigned int whichcpu); + + /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or + * resume cpu call is made. + */ + int (*v3_cpuidle)(unsigned int whichcpu); + + /* v3_cpuresume() will resume processor 'whichcpu' executing + * starting with whatever 'pc' and 'npc' were left at the + * last 'idle' or 'stop' call. + */ + int (*v3_cpuresume)(unsigned int whichcpu); +}; + +/* Routines for traversing the prom device tree. */ +struct linux_nodeops { + int (*no_nextnode)(int node); + int (*no_child)(int node); + int (*no_proplen)(int node, char *name); + int (*no_getprop)(int node, char *name, char *val); + int (*no_setprop)(int node, char *name, char *val, int len); + char * (*no_nextprop)(int node, char *name); +}; + +/* More fun PROM structures for device probing. */ +#define PROMREG_MAX 16 +#define PROMVADDR_MAX 16 +#define PROMINTR_MAX 15 + +struct linux_prom_registers { + unsigned int which_io; /* is this in OBIO space? */ + unsigned int phys_addr; /* The physical address of this register */ + unsigned int reg_size; /* How many bytes does this register take up? */ +}; + +struct linux_prom_irqs { + int pri; /* IRQ priority */ + int vector; /* This is foobar, what does it do? */ +}; + +/* Element of the "ranges" vector */ +struct linux_prom_ranges { + unsigned int ot_child_space; + unsigned int ot_child_base; /* Bus feels this */ + unsigned int ot_parent_space; + unsigned int ot_parent_base; /* CPU looks from here */ + unsigned int or_size; +}; + +/* Ranges and reg properties are a bit different for PCI. */ +struct linux_prom_pci_registers { + /* + * We don't know what information this field contain. + * We guess, PCI device function is in bits 15:8 + * So, ... + */ + unsigned int which_io; /* Let it be which_io */ + + unsigned int phys_hi; + unsigned int phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_ranges { + unsigned int child_phys_hi; /* Only certain bits are encoded here. */ + unsigned int child_phys_mid; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_assigned_addresses { + unsigned int which_io; + + unsigned int phys_hi; + unsigned int phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_ebus_ranges { + unsigned int child_phys_hi; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_mid; + unsigned int parent_phys_lo; + + unsigned int size; +}; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC_OPENPROM_H) */ diff --git a/include/asm-sparc/openprom_64.h b/include/asm-sparc/openprom_64.h new file mode 100644 index 00000000000..b69e4a8c917 --- /dev/null +++ b/include/asm-sparc/openprom_64.h @@ -0,0 +1,280 @@ +#ifndef __SPARC64_OPENPROM_H +#define __SPARC64_OPENPROM_H + +/* openprom.h: Prom structures and defines for access to the OPENBOOT + * prom routines and data areas. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __ASSEMBLY__ +/* V0 prom device operations. */ +struct linux_dev_v0_funcs { + int (*v0_devopen)(char *device_str); + int (*v0_devclose)(int dev_desc); + int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); + int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); + int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); + int (*v0_seekdev)(int dev_desc, long logical_offst, int from); +}; + +/* V2 and later prom device operations. */ +struct linux_dev_v2_funcs { + int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ + char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); + void (*v2_dumb_mem_free)(char *va, unsigned sz); + + /* To map devices into virtual I/O space. */ + char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); + void (*v2_dumb_munmap)(char *virta, unsigned size); + + int (*v2_dev_open)(char *devpath); + void (*v2_dev_close)(int d); + int (*v2_dev_read)(int d, char *buf, int nbytes); + int (*v2_dev_write)(int d, char *buf, int nbytes); + int (*v2_dev_seek)(int d, int hi, int lo); + + /* Never issued (multistage load support) */ + void (*v2_wheee2)(void); + void (*v2_wheee3)(void); +}; + +struct linux_mlist_v0 { + struct linux_mlist_v0 *theres_more; + unsigned start_adr; + unsigned num_bytes; +}; + +struct linux_mem_v0 { + struct linux_mlist_v0 **v0_totphys; + struct linux_mlist_v0 **v0_prommap; + struct linux_mlist_v0 **v0_available; /* What we can use */ +}; + +/* Arguments sent to the kernel from the boot prompt. */ +struct linux_arguments_v0 { + char *argv[8]; + char args[100]; + char boot_dev[2]; + int boot_dev_ctrl; + int boot_dev_unit; + int dev_partition; + char *kernel_file_name; + void *aieee1; /* XXX */ +}; + +/* V2 and up boot things. */ +struct linux_bootargs_v2 { + char **bootpath; + char **bootargs; + int *fd_stdin; + int *fd_stdout; +}; + +/* The top level PROM vector. */ +struct linux_romvec { + /* Version numbers. */ + unsigned int pv_magic_cookie; + unsigned int pv_romvers; + unsigned int pv_plugin_revision; + unsigned int pv_printrev; + + /* Version 0 memory descriptors. */ + struct linux_mem_v0 pv_v0mem; + + /* Node operations. */ + struct linux_nodeops *pv_nodeops; + + char **pv_bootstr; + struct linux_dev_v0_funcs pv_v0devops; + + char *pv_stdin; + char *pv_stdout; +#define PROMDEV_KBD 0 /* input from keyboard */ +#define PROMDEV_SCREEN 0 /* output to screen */ +#define PROMDEV_TTYA 1 /* in/out to ttya */ +#define PROMDEV_TTYB 2 /* in/out to ttyb */ + + /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ + int (*pv_getchar)(void); + void (*pv_putchar)(int ch); + + /* Non-blocking variants. */ + int (*pv_nbgetchar)(void); + int (*pv_nbputchar)(int ch); + + void (*pv_putstr)(char *str, int len); + + /* Miscellany. */ + void (*pv_reboot)(char *bootstr); + void (*pv_printf)(__const__ char *fmt, ...); + void (*pv_abort)(void); + __volatile__ int *pv_ticks; + void (*pv_halt)(void); + void (**pv_synchook)(void); + + /* Evaluate a forth string, not different proto for V0 and V2->up. */ + union { + void (*v0_eval)(int len, char *str); + void (*v2_eval)(char *str); + } pv_fortheval; + + struct linux_arguments_v0 **pv_v0bootargs; + + /* Get ether address. */ + unsigned int (*pv_enaddr)(int d, char *enaddr); + + struct linux_bootargs_v2 pv_v2bootargs; + struct linux_dev_v2_funcs pv_v2devops; + + int filler[15]; + + /* This one is sun4c/sun4 only. */ + void (*pv_setctxt)(int ctxt, char *va, int pmeg); + + /* Prom version 3 Multiprocessor routines. This stuff is crazy. + * No joke. Calling these when there is only one cpu probably + * crashes the machine, have to test this. :-) + */ + + /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context + * 'thiscontext' executing at address 'prog_counter' + */ + int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, + int thiscontext, char *prog_counter); + + /* v3_cpustop() will cause cpu 'whichcpu' to stop executing + * until a resume cpu call is made. + */ + int (*v3_cpustop)(unsigned int whichcpu); + + /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or + * resume cpu call is made. + */ + int (*v3_cpuidle)(unsigned int whichcpu); + + /* v3_cpuresume() will resume processor 'whichcpu' executing + * starting with whatever 'pc' and 'npc' were left at the + * last 'idle' or 'stop' call. + */ + int (*v3_cpuresume)(unsigned int whichcpu); +}; + +/* Routines for traversing the prom device tree. */ +struct linux_nodeops { + int (*no_nextnode)(int node); + int (*no_child)(int node); + int (*no_proplen)(int node, char *name); + int (*no_getprop)(int node, char *name, char *val); + int (*no_setprop)(int node, char *name, char *val, int len); + char * (*no_nextprop)(int node, char *name); +}; + +/* More fun PROM structures for device probing. */ +#define PROMREG_MAX 24 +#define PROMVADDR_MAX 16 +#define PROMINTR_MAX 32 + +struct linux_prom_registers { + unsigned which_io; /* hi part of physical address */ + unsigned phys_addr; /* The physical address of this register */ + int reg_size; /* How many bytes does this register take up? */ +}; + +struct linux_prom64_registers { + unsigned long phys_addr; + unsigned long reg_size; +}; + +struct linux_prom_irqs { + int pri; /* IRQ priority */ + int vector; /* This is foobar, what does it do? */ +}; + +/* Element of the "ranges" vector */ +struct linux_prom_ranges { + unsigned int ot_child_space; + unsigned int ot_child_base; /* Bus feels this */ + unsigned int ot_parent_space; + unsigned int ot_parent_base; /* CPU looks from here */ + unsigned int or_size; +}; + +struct linux_prom64_ranges { + unsigned long ot_child_base; /* Bus feels this */ + unsigned long ot_parent_base; /* CPU looks from here */ + unsigned long or_size; +}; + +/* Ranges and reg properties are a bit different for PCI. */ +struct linux_prom_pci_registers { + unsigned int phys_hi; + unsigned int phys_mid; + unsigned int phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_ranges { + unsigned int child_phys_hi; /* Only certain bits are encoded here. */ + unsigned int child_phys_mid; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_lo; + + unsigned int size_hi; + unsigned int size_lo; +}; + +struct linux_prom_pci_intmap { + unsigned int phys_hi; + unsigned int phys_mid; + unsigned int phys_lo; + + unsigned int interrupt; + + int cnode; + unsigned int cinterrupt; +}; + +struct linux_prom_pci_intmask { + unsigned int phys_hi; + unsigned int phys_mid; + unsigned int phys_lo; + unsigned int interrupt; +}; + +struct linux_prom_ebus_ranges { + unsigned int child_phys_hi; + unsigned int child_phys_lo; + + unsigned int parent_phys_hi; + unsigned int parent_phys_mid; + unsigned int parent_phys_lo; + + unsigned int size; +}; + +struct linux_prom_ebus_intmap { + unsigned int phys_hi; + unsigned int phys_lo; + + unsigned int interrupt; + + int cnode; + unsigned int cinterrupt; +}; + +struct linux_prom_ebus_intmask { + unsigned int phys_hi; + unsigned int phys_lo; + unsigned int interrupt; +}; +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC64_OPENPROM_H) */ diff --git a/include/asm-sparc/oplib.h b/include/asm-sparc/oplib.h index 00f487e74d9..e88d7c04a29 100644 --- a/include/asm-sparc/oplib.h +++ b/include/asm-sparc/oplib.h @@ -1,272 +1,8 @@ -/* - * oplib.h: Describes the interface and available routines in the - * Linux Prom library. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC_OPLIB_H -#define __SPARC_OPLIB_H - -#include <asm/openprom.h> -#include <linux/spinlock.h> -#include <linux/compiler.h> - -/* The master romvec pointer... */ -extern struct linux_romvec *romvec; - -/* Enumeration to describe the prom major version we have detected. */ -enum prom_major_version { - PROM_V0, /* Original sun4c V0 prom */ - PROM_V2, /* sun4c and early sun4m V2 prom */ - PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */ - PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */ - PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */ -}; - -extern enum prom_major_version prom_vers; -/* Revision, and firmware revision. */ -extern unsigned int prom_rev, prom_prev; - -/* Root node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_root_node; - -/* Pointer to prom structure containing the device tree traversal - * and usage utility functions. Only prom-lib should use these, - * users use the interface defined by the library only! - */ -extern struct linux_nodeops *prom_nodeops; - -/* The functions... */ - -/* You must call prom_init() before using any of the library services, - * preferably as early as possible. Pass it the romvec pointer. - */ -extern void prom_init(struct linux_romvec *rom_ptr); - -/* Boot argument acquisition, returns the boot command line string. */ -extern char *prom_getbootargs(void); - -/* Device utilities. */ - -/* Map and unmap devices in IO space at virtual addresses. Note that the - * virtual address you pass is a request and the prom may put your mappings - * somewhere else, so check your return value as that is where your new - * mappings really are! - * - * Another note, these are only available on V2 or higher proms! - */ -extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); -extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); - -/* Device operations. */ - -/* Open the device described by the passed string. Note, that the format - * of the string is different on V0 vs. V2->higher proms. The caller must - * know what he/she is doing! Returns the device descriptor, an int. - */ -extern int prom_devopen(char *device_string); - -/* Close a previously opened device described by the passed integer - * descriptor. - */ -extern int prom_devclose(int device_handle); - -/* Do a seek operation on the device described by the passed integer - * descriptor. - */ -extern void prom_seek(int device_handle, unsigned int seek_hival, - unsigned int seek_lowval); - -/* Miscellaneous routines, don't really fit in any category per se. */ - -/* Reboot the machine with the command line passed. */ -extern void prom_reboot(char *boot_command); - -/* Evaluate the forth string passed. */ -extern void prom_feval(char *forth_string); - -/* Enter the prom, with possibility of continuation with the 'go' - * command in newer proms. - */ -extern void prom_cmdline(void); - -/* Enter the prom, with no chance of continuation for the stand-alone - * which calls this. - */ -extern void prom_halt(void) __attribute__ ((noreturn)); - -/* Set the PROM 'sync' callback function to the passed function pointer. - * When the user gives the 'sync' command at the prom prompt while the - * kernel is still active, the prom will call this routine. - * - * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX - */ -typedef void (*sync_func_t)(void); -extern void prom_setsync(sync_func_t func_ptr); - -/* Acquire the IDPROM of the root node in the prom device tree. This - * gets passed a buffer where you would like it stuffed. The return value - * is the format type of this idprom or 0xff on error. - */ -extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); - -/* Get the prom major version. */ -extern int prom_version(void); - -/* Get the prom plugin revision. */ -extern int prom_getrev(void); - -/* Get the prom firmware revision. */ -extern int prom_getprev(void); - -/* Character operations to/from the console.... */ - -/* Non-blocking get character from console. */ -extern int prom_nbgetchar(void); - -/* Non-blocking put character to console. */ -extern int prom_nbputchar(char character); - -/* Blocking get character from console. */ -extern char prom_getchar(void); - -/* Blocking put character to console. */ -extern void prom_putchar(char character); - -/* Prom's internal routines, don't use in kernel/boot code. */ -extern void prom_printf(char *fmt, ...); -extern void prom_write(const char *buf, unsigned int len); - -/* Multiprocessor operations... */ - -/* Start the CPU with the given device tree node, context table, and context - * at the passed program counter. - */ -extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, - int context, char *program_counter); - -/* Stop the CPU with the passed device tree node. */ -extern int prom_stopcpu(int cpunode); - -/* Idle the CPU with the passed device tree node. */ -extern int prom_idlecpu(int cpunode); - -/* Re-Start the CPU with the passed device tree node. */ -extern int prom_restartcpu(int cpunode); - -/* PROM memory allocation facilities... */ - -/* Allocated at possibly the given virtual address a chunk of the - * indicated size. - */ -extern char *prom_alloc(char *virt_hint, unsigned int size); - -/* Free a previously allocated chunk. */ -extern void prom_free(char *virt_addr, unsigned int size); - -/* Sun4/sun4c specific memory-management startup hook. */ - -/* Map the passed segment in the given context at the passed - * virtual address. - */ -extern void prom_putsegment(int context, unsigned long virt_addr, - int physical_segment); - - -/* PROM device tree traversal functions... */ - -#ifdef PROMLIB_INTERNAL - -/* Internal version of prom_getchild. */ -extern int __prom_getchild(int parent_node); - -/* Internal version of prom_getsibling. */ -extern int __prom_getsibling(int node); - +#ifndef ___ASM_SPARC_OPLIB_H +#define ___ASM_SPARC_OPLIB_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/oplib_64.h> +#else +#include <asm-sparc/oplib_32.h> +#endif #endif - - -/* Get the child node of the given node, or zero if no child exists. */ -extern int prom_getchild(int parent_node); - -/* Get the next sibling node of the given node, or zero if no further - * siblings exist. - */ -extern int prom_getsibling(int node); - -/* Get the length, at the passed node, of the given property type. - * Returns -1 on error (ie. no such property at this node). - */ -extern int prom_getproplen(int thisnode, char *property); - -/* Fetch the requested property using the given buffer. Returns - * the number of bytes the prom put into your buffer or -1 on error. - */ -extern int __must_check prom_getproperty(int thisnode, char *property, - char *prop_buffer, int propbuf_size); - -/* Acquire an integer property. */ -extern int prom_getint(int node, char *property); - -/* Acquire an integer property, with a default value. */ -extern int prom_getintdefault(int node, char *property, int defval); - -/* Acquire a boolean property, 0=FALSE 1=TRUE. */ -extern int prom_getbool(int node, char *prop); - -/* Acquire a string property, null string on error. */ -extern void prom_getstring(int node, char *prop, char *buf, int bufsize); - -/* Does the passed node have the given "name"? YES=1 NO=0 */ -extern int prom_nodematch(int thisnode, char *name); - -/* Search all siblings starting at the passed node for "name" matching - * the given string. Returns the node on success, zero on failure. - */ -extern int prom_searchsiblings(int node_start, char *name); - -/* Return the first property type, as a string, for the given node. - * Returns a null string on error. - */ -extern char *prom_firstprop(int node, char *buffer); - -/* Returns the next property after the passed property for the given - * node. Returns null string on failure. - */ -extern char *prom_nextprop(int node, char *prev_property, char *buffer); - -/* Returns phandle of the path specified */ -extern int prom_finddevice(char *name); - -/* Returns 1 if the specified node has given property. */ -extern int prom_node_has_property(int node, char *property); - -/* Set the indicated property at the given node with the passed value. - * Returns the number of bytes of your value that the prom took. - */ -extern int prom_setprop(int node, char *prop_name, char *prop_value, - int value_size); - -extern int prom_pathtoinode(char *path); -extern int prom_inst2pkg(int); - -/* Dorking with Bus ranges... */ - -/* Apply promlib probes OBIO ranges to registers. */ -extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs); - -/* Apply ranges of any prom node (and optionally parent node as well) to registers. */ -extern void prom_apply_generic_ranges(int node, int parent, - struct linux_prom_registers *sbusregs, int nregs); - -/* CPU probing helpers. */ -int cpu_find_by_instance(int instance, int *prom_node, int *mid); -int cpu_find_by_mid(int mid, int *prom_node); -int cpu_get_hwmid(int prom_node); - -extern spinlock_t prom_lock; - -#endif /* !(__SPARC_OPLIB_H) */ diff --git a/include/asm-sparc/oplib_32.h b/include/asm-sparc/oplib_32.h new file mode 100644 index 00000000000..b2631da259e --- /dev/null +++ b/include/asm-sparc/oplib_32.h @@ -0,0 +1,272 @@ +/* + * oplib.h: Describes the interface and available routines in the + * Linux Prom library. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_OPLIB_H +#define __SPARC_OPLIB_H + +#include <asm/openprom.h> +#include <linux/spinlock.h> +#include <linux/compiler.h> + +/* The master romvec pointer... */ +extern struct linux_romvec *romvec; + +/* Enumeration to describe the prom major version we have detected. */ +enum prom_major_version { + PROM_V0, /* Original sun4c V0 prom */ + PROM_V2, /* sun4c and early sun4m V2 prom */ + PROM_V3, /* sun4m and later, up to sun4d/sun4e machines V3 */ + PROM_P1275, /* IEEE compliant ISA based Sun PROM, only sun4u */ + PROM_SUN4, /* Old sun4 proms are totally different, but we'll shoehorn it to make it fit */ +}; + +extern enum prom_major_version prom_vers; +/* Revision, and firmware revision. */ +extern unsigned int prom_rev, prom_prev; + +/* Root node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_root_node; + +/* Pointer to prom structure containing the device tree traversal + * and usage utility functions. Only prom-lib should use these, + * users use the interface defined by the library only! + */ +extern struct linux_nodeops *prom_nodeops; + +/* The functions... */ + +/* You must call prom_init() before using any of the library services, + * preferably as early as possible. Pass it the romvec pointer. + */ +extern void prom_init(struct linux_romvec *rom_ptr); + +/* Boot argument acquisition, returns the boot command line string. */ +extern char *prom_getbootargs(void); + +/* Device utilities. */ + +/* Map and unmap devices in IO space at virtual addresses. Note that the + * virtual address you pass is a request and the prom may put your mappings + * somewhere else, so check your return value as that is where your new + * mappings really are! + * + * Another note, these are only available on V2 or higher proms! + */ +extern char *prom_mapio(char *virt_hint, int io_space, unsigned int phys_addr, unsigned int num_bytes); +extern void prom_unmapio(char *virt_addr, unsigned int num_bytes); + +/* Device operations. */ + +/* Open the device described by the passed string. Note, that the format + * of the string is different on V0 vs. V2->higher proms. The caller must + * know what he/she is doing! Returns the device descriptor, an int. + */ +extern int prom_devopen(char *device_string); + +/* Close a previously opened device described by the passed integer + * descriptor. + */ +extern int prom_devclose(int device_handle); + +/* Do a seek operation on the device described by the passed integer + * descriptor. + */ +extern void prom_seek(int device_handle, unsigned int seek_hival, + unsigned int seek_lowval); + +/* Miscellaneous routines, don't really fit in any category per se. */ + +/* Reboot the machine with the command line passed. */ +extern void prom_reboot(char *boot_command); + +/* Evaluate the forth string passed. */ +extern void prom_feval(char *forth_string); + +/* Enter the prom, with possibility of continuation with the 'go' + * command in newer proms. + */ +extern void prom_cmdline(void); + +/* Enter the prom, with no chance of continuation for the stand-alone + * which calls this. + */ +extern void prom_halt(void) __attribute__ ((noreturn)); + +/* Set the PROM 'sync' callback function to the passed function pointer. + * When the user gives the 'sync' command at the prom prompt while the + * kernel is still active, the prom will call this routine. + * + * XXX The arguments are different on V0 vs. V2->higher proms, grrr! XXX + */ +typedef void (*sync_func_t)(void); +extern void prom_setsync(sync_func_t func_ptr); + +/* Acquire the IDPROM of the root node in the prom device tree. This + * gets passed a buffer where you would like it stuffed. The return value + * is the format type of this idprom or 0xff on error. + */ +extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); + +/* Get the prom major version. */ +extern int prom_version(void); + +/* Get the prom plugin revision. */ +extern int prom_getrev(void); + +/* Get the prom firmware revision. */ +extern int prom_getprev(void); + +/* Character operations to/from the console.... */ + +/* Non-blocking get character from console. */ +extern int prom_nbgetchar(void); + +/* Non-blocking put character to console. */ +extern int prom_nbputchar(char character); + +/* Blocking get character from console. */ +extern char prom_getchar(void); + +/* Blocking put character to console. */ +extern void prom_putchar(char character); + +/* Prom's internal routines, don't use in kernel/boot code. */ +extern void prom_printf(char *fmt, ...); +extern void prom_write(const char *buf, unsigned int len); + +/* Multiprocessor operations... */ + +/* Start the CPU with the given device tree node, context table, and context + * at the passed program counter. + */ +extern int prom_startcpu(int cpunode, struct linux_prom_registers *context_table, + int context, char *program_counter); + +/* Stop the CPU with the passed device tree node. */ +extern int prom_stopcpu(int cpunode); + +/* Idle the CPU with the passed device tree node. */ +extern int prom_idlecpu(int cpunode); + +/* Re-Start the CPU with the passed device tree node. */ +extern int prom_restartcpu(int cpunode); + +/* PROM memory allocation facilities... */ + +/* Allocated at possibly the given virtual address a chunk of the + * indicated size. + */ +extern char *prom_alloc(char *virt_hint, unsigned int size); + +/* Free a previously allocated chunk. */ +extern void prom_free(char *virt_addr, unsigned int size); + +/* Sun4/sun4c specific memory-management startup hook. */ + +/* Map the passed segment in the given context at the passed + * virtual address. + */ +extern void prom_putsegment(int context, unsigned long virt_addr, + int physical_segment); + + +/* PROM device tree traversal functions... */ + +#ifdef PROMLIB_INTERNAL + +/* Internal version of prom_getchild. */ +extern int __prom_getchild(int parent_node); + +/* Internal version of prom_getsibling. */ +extern int __prom_getsibling(int node); + +#endif + + +/* Get the child node of the given node, or zero if no child exists. */ +extern int prom_getchild(int parent_node); + +/* Get the next sibling node of the given node, or zero if no further + * siblings exist. + */ +extern int prom_getsibling(int node); + +/* Get the length, at the passed node, of the given property type. + * Returns -1 on error (ie. no such property at this node). + */ +extern int prom_getproplen(int thisnode, char *property); + +/* Fetch the requested property using the given buffer. Returns + * the number of bytes the prom put into your buffer or -1 on error. + */ +extern int __must_check prom_getproperty(int thisnode, char *property, + char *prop_buffer, int propbuf_size); + +/* Acquire an integer property. */ +extern int prom_getint(int node, char *property); + +/* Acquire an integer property, with a default value. */ +extern int prom_getintdefault(int node, char *property, int defval); + +/* Acquire a boolean property, 0=FALSE 1=TRUE. */ +extern int prom_getbool(int node, char *prop); + +/* Acquire a string property, null string on error. */ +extern void prom_getstring(int node, char *prop, char *buf, int bufsize); + +/* Does the passed node have the given "name"? YES=1 NO=0 */ +extern int prom_nodematch(int thisnode, char *name); + +/* Search all siblings starting at the passed node for "name" matching + * the given string. Returns the node on success, zero on failure. + */ +extern int prom_searchsiblings(int node_start, char *name); + +/* Return the first property type, as a string, for the given node. + * Returns a null string on error. + */ +extern char *prom_firstprop(int node, char *buffer); + +/* Returns the next property after the passed property for the given + * node. Returns null string on failure. + */ +extern char *prom_nextprop(int node, char *prev_property, char *buffer); + +/* Returns phandle of the path specified */ +extern int prom_finddevice(char *name); + +/* Returns 1 if the specified node has given property. */ +extern int prom_node_has_property(int node, char *property); + +/* Set the indicated property at the given node with the passed value. + * Returns the number of bytes of your value that the prom took. + */ +extern int prom_setprop(int node, char *prop_name, char *prop_value, + int value_size); + +extern int prom_pathtoinode(char *path); +extern int prom_inst2pkg(int); + +/* Dorking with Bus ranges... */ + +/* Apply promlib probes OBIO ranges to registers. */ +extern void prom_apply_obio_ranges(struct linux_prom_registers *obioregs, int nregs); + +/* Apply ranges of any prom node (and optionally parent node as well) to registers. */ +extern void prom_apply_generic_ranges(int node, int parent, + struct linux_prom_registers *sbusregs, int nregs); + +/* CPU probing helpers. */ +int cpu_find_by_instance(int instance, int *prom_node, int *mid); +int cpu_find_by_mid(int mid, int *prom_node); +int cpu_get_hwmid(int prom_node); + +extern spinlock_t prom_lock; + +#endif /* !(__SPARC_OPLIB_H) */ diff --git a/include/asm-sparc/oplib_64.h b/include/asm-sparc/oplib_64.h new file mode 100644 index 00000000000..6d2c2ca9803 --- /dev/null +++ b/include/asm-sparc/oplib_64.h @@ -0,0 +1,322 @@ +/* oplib.h: Describes the interface and available routines in the + * Linux Prom library. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __SPARC64_OPLIB_H +#define __SPARC64_OPLIB_H + +#include <asm/openprom.h> + +/* OBP version string. */ +extern char prom_version[]; + +/* Root node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_root_node; + +/* PROM stdin and stdout */ +extern int prom_stdin, prom_stdout; + +/* /chosen node of the prom device tree, this stays constant after + * initialization is complete. + */ +extern int prom_chosen_node; + +/* Helper values and strings in arch/sparc64/kernel/head.S */ +extern const char prom_peer_name[]; +extern const char prom_compatible_name[]; +extern const char prom_root_compatible[]; +extern const char prom_cpu_compatible[]; +extern const char prom_finddev_name[]; +extern const char prom_chosen_path[]; +extern const char prom_cpu_path[]; +extern const char prom_getprop_name[]; +extern const char prom_mmu_name[]; +extern const char prom_callmethod_name[]; +extern const char prom_translate_name[]; +extern const char prom_map_name[]; +extern const char prom_unmap_name[]; +extern int prom_mmu_ihandle_cache; +extern unsigned int prom_boot_mapped_pc; +extern unsigned int prom_boot_mapping_mode; +extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low; + +struct linux_mlist_p1275 { + struct linux_mlist_p1275 *theres_more; + unsigned long start_adr; + unsigned long num_bytes; +}; + +struct linux_mem_p1275 { + struct linux_mlist_p1275 **p1275_totphys; + struct linux_mlist_p1275 **p1275_prommap; + struct linux_mlist_p1275 **p1275_available; /* What we can use */ +}; + +/* The functions... */ + +/* You must call prom_init() before using any of the library services, + * preferably as early as possible. Pass it the romvec pointer. + */ +extern void prom_init(void *cif_handler, void *cif_stack); + +/* Boot argument acquisition, returns the boot command line string. */ +extern char *prom_getbootargs(void); + +/* Device utilities. */ + +/* Device operations. */ + +/* Open the device described by the passed string. Note, that the format + * of the string is different on V0 vs. V2->higher proms. The caller must + * know what he/she is doing! Returns the device descriptor, an int. + */ +extern int prom_devopen(const char *device_string); + +/* Close a previously opened device described by the passed integer + * descriptor. + */ +extern int prom_devclose(int device_handle); + +/* Do a seek operation on the device described by the passed integer + * descriptor. + */ +extern void prom_seek(int device_handle, unsigned int seek_hival, + unsigned int seek_lowval); + +/* Miscellaneous routines, don't really fit in any category per se. */ + +/* Reboot the machine with the command line passed. */ +extern void prom_reboot(const char *boot_command); + +/* Evaluate the forth string passed. */ +extern void prom_feval(const char *forth_string); + +/* Enter the prom, with possibility of continuation with the 'go' + * command in newer proms. + */ +extern void prom_cmdline(void); + +/* Enter the prom, with no chance of continuation for the stand-alone + * which calls this. + */ +extern void prom_halt(void) __attribute__ ((noreturn)); + +/* Halt and power-off the machine. */ +extern void prom_halt_power_off(void) __attribute__ ((noreturn)); + +/* Set the PROM 'sync' callback function to the passed function pointer. + * When the user gives the 'sync' command at the prom prompt while the + * kernel is still active, the prom will call this routine. + * + */ +typedef int (*callback_func_t)(long *cmd); +extern void prom_setcallback(callback_func_t func_ptr); + +/* Acquire the IDPROM of the root node in the prom device tree. This + * gets passed a buffer where you would like it stuffed. The return value + * is the format type of this idprom or 0xff on error. + */ +extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); + +/* Character operations to/from the console.... */ + +/* Non-blocking get character from console. */ +extern int prom_nbgetchar(void); + +/* Non-blocking put character to console. */ +extern int prom_nbputchar(char character); + +/* Blocking get character from console. */ +extern char prom_getchar(void); + +/* Blocking put character to console. */ +extern void prom_putchar(char character); + +/* Prom's internal routines, don't use in kernel/boot code. */ +extern void prom_printf(const char *fmt, ...); +extern void prom_write(const char *buf, unsigned int len); + +/* Multiprocessor operations... */ +#ifdef CONFIG_SMP +/* Start the CPU with the given device tree node at the passed program + * counter with the given arg passed in via register %o0. + */ +extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg); + +/* Start the CPU with the given cpu ID at the passed program + * counter with the given arg passed in via register %o0. + */ +extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg); + +/* Stop the CPU with the given cpu ID. */ +extern void prom_stopcpu_cpuid(int cpuid); + +/* Stop the current CPU. */ +extern void prom_stopself(void); + +/* Idle the current CPU. */ +extern void prom_idleself(void); + +/* Resume the CPU with the passed device tree node. */ +extern void prom_resumecpu(int cpunode); +#endif + +/* Power management interfaces. */ + +/* Put the current CPU to sleep. */ +extern void prom_sleepself(void); + +/* Put the entire system to sleep. */ +extern int prom_sleepsystem(void); + +/* Initiate a wakeup event. */ +extern int prom_wakeupsystem(void); + +/* MMU and memory related OBP interfaces. */ + +/* Get unique string identifying SIMM at given physical address. */ +extern int prom_getunumber(int syndrome_code, + unsigned long phys_addr, + char *buf, int buflen); + +/* Retain physical memory to the caller across soft resets. */ +extern unsigned long prom_retain(const char *name, + unsigned long pa_low, unsigned long pa_high, + long size, long align); + +/* Load explicit I/D TLB entries into the calling processor. */ +extern long prom_itlb_load(unsigned long index, + unsigned long tte_data, + unsigned long vaddr); + +extern long prom_dtlb_load(unsigned long index, + unsigned long tte_data, + unsigned long vaddr); + +/* Map/Unmap client program address ranges. First the format of + * the mapping mode argument. + */ +#define PROM_MAP_WRITE 0x0001 /* Writable */ +#define PROM_MAP_READ 0x0002 /* Readable - sw */ +#define PROM_MAP_EXEC 0x0004 /* Executable - sw */ +#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */ +#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */ +#define PROM_MAP_SE 0x0040 /* Side-Effects */ +#define PROM_MAP_GLOB 0x0080 /* Global */ +#define PROM_MAP_IE 0x0100 /* Invert-Endianness */ +#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED) + +extern int prom_map(int mode, unsigned long size, + unsigned long vaddr, unsigned long paddr); +extern void prom_unmap(unsigned long size, unsigned long vaddr); + + +/* PROM device tree traversal functions... */ + +#ifdef PROMLIB_INTERNAL + +/* Internal version of prom_getchild. */ +extern int __prom_getchild(int parent_node); + +/* Internal version of prom_getsibling. */ +extern int __prom_getsibling(int node); + +#endif + +/* Get the child node of the given node, or zero if no child exists. */ +extern int prom_getchild(int parent_node); + +/* Get the next sibling node of the given node, or zero if no further + * siblings exist. + */ +extern int prom_getsibling(int node); + +/* Get the length, at the passed node, of the given property type. + * Returns -1 on error (ie. no such property at this node). + */ +extern int prom_getproplen(int thisnode, const char *property); + +/* Fetch the requested property using the given buffer. Returns + * the number of bytes the prom put into your buffer or -1 on error. + */ +extern int prom_getproperty(int thisnode, const char *property, + char *prop_buffer, int propbuf_size); + +/* Acquire an integer property. */ +extern int prom_getint(int node, const char *property); + +/* Acquire an integer property, with a default value. */ +extern int prom_getintdefault(int node, const char *property, int defval); + +/* Acquire a boolean property, 0=FALSE 1=TRUE. */ +extern int prom_getbool(int node, const char *prop); + +/* Acquire a string property, null string on error. */ +extern void prom_getstring(int node, const char *prop, char *buf, int bufsize); + +/* Does the passed node have the given "name"? YES=1 NO=0 */ +extern int prom_nodematch(int thisnode, const char *name); + +/* Search all siblings starting at the passed node for "name" matching + * the given string. Returns the node on success, zero on failure. + */ +extern int prom_searchsiblings(int node_start, const char *name); + +/* Return the first property type, as a string, for the given node. + * Returns a null string on error. Buffer should be at least 32B long. + */ +extern char *prom_firstprop(int node, char *buffer); + +/* Returns the next property after the passed property for the given + * node. Returns null string on failure. Buffer should be at least 32B long. + */ +extern char *prom_nextprop(int node, const char *prev_property, char *buffer); + +/* Returns 1 if the specified node has given property. */ +extern int prom_node_has_property(int node, const char *property); + +/* Returns phandle of the path specified */ +extern int prom_finddevice(const char *name); + +/* Set the indicated property at the given node with the passed value. + * Returns the number of bytes of your value that the prom took. + */ +extern int prom_setprop(int node, const char *prop_name, char *prop_value, + int value_size); + +extern int prom_pathtoinode(const char *path); +extern int prom_inst2pkg(int); +extern int prom_service_exists(const char *service_name); +extern void prom_sun4v_guest_soft_state(void); + +extern int prom_ihandle2path(int handle, char *buffer, int bufsize); + +/* Client interface level routines. */ +extern long p1275_cmd(const char *, long, ...); + +#if 0 +#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x)) +#else +#define P1275_SIZE(x) x +#endif + +/* We support at most 16 input and 1 output argument */ +#define P1275_ARG_NUMBER 0 +#define P1275_ARG_IN_STRING 1 +#define P1275_ARG_OUT_BUF 2 +#define P1275_ARG_OUT_32B 3 +#define P1275_ARG_IN_FUNCTION 4 +#define P1275_ARG_IN_BUF 5 +#define P1275_ARG_IN_64B 6 + +#define P1275_IN(x) ((x) & 0xf) +#define P1275_OUT(x) (((x) << 4) & 0xf0) +#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o)) +#define P1275_ARG(n,x) ((x) << ((n)*3 + 8)) + +#endif /* !(__SPARC64_OPLIB_H) */ diff --git a/include/asm-sparc/page.h b/include/asm-sparc/page.h index 14de518cc38..f32f49fcf75 100644 --- a/include/asm-sparc/page.h +++ b/include/asm-sparc/page.h @@ -1,163 +1,8 @@ -/* - * page.h: Various defines and such for MMU operations on the Sparc for - * the Linux kernel. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_PAGE_H -#define _SPARC_PAGE_H - -#ifdef CONFIG_SUN4 -#define PAGE_SHIFT 13 +#ifndef ___ASM_SPARC_PAGE_H +#define ___ASM_SPARC_PAGE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/page_64.h> #else -#define PAGE_SHIFT 12 +#include <asm-sparc/page_32.h> #endif -#ifndef __ASSEMBLY__ -/* I have my suspicions... -DaveM */ -#define PAGE_SIZE (1UL << PAGE_SHIFT) -#else -#define PAGE_SIZE (1 << PAGE_SHIFT) -#endif -#define PAGE_MASK (~(PAGE_SIZE-1)) - -#include <asm/btfixup.h> - -#ifndef __ASSEMBLY__ - -#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) -#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) -#define clear_user_page(addr, vaddr, page) \ - do { clear_page(addr); \ - sparc_flush_page_to_ram(page); \ - } while (0) -#define copy_user_page(to, from, vaddr, page) \ - do { copy_page(to, from); \ - sparc_flush_page_to_ram(page); \ - } while (0) - -/* The following structure is used to hold the physical - * memory configuration of the machine. This is filled in - * prom_meminit() and is later used by mem_init() to set up - * mem_map[]. We statically allocate SPARC_PHYS_BANKS+1 of - * these structs, this is arbitrary. The entry after the - * last valid one has num_bytes==0. - */ -struct sparc_phys_banks { - unsigned long base_addr; - unsigned long num_bytes; -}; - -#define SPARC_PHYS_BANKS 32 - -extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; - -/* Cache alias structure. Entry is valid if context != -1. */ -struct cache_palias { - unsigned long vaddr; - int context; -}; - -/* passing structs on the Sparc slow us down tremendously... */ - -/* #define STRICT_MM_TYPECHECKS */ - -#ifdef STRICT_MM_TYPECHECKS -/* - * These are used to make use of C type-checking.. - */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long iopte; } iopte_t; -typedef struct { unsigned long pmdv[16]; } pmd_t; -typedef struct { unsigned long pgd; } pgd_t; -typedef struct { unsigned long ctxd; } ctxd_t; -typedef struct { unsigned long pgprot; } pgprot_t; -typedef struct { unsigned long iopgprot; } iopgprot_t; - -#define pte_val(x) ((x).pte) -#define iopte_val(x) ((x).iopte) -#define pmd_val(x) ((x).pmdv[0]) -#define pgd_val(x) ((x).pgd) -#define ctxd_val(x) ((x).ctxd) -#define pgprot_val(x) ((x).pgprot) -#define iopgprot_val(x) ((x).iopgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __iopte(x) ((iopte_t) { (x) } ) -/* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */ -#define __pgd(x) ((pgd_t) { (x) } ) -#define __ctxd(x) ((ctxd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) -#define __iopgprot(x) ((iopgprot_t) { (x) } ) - -#else -/* - * .. while these make it easier on the compiler - */ -typedef unsigned long pte_t; -typedef unsigned long iopte_t; -typedef struct { unsigned long pmdv[16]; } pmd_t; -typedef unsigned long pgd_t; -typedef unsigned long ctxd_t; -typedef unsigned long pgprot_t; -typedef unsigned long iopgprot_t; - -#define pte_val(x) (x) -#define iopte_val(x) (x) -#define pmd_val(x) ((x).pmdv[0]) -#define pgd_val(x) (x) -#define ctxd_val(x) (x) -#define pgprot_val(x) (x) -#define iopgprot_val(x) (x) - -#define __pte(x) (x) -#define __iopte(x) (x) -/* #define __pmd(x) (x) */ /* XXX later */ -#define __pgd(x) (x) -#define __ctxd(x) (x) -#define __pgprot(x) (x) -#define __iopgprot(x) (x) - -#endif - -typedef struct page *pgtable_t; - -extern unsigned long sparc_unmapped_base; - -BTFIXUPDEF_SETHI(sparc_unmapped_base) - -#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) - -#else /* !(__ASSEMBLY__) */ - -#define __pgprot(x) (x) - -#endif /* !(__ASSEMBLY__) */ - -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) - -#define PAGE_OFFSET 0xf0000000 -#ifndef __ASSEMBLY__ -extern unsigned long phys_base; -extern unsigned long pfn_base; #endif -#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) -#define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) - -#define virt_to_phys __pa -#define phys_to_virt __va - -#define ARCH_PFN_OFFSET (pfn_base) -#define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) - -#define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) -#define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include <asm-generic/memory_model.h> -#include <asm-generic/page.h> - -#endif /* _SPARC_PAGE_H */ diff --git a/include/asm-sparc/page_32.h b/include/asm-sparc/page_32.h new file mode 100644 index 00000000000..14de518cc38 --- /dev/null +++ b/include/asm-sparc/page_32.h @@ -0,0 +1,163 @@ +/* + * page.h: Various defines and such for MMU operations on the Sparc for + * the Linux kernel. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_PAGE_H +#define _SPARC_PAGE_H + +#ifdef CONFIG_SUN4 +#define PAGE_SHIFT 13 +#else +#define PAGE_SHIFT 12 +#endif +#ifndef __ASSEMBLY__ +/* I have my suspicions... -DaveM */ +#define PAGE_SIZE (1UL << PAGE_SHIFT) +#else +#define PAGE_SIZE (1 << PAGE_SHIFT) +#endif +#define PAGE_MASK (~(PAGE_SIZE-1)) + +#include <asm/btfixup.h> + +#ifndef __ASSEMBLY__ + +#define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) +#define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) +#define clear_user_page(addr, vaddr, page) \ + do { clear_page(addr); \ + sparc_flush_page_to_ram(page); \ + } while (0) +#define copy_user_page(to, from, vaddr, page) \ + do { copy_page(to, from); \ + sparc_flush_page_to_ram(page); \ + } while (0) + +/* The following structure is used to hold the physical + * memory configuration of the machine. This is filled in + * prom_meminit() and is later used by mem_init() to set up + * mem_map[]. We statically allocate SPARC_PHYS_BANKS+1 of + * these structs, this is arbitrary. The entry after the + * last valid one has num_bytes==0. + */ +struct sparc_phys_banks { + unsigned long base_addr; + unsigned long num_bytes; +}; + +#define SPARC_PHYS_BANKS 32 + +extern struct sparc_phys_banks sp_banks[SPARC_PHYS_BANKS+1]; + +/* Cache alias structure. Entry is valid if context != -1. */ +struct cache_palias { + unsigned long vaddr; + int context; +}; + +/* passing structs on the Sparc slow us down tremendously... */ + +/* #define STRICT_MM_TYPECHECKS */ + +#ifdef STRICT_MM_TYPECHECKS +/* + * These are used to make use of C type-checking.. + */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long iopte; } iopte_t; +typedef struct { unsigned long pmdv[16]; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; +typedef struct { unsigned long ctxd; } ctxd_t; +typedef struct { unsigned long pgprot; } pgprot_t; +typedef struct { unsigned long iopgprot; } iopgprot_t; + +#define pte_val(x) ((x).pte) +#define iopte_val(x) ((x).iopte) +#define pmd_val(x) ((x).pmdv[0]) +#define pgd_val(x) ((x).pgd) +#define ctxd_val(x) ((x).ctxd) +#define pgprot_val(x) ((x).pgprot) +#define iopgprot_val(x) ((x).iopgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __iopte(x) ((iopte_t) { (x) } ) +/* #define __pmd(x) ((pmd_t) { (x) } ) */ /* XXX procedure with loop */ +#define __pgd(x) ((pgd_t) { (x) } ) +#define __ctxd(x) ((ctxd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) +#define __iopgprot(x) ((iopgprot_t) { (x) } ) + +#else +/* + * .. while these make it easier on the compiler + */ +typedef unsigned long pte_t; +typedef unsigned long iopte_t; +typedef struct { unsigned long pmdv[16]; } pmd_t; +typedef unsigned long pgd_t; +typedef unsigned long ctxd_t; +typedef unsigned long pgprot_t; +typedef unsigned long iopgprot_t; + +#define pte_val(x) (x) +#define iopte_val(x) (x) +#define pmd_val(x) ((x).pmdv[0]) +#define pgd_val(x) (x) +#define ctxd_val(x) (x) +#define pgprot_val(x) (x) +#define iopgprot_val(x) (x) + +#define __pte(x) (x) +#define __iopte(x) (x) +/* #define __pmd(x) (x) */ /* XXX later */ +#define __pgd(x) (x) +#define __ctxd(x) (x) +#define __pgprot(x) (x) +#define __iopgprot(x) (x) + +#endif + +typedef struct page *pgtable_t; + +extern unsigned long sparc_unmapped_base; + +BTFIXUPDEF_SETHI(sparc_unmapped_base) + +#define TASK_UNMAPPED_BASE BTFIXUP_SETHI(sparc_unmapped_base) + +#else /* !(__ASSEMBLY__) */ + +#define __pgprot(x) (x) + +#endif /* !(__ASSEMBLY__) */ + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +#define PAGE_OFFSET 0xf0000000 +#ifndef __ASSEMBLY__ +extern unsigned long phys_base; +extern unsigned long pfn_base; +#endif +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + phys_base) +#define __va(x) ((void *)((unsigned long) (x) - phys_base + PAGE_OFFSET)) + +#define virt_to_phys __pa +#define phys_to_virt __va + +#define ARCH_PFN_OFFSET (pfn_base) +#define virt_to_page(kaddr) (mem_map + ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT))) + +#define pfn_valid(pfn) (((pfn) >= (pfn_base)) && (((pfn)-(pfn_base)) < max_mapnr)) +#define virt_addr_valid(kaddr) ((((unsigned long)(kaddr)-PAGE_OFFSET)>>PAGE_SHIFT) < max_mapnr) + +#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#include <asm-generic/memory_model.h> +#include <asm-generic/page.h> + +#endif /* _SPARC_PAGE_H */ diff --git a/include/asm-sparc/page_64.h b/include/asm-sparc/page_64.h new file mode 100644 index 00000000000..93f0881b766 --- /dev/null +++ b/include/asm-sparc/page_64.h @@ -0,0 +1,142 @@ +#ifndef _SPARC64_PAGE_H +#define _SPARC64_PAGE_H + +#include <linux/const.h> + +#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) +#define PAGE_SHIFT 13 +#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) +#define PAGE_SHIFT 16 +#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) +#define PAGE_SHIFT 19 +#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) +#define PAGE_SHIFT 22 +#else +#error No page size specified in kernel configuration +#endif + +#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) +#define PAGE_MASK (~(PAGE_SIZE-1)) + +/* Flushing for D-cache alias handling is only needed if + * the page size is smaller than 16K. + */ +#if PAGE_SHIFT < 14 +#define DCACHE_ALIASING_POSSIBLE +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define HPAGE_SHIFT 22 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define HPAGE_SHIFT 19 +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define HPAGE_SHIFT 16 +#endif + +#ifdef CONFIG_HUGETLB_PAGE +#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) +#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) +#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) +#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA +#endif + +#ifndef __ASSEMBLY__ + +extern void _clear_page(void *page); +#define clear_page(X) _clear_page((void *)(X)) +struct page; +extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); +#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) +extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); + +/* Unlike sparc32, sparc64's parameter passing API is more + * sane in that structures which as small enough are passed + * in registers instead of on the stack. Thus, setting + * STRICT_MM_TYPECHECKS does not generate worse code so + * let's enable it to get the type checking. + */ + +#define STRICT_MM_TYPECHECKS + +#ifdef STRICT_MM_TYPECHECKS +/* These are used to make use of C type-checking.. */ +typedef struct { unsigned long pte; } pte_t; +typedef struct { unsigned long iopte; } iopte_t; +typedef struct { unsigned int pmd; } pmd_t; +typedef struct { unsigned int pgd; } pgd_t; +typedef struct { unsigned long pgprot; } pgprot_t; + +#define pte_val(x) ((x).pte) +#define iopte_val(x) ((x).iopte) +#define pmd_val(x) ((x).pmd) +#define pgd_val(x) ((x).pgd) +#define pgprot_val(x) ((x).pgprot) + +#define __pte(x) ((pte_t) { (x) } ) +#define __iopte(x) ((iopte_t) { (x) } ) +#define __pmd(x) ((pmd_t) { (x) } ) +#define __pgd(x) ((pgd_t) { (x) } ) +#define __pgprot(x) ((pgprot_t) { (x) } ) + +#else +/* .. while these make it easier on the compiler */ +typedef unsigned long pte_t; +typedef unsigned long iopte_t; +typedef unsigned int pmd_t; +typedef unsigned int pgd_t; +typedef unsigned long pgprot_t; + +#define pte_val(x) (x) +#define iopte_val(x) (x) +#define pmd_val(x) (x) +#define pgd_val(x) (x) +#define pgprot_val(x) (x) + +#define __pte(x) (x) +#define __iopte(x) (x) +#define __pmd(x) (x) +#define __pgd(x) (x) +#define __pgprot(x) (x) + +#endif /* (STRICT_MM_TYPECHECKS) */ + +typedef struct page *pgtable_t; + +#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ + (_AC(0x0000000070000000,UL)) : \ + (_AC(0xfffff80000000000,UL) + (1UL << 32UL))) + +#include <asm-generic/memory_model.h> + +#endif /* !(__ASSEMBLY__) */ + +/* to align the pointer to the (next) page boundary */ +#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) + +/* We used to stick this into a hard-coded global register (%g4) + * but that does not make sense anymore. + */ +#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL) + +#ifndef __ASSEMBLY__ + +#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) +#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) + +#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) + +#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) + +#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) + +#define virt_to_phys __pa +#define phys_to_virt __va + +#endif /* !(__ASSEMBLY__) */ + +#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ + VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) + +#include <asm-generic/page.h> + +#endif /* _SPARC64_PAGE_H */ diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h index b93b6c79e08..b807d52a480 100644 --- a/include/asm-sparc/pci.h +++ b/include/asm-sparc/pci.h @@ -1,170 +1,8 @@ -#ifndef __SPARC_PCI_H -#define __SPARC_PCI_H - -#ifdef __KERNEL__ - -/* Can be used to override the logic in pci_scan_bus for skipping - * already-configured bus numbers - to be used for buggy BIOSes - * or architectures with incomplete PCI setup by the loader. - */ -#define pcibios_assign_all_busses() 0 -#define pcibios_scan_all_fns(a, b) 0 - -#define PCIBIOS_MIN_IO 0UL -#define PCIBIOS_MIN_MEM 0UL - -#define PCI_IRQ_NONE 0xffffffff - -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* Dynamic DMA mapping stuff. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -#include <asm/scatterlist.h> - -struct pci_dev; - -/* Allocate and map kernel buffer using consistent mode DMA for a device. - * hwdev should be valid struct pci_dev pointer for PCI devices. - */ -extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); - -/* Free and unmap a consistent DMA buffer. - * cpu_addr is what was returned from pci_alloc_consistent, - * size must be the same as what as passed into pci_alloc_consistent, - * and likewise dma_addr must be the same as what *dma_addrp was set to. - * - * References to the memory and mappings assosciated with cpu_addr/dma_addr - * past this call are illegal. - */ -extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); - -/* Map a single buffer of the indicated size for DMA in streaming mode. - * The 32-bit bus address to use is returned. - * - * Once the device is given the dma address, the device owns this memory - * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. - */ -extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); - -/* Unmap a single streaming mode DMA translation. The dma_addr and size - * must match what was provided for in a previous pci_map_single call. All - * other usages are undefined. - * - * After this call, reads by the cpu to the buffer are guaranteed to see - * whatever the device wrote there. - */ -extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); - -/* pci_unmap_{single,page} is not a nop, thus... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -/* - * Same as above, only with pages instead of mapped addresses. - */ -extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, - unsigned long offset, size_t size, int direction); -extern void pci_unmap_page(struct pci_dev *hwdev, - dma_addr_t dma_address, size_t size, int direction); - -/* Map a set of buffers described by scatterlist in streaming - * mode for DMA. This is the scather-gather version of the - * above pci_map_single interface. Here the scatter gather list - * elements are each tagged with the appropriate dma address - * and length. They are obtained via sg_dma_{address,length}(SG). - * - * NOTE: An implementation may be able to use a smaller number of - * DMA address/length pairs than there are SG table elements. - * (for example via virtual mapping capabilities) - * The routine returns the number of addr/length pairs actually - * used, at most nents. - * - * Device ownership issues as mentioned above for pci_map_single are - * the same here. - */ -extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); - -/* Unmap a set of streaming mode DMA translations. - * Again, cpu read rules concerning calls here are the same as for - * pci_unmap_single() above. - */ -extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); - -/* Make physical memory consistent for a single - * streaming mode DMA translation after a transfer. - * - * If you perform a pci_map_single() but wish to interrogate the - * buffer using the cpu, yet do not wish to teardown the PCI dma - * mapping, you must call this function before doing so. At the - * next point you give the PCI dma address back to the card, you - * must first perform a pci_dma_sync_for_device, and then the device - * again owns the buffer. - */ -extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); -extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); - -/* Make physical memory consistent for a set of streaming - * mode DMA translations after a transfer. - * - * The same as pci_dma_sync_single_* but for a scatter-gather list, - * same rules and usage. - */ -extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); -extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); - -/* Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) -{ - return 1; -} - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - *strat = PCI_DMA_BURST_INFINITY; - *strategy_parameter = ~0UL; -} +#ifndef ___ASM_SPARC_PCI_H +#define ___ASM_SPARC_PCI_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/pci_64.h> +#else +#include <asm-sparc/pci_32.h> +#endif #endif - -#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) - -static inline int pci_dma_mapping_error(dma_addr_t dma_addr) -{ - return (dma_addr == PCI_DMA_ERROR_CODE); -} - -struct device_node; -extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); - -#endif /* __KERNEL__ */ - -/* generic pci stuff */ -#include <asm-generic/pci.h> - -#endif /* __SPARC_PCI_H */ diff --git a/include/asm-sparc/pci_32.h b/include/asm-sparc/pci_32.h new file mode 100644 index 00000000000..b93b6c79e08 --- /dev/null +++ b/include/asm-sparc/pci_32.h @@ -0,0 +1,170 @@ +#ifndef __SPARC_PCI_H +#define __SPARC_PCI_H + +#ifdef __KERNEL__ + +/* Can be used to override the logic in pci_scan_bus for skipping + * already-configured bus numbers - to be used for buggy BIOSes + * or architectures with incomplete PCI setup by the loader. + */ +#define pcibios_assign_all_busses() 0 +#define pcibios_scan_all_fns(a, b) 0 + +#define PCIBIOS_MIN_IO 0UL +#define PCIBIOS_MIN_MEM 0UL + +#define PCI_IRQ_NONE 0xffffffff + +static inline void pcibios_set_master(struct pci_dev *dev) +{ + /* No special bus mastering setup handling */ +} + +static inline void pcibios_penalize_isa_irq(int irq, int active) +{ + /* We don't do dynamic PCI IRQ allocation */ +} + +/* Dynamic DMA mapping stuff. + */ +#define PCI_DMA_BUS_IS_PHYS (0) + +#include <asm/scatterlist.h> + +struct pci_dev; + +/* Allocate and map kernel buffer using consistent mode DMA for a device. + * hwdev should be valid struct pci_dev pointer for PCI devices. + */ +extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle); + +/* Free and unmap a consistent DMA buffer. + * cpu_addr is what was returned from pci_alloc_consistent, + * size must be the same as what as passed into pci_alloc_consistent, + * and likewise dma_addr must be the same as what *dma_addrp was set to. + * + * References to the memory and mappings assosciated with cpu_addr/dma_addr + * past this call are illegal. + */ +extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); + +/* Map a single buffer of the indicated size for DMA in streaming mode. + * The 32-bit bus address to use is returned. + * + * Once the device is given the dma address, the device owns this memory + * until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed. + */ +extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction); + +/* Unmap a single streaming mode DMA translation. The dma_addr and size + * must match what was provided for in a previous pci_map_single call. All + * other usages are undefined. + * + * After this call, reads by the cpu to the buffer are guaranteed to see + * whatever the device wrote there. + */ +extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction); + +/* pci_unmap_{single,page} is not a nop, thus... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +/* + * Same as above, only with pages instead of mapped addresses. + */ +extern dma_addr_t pci_map_page(struct pci_dev *hwdev, struct page *page, + unsigned long offset, size_t size, int direction); +extern void pci_unmap_page(struct pci_dev *hwdev, + dma_addr_t dma_address, size_t size, int direction); + +/* Map a set of buffers described by scatterlist in streaming + * mode for DMA. This is the scather-gather version of the + * above pci_map_single interface. Here the scatter gather list + * elements are each tagged with the appropriate dma address + * and length. They are obtained via sg_dma_{address,length}(SG). + * + * NOTE: An implementation may be able to use a smaller number of + * DMA address/length pairs than there are SG table elements. + * (for example via virtual mapping capabilities) + * The routine returns the number of addr/length pairs actually + * used, at most nents. + * + * Device ownership issues as mentioned above for pci_map_single are + * the same here. + */ +extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction); + +/* Unmap a set of streaming mode DMA translations. + * Again, cpu read rules concerning calls here are the same as for + * pci_unmap_single() above. + */ +extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction); + +/* Make physical memory consistent for a single + * streaming mode DMA translation after a transfer. + * + * If you perform a pci_map_single() but wish to interrogate the + * buffer using the cpu, yet do not wish to teardown the PCI dma + * mapping, you must call this function before doing so. At the + * next point you give the PCI dma address back to the card, you + * must first perform a pci_dma_sync_for_device, and then the device + * again owns the buffer. + */ +extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); +extern void pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction); + +/* Make physical memory consistent for a set of streaming + * mode DMA translations after a transfer. + * + * The same as pci_dma_sync_single_* but for a scatter-gather list, + * same rules and usage. + */ +extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); +extern void pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction); + +/* Return whether the given PCI device DMA address mask can + * be supported properly. For example, if your device can + * only drive the low 24-bits during PCI bus mastering, then + * you would pass 0x00ffffff as the mask to this function. + */ +static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) +{ + return 1; +} + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + *strat = PCI_DMA_BURST_INFINITY; + *strategy_parameter = ~0UL; +} +#endif + +#define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) + +static inline int pci_dma_mapping_error(dma_addr_t dma_addr) +{ + return (dma_addr == PCI_DMA_ERROR_CODE); +} + +struct device_node; +extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); + +#endif /* __KERNEL__ */ + +/* generic pci stuff */ +#include <asm-generic/pci.h> + +#endif /* __SPARC_PCI_H */ diff --git a/include/asm-sparc/pci_64.h b/include/asm-sparc/pci_64.h new file mode 100644 index 00000000000..f59f2571295 --- /dev/null +++ b/include/asm-sparc/pci_64.h @@ -0,0 +1,209 @@ +#ifndef __SPARC64_PCI_H +#define __SPARC64_PCI_H + +#ifdef __KERNEL__ + +#include <linux/dma-mapping.h> + +/* Can be used to override the logic in pci_scan_bus for skipping + * already-configured bus numbers - to be used for buggy BIOSes + * or architectures with incomplete PCI setup by the loader. + */ +#define pcibios_assign_all_busses() 0 +#define pcibios_scan_all_fns(a, b) 0 + +#define PCIBIOS_MIN_IO 0UL +#define PCIBIOS_MIN_MEM 0UL + +#define PCI_IRQ_NONE 0xffffffff + +#define PCI_CACHE_LINE_BYTES 64 + +static inline void pcibios_set_master(struct pci_dev *dev) +{ + /* No special bus mastering setup handling */ +} + +static inline void pcibios_penalize_isa_irq(int irq, int active) +{ + /* We don't do dynamic PCI IRQ allocation */ +} + +/* The PCI address space does not equal the physical memory + * address space. The networking and block device layers use + * this boolean for bounce buffer decisions. + */ +#define PCI_DMA_BUS_IS_PHYS (0) + +static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, + dma_addr_t *dma_handle) +{ + return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); +} + +static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); +} + +static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, + size_t size, int direction) +{ + return dma_map_single(&pdev->dev, ptr, size, + (enum dma_data_direction) direction); +} + +static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, + size_t size, int direction) +{ + dma_unmap_single(&pdev->dev, dma_addr, size, + (enum dma_data_direction) direction); +} + +#define pci_map_page(dev, page, off, size, dir) \ + pci_map_single(dev, (page_address(page) + (off)), size, dir) +#define pci_unmap_page(dev,addr,sz,dir) \ + pci_unmap_single(dev,addr,sz,dir) + +/* pci_unmap_{single,page} is not a nop, thus... */ +#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ + dma_addr_t ADDR_NAME; +#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ + __u32 LEN_NAME; +#define pci_unmap_addr(PTR, ADDR_NAME) \ + ((PTR)->ADDR_NAME) +#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ + (((PTR)->ADDR_NAME) = (VAL)) +#define pci_unmap_len(PTR, LEN_NAME) \ + ((PTR)->LEN_NAME) +#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ + (((PTR)->LEN_NAME) = (VAL)) + +static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, + int nents, int direction) +{ + return dma_map_sg(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, + int nents, int direction) +{ + dma_unmap_sg(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, + struct scatterlist *sg, + int nents, int direction) +{ + dma_sync_sg_for_cpu(&pdev->dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, + struct scatterlist *sg, + int nelems, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +/* Return whether the given PCI device DMA address mask can + * be supported properly. For example, if your device can + * only drive the low 24-bits during PCI bus mastering, then + * you would pass 0x00ffffff as the mask to this function. + */ +extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); + +/* PCI IOMMU mapping bypass support. */ + +/* PCI 64-bit addressing works for all slots on all controller + * types on sparc64. However, it requires that the device + * can drive enough of the 64 bits. + */ +#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) +#define PCI64_ADDR_BASE 0xfffc000000000000UL + +static inline int pci_dma_mapping_error(dma_addr_t dma_addr) +{ + return dma_mapping_error(dma_addr); +} + +#ifdef CONFIG_PCI +static inline void pci_dma_burst_advice(struct pci_dev *pdev, + enum pci_dma_burst_strategy *strat, + unsigned long *strategy_parameter) +{ + unsigned long cacheline_size; + u8 byte; + + pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); + if (byte == 0) + cacheline_size = 1024; + else + cacheline_size = (int) byte * 4; + + *strat = PCI_DMA_BURST_BOUNDARY; + *strategy_parameter = cacheline_size; +} +#endif + +/* Return the index of the PCI controller for device PDEV. */ + +extern int pci_domain_nr(struct pci_bus *bus); +static inline int pci_proc_domain(struct pci_bus *bus) +{ + return 1; +} + +/* Platform support for /proc/bus/pci/X/Y mmap()s. */ + +#define HAVE_PCI_MMAP +#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA +#define get_pci_unmapped_area get_fb_unmapped_area + +extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, + enum pci_mmap_state mmap_state, + int write_combine); + +extern void +pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, + struct resource *res); + +extern void +pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, + struct pci_bus_region *region); + +extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); + +static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) +{ + return PCI_IRQ_NONE; +} + +struct device_node; +extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); + +#define HAVE_ARCH_PCI_RESOURCE_TO_USER +extern void pci_resource_to_user(const struct pci_dev *dev, int bar, + const struct resource *rsrc, + resource_size_t *start, resource_size_t *end); +#endif /* __KERNEL__ */ + +#endif /* __SPARC64_PCI_H */ diff --git a/include/asm-sparc/percpu.h b/include/asm-sparc/percpu.h index 06066a7aaec..d98ed6cf2e3 100644 --- a/include/asm-sparc/percpu.h +++ b/include/asm-sparc/percpu.h @@ -1,6 +1,8 @@ -#ifndef __ARCH_SPARC_PERCPU__ -#define __ARCH_SPARC_PERCPU__ - -#include <asm-generic/percpu.h> - -#endif /* __ARCH_SPARC_PERCPU__ */ +#ifndef ___ASM_SPARC_PERCPU_H +#define ___ASM_SPARC_PERCPU_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/percpu_64.h> +#else +#include <asm-sparc/percpu_32.h> +#endif +#endif diff --git a/include/asm-sparc/percpu_32.h b/include/asm-sparc/percpu_32.h new file mode 100644 index 00000000000..06066a7aaec --- /dev/null +++ b/include/asm-sparc/percpu_32.h @@ -0,0 +1,6 @@ +#ifndef __ARCH_SPARC_PERCPU__ +#define __ARCH_SPARC_PERCPU__ + +#include <asm-generic/percpu.h> + +#endif /* __ARCH_SPARC_PERCPU__ */ diff --git a/include/asm-sparc/percpu_64.h b/include/asm-sparc/percpu_64.h new file mode 100644 index 00000000000..bee64593023 --- /dev/null +++ b/include/asm-sparc/percpu_64.h @@ -0,0 +1,28 @@ +#ifndef __ARCH_SPARC64_PERCPU__ +#define __ARCH_SPARC64_PERCPU__ + +#include <linux/compiler.h> + +register unsigned long __local_per_cpu_offset asm("g5"); + +#ifdef CONFIG_SMP + +extern void real_setup_per_cpu_areas(void); + +extern unsigned long __per_cpu_base; +extern unsigned long __per_cpu_shift; +#define __per_cpu_offset(__cpu) \ + (__per_cpu_base + ((unsigned long)(__cpu) << __per_cpu_shift)) +#define per_cpu_offset(x) (__per_cpu_offset(x)) + +#define __my_cpu_offset __local_per_cpu_offset + +#else /* ! SMP */ + +#define real_setup_per_cpu_areas() do { } while (0) + +#endif /* SMP */ + +#include <asm-generic/percpu.h> + +#endif /* __ARCH_SPARC64_PERCPU__ */ diff --git a/include/asm-sparc/pgalloc.h b/include/asm-sparc/pgalloc.h index 681582d2696..7fa02b53d39 100644 --- a/include/asm-sparc/pgalloc.h +++ b/include/asm-sparc/pgalloc.h @@ -1,68 +1,8 @@ -#ifndef _SPARC_PGALLOC_H -#define _SPARC_PGALLOC_H - -#include <linux/kernel.h> -#include <linux/sched.h> - -#include <asm/page.h> -#include <asm/btfixup.h> - -struct page; - -extern struct pgtable_cache_struct { - unsigned long *pgd_cache; - unsigned long *pte_cache; - unsigned long pgtable_cache_sz; - unsigned long pgd_cache_sz; -} pgt_quicklists; -#define pgd_quicklist (pgt_quicklists.pgd_cache) -#define pmd_quicklist ((unsigned long *)0) -#define pte_quicklist (pgt_quicklists.pte_cache) -#define pgtable_cache_size (pgt_quicklists.pgtable_cache_sz) -#define pgd_cache_size (pgt_quicklists.pgd_cache_sz) - -extern void check_pgt_cache(void); -BTFIXUPDEF_CALL(void, do_check_pgt_cache, int, int) -#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high) - -BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void) -#define get_pgd_fast() BTFIXUP_CALL(get_pgd_fast)() - -BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *) -#define free_pgd_fast(pgd) BTFIXUP_CALL(free_pgd_fast)(pgd) - -#define pgd_free(mm, pgd) free_pgd_fast(pgd) -#define pgd_alloc(mm) get_pgd_fast() - -BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *) -#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp) -#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) - -BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long) -#define pmd_alloc_one(mm, address) BTFIXUP_CALL(pmd_alloc_one)(mm, address) - -BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *) -#define free_pmd_fast(pmd) BTFIXUP_CALL(free_pmd_fast)(pmd) - -#define pmd_free(mm, pmd) free_pmd_fast(pmd) -#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) - -BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *) -#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE) -#define pmd_pgtable(pmd) pmd_page(pmd) -BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *) -#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE) - -BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long) -#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address) -BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long) -#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr) - -BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *) -#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte) - -BTFIXUPDEF_CALL(void, pte_free, pgtable_t ) -#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte) -#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) - -#endif /* _SPARC_PGALLOC_H */ +#ifndef ___ASM_SPARC_PGALLOC_H +#define ___ASM_SPARC_PGALLOC_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/pgalloc_64.h> +#else +#include <asm-sparc/pgalloc_32.h> +#endif +#endif diff --git a/include/asm-sparc/pgalloc_32.h b/include/asm-sparc/pgalloc_32.h new file mode 100644 index 00000000000..681582d2696 --- /dev/null +++ b/include/asm-sparc/pgalloc_32.h @@ -0,0 +1,68 @@ +#ifndef _SPARC_PGALLOC_H +#define _SPARC_PGALLOC_H + +#include <linux/kernel.h> +#include <linux/sched.h> + +#include <asm/page.h> +#include <asm/btfixup.h> + +struct page; + +extern struct pgtable_cache_struct { + unsigned long *pgd_cache; + unsigned long *pte_cache; + unsigned long pgtable_cache_sz; + unsigned long pgd_cache_sz; +} pgt_quicklists; +#define pgd_quicklist (pgt_quicklists.pgd_cache) +#define pmd_quicklist ((unsigned long *)0) +#define pte_quicklist (pgt_quicklists.pte_cache) +#define pgtable_cache_size (pgt_quicklists.pgtable_cache_sz) +#define pgd_cache_size (pgt_quicklists.pgd_cache_sz) + +extern void check_pgt_cache(void); +BTFIXUPDEF_CALL(void, do_check_pgt_cache, int, int) +#define do_check_pgt_cache(low,high) BTFIXUP_CALL(do_check_pgt_cache)(low,high) + +BTFIXUPDEF_CALL(pgd_t *, get_pgd_fast, void) +#define get_pgd_fast() BTFIXUP_CALL(get_pgd_fast)() + +BTFIXUPDEF_CALL(void, free_pgd_fast, pgd_t *) +#define free_pgd_fast(pgd) BTFIXUP_CALL(free_pgd_fast)(pgd) + +#define pgd_free(mm, pgd) free_pgd_fast(pgd) +#define pgd_alloc(mm) get_pgd_fast() + +BTFIXUPDEF_CALL(void, pgd_set, pgd_t *, pmd_t *) +#define pgd_set(pgdp,pmdp) BTFIXUP_CALL(pgd_set)(pgdp,pmdp) +#define pgd_populate(MM, PGD, PMD) pgd_set(PGD, PMD) + +BTFIXUPDEF_CALL(pmd_t *, pmd_alloc_one, struct mm_struct *, unsigned long) +#define pmd_alloc_one(mm, address) BTFIXUP_CALL(pmd_alloc_one)(mm, address) + +BTFIXUPDEF_CALL(void, free_pmd_fast, pmd_t *) +#define free_pmd_fast(pmd) BTFIXUP_CALL(free_pmd_fast)(pmd) + +#define pmd_free(mm, pmd) free_pmd_fast(pmd) +#define __pmd_free_tlb(tlb, pmd) pmd_free((tlb)->mm, pmd) + +BTFIXUPDEF_CALL(void, pmd_populate, pmd_t *, struct page *) +#define pmd_populate(MM, PMD, PTE) BTFIXUP_CALL(pmd_populate)(PMD, PTE) +#define pmd_pgtable(pmd) pmd_page(pmd) +BTFIXUPDEF_CALL(void, pmd_set, pmd_t *, pte_t *) +#define pmd_populate_kernel(MM, PMD, PTE) BTFIXUP_CALL(pmd_set)(PMD, PTE) + +BTFIXUPDEF_CALL(pgtable_t , pte_alloc_one, struct mm_struct *, unsigned long) +#define pte_alloc_one(mm, address) BTFIXUP_CALL(pte_alloc_one)(mm, address) +BTFIXUPDEF_CALL(pte_t *, pte_alloc_one_kernel, struct mm_struct *, unsigned long) +#define pte_alloc_one_kernel(mm, addr) BTFIXUP_CALL(pte_alloc_one_kernel)(mm, addr) + +BTFIXUPDEF_CALL(void, free_pte_fast, pte_t *) +#define pte_free_kernel(mm, pte) BTFIXUP_CALL(free_pte_fast)(pte) + +BTFIXUPDEF_CALL(void, pte_free, pgtable_t ) +#define pte_free(mm, pte) BTFIXUP_CALL(pte_free)(pte) +#define __pte_free_tlb(tlb, pte) pte_free((tlb)->mm, pte) + +#endif /* _SPARC_PGALLOC_H */ diff --git a/include/asm-sparc/pgalloc_64.h b/include/asm-sparc/pgalloc_64.h new file mode 100644 index 00000000000..5bdfa2c6e40 --- /dev/null +++ b/include/asm-sparc/pgalloc_64.h @@ -0,0 +1,81 @@ +#ifndef _SPARC64_PGALLOC_H +#define _SPARC64_PGALLOC_H + +#include <linux/kernel.h> +#include <linux/sched.h> +#include <linux/mm.h> +#include <linux/slab.h> +#include <linux/quicklist.h> + +#include <asm/spitfire.h> +#include <asm/cpudata.h> +#include <asm/cacheflush.h> +#include <asm/page.h> + +/* Page table allocation/freeing. */ + +static inline pgd_t *pgd_alloc(struct mm_struct *mm) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) +{ + quicklist_free(0, NULL, pgd); +} + +#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) + +static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) +{ + quicklist_free(0, NULL, pmd); +} + +static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, + unsigned long address) +{ + return quicklist_alloc(0, GFP_KERNEL, NULL); +} + +static inline pgtable_t pte_alloc_one(struct mm_struct *mm, + unsigned long address) +{ + struct page *page; + void *pg; + + pg = quicklist_alloc(0, GFP_KERNEL, NULL); + if (!pg) + return NULL; + page = virt_to_page(pg); + pgtable_page_ctor(page); + return page; +} + +static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) +{ + quicklist_free(0, NULL, pte); +} + +static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) +{ + pgtable_page_dtor(ptepage); + quicklist_free_page(0, NULL, ptepage); +} + + +#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) +#define pmd_populate(MM,PMD,PTE_PAGE) \ + pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) +#define pmd_pgtable(pmd) pmd_page(pmd) + +static inline void check_pgt_cache(void) +{ + quicklist_trim(0, NULL, 25, 16); +} + +#endif /* _SPARC64_PGALLOC_H */ diff --git a/include/asm-sparc/pgtable.h b/include/asm-sparc/pgtable.h index b63ac6b4119..63cdef53bc5 100644 --- a/include/asm-sparc/pgtable.h +++ b/include/asm-sparc/pgtable.h @@ -1,480 +1,8 @@ -#ifndef _SPARC_PGTABLE_H -#define _SPARC_PGTABLE_H - -/* asm-sparc/pgtable.h: Defines and functions used to work - * with Sparc page tables. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __ASSEMBLY__ -#include <asm-generic/4level-fixup.h> - -#include <linux/spinlock.h> -#include <linux/swap.h> -#include <asm/types.h> -#ifdef CONFIG_SUN4 -#include <asm/pgtsun4.h> +#ifndef ___ASM_SPARC_PGTABLE_H +#define ___ASM_SPARC_PGTABLE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/pgtable_64.h> #else -#include <asm/pgtsun4c.h> +#include <asm-sparc/pgtable_32.h> #endif -#include <asm/pgtsrmmu.h> -#include <asm/vac-ops.h> -#include <asm/oplib.h> -#include <asm/btfixup.h> -#include <asm/system.h> - - -struct vm_area_struct; -struct page; - -extern void load_mmu(void); -extern unsigned long calc_highpages(void); - -BTFIXUPDEF_SIMM13(pgdir_shift) -BTFIXUPDEF_SETHI(pgdir_size) -BTFIXUPDEF_SETHI(pgdir_mask) - -BTFIXUPDEF_SIMM13(ptrs_per_pmd) -BTFIXUPDEF_SIMM13(ptrs_per_pgd) -BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) - -#define pte_ERROR(e) __builtin_trap() -#define pmd_ERROR(e) __builtin_trap() -#define pgd_ERROR(e) __builtin_trap() - -BTFIXUPDEF_INT(page_none) -BTFIXUPDEF_INT(page_copy) -BTFIXUPDEF_INT(page_readonly) -BTFIXUPDEF_INT(page_kernel) - -#define PMD_SHIFT SUN4C_PMD_SHIFT -#define PMD_SIZE (1UL << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) -#define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) -#define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) -#define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) -#define PTRS_PER_PTE 1024 -#define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) -#define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) -#define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) -#define FIRST_USER_ADDRESS 0 -#define PTE_SIZE (PTRS_PER_PTE*4) - -#define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) -extern pgprot_t PAGE_SHARED; -#define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) -#define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) - -extern unsigned long page_kernel; - -#ifdef MODULE -#define PAGE_KERNEL page_kernel -#else -#define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) #endif - -/* Top-level page directory */ -extern pgd_t swapper_pg_dir[1024]; - -extern void paging_init(void); - -/* Page table for 0-4MB for everybody, on the Sparc this - * holds the same as on the i386. - */ -extern pte_t pg0[1024]; -extern pte_t pg1[1024]; -extern pte_t pg2[1024]; -extern pte_t pg3[1024]; - -extern unsigned long ptr_in_current_pgd; - -/* Here is a trick, since mmap.c need the initializer elements for - * protection_map[] to be constant at compile time, I set the following - * to all zeros. I set it to the real values after I link in the - * appropriate MMU page table routines at boot time. - */ -#define __P000 __pgprot(0) -#define __P001 __pgprot(0) -#define __P010 __pgprot(0) -#define __P011 __pgprot(0) -#define __P100 __pgprot(0) -#define __P101 __pgprot(0) -#define __P110 __pgprot(0) -#define __P111 __pgprot(0) - -#define __S000 __pgprot(0) -#define __S001 __pgprot(0) -#define __S010 __pgprot(0) -#define __S011 __pgprot(0) -#define __S100 __pgprot(0) -#define __S101 __pgprot(0) -#define __S110 __pgprot(0) -#define __S111 __pgprot(0) - -extern int num_contexts; - -/* First physical page can be anywhere, the following is needed so that - * va-->pa and vice versa conversions work properly without performance - * hit for all __pa()/__va() operations. - */ -extern unsigned long phys_base; -extern unsigned long pfn_base; - -/* - * BAD_PAGETABLE is used when we need a bogus page-table, while - * BAD_PAGE is used for a bogus page. - * - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern pte_t * __bad_pagetable(void); -extern pte_t __bad_page(void); -extern unsigned long empty_zero_page; - -#define BAD_PAGETABLE __bad_pagetable() -#define BAD_PAGE __bad_page() -#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) - -/* - */ -BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) -BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) - -#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) -#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) - -BTFIXUPDEF_SETHI(none_mask) -BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) -BTFIXUPDEF_CALL(void, pte_clear, pte_t *) - -static inline int pte_none(pte_t pte) -{ - return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); -} - -#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) -#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) - -BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) -BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) -BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) - -static inline int pmd_none(pmd_t pmd) -{ - return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); -} - -#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) -#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) -#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) - -BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) -BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) -BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) -BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) - -#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) -#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) -#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) -#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) - -/* - * The following only work if pte_present() is true. - * Undefined behaviour if not.. - */ -BTFIXUPDEF_HALF(pte_writei) -BTFIXUPDEF_HALF(pte_dirtyi) -BTFIXUPDEF_HALF(pte_youngi) - -static int pte_write(pte_t pte) __attribute_const__; -static inline int pte_write(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_writei); -} - -static int pte_dirty(pte_t pte) __attribute_const__; -static inline int pte_dirty(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); -} - -static int pte_young(pte_t pte) __attribute_const__; -static inline int pte_young(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_youngi); -} - -/* - * The following only work if pte_present() is not true. - */ -BTFIXUPDEF_HALF(pte_filei) - -static int pte_file(pte_t pte) __attribute_const__; -static inline int pte_file(pte_t pte) -{ - return pte_val(pte) & BTFIXUP_HALF(pte_filei); -} - -static inline int pte_special(pte_t pte) -{ - return 0; -} - -/* - */ -BTFIXUPDEF_HALF(pte_wrprotecti) -BTFIXUPDEF_HALF(pte_mkcleani) -BTFIXUPDEF_HALF(pte_mkoldi) - -static pte_t pte_wrprotect(pte_t pte) __attribute_const__; -static inline pte_t pte_wrprotect(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); -} - -static pte_t pte_mkclean(pte_t pte) __attribute_const__; -static inline pte_t pte_mkclean(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); -} - -static pte_t pte_mkold(pte_t pte) __attribute_const__; -static inline pte_t pte_mkold(pte_t pte) -{ - return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); -} - -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) -BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) - -#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) -#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) -#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) - -#define pte_mkspecial(pte) (pte) - -#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) - -BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) -#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) -#define pte_page(pte) pfn_to_page(pte_pfn(pte)) - -/* - * Conversion functions: convert a page and protection to a page entry, - * and a page entry and page directory to the page they refer to. - */ -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) - -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) -BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) -BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) - -#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) -#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) -#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) - -#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) - -BTFIXUPDEF_INT(pte_modify_mask) - -static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; -static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) -{ - return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | - pgprot_val(newprot)); -} - -#define pgd_index(address) ((address) >> PGDIR_SHIFT) - -/* to find an entry in a page-table-directory */ -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the second-level page table.. */ -BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) -#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) - -/* Find an entry in the third-level page table.. */ -BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) -#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) - -/* - * This shortcut works on sun4m (and sun4d) because the nocache area is static, - * and sun4c is guaranteed to have no highmem anyway. - */ -#define pte_offset_map(d, a) pte_offset_kernel(d,a) -#define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) - -#define pte_unmap(pte) do{}while(0) -#define pte_unmap_nested(pte) do{}while(0) - -/* Certain architectures need to do special things when pte's - * within a page table are directly modified. Thus, the following - * hook is made available. - */ - -BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) - -#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) -#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) - -struct seq_file; -BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) - -#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) - -/* Fault handler stuff... */ -#define FAULT_CODE_PROT 0x1 -#define FAULT_CODE_WRITE 0x2 -#define FAULT_CODE_USER 0x4 - -BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) - -#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) - -BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, - unsigned long, unsigned int) -BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) -#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) -#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) - -extern int invalid_segment; - -/* Encode and de-code a swap entry */ -BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) -BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) -BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) - -#define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) -#define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) -#define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) - -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* file-offset-in-pte helpers */ -BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); -BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); - -#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) -#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) - -/* - * This is made a constant because mm/fremap.c required a constant. - * Note that layout of these bits is different between sun4c.c and srmmu.c. - */ -#define PTE_FILE_MAX_BITS 24 - -/* - */ -struct ctx_list { - struct ctx_list *next; - struct ctx_list *prev; - unsigned int ctx_number; - struct mm_struct *ctx_mm; -}; - -extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ -extern struct ctx_list ctx_free; /* Head of free list */ -extern struct ctx_list ctx_used; /* Head of used contexts list */ - -#define NO_CONTEXT -1 - -static inline void remove_from_ctx_list(struct ctx_list *entry) -{ - entry->next->prev = entry->prev; - entry->prev->next = entry->next; -} - -static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) -{ - entry->next = head; - (entry->prev = head->prev)->next = entry; - head->prev = entry; -} -#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) -#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) - -static inline unsigned long -__get_phys (unsigned long addr) -{ - switch (sparc_cpu_model){ - case sun4: - case sun4c: - return sun4c_get_pte (addr) << PAGE_SHIFT; - case sun4m: - case sun4d: - return ((srmmu_get_pte (addr) & 0xffffff00) << 4); - default: - return 0; - } -} - -static inline int -__get_iospace (unsigned long addr) -{ - switch (sparc_cpu_model){ - case sun4: - case sun4c: - return -1; /* Don't check iospace on sun4c */ - case sun4m: - case sun4d: - return (srmmu_get_pte (addr) >> 28); - default: - return -1; - } -} - -extern unsigned long *sparc_valid_addr_bitmap; - -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -#define kern_addr_valid(addr) \ - (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) - -extern int io_remap_pfn_range(struct vm_area_struct *vma, - unsigned long from, unsigned long pfn, - unsigned long size, pgprot_t prot); - -/* - * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in - * its high 4 bits. These macros/functions put it there or get it from there. - */ -#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) -#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) -#define GET_PFN(pfn) (pfn & 0x0fffffffUL) - -#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS -#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ -({ \ - int __changed = !pte_same(*(__ptep), __entry); \ - if (__changed) { \ - set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ - flush_tlb_page(__vma, __address); \ - } \ - (sparc_cpu_model == sun4c) || __changed; \ -}) - -#include <asm-generic/pgtable.h> - -#endif /* !(__ASSEMBLY__) */ - -#define VMALLOC_START 0xfe600000 -/* XXX Alter this when I get around to fixing sun4c - Anton */ -#define VMALLOC_END 0xffc00000 - - -/* We provide our own get_unmapped_area to cope with VA holes for userland */ -#define HAVE_ARCH_UNMAPPED_AREA - -/* - * No page table caches to initialise - */ -#define pgtable_cache_init() do { } while (0) - -#endif /* !(_SPARC_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtable_32.h b/include/asm-sparc/pgtable_32.h new file mode 100644 index 00000000000..781bd4694a1 --- /dev/null +++ b/include/asm-sparc/pgtable_32.h @@ -0,0 +1,480 @@ +#ifndef _SPARC_PGTABLE_H +#define _SPARC_PGTABLE_H + +/* asm-sparc/pgtable.h: Defines and functions used to work + * with Sparc page tables. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __ASSEMBLY__ +#include <asm-generic/4level-fixup.h> + +#include <linux/spinlock.h> +#include <linux/swap.h> +#include <asm/types.h> +#ifdef CONFIG_SUN4 +#include <asm/pgtsun4.h> +#else +#include <asm/pgtsun4c.h> +#endif +#include <asm/pgtsrmmu.h> +#include <asm/vac-ops.h> +#include <asm/oplib.h> +#include <asm/btfixup.h> +#include <asm/system.h> + + +struct vm_area_struct; +struct page; + +extern void load_mmu(void); +extern unsigned long calc_highpages(void); + +BTFIXUPDEF_SIMM13(pgdir_shift) +BTFIXUPDEF_SETHI(pgdir_size) +BTFIXUPDEF_SETHI(pgdir_mask) + +BTFIXUPDEF_SIMM13(ptrs_per_pmd) +BTFIXUPDEF_SIMM13(ptrs_per_pgd) +BTFIXUPDEF_SIMM13(user_ptrs_per_pgd) + +#define pte_ERROR(e) __builtin_trap() +#define pmd_ERROR(e) __builtin_trap() +#define pgd_ERROR(e) __builtin_trap() + +BTFIXUPDEF_INT(page_none) +BTFIXUPDEF_INT(page_copy) +BTFIXUPDEF_INT(page_readonly) +BTFIXUPDEF_INT(page_kernel) + +#define PMD_SHIFT SUN4C_PMD_SHIFT +#define PMD_SIZE (1UL << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PMD_ALIGN(__addr) (((__addr) + ~PMD_MASK) & PMD_MASK) +#define PGDIR_SHIFT BTFIXUP_SIMM13(pgdir_shift) +#define PGDIR_SIZE BTFIXUP_SETHI(pgdir_size) +#define PGDIR_MASK BTFIXUP_SETHI(pgdir_mask) +#define PTRS_PER_PTE 1024 +#define PTRS_PER_PMD BTFIXUP_SIMM13(ptrs_per_pmd) +#define PTRS_PER_PGD BTFIXUP_SIMM13(ptrs_per_pgd) +#define USER_PTRS_PER_PGD BTFIXUP_SIMM13(user_ptrs_per_pgd) +#define FIRST_USER_ADDRESS 0 +#define PTE_SIZE (PTRS_PER_PTE*4) + +#define PAGE_NONE __pgprot(BTFIXUP_INT(page_none)) +extern pgprot_t PAGE_SHARED; +#define PAGE_COPY __pgprot(BTFIXUP_INT(page_copy)) +#define PAGE_READONLY __pgprot(BTFIXUP_INT(page_readonly)) + +extern unsigned long page_kernel; + +#ifdef MODULE +#define PAGE_KERNEL page_kernel +#else +#define PAGE_KERNEL __pgprot(BTFIXUP_INT(page_kernel)) +#endif + +/* Top-level page directory */ +extern pgd_t swapper_pg_dir[1024]; + +extern void paging_init(void); + +/* Page table for 0-4MB for everybody, on the Sparc this + * holds the same as on the i386. + */ +extern pte_t pg0[1024]; +extern pte_t pg1[1024]; +extern pte_t pg2[1024]; +extern pte_t pg3[1024]; + +extern unsigned long ptr_in_current_pgd; + +/* Here is a trick, since mmap.c need the initializer elements for + * protection_map[] to be constant at compile time, I set the following + * to all zeros. I set it to the real values after I link in the + * appropriate MMU page table routines at boot time. + */ +#define __P000 __pgprot(0) +#define __P001 __pgprot(0) +#define __P010 __pgprot(0) +#define __P011 __pgprot(0) +#define __P100 __pgprot(0) +#define __P101 __pgprot(0) +#define __P110 __pgprot(0) +#define __P111 __pgprot(0) + +#define __S000 __pgprot(0) +#define __S001 __pgprot(0) +#define __S010 __pgprot(0) +#define __S011 __pgprot(0) +#define __S100 __pgprot(0) +#define __S101 __pgprot(0) +#define __S110 __pgprot(0) +#define __S111 __pgprot(0) + +extern int num_contexts; + +/* First physical page can be anywhere, the following is needed so that + * va-->pa and vice versa conversions work properly without performance + * hit for all __pa()/__va() operations. + */ +extern unsigned long phys_base; +extern unsigned long pfn_base; + +/* + * BAD_PAGETABLE is used when we need a bogus page-table, while + * BAD_PAGE is used for a bogus page. + * + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern pte_t * __bad_pagetable(void); +extern pte_t __bad_page(void); +extern unsigned long empty_zero_page; + +#define BAD_PAGETABLE __bad_pagetable() +#define BAD_PAGE __bad_page() +#define ZERO_PAGE(vaddr) (virt_to_page(&empty_zero_page)) + +/* + */ +BTFIXUPDEF_CALL_CONST(struct page *, pmd_page, pmd_t) +BTFIXUPDEF_CALL_CONST(unsigned long, pgd_page_vaddr, pgd_t) + +#define pmd_page(pmd) BTFIXUP_CALL(pmd_page)(pmd) +#define pgd_page_vaddr(pgd) BTFIXUP_CALL(pgd_page_vaddr)(pgd) + +BTFIXUPDEF_SETHI(none_mask) +BTFIXUPDEF_CALL_CONST(int, pte_present, pte_t) +BTFIXUPDEF_CALL(void, pte_clear, pte_t *) + +static inline int pte_none(pte_t pte) +{ + return !(pte_val(pte) & ~BTFIXUP_SETHI(none_mask)); +} + +#define pte_present(pte) BTFIXUP_CALL(pte_present)(pte) +#define pte_clear(mm,addr,pte) BTFIXUP_CALL(pte_clear)(pte) + +BTFIXUPDEF_CALL_CONST(int, pmd_bad, pmd_t) +BTFIXUPDEF_CALL_CONST(int, pmd_present, pmd_t) +BTFIXUPDEF_CALL(void, pmd_clear, pmd_t *) + +static inline int pmd_none(pmd_t pmd) +{ + return !(pmd_val(pmd) & ~BTFIXUP_SETHI(none_mask)); +} + +#define pmd_bad(pmd) BTFIXUP_CALL(pmd_bad)(pmd) +#define pmd_present(pmd) BTFIXUP_CALL(pmd_present)(pmd) +#define pmd_clear(pmd) BTFIXUP_CALL(pmd_clear)(pmd) + +BTFIXUPDEF_CALL_CONST(int, pgd_none, pgd_t) +BTFIXUPDEF_CALL_CONST(int, pgd_bad, pgd_t) +BTFIXUPDEF_CALL_CONST(int, pgd_present, pgd_t) +BTFIXUPDEF_CALL(void, pgd_clear, pgd_t *) + +#define pgd_none(pgd) BTFIXUP_CALL(pgd_none)(pgd) +#define pgd_bad(pgd) BTFIXUP_CALL(pgd_bad)(pgd) +#define pgd_present(pgd) BTFIXUP_CALL(pgd_present)(pgd) +#define pgd_clear(pgd) BTFIXUP_CALL(pgd_clear)(pgd) + +/* + * The following only work if pte_present() is true. + * Undefined behaviour if not.. + */ +BTFIXUPDEF_HALF(pte_writei) +BTFIXUPDEF_HALF(pte_dirtyi) +BTFIXUPDEF_HALF(pte_youngi) + +static int pte_write(pte_t pte) __attribute_const__; +static inline int pte_write(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_writei); +} + +static int pte_dirty(pte_t pte) __attribute_const__; +static inline int pte_dirty(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_dirtyi); +} + +static int pte_young(pte_t pte) __attribute_const__; +static inline int pte_young(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_youngi); +} + +/* + * The following only work if pte_present() is not true. + */ +BTFIXUPDEF_HALF(pte_filei) + +static int pte_file(pte_t pte) __attribute_const__; +static inline int pte_file(pte_t pte) +{ + return pte_val(pte) & BTFIXUP_HALF(pte_filei); +} + +static inline int pte_special(pte_t pte) +{ + return 0; +} + +/* + */ +BTFIXUPDEF_HALF(pte_wrprotecti) +BTFIXUPDEF_HALF(pte_mkcleani) +BTFIXUPDEF_HALF(pte_mkoldi) + +static pte_t pte_wrprotect(pte_t pte) __attribute_const__; +static inline pte_t pte_wrprotect(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_wrprotecti)); +} + +static pte_t pte_mkclean(pte_t pte) __attribute_const__; +static inline pte_t pte_mkclean(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkcleani)); +} + +static pte_t pte_mkold(pte_t pte) __attribute_const__; +static inline pte_t pte_mkold(pte_t pte) +{ + return __pte(pte_val(pte) & ~BTFIXUP_HALF(pte_mkoldi)); +} + +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkwrite, pte_t) +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkdirty, pte_t) +BTFIXUPDEF_CALL_CONST(pte_t, pte_mkyoung, pte_t) + +#define pte_mkwrite(pte) BTFIXUP_CALL(pte_mkwrite)(pte) +#define pte_mkdirty(pte) BTFIXUP_CALL(pte_mkdirty)(pte) +#define pte_mkyoung(pte) BTFIXUP_CALL(pte_mkyoung)(pte) + +#define pte_mkspecial(pte) (pte) + +#define pfn_pte(pfn, prot) mk_pte(pfn_to_page(pfn), prot) + +BTFIXUPDEF_CALL(unsigned long, pte_pfn, pte_t) +#define pte_pfn(pte) BTFIXUP_CALL(pte_pfn)(pte) +#define pte_page(pte) pfn_to_page(pte_pfn(pte)) + +/* + * Conversion functions: convert a page and protection to a page entry, + * and a page entry and page directory to the page they refer to. + */ +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte, struct page *, pgprot_t) + +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_phys, unsigned long, pgprot_t) +BTFIXUPDEF_CALL_CONST(pte_t, mk_pte_io, unsigned long, pgprot_t, int) +BTFIXUPDEF_CALL_CONST(pgprot_t, pgprot_noncached, pgprot_t) + +#define mk_pte(page,pgprot) BTFIXUP_CALL(mk_pte)(page,pgprot) +#define mk_pte_phys(page,pgprot) BTFIXUP_CALL(mk_pte_phys)(page,pgprot) +#define mk_pte_io(page,pgprot,space) BTFIXUP_CALL(mk_pte_io)(page,pgprot,space) + +#define pgprot_noncached(pgprot) BTFIXUP_CALL(pgprot_noncached)(pgprot) + +BTFIXUPDEF_INT(pte_modify_mask) + +static pte_t pte_modify(pte_t pte, pgprot_t newprot) __attribute_const__; +static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) +{ + return __pte((pte_val(pte) & BTFIXUP_INT(pte_modify_mask)) | + pgprot_val(newprot)); +} + +#define pgd_index(address) ((address) >> PGDIR_SHIFT) + +/* to find an entry in a page-table-directory */ +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +BTFIXUPDEF_CALL(pmd_t *, pmd_offset, pgd_t *, unsigned long) +#define pmd_offset(dir,addr) BTFIXUP_CALL(pmd_offset)(dir,addr) + +/* Find an entry in the third-level page table.. */ +BTFIXUPDEF_CALL(pte_t *, pte_offset_kernel, pmd_t *, unsigned long) +#define pte_offset_kernel(dir,addr) BTFIXUP_CALL(pte_offset_kernel)(dir,addr) + +/* + * This shortcut works on sun4m (and sun4d) because the nocache area is static, + * and sun4c is guaranteed to have no highmem anyway. + */ +#define pte_offset_map(d, a) pte_offset_kernel(d,a) +#define pte_offset_map_nested(d, a) pte_offset_kernel(d,a) + +#define pte_unmap(pte) do{}while(0) +#define pte_unmap_nested(pte) do{}while(0) + +/* Certain architectures need to do special things when pte's + * within a page table are directly modified. Thus, the following + * hook is made available. + */ + +BTFIXUPDEF_CALL(void, set_pte, pte_t *, pte_t) + +#define set_pte(ptep,pteval) BTFIXUP_CALL(set_pte)(ptep,pteval) +#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval) + +struct seq_file; +BTFIXUPDEF_CALL(void, mmu_info, struct seq_file *) + +#define mmu_info(p) BTFIXUP_CALL(mmu_info)(p) + +/* Fault handler stuff... */ +#define FAULT_CODE_PROT 0x1 +#define FAULT_CODE_WRITE 0x2 +#define FAULT_CODE_USER 0x4 + +BTFIXUPDEF_CALL(void, update_mmu_cache, struct vm_area_struct *, unsigned long, pte_t) + +#define update_mmu_cache(vma,addr,pte) BTFIXUP_CALL(update_mmu_cache)(vma,addr,pte) + +BTFIXUPDEF_CALL(void, sparc_mapiorange, unsigned int, unsigned long, + unsigned long, unsigned int) +BTFIXUPDEF_CALL(void, sparc_unmapiorange, unsigned long, unsigned int) +#define sparc_mapiorange(bus,pa,va,len) BTFIXUP_CALL(sparc_mapiorange)(bus,pa,va,len) +#define sparc_unmapiorange(va,len) BTFIXUP_CALL(sparc_unmapiorange)(va,len) + +extern int invalid_segment; + +/* Encode and de-code a swap entry */ +BTFIXUPDEF_CALL(unsigned long, __swp_type, swp_entry_t) +BTFIXUPDEF_CALL(unsigned long, __swp_offset, swp_entry_t) +BTFIXUPDEF_CALL(swp_entry_t, __swp_entry, unsigned long, unsigned long) + +#define __swp_type(__x) BTFIXUP_CALL(__swp_type)(__x) +#define __swp_offset(__x) BTFIXUP_CALL(__swp_offset)(__x) +#define __swp_entry(__type,__off) BTFIXUP_CALL(__swp_entry)(__type,__off) + +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) + +/* file-offset-in-pte helpers */ +BTFIXUPDEF_CALL(unsigned long, pte_to_pgoff, pte_t pte); +BTFIXUPDEF_CALL(pte_t, pgoff_to_pte, unsigned long pgoff); + +#define pte_to_pgoff(pte) BTFIXUP_CALL(pte_to_pgoff)(pte) +#define pgoff_to_pte(off) BTFIXUP_CALL(pgoff_to_pte)(off) + +/* + * This is made a constant because mm/fremap.c required a constant. + * Note that layout of these bits is different between sun4c.c and srmmu.c. + */ +#define PTE_FILE_MAX_BITS 24 + +/* + */ +struct ctx_list { + struct ctx_list *next; + struct ctx_list *prev; + unsigned int ctx_number; + struct mm_struct *ctx_mm; +}; + +extern struct ctx_list *ctx_list_pool; /* Dynamically allocated */ +extern struct ctx_list ctx_free; /* Head of free list */ +extern struct ctx_list ctx_used; /* Head of used contexts list */ + +#define NO_CONTEXT -1 + +static inline void remove_from_ctx_list(struct ctx_list *entry) +{ + entry->next->prev = entry->prev; + entry->prev->next = entry->next; +} + +static inline void add_to_ctx_list(struct ctx_list *head, struct ctx_list *entry) +{ + entry->next = head; + (entry->prev = head->prev)->next = entry; + head->prev = entry; +} +#define add_to_free_ctxlist(entry) add_to_ctx_list(&ctx_free, entry) +#define add_to_used_ctxlist(entry) add_to_ctx_list(&ctx_used, entry) + +static inline unsigned long +__get_phys (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4: + case sun4c: + return sun4c_get_pte (addr) << PAGE_SHIFT; + case sun4m: + case sun4d: + return ((srmmu_get_pte (addr) & 0xffffff00) << 4); + default: + return 0; + } +} + +static inline int +__get_iospace (unsigned long addr) +{ + switch (sparc_cpu_model){ + case sun4: + case sun4c: + return -1; /* Don't check iospace on sun4c */ + case sun4m: + case sun4d: + return (srmmu_get_pte (addr) >> 28); + default: + return -1; + } +} + +extern unsigned long *sparc_valid_addr_bitmap; + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define kern_addr_valid(addr) \ + (test_bit(__pa((unsigned long)(addr))>>20, sparc_valid_addr_bitmap)) + +extern int io_remap_pfn_range(struct vm_area_struct *vma, + unsigned long from, unsigned long pfn, + unsigned long size, pgprot_t prot); + +/* + * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in + * its high 4 bits. These macros/functions put it there or get it from there. + */ +#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) +#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) +#define GET_PFN(pfn) (pfn & 0x0fffffffUL) + +#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS +#define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \ +({ \ + int __changed = !pte_same(*(__ptep), __entry); \ + if (__changed) { \ + set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \ + flush_tlb_page(__vma, __address); \ + } \ + (sparc_cpu_model == sun4c) || __changed; \ +}) + +#include <asm-generic/pgtable.h> + +#endif /* !(__ASSEMBLY__) */ + +#define VMALLOC_START 0xfe600000 +/* XXX Alter this when I get around to fixing sun4c - Anton */ +#define VMALLOC_END 0xffc00000 + + +/* We provide our own get_unmapped_area to cope with VA holes for userland */ +#define HAVE_ARCH_UNMAPPED_AREA + +/* + * No page table caches to initialise + */ +#define pgtable_cache_init() do { } while (0) + +#endif /* !(_SPARC_PGTABLE_H) */ diff --git a/include/asm-sparc/pgtable_64.h b/include/asm-sparc/pgtable_64.h new file mode 100644 index 00000000000..78d5594964a --- /dev/null +++ b/include/asm-sparc/pgtable_64.h @@ -0,0 +1,781 @@ +/* + * pgtable.h: SpitFire page table operations. + * + * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) + * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef _SPARC64_PGTABLE_H +#define _SPARC64_PGTABLE_H + +/* This file contains the functions and defines necessary to modify and use + * the SpitFire page tables. + */ + +#include <asm-generic/pgtable-nopud.h> + +#include <linux/compiler.h> +#include <linux/const.h> +#include <asm/types.h> +#include <asm/spitfire.h> +#include <asm/asi.h> +#include <asm/system.h> +#include <asm/page.h> +#include <asm/processor.h> + +/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). + * The page copy blockops can use 0x6000000 to 0x8000000. + * The TSB is mapped in the 0x8000000 to 0xa000000 range. + * The PROM resides in an area spanning 0xf0000000 to 0x100000000. + * The vmalloc area spans 0x100000000 to 0x200000000. + * Since modules need to be in the lowest 32-bits of the address space, + * we place them right before the OBP area from 0x10000000 to 0xf0000000. + * There is a single static kernel PMD which maps from 0x0 to address + * 0x400000000. + */ +#define TLBTEMP_BASE _AC(0x0000000006000000,UL) +#define TSBMAP_BASE _AC(0x0000000008000000,UL) +#define MODULES_VADDR _AC(0x0000000010000000,UL) +#define MODULES_LEN _AC(0x00000000e0000000,UL) +#define MODULES_END _AC(0x00000000f0000000,UL) +#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) +#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) +#define VMALLOC_START _AC(0x0000000100000000,UL) +#define VMALLOC_END _AC(0x0000000200000000,UL) +#define VMEMMAP_BASE _AC(0x0000000200000000,UL) + +#define vmemmap ((struct page *)VMEMMAP_BASE) + +/* XXX All of this needs to be rethought so we can take advantage + * XXX cheetah's full 64-bit virtual address space, ie. no more hole + * XXX in the middle like on spitfire. -DaveM + */ +/* + * Given a virtual address, the lowest PAGE_SHIFT bits determine offset + * into the page; the next higher PAGE_SHIFT-3 bits determine the pte# + * in the proper pagetable (the -3 is from the 8 byte ptes, and each page + * table is a single page long). The next higher PMD_BITS determine pmd# + * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) + * since the pmd entries are 4 bytes, and each pmd page is a single page + * long). Finally, the higher few bits determine pgde#. + */ + +/* PMD_SHIFT determines the size of the area a second-level page + * table can map + */ +#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) +#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) +#define PMD_MASK (~(PMD_SIZE-1)) +#define PMD_BITS (PAGE_SHIFT - 2) + +/* PGDIR_SHIFT determines what a third-level page table entry can map */ +#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS) +#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) +#define PGDIR_MASK (~(PGDIR_SIZE-1)) +#define PGDIR_BITS (PAGE_SHIFT - 2) + +#ifndef __ASSEMBLY__ + +#include <linux/sched.h> + +/* Entries per page directory level. */ +#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) +#define PTRS_PER_PMD (1UL << PMD_BITS) +#define PTRS_PER_PGD (1UL << PGDIR_BITS) + +/* Kernel has a separate 44bit address space. */ +#define FIRST_USER_ADDRESS 0 + +#define pte_ERROR(e) __builtin_trap() +#define pmd_ERROR(e) __builtin_trap() +#define pgd_ERROR(e) __builtin_trap() + +#endif /* !(__ASSEMBLY__) */ + +/* PTE bits which are the same in SUN4U and SUN4V format. */ +#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ +#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ + +/* SUN4U pte bits... */ +#define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ +#define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */ +#define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */ +#define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */ +#define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ +#define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ +#define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ +#define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ +#define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ +#define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ +#define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */ +#define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ +#define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */ +#define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */ +#define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */ +#define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */ +#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */ +#define _PAGE_FILE_4U _AC(0x0000000000000800,UL) /* Pagecache page */ +#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ +#define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */ +#define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */ +#define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */ +#define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */ +#define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ +#define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ +#define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */ +#define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */ +#define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */ + +/* SUN4V pte bits... */ +#define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */ +#define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */ +#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */ +#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ +#define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ +#define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ +#define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ +#define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ +#define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ +#define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */ +#define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */ +#define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */ +#define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */ +#define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */ +#define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */ +#define _PAGE_FILE_4V _AC(0x0000000000000020,UL) /* Pagecache page */ +#define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */ +#define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */ +#define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */ +#define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */ +#define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */ +#define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */ +#define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */ +#define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */ +#define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */ +#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ +#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ + +#if PAGE_SHIFT == 13 +#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U +#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V +#elif PAGE_SHIFT == 16 +#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U +#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V +#elif PAGE_SHIFT == 19 +#define _PAGE_SZBITS_4U _PAGE_SZ512K_4U +#define _PAGE_SZBITS_4V _PAGE_SZ512K_4V +#elif PAGE_SHIFT == 22 +#define _PAGE_SZBITS_4U _PAGE_SZ4MB_4U +#define _PAGE_SZBITS_4V _PAGE_SZ4MB_4V +#else +#error Wrong PAGE_SHIFT specified +#endif + +#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) +#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) +#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V +#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) +#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U +#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V +#endif + +/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */ +#define __P000 __pgprot(0) +#define __P001 __pgprot(0) +#define __P010 __pgprot(0) +#define __P011 __pgprot(0) +#define __P100 __pgprot(0) +#define __P101 __pgprot(0) +#define __P110 __pgprot(0) +#define __P111 __pgprot(0) + +#define __S000 __pgprot(0) +#define __S001 __pgprot(0) +#define __S010 __pgprot(0) +#define __S011 __pgprot(0) +#define __S100 __pgprot(0) +#define __S101 __pgprot(0) +#define __S110 __pgprot(0) +#define __S111 __pgprot(0) + +#ifndef __ASSEMBLY__ + +extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long); + +extern unsigned long pte_sz_bits(unsigned long size); + +extern pgprot_t PAGE_KERNEL; +extern pgprot_t PAGE_KERNEL_LOCKED; +extern pgprot_t PAGE_COPY; +extern pgprot_t PAGE_SHARED; + +/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */ +extern unsigned long _PAGE_IE; +extern unsigned long _PAGE_E; +extern unsigned long _PAGE_CACHE; + +extern unsigned long pg_iobits; +extern unsigned long _PAGE_ALL_SZ_BITS; +extern unsigned long _PAGE_SZBITS; + +extern struct page *mem_map_zero; +#define ZERO_PAGE(vaddr) (mem_map_zero) + +/* PFNs are real physical page numbers. However, mem_map only begins to record + * per-page information starting at pfn_base. This is to handle systems where + * the first physical page in the machine is at some huge physical address, + * such as 4GB. This is common on a partitioned E10000, for example. + */ +static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) +{ + unsigned long paddr = pfn << PAGE_SHIFT; + unsigned long sz_bits; + + sz_bits = 0UL; + if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) { + __asm__ __volatile__( + "\n661: sethi %%uhi(%1), %0\n" + " sllx %0, 32, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " nop\n" + " .previous\n" + : "=r" (sz_bits) + : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V)); + } + return __pte(paddr | sz_bits | pgprot_val(prot)); +} +#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) + +/* This one can be done with two shifts. */ +static inline unsigned long pte_pfn(pte_t pte) +{ + unsigned long ret; + + __asm__ __volatile__( + "\n661: sllx %1, %2, %0\n" + " srlx %0, %3, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sllx %1, %4, %0\n" + " srlx %0, %5, %0\n" + " .previous\n" + : "=r" (ret) + : "r" (pte_val(pte)), + "i" (21), "i" (21 + PAGE_SHIFT), + "i" (8), "i" (8 + PAGE_SHIFT)); + + return ret; +} +#define pte_page(x) pfn_to_page(pte_pfn(x)) + +static inline pte_t pte_modify(pte_t pte, pgprot_t prot) +{ + unsigned long mask, tmp; + + /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347) + * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8) + * + * Even if we use negation tricks the result is still a 6 + * instruction sequence, so don't try to play fancy and just + * do the most straightforward implementation. + * + * Note: We encode this into 3 sun4v 2-insn patch sequences. + */ + + __asm__ __volatile__( + "\n661: sethi %%uhi(%2), %1\n" + " sethi %%hi(%2), %0\n" + "\n662: or %1, %%ulo(%2), %1\n" + " or %0, %%lo(%2), %0\n" + "\n663: sllx %1, 32, %1\n" + " or %0, %1, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%3), %1\n" + " sethi %%hi(%3), %0\n" + " .word 662b\n" + " or %1, %%ulo(%3), %1\n" + " or %0, %%lo(%3), %0\n" + " .word 663b\n" + " sllx %1, 32, %1\n" + " or %0, %1, %0\n" + " .previous\n" + : "=r" (mask), "=r" (tmp) + : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | + _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | + _PAGE_SZBITS_4U), + "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | + _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | + _PAGE_SZBITS_4V)); + + return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); +} + +static inline pte_t pgoff_to_pte(unsigned long off) +{ + off <<= PAGE_SHIFT; + + __asm__ __volatile__( + "\n661: or %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " or %0, %3, %0\n" + " .previous\n" + : "=r" (off) + : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); + + return __pte(off); +} + +static inline pgprot_t pgprot_noncached(pgprot_t prot) +{ + unsigned long val = pgprot_val(prot); + + __asm__ __volatile__( + "\n661: andn %0, %2, %0\n" + " or %0, %3, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " andn %0, %4, %0\n" + " or %0, %5, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), + "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V)); + + return __pgprot(val); +} +/* Various pieces of code check for platform support by ifdef testing + * on "pgprot_noncached". That's broken and should be fixed, but for + * now... + */ +#define pgprot_noncached pgprot_noncached + +#ifdef CONFIG_HUGETLB_PAGE +static inline pte_t pte_mkhuge(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: sethi %%uhi(%1), %0\n" + " sllx %0, 32, %0\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " nop\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V)); + + return __pte(pte_val(pte) | mask); +} +#endif + +static inline pte_t pte_mkdirty(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: or %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " or %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), + "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkclean(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: andn %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " andn %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), + "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkwrite(pte_t pte) +{ + unsigned long val = pte_val(pte), mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); + + return __pte(val | mask); +} + +static inline pte_t pte_wrprotect(pte_t pte) +{ + unsigned long val = pte_val(pte), tmp; + + __asm__ __volatile__( + "\n661: andn %0, %3, %0\n" + " nop\n" + "\n662: nop\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%4), %1\n" + " sllx %1, 32, %1\n" + " .word 662b\n" + " or %1, %%lo(%4), %1\n" + " andn %0, %1, %0\n" + " .previous\n" + : "=r" (val), "=r" (tmp) + : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), + "i" (_PAGE_WRITE_4V | _PAGE_W_4V)); + + return __pte(val); +} + +static inline pte_t pte_mkold(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + mask |= _PAGE_R; + + return __pte(pte_val(pte) & ~mask); +} + +static inline pte_t pte_mkyoung(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + mask |= _PAGE_R; + + return __pte(pte_val(pte) | mask); +} + +static inline pte_t pte_mkspecial(pte_t pte) +{ + return pte; +} + +static inline unsigned long pte_young(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_dirty(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_write(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: mov %1, %0\n" + " nop\n" + " .section .sun4v_2insn_patch, \"ax\"\n" + " .word 661b\n" + " sethi %%uhi(%2), %0\n" + " sllx %0, 32, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_exec(pte_t pte) +{ + unsigned long mask; + + __asm__ __volatile__( + "\n661: sethi %%hi(%1), %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " mov %2, %0\n" + " .previous\n" + : "=r" (mask) + : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V)); + + return (pte_val(pte) & mask); +} + +static inline unsigned long pte_file(pte_t pte) +{ + unsigned long val = pte_val(pte); + + __asm__ __volatile__( + "\n661: and %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " and %0, %3, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); + + return val; +} + +static inline unsigned long pte_present(pte_t pte) +{ + unsigned long val = pte_val(pte); + + __asm__ __volatile__( + "\n661: and %0, %2, %0\n" + " .section .sun4v_1insn_patch, \"ax\"\n" + " .word 661b\n" + " and %0, %3, %0\n" + " .previous\n" + : "=r" (val) + : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); + + return val; +} + +static inline int pte_special(pte_t pte) +{ + return 0; +} + +#define pmd_set(pmdp, ptep) \ + (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL)) +#define pud_set(pudp, pmdp) \ + (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL)) +#define __pmd_page(pmd) \ + ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL))) +#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) +#define pud_page_vaddr(pud) \ + ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL))) +#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) +#define pmd_none(pmd) (!pmd_val(pmd)) +#define pmd_bad(pmd) (0) +#define pmd_present(pmd) (pmd_val(pmd) != 0U) +#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U) +#define pud_none(pud) (!pud_val(pud)) +#define pud_bad(pud) (0) +#define pud_present(pud) (pud_val(pud) != 0U) +#define pud_clear(pudp) (pud_val(*(pudp)) = 0U) + +/* Same in both SUN4V and SUN4U. */ +#define pte_none(pte) (!pte_val(pte)) + +/* to find an entry in a page-table-directory. */ +#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) +#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) + +/* to find an entry in a kernel page-table-directory */ +#define pgd_offset_k(address) pgd_offset(&init_mm, address) + +/* Find an entry in the second-level page table.. */ +#define pmd_offset(pudp, address) \ + ((pmd_t *) pud_page_vaddr(*(pudp)) + \ + (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))) + +/* Find an entry in the third-level page table.. */ +#define pte_index(dir, address) \ + ((pte_t *) __pmd_page(*(dir)) + \ + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) +#define pte_offset_kernel pte_index +#define pte_offset_map pte_index +#define pte_offset_map_nested pte_index +#define pte_unmap(pte) do { } while (0) +#define pte_unmap_nested(pte) do { } while (0) + +/* Actual page table PTE updates. */ +extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig); + +static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) +{ + pte_t orig = *ptep; + + *ptep = pte; + + /* It is more efficient to let flush_tlb_kernel_range() + * handle init_mm tlb flushes. + * + * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U + * and SUN4V pte layout, so this inline test is fine. + */ + if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID)) + tlb_batch_add(mm, addr, ptep, orig); +} + +#define pte_clear(mm,addr,ptep) \ + set_pte_at((mm), (addr), (ptep), __pte(0UL)) + +#ifdef DCACHE_ALIASING_POSSIBLE +#define __HAVE_ARCH_MOVE_PTE +#define move_pte(pte, prot, old_addr, new_addr) \ +({ \ + pte_t newpte = (pte); \ + if (tlb_type != hypervisor && pte_present(pte)) { \ + unsigned long this_pfn = pte_pfn(pte); \ + \ + if (pfn_valid(this_pfn) && \ + (((old_addr) ^ (new_addr)) & (1 << 13))) \ + flush_dcache_page_all(current->mm, \ + pfn_to_page(this_pfn)); \ + } \ + newpte; \ +}) +#endif + +extern pgd_t swapper_pg_dir[2048]; +extern pmd_t swapper_low_pmd_dir[2048]; + +extern void paging_init(void); +extern unsigned long find_ecache_flush_span(unsigned long size); + +/* These do nothing with the way I have things setup. */ +#define mmu_lockarea(vaddr, len) (vaddr) +#define mmu_unlockarea(vaddr, len) do { } while(0) + +struct vm_area_struct; +extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); + +/* Encode and de-code a swap entry */ +#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) +#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) +#define __swp_entry(type, offset) \ + ( (swp_entry_t) \ + { \ + (((long)(type) << PAGE_SHIFT) | \ + ((long)(offset) << (PAGE_SHIFT + 8UL))) \ + } ) +#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) +#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) + +/* File offset in PTE support. */ +extern unsigned long pte_file(pte_t); +#define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT) +extern pte_t pgoff_to_pte(unsigned long); +#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) + +extern unsigned long *sparc64_valid_addr_bitmap; + +/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ +#define kern_addr_valid(addr) \ + (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) + +extern int page_in_phys_avail(unsigned long paddr); + +extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, + unsigned long pfn, + unsigned long size, pgprot_t prot); + +/* + * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in + * its high 4 bits. These macros/functions put it there or get it from there. + */ +#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) +#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) +#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) + +#include <asm-generic/pgtable.h> + +/* We provide our own get_unmapped_area to cope with VA holes and + * SHM area cache aliasing for userland. + */ +#define HAVE_ARCH_UNMAPPED_AREA +#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN + +/* We provide a special get_unmapped_area for framebuffer mmaps to try and use + * the largest alignment possible such that larget PTEs can be used. + */ +extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, + unsigned long, unsigned long, + unsigned long); +#define HAVE_ARCH_FB_UNMAPPED_AREA + +extern void pgtable_cache_init(void); +extern void sun4v_register_fault_status(void); +extern void sun4v_ktsb_register(void); +extern void __init cheetah_ecache_flush_init(void); +extern void sun4v_patch_tlb_handlers(void); + +extern unsigned long cmdline_memory_size; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_SPARC64_PGTABLE_H) */ diff --git a/include/asm-sparc/posix_types.h b/include/asm-sparc/posix_types.h index dcc07eb5e18..58c820d75e8 100644 --- a/include/asm-sparc/posix_types.h +++ b/include/asm-sparc/posix_types.h @@ -1,118 +1,8 @@ -#ifndef __ARCH_SPARC_POSIX_TYPES_H -#define __ARCH_SPARC_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned int __kernel_size_t; -typedef int __kernel_ssize_t; -typedef long int __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_suseconds_t; -typedef long __kernel_clock_t; -typedef int __kernel_pid_t; -typedef unsigned short __kernel_ipc_pid_t; -typedef unsigned short __kernel_uid_t; -typedef unsigned short __kernel_gid_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned short __kernel_mode_t; -typedef unsigned short __kernel_umode_t; -typedef short __kernel_nlink_t; -typedef long __kernel_daddr_t; -typedef long __kernel_off_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef unsigned int __kernel_uid32_t; -typedef unsigned int __kernel_gid32_t; -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef unsigned short __kernel_old_dev_t; -typedef int __kernel_clockid_t; -typedef int __kernel_timer_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; +#ifndef ___ASM_SPARC_POSIX_TYPES_H +#define ___ASM_SPARC_POSIX_TYPES_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/posix_types_64.h> +#else +#include <asm-sparc/posix_types_32.h> +#endif #endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant cases (8 or 32 longs, - * for 256 and 1024-bit fd_sets respectively) - */ -#undef __FD_ZERO -static inline void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 32: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; - tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; - tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; - tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; - return; - case 16: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - return; - case 8: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - return; - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ diff --git a/include/asm-sparc/posix_types_32.h b/include/asm-sparc/posix_types_32.h new file mode 100644 index 00000000000..6bb6eb1ca0f --- /dev/null +++ b/include/asm-sparc/posix_types_32.h @@ -0,0 +1,118 @@ +#ifndef __ARCH_SPARC_POSIX_TYPES_H +#define __ARCH_SPARC_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned int __kernel_size_t; +typedef int __kernel_ssize_t; +typedef long int __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_suseconds_t; +typedef long __kernel_clock_t; +typedef int __kernel_pid_t; +typedef unsigned short __kernel_ipc_pid_t; +typedef unsigned short __kernel_uid_t; +typedef unsigned short __kernel_gid_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned short __kernel_mode_t; +typedef unsigned short __kernel_umode_t; +typedef short __kernel_nlink_t; +typedef long __kernel_daddr_t; +typedef long __kernel_off_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef unsigned int __kernel_uid32_t; +typedef unsigned int __kernel_gid32_t; +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +typedef unsigned short __kernel_old_dev_t; +typedef int __kernel_clockid_t; +typedef int __kernel_timer_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { + int val[2]; +} __kernel_fsid_t; + +#if defined(__KERNEL__) + +#undef __FD_SET +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] |= (1UL<<_rem); +} + +#undef __FD_CLR +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); +} + +#undef __FD_ISSET +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; +} + +/* + * This will unroll the loop for the normal constant cases (8 or 32 longs, + * for 256 and 1024-bit fd_sets respectively) + */ +#undef __FD_ZERO +static inline void __FD_ZERO(__kernel_fd_set *p) +{ + unsigned long *tmp = p->fds_bits; + int i; + + if (__builtin_constant_p(__FDSET_LONGS)) { + switch (__FDSET_LONGS) { + case 32: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; + tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; + tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; + tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; + return; + case 16: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + return; + case 8: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + return; + case 4: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + return; + } + } + i = __FDSET_LONGS; + while (i) { + i--; + *tmp = 0; + tmp++; + } +} + +#endif /* defined(__KERNEL__) */ + +#endif /* !(__ARCH_SPARC_POSIX_TYPES_H) */ diff --git a/include/asm-sparc/posix_types_64.h b/include/asm-sparc/posix_types_64.h new file mode 100644 index 00000000000..ba8f9329576 --- /dev/null +++ b/include/asm-sparc/posix_types_64.h @@ -0,0 +1,122 @@ +#ifndef __ARCH_SPARC64_POSIX_TYPES_H +#define __ARCH_SPARC64_POSIX_TYPES_H + +/* + * This file is generally used by user-level software, so you need to + * be a little careful about namespace pollution etc. Also, we cannot + * assume GCC is being used. + */ + +typedef unsigned long __kernel_size_t; +typedef long __kernel_ssize_t; +typedef long __kernel_ptrdiff_t; +typedef long __kernel_time_t; +typedef long __kernel_clock_t; +typedef int __kernel_pid_t; +typedef int __kernel_ipc_pid_t; +typedef unsigned int __kernel_uid_t; +typedef unsigned int __kernel_gid_t; +typedef unsigned long __kernel_ino_t; +typedef unsigned int __kernel_mode_t; +typedef unsigned short __kernel_umode_t; +typedef unsigned int __kernel_nlink_t; +typedef int __kernel_daddr_t; +typedef long __kernel_off_t; +typedef char * __kernel_caddr_t; +typedef unsigned short __kernel_uid16_t; +typedef unsigned short __kernel_gid16_t; +typedef int __kernel_clockid_t; +typedef int __kernel_timer_t; + +typedef unsigned short __kernel_old_uid_t; +typedef unsigned short __kernel_old_gid_t; +typedef __kernel_uid_t __kernel_uid32_t; +typedef __kernel_gid_t __kernel_gid32_t; + +typedef unsigned int __kernel_old_dev_t; + +/* Note this piece of asymmetry from the v9 ABI. */ +typedef int __kernel_suseconds_t; + +#ifdef __GNUC__ +typedef long long __kernel_loff_t; +#endif + +typedef struct { + int val[2]; +} __kernel_fsid_t; + +#if defined(__KERNEL__) + +#undef __FD_SET +static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] |= (1UL<<_rem); +} + +#undef __FD_CLR +static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); +} + +#undef __FD_ISSET +static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) +{ + unsigned long _tmp = fd / __NFDBITS; + unsigned long _rem = fd % __NFDBITS; + return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; +} + +/* + * This will unroll the loop for the normal constant cases (8 or 32 longs, + * for 256 and 1024-bit fd_sets respectively) + */ +#undef __FD_ZERO +static inline void __FD_ZERO(__kernel_fd_set *p) +{ + unsigned long *tmp = p->fds_bits; + int i; + + if (__builtin_constant_p(__FDSET_LONGS)) { + switch (__FDSET_LONGS) { + case 32: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; + tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; + tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; + tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; + return; + case 16: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; + tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; + return; + case 8: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; + return; + case 4: + tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; + return; + } + } + i = __FDSET_LONGS; + while (i) { + i--; + *tmp = 0; + tmp++; + } +} + +#endif /* defined(__KERNEL__) */ + +#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */ diff --git a/include/asm-sparc/processor.h b/include/asm-sparc/processor.h index 8898efbbbe0..11a66bb02ea 100644 --- a/include/asm-sparc/processor.h +++ b/include/asm-sparc/processor.h @@ -1,128 +1,8 @@ -/* include/asm-sparc/processor.h - * - * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASM_SPARC_PROCESSOR_H -#define __ASM_SPARC_PROCESSOR_H - -/* - * Sparc32 implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) - -#include <asm/psr.h> -#include <asm/ptrace.h> -#include <asm/head.h> -#include <asm/signal.h> -#include <asm/btfixup.h> -#include <asm/page.h> - -/* - * The sparc has no problems with write protection - */ -#define wp_works_ok 1 -#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ - -/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... - * That one page is used to protect kernel from intruders, so that - * we can make our access_ok test faster - */ -#define TASK_SIZE PAGE_OFFSET -#ifdef __KERNEL__ -#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) -#define STACK_TOP_MAX STACK_TOP -#endif /* __KERNEL__ */ - -struct task_struct; - -#ifdef __KERNEL__ -struct fpq { - unsigned long *insn_addr; - unsigned long insn; -}; +#ifndef ___ASM_SPARC_PROCESSOR_H +#define ___ASM_SPARC_PROCESSOR_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/processor_64.h> +#else +#include <asm-sparc/processor_32.h> #endif - -typedef struct { - int seg; -} mm_segment_t; - -/* The Sparc processor specific thread struct. */ -struct thread_struct { - struct pt_regs *kregs; - unsigned int _pad1; - - /* Special child fork kpsr/kwim values. */ - unsigned long fork_kpsr __attribute__ ((aligned (8))); - unsigned long fork_kwim; - - /* Floating point regs */ - unsigned long float_regs[32] __attribute__ ((aligned (8))); - unsigned long fsr; - unsigned long fpqdepth; - struct fpq fpqueue[16]; - unsigned long flags; - mm_segment_t current_ds; -}; - -#define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ -#define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ - -#define INIT_THREAD { \ - .flags = SPARC_FLAG_KTHREAD, \ - .current_ds = KERNEL_DS, \ -} - -/* Return saved PC of a blocked thread. */ -extern unsigned long thread_saved_pc(struct task_struct *t); - -/* Do necessary setup to start up a newly executed thread. */ -static inline void start_thread(struct pt_regs * regs, unsigned long pc, - unsigned long sp) -{ - register unsigned long zero asm("g1"); - - regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; - regs->pc = ((pc & (~3)) - 4); - regs->npc = regs->pc + 4; - regs->y = 0; - zero = 0; - __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" - "std\t%%g0, [%0 + %3 + 0x08]\n\t" - "std\t%%g0, [%0 + %3 + 0x10]\n\t" - "std\t%%g0, [%0 + %3 + 0x18]\n\t" - "std\t%%g0, [%0 + %3 + 0x20]\n\t" - "std\t%%g0, [%0 + %3 + 0x28]\n\t" - "std\t%%g0, [%0 + %3 + 0x30]\n\t" - "st\t%1, [%0 + %3 + 0x38]\n\t" - "st\t%%g0, [%0 + %3 + 0x3c]" - : /* no outputs */ - : "r" (regs), - "r" (sp - sizeof(struct reg_window)), - "r" (zero), - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) - : "memory"); -} - -/* Free all resources held by a thread. */ -#define release_thread(tsk) do { } while(0) -extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -extern unsigned long get_wchan(struct task_struct *); - -#define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) -#define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) - -#ifdef __KERNEL__ - -extern struct task_struct *last_task_used_math; - -#define cpu_relax() barrier() - #endif - -#endif /* __ASM_SPARC_PROCESSOR_H */ diff --git a/include/asm-sparc/processor_32.h b/include/asm-sparc/processor_32.h new file mode 100644 index 00000000000..562c0d69c53 --- /dev/null +++ b/include/asm-sparc/processor_32.h @@ -0,0 +1,128 @@ +/* include/asm-sparc/processor.h + * + * Copyright (C) 1994 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __ASM_SPARC_PROCESSOR_H +#define __ASM_SPARC_PROCESSOR_H + +/* + * Sparc32 implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ void *pc; __asm__("sethi %%hi(1f), %0; or %0, %%lo(1f), %0;\n1:" : "=r" (pc)); pc; }) + +#include <asm/psr.h> +#include <asm/ptrace.h> +#include <asm/head.h> +#include <asm/signal.h> +#include <asm/btfixup.h> +#include <asm/page.h> + +/* + * The sparc has no problems with write protection + */ +#define wp_works_ok 1 +#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ + +/* Whee, this is STACK_TOP + PAGE_SIZE and the lowest kernel address too... + * That one page is used to protect kernel from intruders, so that + * we can make our access_ok test faster + */ +#define TASK_SIZE PAGE_OFFSET +#ifdef __KERNEL__ +#define STACK_TOP (PAGE_OFFSET - PAGE_SIZE) +#define STACK_TOP_MAX STACK_TOP +#endif /* __KERNEL__ */ + +struct task_struct; + +#ifdef __KERNEL__ +struct fpq { + unsigned long *insn_addr; + unsigned long insn; +}; +#endif + +typedef struct { + int seg; +} mm_segment_t; + +/* The Sparc processor specific thread struct. */ +struct thread_struct { + struct pt_regs *kregs; + unsigned int _pad1; + + /* Special child fork kpsr/kwim values. */ + unsigned long fork_kpsr __attribute__ ((aligned (8))); + unsigned long fork_kwim; + + /* Floating point regs */ + unsigned long float_regs[32] __attribute__ ((aligned (8))); + unsigned long fsr; + unsigned long fpqdepth; + struct fpq fpqueue[16]; + unsigned long flags; + mm_segment_t current_ds; +}; + +#define SPARC_FLAG_KTHREAD 0x1 /* task is a kernel thread */ +#define SPARC_FLAG_UNALIGNED 0x2 /* is allowed to do unaligned accesses */ + +#define INIT_THREAD { \ + .flags = SPARC_FLAG_KTHREAD, \ + .current_ds = KERNEL_DS, \ +} + +/* Return saved PC of a blocked thread. */ +extern unsigned long thread_saved_pc(struct task_struct *t); + +/* Do necessary setup to start up a newly executed thread. */ +static inline void start_thread(struct pt_regs * regs, unsigned long pc, + unsigned long sp) +{ + register unsigned long zero asm("g1"); + + regs->psr = (regs->psr & (PSR_CWP)) | PSR_S; + regs->pc = ((pc & (~3)) - 4); + regs->npc = regs->pc + 4; + regs->y = 0; + zero = 0; + __asm__ __volatile__("std\t%%g0, [%0 + %3 + 0x00]\n\t" + "std\t%%g0, [%0 + %3 + 0x08]\n\t" + "std\t%%g0, [%0 + %3 + 0x10]\n\t" + "std\t%%g0, [%0 + %3 + 0x18]\n\t" + "std\t%%g0, [%0 + %3 + 0x20]\n\t" + "std\t%%g0, [%0 + %3 + 0x28]\n\t" + "std\t%%g0, [%0 + %3 + 0x30]\n\t" + "st\t%1, [%0 + %3 + 0x38]\n\t" + "st\t%%g0, [%0 + %3 + 0x3c]" + : /* no outputs */ + : "r" (regs), + "r" (sp - sizeof(struct reg_window)), + "r" (zero), + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0])) + : "memory"); +} + +/* Free all resources held by a thread. */ +#define release_thread(tsk) do { } while(0) +extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +/* Prepare to copy thread state - unlazy all lazy status */ +#define prepare_to_copy(tsk) do { } while (0) + +extern unsigned long get_wchan(struct task_struct *); + +#define KSTK_EIP(tsk) ((tsk)->thread.kregs->pc) +#define KSTK_ESP(tsk) ((tsk)->thread.kregs->u_regs[UREG_FP]) + +#ifdef __KERNEL__ + +extern struct task_struct *last_task_used_math; + +#define cpu_relax() barrier() + +#endif + +#endif /* __ASM_SPARC_PROCESSOR_H */ diff --git a/include/asm-sparc/processor_64.h b/include/asm-sparc/processor_64.h new file mode 100644 index 00000000000..70d42801a0d --- /dev/null +++ b/include/asm-sparc/processor_64.h @@ -0,0 +1,237 @@ +/* + * include/asm-sparc64/processor.h + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __ASM_SPARC64_PROCESSOR_H +#define __ASM_SPARC64_PROCESSOR_H + +/* + * Sparc64 implementation of macro that returns current + * instruction pointer ("program counter"). + */ +#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) + +#include <asm/asi.h> +#include <asm/pstate.h> +#include <asm/ptrace.h> +#include <asm/page.h> + +/* The sparc has no problems with write protection */ +#define wp_works_ok 1 +#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ + +/* + * User lives in his very own context, and cannot reference us. Note + * that TASK_SIZE is a misnomer, it really gives maximum user virtual + * address that the kernel will allocate out. + * + * XXX No longer using virtual page tables, kill this upper limit... + */ +#define VA_BITS 44 +#ifndef __ASSEMBLY__ +#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) +#else +#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) +#endif + +#define TASK_SIZE ((unsigned long)-VPTE_SIZE) +#define TASK_SIZE_OF(tsk) \ + (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ + (1UL << 32UL) : TASK_SIZE) +#ifdef __KERNEL__ + +#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) +#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) + +#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ + STACK_TOP32 : STACK_TOP64) + +#define STACK_TOP_MAX STACK_TOP64 + +#endif + +#ifndef __ASSEMBLY__ + +typedef struct { + unsigned char seg; +} mm_segment_t; + +/* The Sparc processor specific thread struct. */ +/* XXX This should die, everything can go into thread_info now. */ +struct thread_struct { +#ifdef CONFIG_DEBUG_SPINLOCK + /* How many spinlocks held by this thread. + * Used with spin lock debugging to catch tasks + * sleeping illegally with locks held. + */ + int smp_lock_count; + unsigned int smp_lock_pc; +#else + int dummy; /* f'in gcc bug... */ +#endif +}; + +#endif /* !(__ASSEMBLY__) */ + +#ifndef CONFIG_DEBUG_SPINLOCK +#define INIT_THREAD { \ + 0, \ +} +#else /* CONFIG_DEBUG_SPINLOCK */ +#define INIT_THREAD { \ +/* smp_lock_count, smp_lock_pc, */ \ + 0, 0, \ +} +#endif /* !(CONFIG_DEBUG_SPINLOCK) */ + +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +/* Return saved PC of a blocked thread. */ +struct task_struct; +extern unsigned long thread_saved_pc(struct task_struct *); + +/* On Uniprocessor, even in RMO processes see TSO semantics */ +#ifdef CONFIG_SMP +#define TSTATE_INITIAL_MM TSTATE_TSO +#else +#define TSTATE_INITIAL_MM TSTATE_RMO +#endif + +/* Do necessary setup to start up a newly executed thread. */ +#define start_thread(regs, pc, sp) \ +do { \ + unsigned long __asi = ASI_PNF; \ + regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ + regs->tpc = ((pc & (~3)) - 4); \ + regs->tnpc = regs->tpc + 4; \ + regs->y = 0; \ + set_thread_wstate(1 << 3); \ + if (current_thread_info()->utraps) { \ + if (*(current_thread_info()->utraps) < 2) \ + kfree(current_thread_info()->utraps); \ + else \ + (*(current_thread_info()->utraps))--; \ + current_thread_info()->utraps = NULL; \ + } \ + __asm__ __volatile__( \ + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ + "stx %1, [%0 + %2 + 0x70]\n\t" \ + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ + "wrpr %%g0, (1 << 3), %%wstate\n\t" \ + : \ + : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ +} while (0) + +#define start_thread32(regs, pc, sp) \ +do { \ + unsigned long __asi = ASI_PNF; \ + pc &= 0x00000000ffffffffUL; \ + sp &= 0x00000000ffffffffUL; \ + regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ + regs->tpc = ((pc & (~3)) - 4); \ + regs->tnpc = regs->tpc + 4; \ + regs->y = 0; \ + set_thread_wstate(2 << 3); \ + if (current_thread_info()->utraps) { \ + if (*(current_thread_info()->utraps) < 2) \ + kfree(current_thread_info()->utraps); \ + else \ + (*(current_thread_info()->utraps))--; \ + current_thread_info()->utraps = NULL; \ + } \ + __asm__ __volatile__( \ + "stx %%g0, [%0 + %2 + 0x00]\n\t" \ + "stx %%g0, [%0 + %2 + 0x08]\n\t" \ + "stx %%g0, [%0 + %2 + 0x10]\n\t" \ + "stx %%g0, [%0 + %2 + 0x18]\n\t" \ + "stx %%g0, [%0 + %2 + 0x20]\n\t" \ + "stx %%g0, [%0 + %2 + 0x28]\n\t" \ + "stx %%g0, [%0 + %2 + 0x30]\n\t" \ + "stx %%g0, [%0 + %2 + 0x38]\n\t" \ + "stx %%g0, [%0 + %2 + 0x40]\n\t" \ + "stx %%g0, [%0 + %2 + 0x48]\n\t" \ + "stx %%g0, [%0 + %2 + 0x50]\n\t" \ + "stx %%g0, [%0 + %2 + 0x58]\n\t" \ + "stx %%g0, [%0 + %2 + 0x60]\n\t" \ + "stx %%g0, [%0 + %2 + 0x68]\n\t" \ + "stx %1, [%0 + %2 + 0x70]\n\t" \ + "stx %%g0, [%0 + %2 + 0x78]\n\t" \ + "wrpr %%g0, (2 << 3), %%wstate\n\t" \ + : \ + : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ + "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ +} while (0) + +/* Free all resources held by a thread. */ +#define release_thread(tsk) do { } while (0) + +/* Prepare to copy thread state - unlazy all lazy status */ +#define prepare_to_copy(tsk) do { } while (0) + +extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); + +extern unsigned long get_wchan(struct task_struct *task); + +#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) +#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) +#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) + +#define cpu_relax() barrier() + +/* Prefetch support. This is tuned for UltraSPARC-III and later. + * UltraSPARC-I will treat these as nops, and UltraSPARC-II has + * a shallower prefetch queue than later chips. + */ +#define ARCH_HAS_PREFETCH +#define ARCH_HAS_PREFETCHW +#define ARCH_HAS_SPINLOCK_PREFETCH + +static inline void prefetch(const void *x) +{ + /* We do not use the read prefetch mnemonic because that + * prefetches into the prefetch-cache which only is accessible + * by floating point operations in UltraSPARC-III and later. + * By contrast, "#one_write" prefetches into the L2 cache + * in shared state. + */ + __asm__ __volatile__("prefetch [%0], #one_write" + : /* no outputs */ + : "r" (x)); +} + +static inline void prefetchw(const void *x) +{ + /* The most optimal prefetch to use for writes is + * "#n_writes". This brings the cacheline into the + * L2 cache in "owned" state. + */ + __asm__ __volatile__("prefetch [%0], #n_writes" + : /* no outputs */ + : "r" (x)); +} + +#define spin_lock_prefetch(x) prefetchw(x) + +#define HAVE_ARCH_PICK_MMAP_LAYOUT + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ diff --git a/include/asm-sparc/ptrace.h b/include/asm-sparc/ptrace.h index 11f3bc2bb3f..f36ab6c30ff 100644 --- a/include/asm-sparc/ptrace.h +++ b/include/asm-sparc/ptrace.h @@ -1,175 +1,8 @@ -#ifndef _SPARC_PTRACE_H -#define _SPARC_PTRACE_H - -#include <asm/psr.h> - -/* This struct defines the way the registers are stored on the - * stack during a system call and basically all traps. - */ - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> - -struct pt_regs { - unsigned long psr; - unsigned long pc; - unsigned long npc; - unsigned long y; - unsigned long u_regs[16]; /* globals and ins */ -}; - -#define UREG_G0 0 -#define UREG_G1 1 -#define UREG_G2 2 -#define UREG_G3 3 -#define UREG_G4 4 -#define UREG_G5 5 -#define UREG_G6 6 -#define UREG_G7 7 -#define UREG_I0 8 -#define UREG_I1 9 -#define UREG_I2 10 -#define UREG_I3 11 -#define UREG_I4 12 -#define UREG_I5 13 -#define UREG_I6 14 -#define UREG_I7 15 -#define UREG_WIM UREG_G0 -#define UREG_FADDR UREG_G0 -#define UREG_FP UREG_I6 -#define UREG_RETPC UREG_I7 - -static inline bool pt_regs_is_syscall(struct pt_regs *regs) -{ - return (regs->psr & PSR_SYSCALL); -} - -static inline bool pt_regs_clear_syscall(struct pt_regs *regs) -{ - return (regs->psr &= ~PSR_SYSCALL); -} - -/* A register window */ -struct reg_window { - unsigned long locals[8]; - unsigned long ins[8]; -}; - -/* A Sparc stack frame */ -struct sparc_stackf { - unsigned long locals[8]; - unsigned long ins[6]; - struct sparc_stackf *fp; - unsigned long callers_pc; - char *structptr; - unsigned long xargs[6]; - unsigned long xxargs[1]; -}; - -#define TRACEREG_SZ sizeof(struct pt_regs) -#define STACKFRAME_SZ sizeof(struct sparc_stackf) - -#ifdef __KERNEL__ - -#define user_mode(regs) (!((regs)->psr & PSR_PS)) -#define instruction_pointer(regs) ((regs)->pc) -unsigned long profile_pc(struct pt_regs *); -extern void show_regs(struct pt_regs *); +#ifndef ___ASM_SPARC_PTRACE_H +#define ___ASM_SPARC_PTRACE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/ptrace_64.h> +#else +#include <asm-sparc/ptrace_32.h> #endif - -#else /* __ASSEMBLY__ */ -/* For assembly code. */ -#define TRACEREG_SZ 0x50 -#define STACKFRAME_SZ 0x60 #endif - -/* - * The asm-offsets.h is a generated file, so we cannot include it. - * It may be OK for glibc headers, but it's utterly pointless for C code. - * The assembly code using those offsets has to include it explicitly. - */ -/* #include <asm/asm-offsets.h> */ - -/* These are for pt_regs. */ -#define PT_PSR 0x0 -#define PT_PC 0x4 -#define PT_NPC 0x8 -#define PT_Y 0xc -#define PT_G0 0x10 -#define PT_WIM PT_G0 -#define PT_G1 0x14 -#define PT_G2 0x18 -#define PT_G3 0x1c -#define PT_G4 0x20 -#define PT_G5 0x24 -#define PT_G6 0x28 -#define PT_G7 0x2c -#define PT_I0 0x30 -#define PT_I1 0x34 -#define PT_I2 0x38 -#define PT_I3 0x3c -#define PT_I4 0x40 -#define PT_I5 0x44 -#define PT_I6 0x48 -#define PT_FP PT_I6 -#define PT_I7 0x4c - -/* Reg_window offsets */ -#define RW_L0 0x00 -#define RW_L1 0x04 -#define RW_L2 0x08 -#define RW_L3 0x0c -#define RW_L4 0x10 -#define RW_L5 0x14 -#define RW_L6 0x18 -#define RW_L7 0x1c -#define RW_I0 0x20 -#define RW_I1 0x24 -#define RW_I2 0x28 -#define RW_I3 0x2c -#define RW_I4 0x30 -#define RW_I5 0x34 -#define RW_I6 0x38 -#define RW_I7 0x3c - -/* Stack_frame offsets */ -#define SF_L0 0x00 -#define SF_L1 0x04 -#define SF_L2 0x08 -#define SF_L3 0x0c -#define SF_L4 0x10 -#define SF_L5 0x14 -#define SF_L6 0x18 -#define SF_L7 0x1c -#define SF_I0 0x20 -#define SF_I1 0x24 -#define SF_I2 0x28 -#define SF_I3 0x2c -#define SF_I4 0x30 -#define SF_I5 0x34 -#define SF_FP 0x38 -#define SF_PC 0x3c -#define SF_RETP 0x40 -#define SF_XARG0 0x44 -#define SF_XARG1 0x48 -#define SF_XARG2 0x4c -#define SF_XARG3 0x50 -#define SF_XARG4 0x54 -#define SF_XARG5 0x58 -#define SF_XXARG 0x5c - -/* Stuff for the ptrace system call */ -#define PTRACE_SPARC_DETACH 11 -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_READDATA 16 -#define PTRACE_WRITEDATA 17 -#define PTRACE_READTEXT 18 -#define PTRACE_WRITETEXT 19 -#define PTRACE_GETFPAREGS 20 -#define PTRACE_SETFPAREGS 21 - -#endif /* !(_SPARC_PTRACE_H) */ diff --git a/include/asm-sparc/ptrace_32.h b/include/asm-sparc/ptrace_32.h new file mode 100644 index 00000000000..0401cc7ec38 --- /dev/null +++ b/include/asm-sparc/ptrace_32.h @@ -0,0 +1,175 @@ +#ifndef _SPARC_PTRACE_H +#define _SPARC_PTRACE_H + +#include <asm/psr.h> + +/* This struct defines the way the registers are stored on the + * stack during a system call and basically all traps. + */ + +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +struct pt_regs { + unsigned long psr; + unsigned long pc; + unsigned long npc; + unsigned long y; + unsigned long u_regs[16]; /* globals and ins */ +}; + +#define UREG_G0 0 +#define UREG_G1 1 +#define UREG_G2 2 +#define UREG_G3 3 +#define UREG_G4 4 +#define UREG_G5 5 +#define UREG_G6 6 +#define UREG_G7 7 +#define UREG_I0 8 +#define UREG_I1 9 +#define UREG_I2 10 +#define UREG_I3 11 +#define UREG_I4 12 +#define UREG_I5 13 +#define UREG_I6 14 +#define UREG_I7 15 +#define UREG_WIM UREG_G0 +#define UREG_FADDR UREG_G0 +#define UREG_FP UREG_I6 +#define UREG_RETPC UREG_I7 + +static inline bool pt_regs_is_syscall(struct pt_regs *regs) +{ + return (regs->psr & PSR_SYSCALL); +} + +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) +{ + return (regs->psr &= ~PSR_SYSCALL); +} + +/* A register window */ +struct reg_window { + unsigned long locals[8]; + unsigned long ins[8]; +}; + +/* A Sparc stack frame */ +struct sparc_stackf { + unsigned long locals[8]; + unsigned long ins[6]; + struct sparc_stackf *fp; + unsigned long callers_pc; + char *structptr; + unsigned long xargs[6]; + unsigned long xxargs[1]; +}; + +#define TRACEREG_SZ sizeof(struct pt_regs) +#define STACKFRAME_SZ sizeof(struct sparc_stackf) + +#ifdef __KERNEL__ + +#define user_mode(regs) (!((regs)->psr & PSR_PS)) +#define instruction_pointer(regs) ((regs)->pc) +unsigned long profile_pc(struct pt_regs *); +extern void show_regs(struct pt_regs *); +#endif + +#else /* __ASSEMBLY__ */ +/* For assembly code. */ +#define TRACEREG_SZ 0x50 +#define STACKFRAME_SZ 0x60 +#endif + +/* + * The asm-offsets.h is a generated file, so we cannot include it. + * It may be OK for glibc headers, but it's utterly pointless for C code. + * The assembly code using those offsets has to include it explicitly. + */ +/* #include <asm/asm-offsets.h> */ + +/* These are for pt_regs. */ +#define PT_PSR 0x0 +#define PT_PC 0x4 +#define PT_NPC 0x8 +#define PT_Y 0xc +#define PT_G0 0x10 +#define PT_WIM PT_G0 +#define PT_G1 0x14 +#define PT_G2 0x18 +#define PT_G3 0x1c +#define PT_G4 0x20 +#define PT_G5 0x24 +#define PT_G6 0x28 +#define PT_G7 0x2c +#define PT_I0 0x30 +#define PT_I1 0x34 +#define PT_I2 0x38 +#define PT_I3 0x3c +#define PT_I4 0x40 +#define PT_I5 0x44 +#define PT_I6 0x48 +#define PT_FP PT_I6 +#define PT_I7 0x4c + +/* Reg_window offsets */ +#define RW_L0 0x00 +#define RW_L1 0x04 +#define RW_L2 0x08 +#define RW_L3 0x0c +#define RW_L4 0x10 +#define RW_L5 0x14 +#define RW_L6 0x18 +#define RW_L7 0x1c +#define RW_I0 0x20 +#define RW_I1 0x24 +#define RW_I2 0x28 +#define RW_I3 0x2c +#define RW_I4 0x30 +#define RW_I5 0x34 +#define RW_I6 0x38 +#define RW_I7 0x3c + +/* Stack_frame offsets */ +#define SF_L0 0x00 +#define SF_L1 0x04 +#define SF_L2 0x08 +#define SF_L3 0x0c +#define SF_L4 0x10 +#define SF_L5 0x14 +#define SF_L6 0x18 +#define SF_L7 0x1c +#define SF_I0 0x20 +#define SF_I1 0x24 +#define SF_I2 0x28 +#define SF_I3 0x2c +#define SF_I4 0x30 +#define SF_I5 0x34 +#define SF_FP 0x38 +#define SF_PC 0x3c +#define SF_RETP 0x40 +#define SF_XARG0 0x44 +#define SF_XARG1 0x48 +#define SF_XARG2 0x4c +#define SF_XARG3 0x50 +#define SF_XARG4 0x54 +#define SF_XARG5 0x58 +#define SF_XXARG 0x5c + +/* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_READDATA 16 +#define PTRACE_WRITEDATA 17 +#define PTRACE_READTEXT 18 +#define PTRACE_WRITETEXT 19 +#define PTRACE_GETFPAREGS 20 +#define PTRACE_SETFPAREGS 21 + +#endif /* !(_SPARC_PTRACE_H) */ diff --git a/include/asm-sparc/ptrace_64.h b/include/asm-sparc/ptrace_64.h new file mode 100644 index 00000000000..a682e66d5c4 --- /dev/null +++ b/include/asm-sparc/ptrace_64.h @@ -0,0 +1,346 @@ +#ifndef _SPARC64_PTRACE_H +#define _SPARC64_PTRACE_H + +#include <asm/pstate.h> + +/* This struct defines the way the registers are stored on the + * stack during a system call and basically all traps. + */ + +/* This magic value must have the low 9 bits clear, + * as that is where we encode the %tt value, see below. + */ +#define PT_REGS_MAGIC 0x57ac6c00 + +#ifndef __ASSEMBLY__ + +#include <linux/types.h> + +struct pt_regs { + unsigned long u_regs[16]; /* globals and ins */ + unsigned long tstate; + unsigned long tpc; + unsigned long tnpc; + unsigned int y; + + /* We encode a magic number, PT_REGS_MAGIC, along + * with the %tt (trap type) register value at trap + * entry time. The magic number allows us to identify + * accurately a trap stack frame in the stack + * unwinder, and the %tt value allows us to test + * things like "in a system call" etc. for an arbitray + * process. + * + * The PT_REGS_MAGIC is choosen such that it can be + * loaded completely using just a sethi instruction. + */ + unsigned int magic; +}; + +static inline int pt_regs_trap_type(struct pt_regs *regs) +{ + return regs->magic & 0x1ff; +} + +static inline bool pt_regs_is_syscall(struct pt_regs *regs) +{ + return (regs->tstate & TSTATE_SYSCALL); +} + +static inline bool pt_regs_clear_syscall(struct pt_regs *regs) +{ + return (regs->tstate &= ~TSTATE_SYSCALL); +} + +struct pt_regs32 { + unsigned int psr; + unsigned int pc; + unsigned int npc; + unsigned int y; + unsigned int u_regs[16]; /* globals and ins */ +}; + +#define UREG_G0 0 +#define UREG_G1 1 +#define UREG_G2 2 +#define UREG_G3 3 +#define UREG_G4 4 +#define UREG_G5 5 +#define UREG_G6 6 +#define UREG_G7 7 +#define UREG_I0 8 +#define UREG_I1 9 +#define UREG_I2 10 +#define UREG_I3 11 +#define UREG_I4 12 +#define UREG_I5 13 +#define UREG_I6 14 +#define UREG_I7 15 +#define UREG_FP UREG_I6 +#define UREG_RETPC UREG_I7 + +/* A V9 register window */ +struct reg_window { + unsigned long locals[8]; + unsigned long ins[8]; +}; + +/* A 32-bit register window. */ +struct reg_window32 { + unsigned int locals[8]; + unsigned int ins[8]; +}; + +/* A V9 Sparc stack frame */ +struct sparc_stackf { + unsigned long locals[8]; + unsigned long ins[6]; + struct sparc_stackf *fp; + unsigned long callers_pc; + char *structptr; + unsigned long xargs[6]; + unsigned long xxargs[1]; +}; + +/* A 32-bit Sparc stack frame */ +struct sparc_stackf32 { + unsigned int locals[8]; + unsigned int ins[6]; + unsigned int fp; + unsigned int callers_pc; + unsigned int structptr; + unsigned int xargs[6]; + unsigned int xxargs[1]; +}; + +struct sparc_trapf { + unsigned long locals[8]; + unsigned long ins[8]; + unsigned long _unused; + struct pt_regs *regs; +}; + +#define TRACEREG_SZ sizeof(struct pt_regs) +#define STACKFRAME_SZ sizeof(struct sparc_stackf) + +#define TRACEREG32_SZ sizeof(struct pt_regs32) +#define STACKFRAME32_SZ sizeof(struct sparc_stackf32) + +#ifdef __KERNEL__ + +struct global_reg_snapshot { + unsigned long tstate; + unsigned long tpc; + unsigned long tnpc; + unsigned long o7; + unsigned long i7; + struct thread_info *thread; + unsigned long pad1; + unsigned long pad2; +}; + +#define __ARCH_WANT_COMPAT_SYS_PTRACE + +#define force_successful_syscall_return() \ +do { current_thread_info()->syscall_noerror = 1; \ +} while (0) +#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) +#define instruction_pointer(regs) ((regs)->tpc) +#define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) +#ifdef CONFIG_SMP +extern unsigned long profile_pc(struct pt_regs *); +#else +#define profile_pc(regs) instruction_pointer(regs) +#endif +extern void show_regs(struct pt_regs *); +extern void __show_regs(struct pt_regs *); +#endif + +#else /* __ASSEMBLY__ */ +/* For assembly code. */ +#define TRACEREG_SZ 0xa0 +#define STACKFRAME_SZ 0xc0 + +#define TRACEREG32_SZ 0x50 +#define STACKFRAME32_SZ 0x60 +#endif + +#ifdef __KERNEL__ +#define STACK_BIAS 2047 +#endif + +/* These are for pt_regs. */ +#define PT_V9_G0 0x00 +#define PT_V9_G1 0x08 +#define PT_V9_G2 0x10 +#define PT_V9_G3 0x18 +#define PT_V9_G4 0x20 +#define PT_V9_G5 0x28 +#define PT_V9_G6 0x30 +#define PT_V9_G7 0x38 +#define PT_V9_I0 0x40 +#define PT_V9_I1 0x48 +#define PT_V9_I2 0x50 +#define PT_V9_I3 0x58 +#define PT_V9_I4 0x60 +#define PT_V9_I5 0x68 +#define PT_V9_I6 0x70 +#define PT_V9_FP PT_V9_I6 +#define PT_V9_I7 0x78 +#define PT_V9_TSTATE 0x80 +#define PT_V9_TPC 0x88 +#define PT_V9_TNPC 0x90 +#define PT_V9_Y 0x98 +#define PT_V9_MAGIC 0x9c +#define PT_TSTATE PT_V9_TSTATE +#define PT_TPC PT_V9_TPC +#define PT_TNPC PT_V9_TNPC + +/* These for pt_regs32. */ +#define PT_PSR 0x0 +#define PT_PC 0x4 +#define PT_NPC 0x8 +#define PT_Y 0xc +#define PT_G0 0x10 +#define PT_WIM PT_G0 +#define PT_G1 0x14 +#define PT_G2 0x18 +#define PT_G3 0x1c +#define PT_G4 0x20 +#define PT_G5 0x24 +#define PT_G6 0x28 +#define PT_G7 0x2c +#define PT_I0 0x30 +#define PT_I1 0x34 +#define PT_I2 0x38 +#define PT_I3 0x3c +#define PT_I4 0x40 +#define PT_I5 0x44 +#define PT_I6 0x48 +#define PT_FP PT_I6 +#define PT_I7 0x4c + +/* Reg_window offsets */ +#define RW_V9_L0 0x00 +#define RW_V9_L1 0x08 +#define RW_V9_L2 0x10 +#define RW_V9_L3 0x18 +#define RW_V9_L4 0x20 +#define RW_V9_L5 0x28 +#define RW_V9_L6 0x30 +#define RW_V9_L7 0x38 +#define RW_V9_I0 0x40 +#define RW_V9_I1 0x48 +#define RW_V9_I2 0x50 +#define RW_V9_I3 0x58 +#define RW_V9_I4 0x60 +#define RW_V9_I5 0x68 +#define RW_V9_I6 0x70 +#define RW_V9_I7 0x78 + +#define RW_L0 0x00 +#define RW_L1 0x04 +#define RW_L2 0x08 +#define RW_L3 0x0c +#define RW_L4 0x10 +#define RW_L5 0x14 +#define RW_L6 0x18 +#define RW_L7 0x1c +#define RW_I0 0x20 +#define RW_I1 0x24 +#define RW_I2 0x28 +#define RW_I3 0x2c +#define RW_I4 0x30 +#define RW_I5 0x34 +#define RW_I6 0x38 +#define RW_I7 0x3c + +/* Stack_frame offsets */ +#define SF_V9_L0 0x00 +#define SF_V9_L1 0x08 +#define SF_V9_L2 0x10 +#define SF_V9_L3 0x18 +#define SF_V9_L4 0x20 +#define SF_V9_L5 0x28 +#define SF_V9_L6 0x30 +#define SF_V9_L7 0x38 +#define SF_V9_I0 0x40 +#define SF_V9_I1 0x48 +#define SF_V9_I2 0x50 +#define SF_V9_I3 0x58 +#define SF_V9_I4 0x60 +#define SF_V9_I5 0x68 +#define SF_V9_FP 0x70 +#define SF_V9_PC 0x78 +#define SF_V9_RETP 0x80 +#define SF_V9_XARG0 0x88 +#define SF_V9_XARG1 0x90 +#define SF_V9_XARG2 0x98 +#define SF_V9_XARG3 0xa0 +#define SF_V9_XARG4 0xa8 +#define SF_V9_XARG5 0xb0 +#define SF_V9_XXARG 0xb8 + +#define SF_L0 0x00 +#define SF_L1 0x04 +#define SF_L2 0x08 +#define SF_L3 0x0c +#define SF_L4 0x10 +#define SF_L5 0x14 +#define SF_L6 0x18 +#define SF_L7 0x1c +#define SF_I0 0x20 +#define SF_I1 0x24 +#define SF_I2 0x28 +#define SF_I3 0x2c +#define SF_I4 0x30 +#define SF_I5 0x34 +#define SF_FP 0x38 +#define SF_PC 0x3c +#define SF_RETP 0x40 +#define SF_XARG0 0x44 +#define SF_XARG1 0x48 +#define SF_XARG2 0x4c +#define SF_XARG3 0x50 +#define SF_XARG4 0x54 +#define SF_XARG5 0x58 +#define SF_XXARG 0x5c + +#ifdef __KERNEL__ + +/* global_reg_snapshot offsets */ +#define GR_SNAP_TSTATE 0x00 +#define GR_SNAP_TPC 0x08 +#define GR_SNAP_TNPC 0x10 +#define GR_SNAP_O7 0x18 +#define GR_SNAP_I7 0x20 +#define GR_SNAP_THREAD 0x28 +#define GR_SNAP_PAD1 0x30 +#define GR_SNAP_PAD2 0x38 + +#endif /* __KERNEL__ */ + +/* Stuff for the ptrace system call */ +#define PTRACE_SPARC_DETACH 11 +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_READDATA 16 +#define PTRACE_WRITEDATA 17 +#define PTRACE_READTEXT 18 +#define PTRACE_WRITETEXT 19 +#define PTRACE_GETFPAREGS 20 +#define PTRACE_SETFPAREGS 21 + +/* There are for debugging 64-bit processes, either from a 32 or 64 bit + * parent. Thus their complements are for debugging 32-bit processes only. + */ + +#define PTRACE_GETREGS64 22 +#define PTRACE_SETREGS64 23 +/* PTRACE_SYSCALL is 24 */ +#define PTRACE_GETFPREGS64 25 +#define PTRACE_SETFPREGS64 26 + +#endif /* !(_SPARC64_PTRACE_H) */ diff --git a/include/asm-sparc/reg.h b/include/asm-sparc/reg.h index ea0a7e590bb..cb34b0a49aa 100644 --- a/include/asm-sparc/reg.h +++ b/include/asm-sparc/reg.h @@ -1,79 +1,8 @@ -/* - * linux/include/asm-sparc/reg.h - * Layout of the registers as expected by gdb on the Sparc - * we should replace the user.h definitions with those in - * this file, we don't even use the other - * -miguel - * - * The names of the structures, constants and aliases in this file - * have the same names as the sunos ones, some programs rely on these - * names (gdb for example). - * - */ - -#ifndef __SPARC_REG_H -#define __SPARC_REG_H - -struct regs { - int r_psr; -#define r_ps r_psr - int r_pc; - int r_npc; - int r_y; - int r_g1; - int r_g2; - int r_g3; - int r_g4; - int r_g5; - int r_g6; - int r_g7; - int r_o0; - int r_o1; - int r_o2; - int r_o3; - int r_o4; - int r_o5; - int r_o6; - int r_o7; -}; - -struct fpq { - unsigned long *addr; - unsigned long instr; -}; - -struct fq { - union { - double whole; - struct fpq fpq; - } FQu; -}; - -#define FPU_REGS_TYPE unsigned int -#define FPU_FSR_TYPE unsigned - -struct fp_status { - union { - FPU_REGS_TYPE Fpu_regs[32]; - double Fpu_dregs[16]; - } fpu_fr; - FPU_FSR_TYPE Fpu_fsr; - unsigned Fpu_flags; - unsigned Fpu_extra; - unsigned Fpu_qcnt; - struct fq Fpu_q[16]; -}; - -#define fpu_regs f_fpstatus.fpu_fr.Fpu_regs -#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs -#define fpu_fsr f_fpstatus.Fpu_fsr -#define fpu_flags f_fpstatus.Fpu_flags -#define fpu_extra f_fpstatus.Fpu_extra -#define fpu_q f_fpstatus.Fpu_q -#define fpu_qcnt f_fpstatus.Fpu_qcnt - -struct fpu { - struct fp_status f_fpstatus; -}; - -#endif /* __SPARC_REG_H */ +#ifndef ___ASM_SPARC_REG_H +#define ___ASM_SPARC_REG_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/reg_64.h> +#else +#include <asm-sparc/reg_32.h> +#endif +#endif diff --git a/include/asm-sparc/reg_32.h b/include/asm-sparc/reg_32.h new file mode 100644 index 00000000000..42fecfcd97e --- /dev/null +++ b/include/asm-sparc/reg_32.h @@ -0,0 +1,79 @@ +/* + * linux/include/asm-sparc/reg.h + * Layout of the registers as expected by gdb on the Sparc + * we should replace the user.h definitions with those in + * this file, we don't even use the other + * -miguel + * + * The names of the structures, constants and aliases in this file + * have the same names as the sunos ones, some programs rely on these + * names (gdb for example). + * + */ + +#ifndef __SPARC_REG_H +#define __SPARC_REG_H + +struct regs { + int r_psr; +#define r_ps r_psr + int r_pc; + int r_npc; + int r_y; + int r_g1; + int r_g2; + int r_g3; + int r_g4; + int r_g5; + int r_g6; + int r_g7; + int r_o0; + int r_o1; + int r_o2; + int r_o3; + int r_o4; + int r_o5; + int r_o6; + int r_o7; +}; + +struct fpq { + unsigned long *addr; + unsigned long instr; +}; + +struct fq { + union { + double whole; + struct fpq fpq; + } FQu; +}; + +#define FPU_REGS_TYPE unsigned int +#define FPU_FSR_TYPE unsigned + +struct fp_status { + union { + FPU_REGS_TYPE Fpu_regs[32]; + double Fpu_dregs[16]; + } fpu_fr; + FPU_FSR_TYPE Fpu_fsr; + unsigned Fpu_flags; + unsigned Fpu_extra; + unsigned Fpu_qcnt; + struct fq Fpu_q[16]; +}; + +#define fpu_regs f_fpstatus.fpu_fr.Fpu_regs +#define fpu_dregs f_fpstatus.fpu_fr.Fpu_dregs +#define fpu_fsr f_fpstatus.Fpu_fsr +#define fpu_flags f_fpstatus.Fpu_flags +#define fpu_extra f_fpstatus.Fpu_extra +#define fpu_q f_fpstatus.Fpu_q +#define fpu_qcnt f_fpstatus.Fpu_qcnt + +struct fpu { + struct fp_status f_fpstatus; +}; + +#endif /* __SPARC_REG_H */ diff --git a/include/asm-sparc/reg_64.h b/include/asm-sparc/reg_64.h new file mode 100644 index 00000000000..eb24a07ff4d --- /dev/null +++ b/include/asm-sparc/reg_64.h @@ -0,0 +1,56 @@ +/* + * linux/asm-sparc64/reg.h + * Layout of the registers as expected by gdb on the Sparc + * we should replace the user.h definitions with those in + * this file, we don't even use the other + * -miguel + * + * The names of the structures, constants and aliases in this file + * have the same names as the sunos ones, some programs rely on these + * names (gdb for example). + * + */ + +#ifndef __SPARC64_REG_H +#define __SPARC64_REG_H + +struct regs { + unsigned long r_g1; + unsigned long r_g2; + unsigned long r_g3; + unsigned long r_g4; + unsigned long r_g5; + unsigned long r_g6; + unsigned long r_g7; + unsigned long r_o0; + unsigned long r_o1; + unsigned long r_o2; + unsigned long r_o3; + unsigned long r_o4; + unsigned long r_o5; + unsigned long r_o6; + unsigned long r_o7; + unsigned long __pad; + unsigned long r_tstate; + unsigned long r_tpc; + unsigned long r_tnpc; + unsigned int r_y; + unsigned int r_fprs; +}; + +#define FPU_REGS_TYPE unsigned int +#define FPU_FSR_TYPE unsigned long + +struct fp_status { + unsigned long fpu_fr[32]; + unsigned long Fpu_fsr; +}; + +struct fpu { + struct fp_status f_fpstatus; +}; + +#define fpu_regs f_fpstatus.fpu_fr +#define fpu_fsr f_fpstatus.Fpu_fsr + +#endif /* __SPARC64_REG_H */ diff --git a/include/asm-sparc/sbus.h b/include/asm-sparc/sbus.h index f1d2fe1c9a3..8f29a197966 100644 --- a/include/asm-sparc/sbus.h +++ b/include/asm-sparc/sbus.h @@ -1,153 +1,8 @@ -/* - * sbus.h: Defines for the Sun SBus. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SBUS_H -#define _SPARC_SBUS_H - -#include <linux/dma-mapping.h> -#include <linux/ioport.h> - -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> -#include <asm/scatterlist.h> - -/* We scan which devices are on the SBus using the PROM node device - * tree. SBus devices are described in two different ways. You can - * either get an absolute address at which to access the device, or - * you can get a SBus 'slot' number and an offset within that slot. - */ - -/* The base address at which to calculate device OBIO addresses. */ -#define SUN_SBUS_BVADDR 0xf8000000 -#define SBUS_OFF_MASK 0x01ffffff - -/* These routines are used to calculate device address from slot - * numbers + offsets, and vice versa. - */ - -static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) -{ - return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); -} - -static inline int sbus_dev_slot(unsigned long dev_addr) -{ - return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); -} - -struct sbus_bus; - -/* Linux SBUS device tables */ -struct sbus_dev { - struct of_device ofdev; - struct sbus_bus *bus; - struct sbus_dev *next; - struct sbus_dev *child; - struct sbus_dev *parent; - int prom_node; - char prom_name[64]; - int slot; - - struct resource resource[PROMREG_MAX]; - - struct linux_prom_registers reg_addrs[PROMREG_MAX]; - int num_registers; - - struct linux_prom_ranges device_ranges[PROMREG_MAX]; - int num_device_ranges; - - unsigned int irqs[4]; - int num_irqs; -}; -#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) - -/* This struct describes the SBus(s) found on this machine. */ -struct sbus_bus { - struct of_device ofdev; - struct sbus_dev *devices; /* Link to devices on this SBus */ - struct sbus_bus *next; /* next SBus, if more than one SBus */ - int prom_node; /* PROM device tree node for this SBus */ - char prom_name[64]; /* Usually "sbus" or "sbi" */ - int clock_freq; - - struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; - int num_sbus_ranges; - - int devid; - int board; -}; -#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) - -extern struct sbus_bus *sbus_root; - -static inline int -sbus_is_slave(struct sbus_dev *dev) -{ - /* XXX Have to write this for sun4c's */ - return 0; -} - -/* Device probing routines could find these handy */ -#define for_each_sbus(bus) \ - for((bus) = sbus_root; (bus); (bus)=(bus)->next) - -#define for_each_sbusdev(device, bus) \ - for((device) = (bus)->devices; (device); (device)=(device)->next) - -#define for_all_sbusdev(device, bus) \ - for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ - for ((device) = (bus)->devices; (device); (device) = (device)->next) - -/* Driver DVMA interfaces. */ -#define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */ -#define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */ -extern void sbus_set_sbus64(struct sbus_dev *, int); -extern void sbus_fill_device_irq(struct sbus_dev *); - -/* These yield IOMMU mappings in consistent mode. */ -extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp); -extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32); -void prom_adjust_ranges(struct linux_prom_ranges *, int, - struct linux_prom_ranges *, int); - -#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL -#define SBUS_DMA_TODEVICE DMA_TO_DEVICE -#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE -#define SBUS_DMA_NONE DMA_NONE - -/* All the rest use streaming mode mappings. */ -extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); -extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); -extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); -extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); - -/* Finally, allow explicit synchronization of streamable mappings. */ -extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); -#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu -extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); -extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); -#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu -extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); - -/* Eric Brower (ebrower@usa.net) - * Translate SBus interrupt levels to ino values-- - * this is used when converting sbus "interrupts" OBP - * node values to "intr" node values, and is platform - * dependent. If only we could call OBP with - * "sbus-intr>cpu (sbint -- ino)" from kernel... - * See .../drivers/sbus/sbus.c for details. - */ -BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int) -#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint) - -extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); -extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); -extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); -extern int sbus_arch_preinit(void); -extern void sbus_arch_postinit(void); - -#endif /* !(_SPARC_SBUS_H) */ +#ifndef ___ASM_SPARC_SBUS_H +#define ___ASM_SPARC_SBUS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/sbus_64.h> +#else +#include <asm-sparc/sbus_32.h> +#endif +#endif diff --git a/include/asm-sparc/sbus_32.h b/include/asm-sparc/sbus_32.h new file mode 100644 index 00000000000..77b5d3aadc9 --- /dev/null +++ b/include/asm-sparc/sbus_32.h @@ -0,0 +1,153 @@ +/* + * sbus.h: Defines for the Sun SBus. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_SBUS_H +#define _SPARC_SBUS_H + +#include <linux/dma-mapping.h> +#include <linux/ioport.h> + +#include <asm/oplib.h> +#include <asm/prom.h> +#include <asm/of_device.h> +#include <asm/scatterlist.h> + +/* We scan which devices are on the SBus using the PROM node device + * tree. SBus devices are described in two different ways. You can + * either get an absolute address at which to access the device, or + * you can get a SBus 'slot' number and an offset within that slot. + */ + +/* The base address at which to calculate device OBIO addresses. */ +#define SUN_SBUS_BVADDR 0xf8000000 +#define SBUS_OFF_MASK 0x01ffffff + +/* These routines are used to calculate device address from slot + * numbers + offsets, and vice versa. + */ + +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) +{ + return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<25)+(offset)); +} + +static inline int sbus_dev_slot(unsigned long dev_addr) +{ + return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>25); +} + +struct sbus_bus; + +/* Linux SBUS device tables */ +struct sbus_dev { + struct of_device ofdev; + struct sbus_bus *bus; + struct sbus_dev *next; + struct sbus_dev *child; + struct sbus_dev *parent; + int prom_node; + char prom_name[64]; + int slot; + + struct resource resource[PROMREG_MAX]; + + struct linux_prom_registers reg_addrs[PROMREG_MAX]; + int num_registers; + + struct linux_prom_ranges device_ranges[PROMREG_MAX]; + int num_device_ranges; + + unsigned int irqs[4]; + int num_irqs; +}; +#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) + +/* This struct describes the SBus(s) found on this machine. */ +struct sbus_bus { + struct of_device ofdev; + struct sbus_dev *devices; /* Link to devices on this SBus */ + struct sbus_bus *next; /* next SBus, if more than one SBus */ + int prom_node; /* PROM device tree node for this SBus */ + char prom_name[64]; /* Usually "sbus" or "sbi" */ + int clock_freq; + + struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; + int num_sbus_ranges; + + int devid; + int board; +}; +#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) + +extern struct sbus_bus *sbus_root; + +static inline int +sbus_is_slave(struct sbus_dev *dev) +{ + /* XXX Have to write this for sun4c's */ + return 0; +} + +/* Device probing routines could find these handy */ +#define for_each_sbus(bus) \ + for((bus) = sbus_root; (bus); (bus)=(bus)->next) + +#define for_each_sbusdev(device, bus) \ + for((device) = (bus)->devices; (device); (device)=(device)->next) + +#define for_all_sbusdev(device, bus) \ + for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ + for ((device) = (bus)->devices; (device); (device) = (device)->next) + +/* Driver DVMA interfaces. */ +#define sbus_can_dma_64bit(sdev) (0) /* actually, sparc_cpu_model==sun4d */ +#define sbus_can_burst64(sdev) (0) /* actually, sparc_cpu_model==sun4d */ +extern void sbus_set_sbus64(struct sbus_dev *, int); +extern void sbus_fill_device_irq(struct sbus_dev *); + +/* These yield IOMMU mappings in consistent mode. */ +extern void *sbus_alloc_consistent(struct sbus_dev *, long, u32 *dma_addrp); +extern void sbus_free_consistent(struct sbus_dev *, long, void *, u32); +void prom_adjust_ranges(struct linux_prom_ranges *, int, + struct linux_prom_ranges *, int); + +#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL +#define SBUS_DMA_TODEVICE DMA_TO_DEVICE +#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE +#define SBUS_DMA_NONE DMA_NONE + +/* All the rest use streaming mode mappings. */ +extern dma_addr_t sbus_map_single(struct sbus_dev *, void *, size_t, int); +extern void sbus_unmap_single(struct sbus_dev *, dma_addr_t, size_t, int); +extern int sbus_map_sg(struct sbus_dev *, struct scatterlist *, int, int); +extern void sbus_unmap_sg(struct sbus_dev *, struct scatterlist *, int, int); + +/* Finally, allow explicit synchronization of streamable mappings. */ +extern void sbus_dma_sync_single_for_cpu(struct sbus_dev *, dma_addr_t, size_t, int); +#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu +extern void sbus_dma_sync_single_for_device(struct sbus_dev *, dma_addr_t, size_t, int); +extern void sbus_dma_sync_sg_for_cpu(struct sbus_dev *, struct scatterlist *, int, int); +#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu +extern void sbus_dma_sync_sg_for_device(struct sbus_dev *, struct scatterlist *, int, int); + +/* Eric Brower (ebrower@usa.net) + * Translate SBus interrupt levels to ino values-- + * this is used when converting sbus "interrupts" OBP + * node values to "intr" node values, and is platform + * dependent. If only we could call OBP with + * "sbus-intr>cpu (sbint -- ino)" from kernel... + * See .../drivers/sbus/sbus.c for details. + */ +BTFIXUPDEF_CALL(unsigned int, sbint_to_irq, struct sbus_dev *sdev, unsigned int) +#define sbint_to_irq(sdev, sbint) BTFIXUP_CALL(sbint_to_irq)(sdev, sbint) + +extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); +extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); +extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); +extern int sbus_arch_preinit(void); +extern void sbus_arch_postinit(void); + +#endif /* !(_SPARC_SBUS_H) */ diff --git a/include/asm-sparc/sbus_64.h b/include/asm-sparc/sbus_64.h new file mode 100644 index 00000000000..0e16b6dd7e9 --- /dev/null +++ b/include/asm-sparc/sbus_64.h @@ -0,0 +1,190 @@ +/* sbus.h: Defines for the Sun SBus. + * + * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_SBUS_H +#define _SPARC64_SBUS_H + +#include <linux/dma-mapping.h> +#include <linux/ioport.h> + +#include <asm/oplib.h> +#include <asm/prom.h> +#include <asm/of_device.h> +#include <asm/iommu.h> +#include <asm/scatterlist.h> + +/* We scan which devices are on the SBus using the PROM node device + * tree. SBus devices are described in two different ways. You can + * either get an absolute address at which to access the device, or + * you can get a SBus 'slot' number and an offset within that slot. + */ + +/* The base address at which to calculate device OBIO addresses. */ +#define SUN_SBUS_BVADDR 0x00000000 +#define SBUS_OFF_MASK 0x0fffffff + +/* These routines are used to calculate device address from slot + * numbers + offsets, and vice versa. + */ + +static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) +{ + return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); +} + +static inline int sbus_dev_slot(unsigned long dev_addr) +{ + return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); +} + +struct sbus_bus; + +/* Linux SBUS device tables */ +struct sbus_dev { + struct of_device ofdev; + struct sbus_bus *bus; + struct sbus_dev *next; + struct sbus_dev *child; + struct sbus_dev *parent; + int prom_node; + char prom_name[64]; + int slot; + + struct resource resource[PROMREG_MAX]; + + struct linux_prom_registers reg_addrs[PROMREG_MAX]; + int num_registers; + + struct linux_prom_ranges device_ranges[PROMREG_MAX]; + int num_device_ranges; + + unsigned int irqs[4]; + int num_irqs; +}; +#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) + +/* This struct describes the SBus(s) found on this machine. */ +struct sbus_bus { + struct of_device ofdev; + struct sbus_dev *devices; /* Tree of SBUS devices */ + struct sbus_bus *next; /* Next SBUS in system */ + int prom_node; /* OBP node of SBUS */ + char prom_name[64]; /* Usually "sbus" or "sbi" */ + int clock_freq; + + struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; + int num_sbus_ranges; + + int portid; +}; +#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) + +extern struct sbus_bus *sbus_root; + +/* Device probing routines could find these handy */ +#define for_each_sbus(bus) \ + for((bus) = sbus_root; (bus); (bus)=(bus)->next) + +#define for_each_sbusdev(device, bus) \ + for((device) = (bus)->devices; (device); (device)=(device)->next) + +#define for_all_sbusdev(device, bus) \ + for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ + for ((device) = (bus)->devices; (device); (device) = (device)->next) + +/* Driver DVMA interfaces. */ +#define sbus_can_dma_64bit(sdev) (1) +#define sbus_can_burst64(sdev) (1) +extern void sbus_set_sbus64(struct sbus_dev *, int); +extern void sbus_fill_device_irq(struct sbus_dev *); + +static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size, + dma_addr_t *dma_handle) +{ + return dma_alloc_coherent(&sdev->ofdev.dev, size, + dma_handle, GFP_ATOMIC); +} + +static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle); +} + +#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL +#define SBUS_DMA_TODEVICE DMA_TO_DEVICE +#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE +#define SBUS_DMA_NONE DMA_NONE + +/* All the rest use streaming mode mappings. */ +static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, + size_t size, int direction) +{ + return dma_map_single(&sdev->ofdev.dev, ptr, size, + (enum dma_data_direction) direction); +} + +static inline void sbus_unmap_single(struct sbus_dev *sdev, + dma_addr_t dma_addr, size_t size, + int direction) +{ + dma_unmap_single(&sdev->ofdev.dev, dma_addr, size, + (enum dma_data_direction) direction); +} + +static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, + int nents, int direction) +{ + return dma_map_sg(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} + +static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, + int nents, int direction) +{ + dma_unmap_sg(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} + +/* Finally, allow explicit synchronization of streamable mappings. */ +static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size, + (enum dma_data_direction) direction); +} +#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu + +static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, + dma_addr_t dma_handle, + size_t size, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, + struct scatterlist *sg, + int nents, int direction) +{ + dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents, + (enum dma_data_direction) direction); +} +#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu + +static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, + struct scatterlist *sg, + int nents, int direction) +{ + /* No flushing needed to sync cpu writes to the device. */ +} + +extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); +extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); +extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); +extern int sbus_arch_preinit(void); +extern void sbus_arch_postinit(void); + +#endif /* !(_SPARC64_SBUS_H) */ diff --git a/include/asm-sparc/scatterlist.h b/include/asm-sparc/scatterlist.h index c82609ca1d0..b1a0e316c2b 100644 --- a/include/asm-sparc/scatterlist.h +++ b/include/asm-sparc/scatterlist.h @@ -1,26 +1,8 @@ -#ifndef _SPARC_SCATTERLIST_H -#define _SPARC_SCATTERLIST_H - -#include <linux/types.h> - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; +#ifndef ___ASM_SPARC_SCATTERLIST_H +#define ___ASM_SPARC_SCATTERLIST_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/scatterlist_64.h> +#else +#include <asm-sparc/scatterlist_32.h> +#endif #endif - unsigned long page_link; - unsigned int offset; - - unsigned int length; - - __u32 dvma_address; /* A place to hang host-specific addresses at. */ - __u32 dvma_length; -}; - -#define sg_dma_address(sg) ((sg)->dvma_address) -#define sg_dma_len(sg) ((sg)->dvma_length) - -#define ISA_DMA_THRESHOLD (~0UL) - -#define ARCH_HAS_SG_CHAIN - -#endif /* !(_SPARC_SCATTERLIST_H) */ diff --git a/include/asm-sparc/scatterlist_32.h b/include/asm-sparc/scatterlist_32.h new file mode 100644 index 00000000000..c82609ca1d0 --- /dev/null +++ b/include/asm-sparc/scatterlist_32.h @@ -0,0 +1,26 @@ +#ifndef _SPARC_SCATTERLIST_H +#define _SPARC_SCATTERLIST_H + +#include <linux/types.h> + +struct scatterlist { +#ifdef CONFIG_DEBUG_SG + unsigned long sg_magic; +#endif + unsigned long page_link; + unsigned int offset; + + unsigned int length; + + __u32 dvma_address; /* A place to hang host-specific addresses at. */ + __u32 dvma_length; +}; + +#define sg_dma_address(sg) ((sg)->dvma_address) +#define sg_dma_len(sg) ((sg)->dvma_length) + +#define ISA_DMA_THRESHOLD (~0UL) + +#define ARCH_HAS_SG_CHAIN + +#endif /* !(_SPARC_SCATTERLIST_H) */ diff --git a/include/asm-sparc/scatterlist_64.h b/include/asm-sparc/scatterlist_64.h new file mode 100644 index 00000000000..81bd058f938 --- /dev/null +++ b/include/asm-sparc/scatterlist_64.h @@ -0,0 +1,27 @@ +#ifndef _SPARC64_SCATTERLIST_H +#define _SPARC64_SCATTERLIST_H + +#include <asm/page.h> +#include <asm/types.h> + +struct scatterlist { +#ifdef CONFIG_DEBUG_SG + unsigned long sg_magic; +#endif + unsigned long page_link; + unsigned int offset; + + unsigned int length; + + dma_addr_t dma_address; + __u32 dma_length; +}; + +#define sg_dma_address(sg) ((sg)->dma_address) +#define sg_dma_len(sg) ((sg)->dma_length) + +#define ISA_DMA_THRESHOLD (~0UL) + +#define ARCH_HAS_SG_CHAIN + +#endif /* !(_SPARC64_SCATTERLIST_H) */ diff --git a/include/asm-sparc/sections.h b/include/asm-sparc/sections.h index 6832841df05..cbd01916242 100644 --- a/include/asm-sparc/sections.h +++ b/include/asm-sparc/sections.h @@ -1,6 +1,8 @@ -#ifndef _SPARC_SECTIONS_H -#define _SPARC_SECTIONS_H - -#include <asm-generic/sections.h> - +#ifndef ___ASM_SPARC_SECTIONS_H +#define ___ASM_SPARC_SECTIONS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/sections_64.h> +#else +#include <asm-sparc/sections_32.h> +#endif #endif diff --git a/include/asm-sparc/sections_32.h b/include/asm-sparc/sections_32.h new file mode 100644 index 00000000000..6832841df05 --- /dev/null +++ b/include/asm-sparc/sections_32.h @@ -0,0 +1,6 @@ +#ifndef _SPARC_SECTIONS_H +#define _SPARC_SECTIONS_H + +#include <asm-generic/sections.h> + +#endif diff --git a/include/asm-sparc/sections_64.h b/include/asm-sparc/sections_64.h new file mode 100644 index 00000000000..3f4b9fdc28d --- /dev/null +++ b/include/asm-sparc/sections_64.h @@ -0,0 +1,9 @@ +#ifndef _SPARC64_SECTIONS_H +#define _SPARC64_SECTIONS_H + +/* nothing to see, move along */ +#include <asm-generic/sections.h> + +extern char _start[]; + +#endif diff --git a/include/asm-sparc/sfp-machine.h b/include/asm-sparc/sfp-machine.h index 266a42b8f99..c676fcc2dd2 100644 --- a/include/asm-sparc/sfp-machine.h +++ b/include/asm-sparc/sfp-machine.h @@ -1,212 +1,8 @@ -/* Machine-dependent software floating-point definitions. - Sparc userland (_Q_*) version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz), - David S. Miller (davem@redhat.com) and - Peter Maydell (pmaydell@chiark.greenend.org.uk). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - - -#define _FP_W_TYPE_SIZE 32 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -/* For _Qp_* and _Q_*, this should prefer X, for - * CPU instruction emulation this should prefer Y. - * (see SPAMv9 B.2.2 section). - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - else \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -/* Some assembly to speed things up. */ -#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ - __asm__ ("addcc %r7,%8,%2\n\t" \ - "addxcc %r5,%6,%1\n\t" \ - "addx %r3,%4,%0\n" \ - : "=r" ((USItype)(r2)), \ - "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc") - -#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ - __asm__ ("subcc %r7,%8,%2\n\t" \ - "subxcc %r5,%6,%1\n\t" \ - "subx %r3,%4,%0\n" \ - : "=r" ((USItype)(r2)), \ - "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc") - -#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ - do { \ - /* We need to fool gcc, as we need to pass more than 10 \ - input/outputs. */ \ - register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ - __asm__ __volatile__ ( \ - "addcc %r8,%9,%1\n\t" \ - "addxcc %r6,%7,%0\n\t" \ - "addxcc %r4,%5,%%g2\n\t" \ - "addx %r2,%3,%%g1\n\t" \ - : "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x3)), \ - "rI" ((USItype)(y3)), \ - "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc", "g1", "g2"); \ - __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ - r3 = _t1; r2 = _t2; \ - } while (0) - -#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ - do { \ - /* We need to fool gcc, as we need to pass more than 10 \ - input/outputs. */ \ - register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ - __asm__ __volatile__ ( \ - "subcc %r8,%9,%1\n\t" \ - "subxcc %r6,%7,%0\n\t" \ - "subxcc %r4,%5,%%g2\n\t" \ - "subx %r2,%3,%%g1\n\t" \ - : "=&r" ((USItype)(r1)), \ - "=&r" ((USItype)(r0)) \ - : "%rJ" ((USItype)(x3)), \ - "rI" ((USItype)(y3)), \ - "%rJ" ((USItype)(x2)), \ - "rI" ((USItype)(y2)), \ - "%rJ" ((USItype)(x1)), \ - "rI" ((USItype)(y1)), \ - "%rJ" ((USItype)(x0)), \ - "rI" ((USItype)(y0)) \ - : "cc", "g1", "g2"); \ - __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ - r3 = _t1; r2 = _t2; \ - } while (0) - -#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) - -#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0) - -#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ - __asm__ ("addcc %3,%4,%3\n\t" \ - "addxcc %2,%%g0,%2\n\t" \ - "addxcc %1,%%g0,%1\n\t" \ - "addx %0,%%g0,%0\n\t" \ - : "=&r" ((USItype)(x3)), \ - "=&r" ((USItype)(x2)), \ - "=&r" ((USItype)(x1)), \ - "=&r" ((USItype)(x0)) \ - : "rI" ((USItype)(i)), \ - "0" ((USItype)(x3)), \ - "1" ((USItype)(x2)), \ - "2" ((USItype)(x1)), \ - "3" ((USItype)(x0)) \ - : "cc") - -#ifndef CONFIG_SMP -extern struct task_struct *last_task_used_math; -#endif - -/* Obtain the current rounding mode. */ -#ifndef FP_ROUNDMODE -#ifdef CONFIG_SMP -#define FP_ROUNDMODE ((current->thread.fsr >> 30) & 0x3) -#else -#define FP_ROUNDMODE ((last_task_used_math->thread.fsr >> 30) & 0x3) -#endif -#endif - -/* Exception flags. */ -#define FP_EX_INVALID (1 << 4) -#define FP_EX_OVERFLOW (1 << 3) -#define FP_EX_UNDERFLOW (1 << 2) -#define FP_EX_DIVZERO (1 << 1) -#define FP_EX_INEXACT (1 << 0) - -#define FP_HANDLE_EXCEPTIONS return _fex - -#ifdef CONFIG_SMP -#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex) -#else -#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex) -#endif - -#ifdef CONFIG_SMP -#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f) +#ifndef ___ASM_SPARC_SFP_MACHINE_H +#define ___ASM_SPARC_SFP_MACHINE_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/sfp-machine_64.h> #else -#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f) +#include <asm-sparc/sfp-machine_32.h> #endif - #endif diff --git a/include/asm-sparc/sfp-machine_32.h b/include/asm-sparc/sfp-machine_32.h new file mode 100644 index 00000000000..01d9c3b5a73 --- /dev/null +++ b/include/asm-sparc/sfp-machine_32.h @@ -0,0 +1,212 @@ +/* Machine-dependent software floating-point definitions. + Sparc userland (_Q_*) version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz), + David S. Miller (davem@redhat.com) and + Peter Maydell (pmaydell@chiark.greenend.org.uk). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + + +#define _FP_W_TYPE_SIZE 32 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1 +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +/* For _Qp_* and _Q_*, this should prefer X, for + * CPU instruction emulation this should prefer Y. + * (see SPAMv9 B.2.2 section). + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + else \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +/* Some assembly to speed things up. */ +#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("addcc %r7,%8,%2\n\t" \ + "addxcc %r5,%6,%1\n\t" \ + "addx %r3,%4,%0\n" \ + : "=r" ((USItype)(r2)), \ + "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc") + +#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ + __asm__ ("subcc %r7,%8,%2\n\t" \ + "subxcc %r5,%6,%1\n\t" \ + "subx %r3,%4,%0\n" \ + : "=r" ((USItype)(r2)), \ + "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc") + +#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + do { \ + /* We need to fool gcc, as we need to pass more than 10 \ + input/outputs. */ \ + register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ + __asm__ __volatile__ ( \ + "addcc %r8,%9,%1\n\t" \ + "addxcc %r6,%7,%0\n\t" \ + "addxcc %r4,%5,%%g2\n\t" \ + "addx %r2,%3,%%g1\n\t" \ + : "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x3)), \ + "rI" ((USItype)(y3)), \ + "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc", "g1", "g2"); \ + __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ + r3 = _t1; r2 = _t2; \ + } while (0) + +#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ + do { \ + /* We need to fool gcc, as we need to pass more than 10 \ + input/outputs. */ \ + register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \ + __asm__ __volatile__ ( \ + "subcc %r8,%9,%1\n\t" \ + "subxcc %r6,%7,%0\n\t" \ + "subxcc %r4,%5,%%g2\n\t" \ + "subx %r2,%3,%%g1\n\t" \ + : "=&r" ((USItype)(r1)), \ + "=&r" ((USItype)(r0)) \ + : "%rJ" ((USItype)(x3)), \ + "rI" ((USItype)(y3)), \ + "%rJ" ((USItype)(x2)), \ + "rI" ((USItype)(y2)), \ + "%rJ" ((USItype)(x1)), \ + "rI" ((USItype)(y1)), \ + "%rJ" ((USItype)(x0)), \ + "rI" ((USItype)(y0)) \ + : "cc", "g1", "g2"); \ + __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \ + r3 = _t1; r2 = _t2; \ + } while (0) + +#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) + +#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0) + +#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ + __asm__ ("addcc %3,%4,%3\n\t" \ + "addxcc %2,%%g0,%2\n\t" \ + "addxcc %1,%%g0,%1\n\t" \ + "addx %0,%%g0,%0\n\t" \ + : "=&r" ((USItype)(x3)), \ + "=&r" ((USItype)(x2)), \ + "=&r" ((USItype)(x1)), \ + "=&r" ((USItype)(x0)) \ + : "rI" ((USItype)(i)), \ + "0" ((USItype)(x3)), \ + "1" ((USItype)(x2)), \ + "2" ((USItype)(x1)), \ + "3" ((USItype)(x0)) \ + : "cc") + +#ifndef CONFIG_SMP +extern struct task_struct *last_task_used_math; +#endif + +/* Obtain the current rounding mode. */ +#ifndef FP_ROUNDMODE +#ifdef CONFIG_SMP +#define FP_ROUNDMODE ((current->thread.fsr >> 30) & 0x3) +#else +#define FP_ROUNDMODE ((last_task_used_math->thread.fsr >> 30) & 0x3) +#endif +#endif + +/* Exception flags. */ +#define FP_EX_INVALID (1 << 4) +#define FP_EX_OVERFLOW (1 << 3) +#define FP_EX_UNDERFLOW (1 << 2) +#define FP_EX_DIVZERO (1 << 1) +#define FP_EX_INEXACT (1 << 0) + +#define FP_HANDLE_EXCEPTIONS return _fex + +#ifdef CONFIG_SMP +#define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex) +#else +#define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex) +#endif + +#ifdef CONFIG_SMP +#define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f) +#else +#define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f) +#endif + +#endif diff --git a/include/asm-sparc/sfp-machine_64.h b/include/asm-sparc/sfp-machine_64.h new file mode 100644 index 00000000000..ca913ef40bd --- /dev/null +++ b/include/asm-sparc/sfp-machine_64.h @@ -0,0 +1,93 @@ +/* Machine-dependent software floating-point definitions. + Sparc64 kernel version. + Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Richard Henderson (rth@cygnus.com), + Jakub Jelinek (jj@ultra.linux.cz) and + David S. Miller (davem@redhat.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Library General Public License as + published by the Free Software Foundation; either version 2 of the + License, or (at your option) any later version. + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Library General Public License for more details. + + You should have received a copy of the GNU Library General Public + License along with the GNU C Library; see the file COPYING.LIB. If + not, write to the Free Software Foundation, Inc., + 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#ifndef _SFP_MACHINE_H +#define _SFP_MACHINE_H + +#define _FP_W_TYPE_SIZE 64 +#define _FP_W_TYPE unsigned long +#define _FP_WS_TYPE signed long +#define _FP_I_TYPE long + +#define _FP_MUL_MEAT_S(R,X,Y) \ + _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y) +#define _FP_MUL_MEAT_D(R,X,Y) \ + _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) +#define _FP_MUL_MEAT_Q(R,X,Y) \ + _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) + +#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm) +#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) +#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) + +#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) +#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) +#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 +#define _FP_NANSIGN_S 0 +#define _FP_NANSIGN_D 0 +#define _FP_NANSIGN_Q 0 + +#define _FP_KEEPNANFRACP 1 + +/* If one NaN is signaling and the other is not, + * we choose that one, otherwise we choose X. + */ +/* For _Qp_* and _Q_*, this should prefer X, for + * CPU instruction emulation this should prefer Y. + * (see SPAMv9 B.2.2 section). + */ +#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ + do { \ + if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ + && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ + { \ + R##_s = X##_s; \ + _FP_FRAC_COPY_##wc(R,X); \ + } \ + else \ + { \ + R##_s = Y##_s; \ + _FP_FRAC_COPY_##wc(R,Y); \ + } \ + R##_c = FP_CLS_NAN; \ + } while (0) + +/* Obtain the current rounding mode. */ +#ifndef FP_ROUNDMODE +#define FP_ROUNDMODE ((current_thread_info()->xfsr[0] >> 30) & 0x3) +#endif + +/* Exception flags. */ +#define FP_EX_INVALID (1 << 4) +#define FP_EX_OVERFLOW (1 << 3) +#define FP_EX_UNDERFLOW (1 << 2) +#define FP_EX_DIVZERO (1 << 1) +#define FP_EX_INEXACT (1 << 0) + +#define FP_HANDLE_EXCEPTIONS return _fex + +#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex) + +#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f) + +#endif diff --git a/include/asm-sparc/shmparam.h b/include/asm-sparc/shmparam.h index 59a1243c12f..16fda7e9acc 100644 --- a/include/asm-sparc/shmparam.h +++ b/include/asm-sparc/shmparam.h @@ -1,11 +1,8 @@ -#ifndef _ASMSPARC_SHMPARAM_H -#define _ASMSPARC_SHMPARAM_H - -#define __ARCH_FORCE_SHMLBA 1 - -extern int vac_cache_size; -#define SHMLBA (vac_cache_size ? vac_cache_size : \ - (sparc_cpu_model == sun4c ? (64 * 1024) : \ - (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE))) - -#endif /* _ASMSPARC_SHMPARAM_H */ +#ifndef ___ASM_SPARC_SHMPARAM_H +#define ___ASM_SPARC_SHMPARAM_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/shmparam_64.h> +#else +#include <asm-sparc/shmparam_32.h> +#endif +#endif diff --git a/include/asm-sparc/shmparam_32.h b/include/asm-sparc/shmparam_32.h new file mode 100644 index 00000000000..59a1243c12f --- /dev/null +++ b/include/asm-sparc/shmparam_32.h @@ -0,0 +1,11 @@ +#ifndef _ASMSPARC_SHMPARAM_H +#define _ASMSPARC_SHMPARAM_H + +#define __ARCH_FORCE_SHMLBA 1 + +extern int vac_cache_size; +#define SHMLBA (vac_cache_size ? vac_cache_size : \ + (sparc_cpu_model == sun4c ? (64 * 1024) : \ + (sparc_cpu_model == sun4 ? (128 * 1024) : PAGE_SIZE))) + +#endif /* _ASMSPARC_SHMPARAM_H */ diff --git a/include/asm-sparc/shmparam_64.h b/include/asm-sparc/shmparam_64.h new file mode 100644 index 00000000000..1ed0d6701a9 --- /dev/null +++ b/include/asm-sparc/shmparam_64.h @@ -0,0 +1,10 @@ +#ifndef _ASMSPARC64_SHMPARAM_H +#define _ASMSPARC64_SHMPARAM_H + +#include <asm/spitfire.h> + +#define __ARCH_FORCE_SHMLBA 1 +/* attach addr a multiple of this */ +#define SHMLBA ((PAGE_SIZE > L1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE) + +#endif /* _ASMSPARC64_SHMPARAM_H */ diff --git a/include/asm-sparc/sigcontext.h b/include/asm-sparc/sigcontext.h index c5fb60dcbd7..82fc7d54a4f 100644 --- a/include/asm-sparc/sigcontext.h +++ b/include/asm-sparc/sigcontext.h @@ -1,62 +1,8 @@ -#ifndef __SPARC_SIGCONTEXT_H -#define __SPARC_SIGCONTEXT_H - -#ifdef __KERNEL__ -#include <asm/ptrace.h> - -#ifndef __ASSEMBLY__ - -#define __SUNOS_MAXWIN 31 - -/* This is what SunOS does, so shall I. */ -struct sigcontext { - int sigc_onstack; /* state to restore */ - int sigc_mask; /* sigmask to restore */ - int sigc_sp; /* stack pointer */ - int sigc_pc; /* program counter */ - int sigc_npc; /* next program counter */ - int sigc_psr; /* for condition codes etc */ - int sigc_g1; /* User uses these two registers */ - int sigc_o0; /* within the trampoline code. */ - - /* Now comes information regarding the users window set - * at the time of the signal. - */ - int sigc_oswins; /* outstanding windows */ - - /* stack ptrs for each regwin buf */ - char *sigc_spbuf[__SUNOS_MAXWIN]; - - /* Windows to restore after signal */ - struct { - unsigned long locals[8]; - unsigned long ins[8]; - } sigc_wbuf[__SUNOS_MAXWIN]; -}; - -typedef struct { - struct { - unsigned long psr; - unsigned long pc; - unsigned long npc; - unsigned long y; - unsigned long u_regs[16]; /* globals and ins */ - } si_regs; - int si_mask; -} __siginfo_t; - -typedef struct { - unsigned long si_float_regs [32]; - unsigned long si_fsr; - unsigned long si_fpqdepth; - struct { - unsigned long *insn_addr; - unsigned long insn; - } si_fpqueue [16]; -} __siginfo_fpu_t; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* (__KERNEL__) */ - -#endif /* !(__SPARC_SIGCONTEXT_H) */ +#ifndef ___ASM_SPARC_SIGCONTEXT_H +#define ___ASM_SPARC_SIGCONTEXT_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/sigcontext_64.h> +#else +#include <asm-sparc/sigcontext_32.h> +#endif +#endif diff --git a/include/asm-sparc/sigcontext_32.h b/include/asm-sparc/sigcontext_32.h new file mode 100644 index 00000000000..c5fb60dcbd7 --- /dev/null +++ b/include/asm-sparc/sigcontext_32.h @@ -0,0 +1,62 @@ +#ifndef __SPARC_SIGCONTEXT_H +#define __SPARC_SIGCONTEXT_H + +#ifdef __KERNEL__ +#include <asm/ptrace.h> + +#ifndef __ASSEMBLY__ + +#define __SUNOS_MAXWIN 31 + +/* This is what SunOS does, so shall I. */ +struct sigcontext { + int sigc_onstack; /* state to restore */ + int sigc_mask; /* sigmask to restore */ + int sigc_sp; /* stack pointer */ + int sigc_pc; /* program counter */ + int sigc_npc; /* next program counter */ + int sigc_psr; /* for condition codes etc */ + int sigc_g1; /* User uses these two registers */ + int sigc_o0; /* within the trampoline code. */ + + /* Now comes information regarding the users window set + * at the time of the signal. + */ + int sigc_oswins; /* outstanding windows */ + + /* stack ptrs for each regwin buf */ + char *sigc_spbuf[__SUNOS_MAXWIN]; + + /* Windows to restore after signal */ + struct { + unsigned long locals[8]; + unsigned long ins[8]; + } sigc_wbuf[__SUNOS_MAXWIN]; +}; + +typedef struct { + struct { + unsigned long psr; + unsigned long pc; + unsigned long npc; + unsigned long y; + unsigned long u_regs[16]; /* globals and ins */ + } si_regs; + int si_mask; +} __siginfo_t; + +typedef struct { + unsigned long si_float_regs [32]; + unsigned long si_fsr; + unsigned long si_fpqdepth; + struct { + unsigned long *insn_addr; + unsigned long insn; + } si_fpqueue [16]; +} __siginfo_fpu_t; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* (__KERNEL__) */ + +#endif /* !(__SPARC_SIGCONTEXT_H) */ diff --git a/include/asm-sparc/sigcontext_64.h b/include/asm-sparc/sigcontext_64.h new file mode 100644 index 00000000000..1c868d680cf --- /dev/null +++ b/include/asm-sparc/sigcontext_64.h @@ -0,0 +1,87 @@ +#ifndef __SPARC64_SIGCONTEXT_H +#define __SPARC64_SIGCONTEXT_H + +#ifdef __KERNEL__ +#include <asm/ptrace.h> +#endif + +#ifndef __ASSEMBLY__ + +#ifdef __KERNEL__ + +#define __SUNOS_MAXWIN 31 + +/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */ +struct sigcontext32 { + int sigc_onstack; /* state to restore */ + int sigc_mask; /* sigmask to restore */ + int sigc_sp; /* stack pointer */ + int sigc_pc; /* program counter */ + int sigc_npc; /* next program counter */ + int sigc_psr; /* for condition codes etc */ + int sigc_g1; /* User uses these two registers */ + int sigc_o0; /* within the trampoline code. */ + + /* Now comes information regarding the users window set + * at the time of the signal. + */ + int sigc_oswins; /* outstanding windows */ + + /* stack ptrs for each regwin buf */ + unsigned sigc_spbuf[__SUNOS_MAXWIN]; + + /* Windows to restore after signal */ + struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN]; +}; + +#endif + +#ifdef __KERNEL__ + +/* This is what we use for 32bit new non-rt signals. */ + +typedef struct { + struct { + unsigned int psr; + unsigned int pc; + unsigned int npc; + unsigned int y; + unsigned int u_regs[16]; /* globals and ins */ + } si_regs; + int si_mask; +} __siginfo32_t; + +#endif + +typedef struct { + unsigned int si_float_regs [64]; + unsigned long si_fsr; + unsigned long si_gsr; + unsigned long si_fprs; +} __siginfo_fpu_t; + +/* This is what SunOS doesn't, so we have to write this alone + and do it properly. */ +struct sigcontext { + /* The size of this array has to match SI_MAX_SIZE from siginfo.h */ + char sigc_info[128]; + struct { + unsigned long u_regs[16]; /* globals and ins */ + unsigned long tstate; + unsigned long tpc; + unsigned long tnpc; + unsigned int y; + unsigned int fprs; + } sigc_regs; + __siginfo_fpu_t * sigc_fpu_save; + struct { + void * ss_sp; + int ss_flags; + unsigned long ss_size; + } sigc_stack; + unsigned long sigc_mask; +}; + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC64_SIGCONTEXT_H) */ diff --git a/include/asm-sparc/siginfo.h b/include/asm-sparc/siginfo.h index 3c71af135c5..2c9fccf4ce1 100644 --- a/include/asm-sparc/siginfo.h +++ b/include/asm-sparc/siginfo.h @@ -1,17 +1,8 @@ -#ifndef _SPARC_SIGINFO_H -#define _SPARC_SIGINFO_H - -#define __ARCH_SI_UID_T unsigned int -#define __ARCH_SI_TRAPNO - -#include <asm-generic/siginfo.h> - -#define SI_NOINFO 32767 /* no information in siginfo_t */ - -/* - * SIGEMT si_codes - */ -#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ -#define NSIGEMT 1 - -#endif /* !(_SPARC_SIGINFO_H) */ +#ifndef ___ASM_SPARC_SIGINFO_H +#define ___ASM_SPARC_SIGINFO_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/siginfo_64.h> +#else +#include <asm-sparc/siginfo_32.h> +#endif +#endif diff --git a/include/asm-sparc/siginfo_32.h b/include/asm-sparc/siginfo_32.h new file mode 100644 index 00000000000..3c71af135c5 --- /dev/null +++ b/include/asm-sparc/siginfo_32.h @@ -0,0 +1,17 @@ +#ifndef _SPARC_SIGINFO_H +#define _SPARC_SIGINFO_H + +#define __ARCH_SI_UID_T unsigned int +#define __ARCH_SI_TRAPNO + +#include <asm-generic/siginfo.h> + +#define SI_NOINFO 32767 /* no information in siginfo_t */ + +/* + * SIGEMT si_codes + */ +#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ +#define NSIGEMT 1 + +#endif /* !(_SPARC_SIGINFO_H) */ diff --git a/include/asm-sparc/siginfo_64.h b/include/asm-sparc/siginfo_64.h new file mode 100644 index 00000000000..c96e6c30f8b --- /dev/null +++ b/include/asm-sparc/siginfo_64.h @@ -0,0 +1,32 @@ +#ifndef _SPARC64_SIGINFO_H +#define _SPARC64_SIGINFO_H + +#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) + +#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) +#define __ARCH_SI_TRAPNO +#define __ARCH_SI_BAND_T int + +#include <asm-generic/siginfo.h> + +#ifdef __KERNEL__ + +#include <linux/compat.h> + +#ifdef CONFIG_COMPAT + +struct compat_siginfo; + +#endif /* CONFIG_COMPAT */ + +#endif /* __KERNEL__ */ + +#define SI_NOINFO 32767 /* no information in siginfo_t */ + +/* + * SIGEMT si_codes + */ +#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ +#define NSIGEMT 1 + +#endif diff --git a/include/asm-sparc/signal.h b/include/asm-sparc/signal.h index 683657d6e68..36f5f9e482f 100644 --- a/include/asm-sparc/signal.h +++ b/include/asm-sparc/signal.h @@ -1,207 +1,8 @@ -#ifndef _ASMSPARC_SIGNAL_H -#define _ASMSPARC_SIGNAL_H - -#include <asm/sigcontext.h> -#include <linux/compiler.h> - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#include <linux/personality.h> -#include <linux/types.h> -#endif -#endif - -/* On the Sparc the signal handlers get passed a 'sub-signal' code - * for certain signal types, which we document here. - */ -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SUBSIG_STACK 0 -#define SUBSIG_ILLINST 2 -#define SUBSIG_PRIVINST 3 -#define SUBSIG_BADTRAP(t) (0x80 + (t)) - -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 - -#define SIGEMT 7 -#define SUBSIG_TAG 10 - -#define SIGFPE 8 -#define SUBSIG_FPDISABLED 0x400 -#define SUBSIG_FPERROR 0x404 -#define SUBSIG_FPINTOVFL 0x001 -#define SUBSIG_FPSTSIG 0x002 -#define SUBSIG_IDIVZERO 0x014 -#define SUBSIG_FPINEXACT 0x0c4 -#define SUBSIG_FPDIVZERO 0x0c8 -#define SUBSIG_FPUNFLOW 0x0cc -#define SUBSIG_FPOPERROR 0x0d0 -#define SUBSIG_FPOVFLOW 0x0d4 - -#define SIGKILL 9 -#define SIGBUS 10 -#define SUBSIG_BUSTIMEOUT 1 -#define SUBSIG_ALIGNMENT 2 -#define SUBSIG_MISCERROR 5 - -#define SIGSEGV 11 -#define SUBSIG_NOMAPPING 3 -#define SUBSIG_PROTECTION 4 -#define SUBSIG_SEGERROR 5 - -#define SIGSYS 12 - -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGURG 16 - -/* SunOS values which deviate from the Linux/i386 ones */ -#define SIGSTOP 17 -#define SIGTSTP 18 -#define SIGCONT 19 -#define SIGCHLD 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGIO 23 -#define SIGPOLL SIGIO /* SysV name for SIGIO */ -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGLOST 29 -#define SIGPWR SIGLOST -#define SIGUSR1 30 -#define SIGUSR2 31 - -/* Most things should be clean enough to redefine this at will, if care - * is taken to make libc match. - */ - -#define __OLD_NSIG 32 -#define __NEW_NSIG 64 -#define _NSIG_BPW 32 -#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) - -#define SIGRTMIN 32 -#define SIGRTMAX __NEW_NSIG - -#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) -#define _NSIG __NEW_NSIG -#define __new_sigset_t sigset_t -#define __new_sigaction sigaction -#define __old_sigset_t old_sigset_t -#define __old_sigaction old_sigaction +#ifndef ___ASM_SPARC_SIGNAL_H +#define ___ASM_SPARC_SIGNAL_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/signal_64.h> #else -#define _NSIG __OLD_NSIG -#define __old_sigset_t sigset_t -#define __old_sigaction sigaction -#endif - -#ifndef __ASSEMBLY__ - -typedef unsigned long __old_sigset_t; - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} __new_sigset_t; - - -#ifdef __KERNEL__ -/* A SunOS sigstack */ -struct sigstack { - char *the_stack; - int cur_status; -}; +#include <asm-sparc/signal_32.h> #endif - -/* Sigvec flags */ -#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ -#define _SV_INTR 2u /* Sig return should not restart system call */ -#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ -#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ - -/* - * sa_flags values: SA_STACK is not currently supported, but will allow the - * usage of signal stacks by using the (now obsolete) sa_restorer field in - * the sigaction structure as a stack pointer. This is now possible due to - * the changes in signal handling. LBT 010493. - * SA_RESTART flag to get restarting signals (which were the default long ago) - */ -#define SA_NOCLDSTOP _SV_IGNCHILD -#define SA_STACK _SV_SSTACK -#define SA_ONSTACK _SV_SSTACK -#define SA_RESTART _SV_INTR -#define SA_ONESHOT _SV_RESET -#define SA_NOMASK 0x20u -#define SA_NOCLDWAIT 0x100u -#define SA_SIGINFO 0x200u - -#define SIG_BLOCK 0x01 /* for blocking signals */ -#define SIG_UNBLOCK 0x02 /* for unblocking signals */ -#define SIG_SETMASK 0x04 /* for setting the signal mask */ - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 4096 -#define SIGSTKSZ 16384 - -#ifdef __KERNEL__ -/* - * DJHR - * SA_STATIC_ALLOC is used for the SPARC system to indicate that this - * interrupt handler's irq structure should be statically allocated - * by the request_irq routine. - * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge - * of interrupt usage and that sucks. Also without a flag like this - * it may be possible for the free_irq routine to attempt to free - * statically allocated data.. which is NOT GOOD. - * - */ -#define SA_STATIC_ALLOC 0x8000 #endif - -#include <asm-generic/signal.h> - -#ifdef __KERNEL__ -struct __new_sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - void (*sa_restorer)(void); /* Not used by Linux/SPARC */ - __new_sigset_t sa_mask; -}; - -struct k_sigaction { - struct __new_sigaction sa; - void __user *ka_restorer; -}; - -struct __old_sigaction { - __sighandler_t sa_handler; - __old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer) (void); /* not used by Linux/SPARC */ -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* !(__KERNEL__) */ - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_ASMSPARC_SIGNAL_H) */ diff --git a/include/asm-sparc/signal_32.h b/include/asm-sparc/signal_32.h new file mode 100644 index 00000000000..96a60ab03ca --- /dev/null +++ b/include/asm-sparc/signal_32.h @@ -0,0 +1,207 @@ +#ifndef _ASMSPARC_SIGNAL_H +#define _ASMSPARC_SIGNAL_H + +#include <asm/sigcontext.h> +#include <linux/compiler.h> + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +#include <linux/personality.h> +#include <linux/types.h> +#endif +#endif + +/* On the Sparc the signal handlers get passed a 'sub-signal' code + * for certain signal types, which we document here. + */ +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SUBSIG_STACK 0 +#define SUBSIG_ILLINST 2 +#define SUBSIG_PRIVINST 3 +#define SUBSIG_BADTRAP(t) (0x80 + (t)) + +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 + +#define SIGEMT 7 +#define SUBSIG_TAG 10 + +#define SIGFPE 8 +#define SUBSIG_FPDISABLED 0x400 +#define SUBSIG_FPERROR 0x404 +#define SUBSIG_FPINTOVFL 0x001 +#define SUBSIG_FPSTSIG 0x002 +#define SUBSIG_IDIVZERO 0x014 +#define SUBSIG_FPINEXACT 0x0c4 +#define SUBSIG_FPDIVZERO 0x0c8 +#define SUBSIG_FPUNFLOW 0x0cc +#define SUBSIG_FPOPERROR 0x0d0 +#define SUBSIG_FPOVFLOW 0x0d4 + +#define SIGKILL 9 +#define SIGBUS 10 +#define SUBSIG_BUSTIMEOUT 1 +#define SUBSIG_ALIGNMENT 2 +#define SUBSIG_MISCERROR 5 + +#define SIGSEGV 11 +#define SUBSIG_NOMAPPING 3 +#define SUBSIG_PROTECTION 4 +#define SUBSIG_SEGERROR 5 + +#define SIGSYS 12 + +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGURG 16 + +/* SunOS values which deviate from the Linux/i386 ones */ +#define SIGSTOP 17 +#define SIGTSTP 18 +#define SIGCONT 19 +#define SIGCHLD 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGIO 23 +#define SIGPOLL SIGIO /* SysV name for SIGIO */ +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGLOST 29 +#define SIGPWR SIGLOST +#define SIGUSR1 30 +#define SIGUSR2 31 + +/* Most things should be clean enough to redefine this at will, if care + * is taken to make libc match. + */ + +#define __OLD_NSIG 32 +#define __NEW_NSIG 64 +#define _NSIG_BPW 32 +#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) + +#define SIGRTMIN 32 +#define SIGRTMAX __NEW_NSIG + +#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) +#define _NSIG __NEW_NSIG +#define __new_sigset_t sigset_t +#define __new_sigaction sigaction +#define __old_sigset_t old_sigset_t +#define __old_sigaction old_sigaction +#else +#define _NSIG __OLD_NSIG +#define __old_sigset_t sigset_t +#define __old_sigaction sigaction +#endif + +#ifndef __ASSEMBLY__ + +typedef unsigned long __old_sigset_t; + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} __new_sigset_t; + + +#ifdef __KERNEL__ +/* A SunOS sigstack */ +struct sigstack { + char *the_stack; + int cur_status; +}; +#endif + +/* Sigvec flags */ +#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ +#define _SV_INTR 2u /* Sig return should not restart system call */ +#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ +#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ + +/* + * sa_flags values: SA_STACK is not currently supported, but will allow the + * usage of signal stacks by using the (now obsolete) sa_restorer field in + * the sigaction structure as a stack pointer. This is now possible due to + * the changes in signal handling. LBT 010493. + * SA_RESTART flag to get restarting signals (which were the default long ago) + */ +#define SA_NOCLDSTOP _SV_IGNCHILD +#define SA_STACK _SV_SSTACK +#define SA_ONSTACK _SV_SSTACK +#define SA_RESTART _SV_INTR +#define SA_ONESHOT _SV_RESET +#define SA_NOMASK 0x20u +#define SA_NOCLDWAIT 0x100u +#define SA_SIGINFO 0x200u + +#define SIG_BLOCK 0x01 /* for blocking signals */ +#define SIG_UNBLOCK 0x02 /* for unblocking signals */ +#define SIG_SETMASK 0x04 /* for setting the signal mask */ + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 4096 +#define SIGSTKSZ 16384 + +#ifdef __KERNEL__ +/* + * DJHR + * SA_STATIC_ALLOC is used for the SPARC system to indicate that this + * interrupt handler's irq structure should be statically allocated + * by the request_irq routine. + * The alternative is that arch/sparc/kernel/irq.c has carnal knowledge + * of interrupt usage and that sucks. Also without a flag like this + * it may be possible for the free_irq routine to attempt to free + * statically allocated data.. which is NOT GOOD. + * + */ +#define SA_STATIC_ALLOC 0x8000 +#endif + +#include <asm-generic/signal.h> + +#ifdef __KERNEL__ +struct __new_sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + void (*sa_restorer)(void); /* Not used by Linux/SPARC */ + __new_sigset_t sa_mask; +}; + +struct k_sigaction { + struct __new_sigaction sa; + void __user *ka_restorer; +}; + +struct __old_sigaction { + __sighandler_t sa_handler; + __old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer) (void); /* not used by Linux/SPARC */ +}; + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#define ptrace_signal_deliver(regs, cookie) do { } while (0) + +#endif /* !(__KERNEL__) */ + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_ASMSPARC_SIGNAL_H) */ diff --git a/include/asm-sparc/signal_64.h b/include/asm-sparc/signal_64.h new file mode 100644 index 00000000000..ab1509a101c --- /dev/null +++ b/include/asm-sparc/signal_64.h @@ -0,0 +1,194 @@ +#ifndef _ASMSPARC64_SIGNAL_H +#define _ASMSPARC64_SIGNAL_H + +#include <asm/sigcontext.h> + +#ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +#include <linux/personality.h> +#include <linux/types.h> +#endif +#endif + +/* On the Sparc the signal handlers get passed a 'sub-signal' code + * for certain signal types, which we document here. + */ +#define SIGHUP 1 +#define SIGINT 2 +#define SIGQUIT 3 +#define SIGILL 4 +#define SUBSIG_STACK 0 +#define SUBSIG_ILLINST 2 +#define SUBSIG_PRIVINST 3 +#define SUBSIG_BADTRAP(t) (0x80 + (t)) + +#define SIGTRAP 5 +#define SIGABRT 6 +#define SIGIOT 6 + +#define SIGEMT 7 +#define SUBSIG_TAG 10 + +#define SIGFPE 8 +#define SUBSIG_FPDISABLED 0x400 +#define SUBSIG_FPERROR 0x404 +#define SUBSIG_FPINTOVFL 0x001 +#define SUBSIG_FPSTSIG 0x002 +#define SUBSIG_IDIVZERO 0x014 +#define SUBSIG_FPINEXACT 0x0c4 +#define SUBSIG_FPDIVZERO 0x0c8 +#define SUBSIG_FPUNFLOW 0x0cc +#define SUBSIG_FPOPERROR 0x0d0 +#define SUBSIG_FPOVFLOW 0x0d4 + +#define SIGKILL 9 +#define SIGBUS 10 +#define SUBSIG_BUSTIMEOUT 1 +#define SUBSIG_ALIGNMENT 2 +#define SUBSIG_MISCERROR 5 + +#define SIGSEGV 11 +#define SUBSIG_NOMAPPING 3 +#define SUBSIG_PROTECTION 4 +#define SUBSIG_SEGERROR 5 + +#define SIGSYS 12 + +#define SIGPIPE 13 +#define SIGALRM 14 +#define SIGTERM 15 +#define SIGURG 16 + +/* SunOS values which deviate from the Linux/i386 ones */ +#define SIGSTOP 17 +#define SIGTSTP 18 +#define SIGCONT 19 +#define SIGCHLD 20 +#define SIGTTIN 21 +#define SIGTTOU 22 +#define SIGIO 23 +#define SIGPOLL SIGIO /* SysV name for SIGIO */ +#define SIGXCPU 24 +#define SIGXFSZ 25 +#define SIGVTALRM 26 +#define SIGPROF 27 +#define SIGWINCH 28 +#define SIGLOST 29 +#define SIGPWR SIGLOST +#define SIGUSR1 30 +#define SIGUSR2 31 + +/* Most things should be clean enough to redefine this at will, if care + is taken to make libc match. */ + +#define __OLD_NSIG 32 +#define __NEW_NSIG 64 +#define _NSIG_BPW 64 +#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) + +#define SIGRTMIN 32 +#define SIGRTMAX __NEW_NSIG + +#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) +#define _NSIG __NEW_NSIG +#define __new_sigset_t sigset_t +#define __new_sigaction sigaction +#define __new_sigaction32 sigaction32 +#define __old_sigset_t old_sigset_t +#define __old_sigaction old_sigaction +#define __old_sigaction32 old_sigaction32 +#else +#define _NSIG __OLD_NSIG +#define NSIG _NSIG +#define __old_sigset_t sigset_t +#define __old_sigaction sigaction +#define __old_sigaction32 sigaction32 +#endif + +#ifndef __ASSEMBLY__ + +typedef unsigned long __old_sigset_t; /* at least 32 bits */ + +typedef struct { + unsigned long sig[_NSIG_WORDS]; +} __new_sigset_t; + +/* A SunOS sigstack */ +struct sigstack { + /* XXX 32-bit pointers pinhead XXX */ + char *the_stack; + int cur_status; +}; + +/* Sigvec flags */ +#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ +#define _SV_INTR 2u /* Sig return should not restart system call */ +#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ +#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ + +/* + * sa_flags values: SA_STACK is not currently supported, but will allow the + * usage of signal stacks by using the (now obsolete) sa_restorer field in + * the sigaction structure as a stack pointer. This is now possible due to + * the changes in signal handling. LBT 010493. + * SA_RESTART flag to get restarting signals (which were the default long ago) + */ +#define SA_NOCLDSTOP _SV_IGNCHILD +#define SA_STACK _SV_SSTACK +#define SA_ONSTACK _SV_SSTACK +#define SA_RESTART _SV_INTR +#define SA_ONESHOT _SV_RESET +#define SA_NOMASK 0x20u +#define SA_NOCLDWAIT 0x100u +#define SA_SIGINFO 0x200u + + +#define SIG_BLOCK 0x01 /* for blocking signals */ +#define SIG_UNBLOCK 0x02 /* for unblocking signals */ +#define SIG_SETMASK 0x04 /* for setting the signal mask */ + +/* + * sigaltstack controls + */ +#define SS_ONSTACK 1 +#define SS_DISABLE 2 + +#define MINSIGSTKSZ 4096 +#define SIGSTKSZ 16384 + +#include <asm-generic/signal.h> + +struct __new_sigaction { + __sighandler_t sa_handler; + unsigned long sa_flags; + __sigrestore_t sa_restorer; /* not used by Linux/SPARC yet */ + __new_sigset_t sa_mask; +}; + +struct __old_sigaction { + __sighandler_t sa_handler; + __old_sigset_t sa_mask; + unsigned long sa_flags; + void (*sa_restorer)(void); /* not used by Linux/SPARC yet */ +}; + +typedef struct sigaltstack { + void __user *ss_sp; + int ss_flags; + size_t ss_size; +} stack_t; + +#ifdef __KERNEL__ + +struct k_sigaction { + struct __new_sigaction sa; + void __user *ka_restorer; +}; + +#define ptrace_signal_deliver(regs, cookie) do { } while (0) + +#endif /* !(__KERNEL__) */ + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(_ASMSPARC64_SIGNAL_H) */ diff --git a/include/asm-sparc/smp.h b/include/asm-sparc/smp.h index b61e74bea06..1f9dedfbabd 100644 --- a/include/asm-sparc/smp.h +++ b/include/asm-sparc/smp.h @@ -1,173 +1,8 @@ -/* smp.h: Sparc specific SMP stuff. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC_SMP_H -#define _SPARC_SMP_H - -#include <linux/threads.h> -#include <asm/head.h> -#include <asm/btfixup.h> - -#ifndef __ASSEMBLY__ - -#include <linux/cpumask.h> - -#endif /* __ASSEMBLY__ */ - -#ifdef CONFIG_SMP - -#ifndef __ASSEMBLY__ - -#include <asm/ptrace.h> -#include <asm/asi.h> -#include <asm/atomic.h> - -/* - * Private routines/data - */ - -extern unsigned char boot_cpu_id; -extern cpumask_t phys_cpu_present_map; -#define cpu_possible_map phys_cpu_present_map - -typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, - unsigned long, unsigned long); - -/* - * General functions that each host system must provide. - */ - -void sun4m_init_smp(void); -void sun4d_init_smp(void); - -void smp_callin(void); -void smp_boot_cpus(void); -void smp_store_cpu_info(int); - -struct seq_file; -void smp_bogo(struct seq_file *); -void smp_info(struct seq_file *); - -BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) -BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) -BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) -BTFIXUPDEF_BLACKBOX(load_current) - -#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) - -static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } -static inline void xc1(smpfunc_t func, unsigned long arg1) -{ smp_cross_call(func, arg1, 0, 0, 0, 0); } -static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) -{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } -static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3) -{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } -static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4) -{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } -static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, - unsigned long arg3, unsigned long arg4, unsigned long arg5) -{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } - -static inline int smp_call_function(void (*func)(void *info), void *info, int wait) -{ - xc1((smpfunc_t)func, (unsigned long)info); - return 0; -} - -static inline int cpu_logical_map(int cpu) -{ - return cpu; -} - -static inline int hard_smp4m_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("rd %%tbr, %0\n\t" - "srl %0, 12, %0\n\t" - "and %0, 3, %0\n\t" : - "=&r" (cpuid)); - return cpuid; -} - -static inline int hard_smp4d_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : - "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1)); - return cpuid; -} - -#ifndef MODULE -static inline int hard_smp_processor_id(void) -{ - int cpuid; - - /* Black box - sun4m - __asm__ __volatile__("rd %%tbr, %0\n\t" - "srl %0, 12, %0\n\t" - "and %0, 3, %0\n\t" : - "=&r" (cpuid)); - - sun4d - __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t" - "nop; nop" : - "=&r" (cpuid)); - See btfixup.h and btfixupprep.c to understand how a blackbox works. - */ - __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t" - "sethi %%hi(boot_cpu_id), %0\n\t" - "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" : - "=&r" (cpuid)); - return cpuid; -} +#ifndef ___ASM_SPARC_SMP_H +#define ___ASM_SPARC_SMP_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/smp_64.h> #else -static inline int hard_smp_processor_id(void) -{ - int cpuid; - - __asm__ __volatile__("mov %%o7, %%g1\n\t" - "call ___f___hard_smp_processor_id\n\t" - " nop\n\t" - "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2"); - return cpuid; -} +#include <asm-sparc/smp_32.h> +#endif #endif - -#define raw_smp_processor_id() (current_thread_info()->cpu) - -#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier -#define prof_counter(__cpu) cpu_data(__cpu).counter - -void smp_setup_cpu_possible_map(void); - -#endif /* !(__ASSEMBLY__) */ - -/* Sparc specific messages. */ -#define MSG_CROSS_CALL 0x0005 /* run func on cpus */ - -/* Empirical PROM processor mailbox constants. If the per-cpu mailbox - * contains something other than one of these then the ipi is from - * Linux's active_kernel_processor. This facility exists so that - * the boot monitor can capture all the other cpus when one catches - * a watchdog reset or the user enters the monitor using L1-A keys. - */ -#define MBOX_STOPCPU 0xFB -#define MBOX_IDLECPU 0xFC -#define MBOX_IDLECPU2 0xFD -#define MBOX_STOPCPU2 0xFE - -#else /* SMP */ - -#define hard_smp_processor_id() 0 -#define smp_setup_cpu_possible_map() do { } while (0) - -#endif /* !(SMP) */ - -#define NO_PROC_ID 0xFF - -#endif /* !(_SPARC_SMP_H) */ diff --git a/include/asm-sparc/smp_32.h b/include/asm-sparc/smp_32.h new file mode 100644 index 00000000000..7201752cf93 --- /dev/null +++ b/include/asm-sparc/smp_32.h @@ -0,0 +1,173 @@ +/* smp.h: Sparc specific SMP stuff. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef _SPARC_SMP_H +#define _SPARC_SMP_H + +#include <linux/threads.h> +#include <asm/head.h> +#include <asm/btfixup.h> + +#ifndef __ASSEMBLY__ + +#include <linux/cpumask.h> + +#endif /* __ASSEMBLY__ */ + +#ifdef CONFIG_SMP + +#ifndef __ASSEMBLY__ + +#include <asm/ptrace.h> +#include <asm/asi.h> +#include <asm/atomic.h> + +/* + * Private routines/data + */ + +extern unsigned char boot_cpu_id; +extern cpumask_t phys_cpu_present_map; +#define cpu_possible_map phys_cpu_present_map + +typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long, + unsigned long, unsigned long); + +/* + * General functions that each host system must provide. + */ + +void sun4m_init_smp(void); +void sun4d_init_smp(void); + +void smp_callin(void); +void smp_boot_cpus(void); +void smp_store_cpu_info(int); + +struct seq_file; +void smp_bogo(struct seq_file *); +void smp_info(struct seq_file *); + +BTFIXUPDEF_CALL(void, smp_cross_call, smpfunc_t, unsigned long, unsigned long, unsigned long, unsigned long, unsigned long) +BTFIXUPDEF_CALL(int, __hard_smp_processor_id, void) +BTFIXUPDEF_BLACKBOX(hard_smp_processor_id) +BTFIXUPDEF_BLACKBOX(load_current) + +#define smp_cross_call(func,arg1,arg2,arg3,arg4,arg5) BTFIXUP_CALL(smp_cross_call)(func,arg1,arg2,arg3,arg4,arg5) + +static inline void xc0(smpfunc_t func) { smp_cross_call(func, 0, 0, 0, 0, 0); } +static inline void xc1(smpfunc_t func, unsigned long arg1) +{ smp_cross_call(func, arg1, 0, 0, 0, 0); } +static inline void xc2(smpfunc_t func, unsigned long arg1, unsigned long arg2) +{ smp_cross_call(func, arg1, arg2, 0, 0, 0); } +static inline void xc3(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3) +{ smp_cross_call(func, arg1, arg2, arg3, 0, 0); } +static inline void xc4(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4) +{ smp_cross_call(func, arg1, arg2, arg3, arg4, 0); } +static inline void xc5(smpfunc_t func, unsigned long arg1, unsigned long arg2, + unsigned long arg3, unsigned long arg4, unsigned long arg5) +{ smp_cross_call(func, arg1, arg2, arg3, arg4, arg5); } + +static inline int smp_call_function(void (*func)(void *info), void *info, int wait) +{ + xc1((smpfunc_t)func, (unsigned long)info); + return 0; +} + +static inline int cpu_logical_map(int cpu) +{ + return cpu; +} + +static inline int hard_smp4m_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("rd %%tbr, %0\n\t" + "srl %0, 12, %0\n\t" + "and %0, 3, %0\n\t" : + "=&r" (cpuid)); + return cpuid; +} + +static inline int hard_smp4d_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("lda [%%g0] %1, %0\n\t" : + "=&r" (cpuid) : "i" (ASI_M_VIKING_TMP1)); + return cpuid; +} + +#ifndef MODULE +static inline int hard_smp_processor_id(void) +{ + int cpuid; + + /* Black box - sun4m + __asm__ __volatile__("rd %%tbr, %0\n\t" + "srl %0, 12, %0\n\t" + "and %0, 3, %0\n\t" : + "=&r" (cpuid)); + - sun4d + __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t" + "nop; nop" : + "=&r" (cpuid)); + See btfixup.h and btfixupprep.c to understand how a blackbox works. + */ + __asm__ __volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t" + "sethi %%hi(boot_cpu_id), %0\n\t" + "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" : + "=&r" (cpuid)); + return cpuid; +} +#else +static inline int hard_smp_processor_id(void) +{ + int cpuid; + + __asm__ __volatile__("mov %%o7, %%g1\n\t" + "call ___f___hard_smp_processor_id\n\t" + " nop\n\t" + "mov %%g2, %0\n\t" : "=r"(cpuid) : : "g1", "g2"); + return cpuid; +} +#endif + +#define raw_smp_processor_id() (current_thread_info()->cpu) + +#define prof_multiplier(__cpu) cpu_data(__cpu).multiplier +#define prof_counter(__cpu) cpu_data(__cpu).counter + +void smp_setup_cpu_possible_map(void); + +#endif /* !(__ASSEMBLY__) */ + +/* Sparc specific messages. */ +#define MSG_CROSS_CALL 0x0005 /* run func on cpus */ + +/* Empirical PROM processor mailbox constants. If the per-cpu mailbox + * contains something other than one of these then the ipi is from + * Linux's active_kernel_processor. This facility exists so that + * the boot monitor can capture all the other cpus when one catches + * a watchdog reset or the user enters the monitor using L1-A keys. + */ +#define MBOX_STOPCPU 0xFB +#define MBOX_IDLECPU 0xFC +#define MBOX_IDLECPU2 0xFD +#define MBOX_STOPCPU2 0xFE + +#else /* SMP */ + +#define hard_smp_processor_id() 0 +#define smp_setup_cpu_possible_map() do { } while (0) + +#endif /* !(SMP) */ + +#define NO_PROC_ID 0xFF + +#endif /* !(_SPARC_SMP_H) */ diff --git a/include/asm-sparc/smp_64.h b/include/asm-sparc/smp_64.h new file mode 100644 index 00000000000..4cfe09c51f1 --- /dev/null +++ b/include/asm-sparc/smp_64.h @@ -0,0 +1,64 @@ +/* smp.h: Sparc64 specific SMP stuff. + * + * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_SMP_H +#define _SPARC64_SMP_H + +#include <linux/threads.h> +#include <asm/asi.h> +#include <asm/starfire.h> +#include <asm/spitfire.h> + +#ifndef __ASSEMBLY__ + +#include <linux/cpumask.h> +#include <linux/cache.h> + +#endif /* !(__ASSEMBLY__) */ + +#ifdef CONFIG_SMP + +#ifndef __ASSEMBLY__ + +/* + * Private routines/data + */ + +#include <linux/bitops.h> +#include <asm/atomic.h> +#include <asm/percpu.h> + +DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); +extern cpumask_t cpu_core_map[NR_CPUS]; +extern int sparc64_multi_core; + +/* + * General functions that each host system must provide. + */ + +extern int hard_smp_processor_id(void); +#define raw_smp_processor_id() (current_thread_info()->cpu) + +extern void smp_fill_in_sib_core_maps(void); +extern void cpu_play_dead(void); + +extern void smp_fetch_global_regs(void); + +#ifdef CONFIG_HOTPLUG_CPU +extern int __cpu_disable(void); +extern void __cpu_die(unsigned int cpu); +#endif + +#endif /* !(__ASSEMBLY__) */ + +#else + +#define hard_smp_processor_id() 0 +#define smp_fill_in_sib_core_maps() do { } while (0) +#define smp_fetch_global_regs() do { } while (0) + +#endif /* !(CONFIG_SMP) */ + +#endif /* !(_SPARC64_SMP_H) */ diff --git a/include/asm-sparc/spinlock.h b/include/asm-sparc/spinlock.h index de2249b267c..3b71c50b72e 100644 --- a/include/asm-sparc/spinlock.h +++ b/include/asm-sparc/spinlock.h @@ -1,192 +1,8 @@ -/* spinlock.h: 32-bit Sparc spinlock support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC_SPINLOCK_H -#define __SPARC_SPINLOCK_H - -#include <linux/threads.h> /* For NR_CPUS */ - -#ifndef __ASSEMBLY__ - -#include <asm/psr.h> - -#define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) - -#define __raw_spin_unlock_wait(lock) \ - do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - __asm__ __volatile__( - "\n1:\n\t" - "ldstub [%0], %%g2\n\t" - "orcc %%g2, 0x0, %%g0\n\t" - "bne,a 2f\n\t" - " ldub [%0], %%g2\n\t" - ".subsection 2\n" - "2:\n\t" - "orcc %%g2, 0x0, %%g0\n\t" - "bne,a 2b\n\t" - " ldub [%0], %%g2\n\t" - "b,a 1b\n\t" - ".previous\n" - : /* no outputs */ - : "r" (lock) - : "g2", "memory", "cc"); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned int result; - __asm__ __volatile__("ldstub [%1], %0" - : "=r" (result) - : "r" (lock) - : "memory"); - return (result == 0); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); -} - -/* Read-write spinlocks, allowing multiple readers - * but only one writer. - * - * NOTE! it is quite common to have readers in interrupts - * but no interrupt writers. For those circumstances we - * can "mix" irq-safe locks - any writer needs to get a - * irq-safe write-lock, but readers can get non-irqsafe - * read-locks. - * - * XXX This might create some problems with my dual spinlock - * XXX scheme, deadlocks etc. -DaveM - * - * Sort of like atomic_t's on Sparc, but even more clever. - * - * ------------------------------------ - * | 24-bit counter | wlock | raw_rwlock_t - * ------------------------------------ - * 31 8 7 0 - * - * wlock signifies the one writer is in or somebody is updating - * counter. For a writer, if he successfully acquires the wlock, - * but counter is non-zero, he has to release the lock and wait, - * till both counter and wlock are zero. - * - * Unfortunately this scheme limits us to ~16,000,000 cpus. - */ -static inline void __read_lock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_enter\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); -} - -#define __raw_read_lock(lock) \ -do { unsigned long flags; \ - local_irq_save(flags); \ - __read_lock(lock); \ - local_irq_restore(flags); \ -} while(0) - -static inline void __read_unlock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_exit\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); -} - -#define __raw_read_unlock(lock) \ -do { unsigned long flags; \ - local_irq_save(flags); \ - __read_unlock(lock); \ - local_irq_restore(flags); \ -} while(0) - -static inline void __raw_write_lock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_write_enter\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : /* no outputs */ - : "r" (lp) - : "g2", "g4", "memory", "cc"); - *(volatile __u32 *)&lp->lock = ~0U; -} - -static inline int __raw_write_trylock(raw_rwlock_t *rw) -{ - unsigned int val; - - __asm__ __volatile__("ldstub [%1 + 3], %0" - : "=r" (val) - : "r" (&rw->lock) - : "memory"); - - if (val == 0) { - val = rw->lock & ~0xff; - if (val) - ((volatile u8*)&rw->lock)[3] = 0; - else - *(volatile u32*)&rw->lock = ~0U; - } - - return (val == 0); -} - -static inline int __read_trylock(raw_rwlock_t *rw) -{ - register raw_rwlock_t *lp asm("g1"); - register int res asm("o0"); - lp = rw; - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___rw_read_try\n\t" - " ldstub [%%g1 + 3], %%g2\n" - : "=r" (res) - : "r" (lp) - : "g2", "g4", "memory", "cc"); - return res; -} - -#define __raw_read_trylock(lock) \ -({ unsigned long flags; \ - int res; \ - local_irq_save(flags); \ - res = __read_trylock(lock); \ - local_irq_restore(flags); \ - res; \ -}) - -#define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) - -#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) -#define __raw_write_can_lock(rw) (!(rw)->lock) - -#endif /* !(__ASSEMBLY__) */ - -#endif /* __SPARC_SPINLOCK_H */ +#ifndef ___ASM_SPARC_SPINLOCK_H +#define ___ASM_SPARC_SPINLOCK_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/spinlock_64.h> +#else +#include <asm-sparc/spinlock_32.h> +#endif +#endif diff --git a/include/asm-sparc/spinlock_32.h b/include/asm-sparc/spinlock_32.h new file mode 100644 index 00000000000..de2249b267c --- /dev/null +++ b/include/asm-sparc/spinlock_32.h @@ -0,0 +1,192 @@ +/* spinlock.h: 32-bit Sparc spinlock support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC_SPINLOCK_H +#define __SPARC_SPINLOCK_H + +#include <linux/threads.h> /* For NR_CPUS */ + +#ifndef __ASSEMBLY__ + +#include <asm/psr.h> + +#define __raw_spin_is_locked(lock) (*((volatile unsigned char *)(lock)) != 0) + +#define __raw_spin_unlock_wait(lock) \ + do { while (__raw_spin_is_locked(lock)) cpu_relax(); } while (0) + +static inline void __raw_spin_lock(raw_spinlock_t *lock) +{ + __asm__ __volatile__( + "\n1:\n\t" + "ldstub [%0], %%g2\n\t" + "orcc %%g2, 0x0, %%g0\n\t" + "bne,a 2f\n\t" + " ldub [%0], %%g2\n\t" + ".subsection 2\n" + "2:\n\t" + "orcc %%g2, 0x0, %%g0\n\t" + "bne,a 2b\n\t" + " ldub [%0], %%g2\n\t" + "b,a 1b\n\t" + ".previous\n" + : /* no outputs */ + : "r" (lock) + : "g2", "memory", "cc"); +} + +static inline int __raw_spin_trylock(raw_spinlock_t *lock) +{ + unsigned int result; + __asm__ __volatile__("ldstub [%1], %0" + : "=r" (result) + : "r" (lock) + : "memory"); + return (result == 0); +} + +static inline void __raw_spin_unlock(raw_spinlock_t *lock) +{ + __asm__ __volatile__("stb %%g0, [%0]" : : "r" (lock) : "memory"); +} + +/* Read-write spinlocks, allowing multiple readers + * but only one writer. + * + * NOTE! it is quite common to have readers in interrupts + * but no interrupt writers. For those circumstances we + * can "mix" irq-safe locks - any writer needs to get a + * irq-safe write-lock, but readers can get non-irqsafe + * read-locks. + * + * XXX This might create some problems with my dual spinlock + * XXX scheme, deadlocks etc. -DaveM + * + * Sort of like atomic_t's on Sparc, but even more clever. + * + * ------------------------------------ + * | 24-bit counter | wlock | raw_rwlock_t + * ------------------------------------ + * 31 8 7 0 + * + * wlock signifies the one writer is in or somebody is updating + * counter. For a writer, if he successfully acquires the wlock, + * but counter is non-zero, he has to release the lock and wait, + * till both counter and wlock are zero. + * + * Unfortunately this scheme limits us to ~16,000,000 cpus. + */ +static inline void __read_lock(raw_rwlock_t *rw) +{ + register raw_rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___rw_read_enter\n\t" + " ldstub [%%g1 + 3], %%g2\n" + : /* no outputs */ + : "r" (lp) + : "g2", "g4", "memory", "cc"); +} + +#define __raw_read_lock(lock) \ +do { unsigned long flags; \ + local_irq_save(flags); \ + __read_lock(lock); \ + local_irq_restore(flags); \ +} while(0) + +static inline void __read_unlock(raw_rwlock_t *rw) +{ + register raw_rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___rw_read_exit\n\t" + " ldstub [%%g1 + 3], %%g2\n" + : /* no outputs */ + : "r" (lp) + : "g2", "g4", "memory", "cc"); +} + +#define __raw_read_unlock(lock) \ +do { unsigned long flags; \ + local_irq_save(flags); \ + __read_unlock(lock); \ + local_irq_restore(flags); \ +} while(0) + +static inline void __raw_write_lock(raw_rwlock_t *rw) +{ + register raw_rwlock_t *lp asm("g1"); + lp = rw; + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___rw_write_enter\n\t" + " ldstub [%%g1 + 3], %%g2\n" + : /* no outputs */ + : "r" (lp) + : "g2", "g4", "memory", "cc"); + *(volatile __u32 *)&lp->lock = ~0U; +} + +static inline int __raw_write_trylock(raw_rwlock_t *rw) +{ + unsigned int val; + + __asm__ __volatile__("ldstub [%1 + 3], %0" + : "=r" (val) + : "r" (&rw->lock) + : "memory"); + + if (val == 0) { + val = rw->lock & ~0xff; + if (val) + ((volatile u8*)&rw->lock)[3] = 0; + else + *(volatile u32*)&rw->lock = ~0U; + } + + return (val == 0); +} + +static inline int __read_trylock(raw_rwlock_t *rw) +{ + register raw_rwlock_t *lp asm("g1"); + register int res asm("o0"); + lp = rw; + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___rw_read_try\n\t" + " ldstub [%%g1 + 3], %%g2\n" + : "=r" (res) + : "r" (lp) + : "g2", "g4", "memory", "cc"); + return res; +} + +#define __raw_read_trylock(lock) \ +({ unsigned long flags; \ + int res; \ + local_irq_save(flags); \ + res = __read_trylock(lock); \ + local_irq_restore(flags); \ + res; \ +}) + +#define __raw_write_unlock(rw) do { (rw)->lock = 0; } while(0) + +#define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock) + +#define _raw_spin_relax(lock) cpu_relax() +#define _raw_read_relax(lock) cpu_relax() +#define _raw_write_relax(lock) cpu_relax() + +#define __raw_read_can_lock(rw) (!((rw)->lock & 0xff)) +#define __raw_write_can_lock(rw) (!(rw)->lock) + +#endif /* !(__ASSEMBLY__) */ + +#endif /* __SPARC_SPINLOCK_H */ diff --git a/include/asm-sparc/spinlock_64.h b/include/asm-sparc/spinlock_64.h new file mode 100644 index 00000000000..0006fe9f8c7 --- /dev/null +++ b/include/asm-sparc/spinlock_64.h @@ -0,0 +1,250 @@ +/* spinlock.h: 64-bit Sparc spinlock support. + * + * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) + */ + +#ifndef __SPARC64_SPINLOCK_H +#define __SPARC64_SPINLOCK_H + +#include <linux/threads.h> /* For NR_CPUS */ + +#ifndef __ASSEMBLY__ + +/* To get debugging spinlocks which detect and catch + * deadlock situations, set CONFIG_DEBUG_SPINLOCK + * and rebuild your kernel. + */ + +/* All of these locking primitives are expected to work properly + * even in an RMO memory model, which currently is what the kernel + * runs in. + * + * There is another issue. Because we play games to save cycles + * in the non-contention case, we need to be extra careful about + * branch targets into the "spinning" code. They live in their + * own section, but the newer V9 branches have a shorter range + * than the traditional 32-bit sparc branch variants. The rule + * is that the branches that go into and out of the spinner sections + * must be pre-V9 branches. + */ + +#define __raw_spin_is_locked(lp) ((lp)->lock != 0) + +#define __raw_spin_unlock_wait(lp) \ + do { rmb(); \ + } while((lp)->lock) + +static inline void __raw_spin_lock(raw_spinlock_t *lock) +{ + unsigned long tmp; + + __asm__ __volatile__( +"1: ldstub [%1], %0\n" +" membar #StoreLoad | #StoreStore\n" +" brnz,pn %0, 2f\n" +" nop\n" +" .subsection 2\n" +"2: ldub [%1], %0\n" +" membar #LoadLoad\n" +" brnz,pt %0, 2b\n" +" nop\n" +" ba,a,pt %%xcc, 1b\n" +" .previous" + : "=&r" (tmp) + : "r" (lock) + : "memory"); +} + +static inline int __raw_spin_trylock(raw_spinlock_t *lock) +{ + unsigned long result; + + __asm__ __volatile__( +" ldstub [%1], %0\n" +" membar #StoreLoad | #StoreStore" + : "=r" (result) + : "r" (lock) + : "memory"); + + return (result == 0UL); +} + +static inline void __raw_spin_unlock(raw_spinlock_t *lock) +{ + __asm__ __volatile__( +" membar #StoreStore | #LoadStore\n" +" stb %%g0, [%0]" + : /* No outputs */ + : "r" (lock) + : "memory"); +} + +static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +"1: ldstub [%2], %0\n" +" membar #StoreLoad | #StoreStore\n" +" brnz,pn %0, 2f\n" +" nop\n" +" .subsection 2\n" +"2: rdpr %%pil, %1\n" +" wrpr %3, %%pil\n" +"3: ldub [%2], %0\n" +" membar #LoadLoad\n" +" brnz,pt %0, 3b\n" +" nop\n" +" ba,pt %%xcc, 1b\n" +" wrpr %1, %%pil\n" +" .previous" + : "=&r" (tmp1), "=&r" (tmp2) + : "r"(lock), "r"(flags) + : "memory"); +} + +/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */ + +static void inline __read_lock(raw_rwlock_t *lock) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__ ( +"1: ldsw [%2], %0\n" +" brlz,pn %0, 2f\n" +"4: add %0, 1, %1\n" +" cas [%2], %0, %1\n" +" cmp %0, %1\n" +" membar #StoreLoad | #StoreStore\n" +" bne,pn %%icc, 1b\n" +" nop\n" +" .subsection 2\n" +"2: ldsw [%2], %0\n" +" membar #LoadLoad\n" +" brlz,pt %0, 2b\n" +" nop\n" +" ba,a,pt %%xcc, 4b\n" +" .previous" + : "=&r" (tmp1), "=&r" (tmp2) + : "r" (lock) + : "memory"); +} + +static int inline __read_trylock(raw_rwlock_t *lock) +{ + int tmp1, tmp2; + + __asm__ __volatile__ ( +"1: ldsw [%2], %0\n" +" brlz,a,pn %0, 2f\n" +" mov 0, %0\n" +" add %0, 1, %1\n" +" cas [%2], %0, %1\n" +" cmp %0, %1\n" +" membar #StoreLoad | #StoreStore\n" +" bne,pn %%icc, 1b\n" +" mov 1, %0\n" +"2:" + : "=&r" (tmp1), "=&r" (tmp2) + : "r" (lock) + : "memory"); + + return tmp1; +} + +static void inline __read_unlock(raw_rwlock_t *lock) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" +"1: lduw [%2], %0\n" +" sub %0, 1, %1\n" +" cas [%2], %0, %1\n" +" cmp %0, %1\n" +" bne,pn %%xcc, 1b\n" +" nop" + : "=&r" (tmp1), "=&r" (tmp2) + : "r" (lock) + : "memory"); +} + +static void inline __write_lock(raw_rwlock_t *lock) +{ + unsigned long mask, tmp1, tmp2; + + mask = 0x80000000UL; + + __asm__ __volatile__( +"1: lduw [%2], %0\n" +" brnz,pn %0, 2f\n" +"4: or %0, %3, %1\n" +" cas [%2], %0, %1\n" +" cmp %0, %1\n" +" membar #StoreLoad | #StoreStore\n" +" bne,pn %%icc, 1b\n" +" nop\n" +" .subsection 2\n" +"2: lduw [%2], %0\n" +" membar #LoadLoad\n" +" brnz,pt %0, 2b\n" +" nop\n" +" ba,a,pt %%xcc, 4b\n" +" .previous" + : "=&r" (tmp1), "=&r" (tmp2) + : "r" (lock), "r" (mask) + : "memory"); +} + +static void inline __write_unlock(raw_rwlock_t *lock) +{ + __asm__ __volatile__( +" membar #LoadStore | #StoreStore\n" +" stw %%g0, [%0]" + : /* no outputs */ + : "r" (lock) + : "memory"); +} + +static int inline __write_trylock(raw_rwlock_t *lock) +{ + unsigned long mask, tmp1, tmp2, result; + + mask = 0x80000000UL; + + __asm__ __volatile__( +" mov 0, %2\n" +"1: lduw [%3], %0\n" +" brnz,pn %0, 2f\n" +" or %0, %4, %1\n" +" cas [%3], %0, %1\n" +" cmp %0, %1\n" +" membar #StoreLoad | #StoreStore\n" +" bne,pn %%icc, 1b\n" +" nop\n" +" mov 1, %2\n" +"2:" + : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result) + : "r" (lock), "r" (mask) + : "memory"); + + return result; +} + +#define __raw_read_lock(p) __read_lock(p) +#define __raw_read_trylock(p) __read_trylock(p) +#define __raw_read_unlock(p) __read_unlock(p) +#define __raw_write_lock(p) __write_lock(p) +#define __raw_write_unlock(p) __write_unlock(p) +#define __raw_write_trylock(p) __write_trylock(p) + +#define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) +#define __raw_write_can_lock(rw) (!(rw)->lock) + +#define _raw_spin_relax(lock) cpu_relax() +#define _raw_read_relax(lock) cpu_relax() +#define _raw_write_relax(lock) cpu_relax() + +#endif /* !(__ASSEMBLY__) */ + +#endif /* !(__SPARC64_SPINLOCK_H) */ diff --git a/include/asm-sparc/stat.h b/include/asm-sparc/stat.h index 2299e1d5d94..9fdcaf8c9cd 100644 --- a/include/asm-sparc/stat.h +++ b/include/asm-sparc/stat.h @@ -1,76 +1,8 @@ -#ifndef _SPARC_STAT_H -#define _SPARC_STAT_H - -#include <linux/types.h> - -struct __old_kernel_stat { - unsigned short st_dev; - unsigned short st_ino; - unsigned short st_mode; - unsigned short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - unsigned long st_size; - unsigned long st_atime; - unsigned long st_mtime; - unsigned long st_ctime; -}; - -struct stat { - unsigned short st_dev; - unsigned long st_ino; - unsigned short st_mode; - short st_nlink; - unsigned short st_uid; - unsigned short st_gid; - unsigned short st_rdev; - long st_size; - long st_atime; - unsigned long st_atime_nsec; - long st_mtime; - unsigned long st_mtime_nsec; - long st_ctime; - unsigned long st_ctime_nsec; - long st_blksize; - long st_blocks; - unsigned long __unused4[2]; -}; - -#define STAT_HAVE_NSEC 1 - -struct stat64 { - unsigned long long st_dev; - - unsigned long long st_ino; - - unsigned int st_mode; - unsigned int st_nlink; - - unsigned int st_uid; - unsigned int st_gid; - - unsigned long long st_rdev; - - unsigned char __pad3[8]; - - long long st_size; - unsigned int st_blksize; - - unsigned char __pad4[8]; - unsigned int st_blocks; - - unsigned int st_atime; - unsigned int st_atime_nsec; - - unsigned int st_mtime; - unsigned int st_mtime_nsec; - - unsigned int st_ctime; - unsigned int st_ctime_nsec; - - unsigned int __unused4; - unsigned int __unused5; -}; - +#ifndef ___ASM_SPARC_STAT_H +#define ___ASM_SPARC_STAT_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/stat_64.h> +#else +#include <asm-sparc/stat_32.h> +#endif #endif diff --git a/include/asm-sparc/stat_32.h b/include/asm-sparc/stat_32.h new file mode 100644 index 00000000000..2299e1d5d94 --- /dev/null +++ b/include/asm-sparc/stat_32.h @@ -0,0 +1,76 @@ +#ifndef _SPARC_STAT_H +#define _SPARC_STAT_H + +#include <linux/types.h> + +struct __old_kernel_stat { + unsigned short st_dev; + unsigned short st_ino; + unsigned short st_mode; + unsigned short st_nlink; + unsigned short st_uid; + unsigned short st_gid; + unsigned short st_rdev; + unsigned long st_size; + unsigned long st_atime; + unsigned long st_mtime; + unsigned long st_ctime; +}; + +struct stat { + unsigned short st_dev; + unsigned long st_ino; + unsigned short st_mode; + short st_nlink; + unsigned short st_uid; + unsigned short st_gid; + unsigned short st_rdev; + long st_size; + long st_atime; + unsigned long st_atime_nsec; + long st_mtime; + unsigned long st_mtime_nsec; + long st_ctime; + unsigned long st_ctime_nsec; + long st_blksize; + long st_blocks; + unsigned long __unused4[2]; +}; + +#define STAT_HAVE_NSEC 1 + +struct stat64 { + unsigned long long st_dev; + + unsigned long long st_ino; + + unsigned int st_mode; + unsigned int st_nlink; + + unsigned int st_uid; + unsigned int st_gid; + + unsigned long long st_rdev; + + unsigned char __pad3[8]; + + long long st_size; + unsigned int st_blksize; + + unsigned char __pad4[8]; + unsigned int st_blocks; + + unsigned int st_atime; + unsigned int st_atime_nsec; + + unsigned int st_mtime; + unsigned int st_mtime_nsec; + + unsigned int st_ctime; + unsigned int st_ctime_nsec; + + unsigned int __unused4; + unsigned int __unused5; +}; + +#endif diff --git a/include/asm-sparc/stat_64.h b/include/asm-sparc/stat_64.h new file mode 100644 index 00000000000..9650fdea847 --- /dev/null +++ b/include/asm-sparc/stat_64.h @@ -0,0 +1,47 @@ +#ifndef _SPARC64_STAT_H +#define _SPARC64_STAT_H + +#include <linux/types.h> + +struct stat { + unsigned st_dev; + ino_t st_ino; + mode_t st_mode; + short st_nlink; + uid_t st_uid; + gid_t st_gid; + unsigned st_rdev; + off_t st_size; + time_t st_atime; + time_t st_mtime; + time_t st_ctime; + off_t st_blksize; + off_t st_blocks; + unsigned long __unused4[2]; +}; + +struct stat64 { + unsigned long st_dev; + unsigned long st_ino; + unsigned long st_nlink; + + unsigned int st_mode; + unsigned int st_uid; + unsigned int st_gid; + unsigned int __pad0; + + unsigned long st_rdev; + long st_size; + long st_blksize; + long st_blocks; + + unsigned long st_atime; + unsigned long st_atime_nsec; + unsigned long st_mtime; + unsigned long st_mtime_nsec; + unsigned long st_ctime; + unsigned long st_ctime_nsec; + long __unused[3]; +}; + +#endif diff --git a/include/asm-sparc/statfs.h b/include/asm-sparc/statfs.h index 304520fa886..a70cc52e701 100644 --- a/include/asm-sparc/statfs.h +++ b/include/asm-sparc/statfs.h @@ -1,6 +1,8 @@ -#ifndef _SPARC_STATFS_H -#define _SPARC_STATFS_H - -#include <asm-generic/statfs.h> - +#ifndef ___ASM_SPARC_STATFS_H +#define ___ASM_SPARC_STATFS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/statfs_64.h> +#else +#include <asm-sparc/statfs_32.h> +#endif #endif diff --git a/include/asm-sparc/statfs_32.h b/include/asm-sparc/statfs_32.h new file mode 100644 index 00000000000..304520fa886 --- /dev/null +++ b/include/asm-sparc/statfs_32.h @@ -0,0 +1,6 @@ +#ifndef _SPARC_STATFS_H +#define _SPARC_STATFS_H + +#include <asm-generic/statfs.h> + +#endif diff --git a/include/asm-sparc/statfs_64.h b/include/asm-sparc/statfs_64.h new file mode 100644 index 00000000000..79b3c890a5f --- /dev/null +++ b/include/asm-sparc/statfs_64.h @@ -0,0 +1,54 @@ +#ifndef _SPARC64_STATFS_H +#define _SPARC64_STATFS_H + +#ifndef __KERNEL_STRICT_NAMES + +#include <linux/types.h> + +typedef __kernel_fsid_t fsid_t; + +#endif + +struct statfs { + long f_type; + long f_bsize; + long f_blocks; + long f_bfree; + long f_bavail; + long f_files; + long f_ffree; + __kernel_fsid_t f_fsid; + long f_namelen; + long f_frsize; + long f_spare[5]; +}; + +struct statfs64 { + long f_type; + long f_bsize; + long f_blocks; + long f_bfree; + long f_bavail; + long f_files; + long f_ffree; + __kernel_fsid_t f_fsid; + long f_namelen; + long f_frsize; + long f_spare[5]; +}; + +struct compat_statfs64 { + __u32 f_type; + __u32 f_bsize; + __u64 f_blocks; + __u64 f_bfree; + __u64 f_bavail; + __u64 f_files; + __u64 f_ffree; + __kernel_fsid_t f_fsid; + __u32 f_namelen; + __u32 f_frsize; + __u32 f_spare[5]; +}; + +#endif diff --git a/include/asm-sparc/string.h b/include/asm-sparc/string.h index 8d7c0dd4f29..14c04c7697a 100644 --- a/include/asm-sparc/string.h +++ b/include/asm-sparc/string.h @@ -1,205 +1,8 @@ -/* - * string.h: External definitions for optimized assembly string - * routines for the Linux Kernel. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __SPARC_STRING_H__ -#define __SPARC_STRING_H__ - -#include <asm/page.h> - -/* Really, userland/ksyms should not see any of this stuff. */ - -#ifdef __KERNEL__ - -extern void __memmove(void *,const void *,__kernel_size_t); -extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); -extern __kernel_size_t __memset(void *,int,__kernel_size_t); - -#ifndef EXPORT_SYMTAB_STROPS - -/* First the mem*() things. */ -#define __HAVE_ARCH_MEMMOVE -#undef memmove -#define memmove(_to, _from, _n) \ -({ \ - void *_t = (_to); \ - __memmove(_t, (_from), (_n)); \ - _t; \ -}) - -#define __HAVE_ARCH_MEMCPY - -static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) -{ - extern void __copy_1page(void *, const void *); - - if(n <= 32) { - __builtin_memcpy(to, from, n); - } else if (((unsigned int) to & 7) != 0) { - /* Destination is not aligned on the double-word boundary */ - __memcpy(to, from, n); - } else { - switch(n) { - case PAGE_SIZE: - __copy_1page(to, from); - break; - default: - __memcpy(to, from, n); - break; - } - } - return to; -} - -static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n) -{ - __memcpy(to, from, n); - return to; -} - -#undef memcpy -#define memcpy(t, f, n) \ -(__builtin_constant_p(n) ? \ - __constant_memcpy((t),(f),(n)) : \ - __nonconstant_memcpy((t),(f),(n))) - -#define __HAVE_ARCH_MEMSET - -static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) -{ - extern void bzero_1page(void *); - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if(!c) { - if(count == PAGE_SIZE) - bzero_1page(s); - else - __bzero(s, count); - } else { - __memset(s, c, count); - } - return s; -} - -static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) -{ - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if(!c) - __bzero(s, count); - else - __memset(s, c, count); - return s; -} - -static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) -{ - __memset(s, c, count); - return s; -} - -#undef memset -#define memset(s, c, count) \ -(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ - __constant_c_and_count_memset((s), (c), (count)) : \ - __constant_c_memset((s), (c), (count))) \ - : __nonconstant_memset((s), (c), (count))) - -#define __HAVE_ARCH_MEMSCAN - -#undef memscan -#define memscan(__arg0, __char, __arg2) \ -({ \ - extern void *__memscan_zero(void *, size_t); \ - extern void *__memscan_generic(void *, int, size_t); \ - void *__retval, *__addr = (__arg0); \ - size_t __size = (__arg2); \ - \ - if(__builtin_constant_p(__char) && !(__char)) \ - __retval = __memscan_zero(__addr, __size); \ - else \ - __retval = __memscan_generic(__addr, (__char), __size); \ - \ - __retval; \ -}) - -#define __HAVE_ARCH_MEMCMP -extern int memcmp(const void *,const void *,__kernel_size_t); - -/* Now the str*() stuff... */ -#define __HAVE_ARCH_STRLEN -extern __kernel_size_t strlen(const char *); - -#define __HAVE_ARCH_STRNCMP - -extern int __strncmp(const char *, const char *, __kernel_size_t); - -static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count) -{ - register int retval; - switch(count) { - case 0: return 0; - case 1: return (src[0] - dest[0]); - case 2: retval = (src[0] - dest[0]); - if(!retval && src[0]) - retval = (src[1] - dest[1]); - return retval; - case 3: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) - retval = (src[2] - dest[2]); - } - return retval; - case 4: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if (!retval && src[2]) - retval = (src[3] - dest[3]); - } - } - return retval; - case 5: retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if (!retval && src[2]) { - retval = (src[3] - dest[3]); - if (!retval && src[3]) - retval = (src[4] - dest[4]); - } - } - } - return retval; - default: - retval = (src[0] - dest[0]); - if(!retval && src[0]) { - retval = (src[1] - dest[1]); - if(!retval && src[1]) { - retval = (src[2] - dest[2]); - if(!retval && src[2]) - retval = __strncmp(src+3,dest+3,count-3); - } - } - return retval; - } -} - -#undef strncmp -#define strncmp(__arg0, __arg1, __arg2) \ -(__builtin_constant_p(__arg2) ? \ - __constant_strncmp(__arg0, __arg1, __arg2) : \ - __strncmp(__arg0, __arg1, __arg2)) - -#endif /* !EXPORT_SYMTAB_STROPS */ - -#endif /* __KERNEL__ */ - -#endif /* !(__SPARC_STRING_H__) */ +#ifndef ___ASM_SPARC_STRING_H +#define ___ASM_SPARC_STRING_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/string_64.h> +#else +#include <asm-sparc/string_32.h> +#endif +#endif diff --git a/include/asm-sparc/string_32.h b/include/asm-sparc/string_32.h new file mode 100644 index 00000000000..6c5fddb7e6b --- /dev/null +++ b/include/asm-sparc/string_32.h @@ -0,0 +1,205 @@ +/* + * string.h: External definitions for optimized assembly string + * routines for the Linux Kernel. + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ + +#ifndef __SPARC_STRING_H__ +#define __SPARC_STRING_H__ + +#include <asm/page.h> + +/* Really, userland/ksyms should not see any of this stuff. */ + +#ifdef __KERNEL__ + +extern void __memmove(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memcpy(void *,const void *,__kernel_size_t); +extern __kernel_size_t __memset(void *,int,__kernel_size_t); + +#ifndef EXPORT_SYMTAB_STROPS + +/* First the mem*() things. */ +#define __HAVE_ARCH_MEMMOVE +#undef memmove +#define memmove(_to, _from, _n) \ +({ \ + void *_t = (_to); \ + __memmove(_t, (_from), (_n)); \ + _t; \ +}) + +#define __HAVE_ARCH_MEMCPY + +static inline void *__constant_memcpy(void *to, const void *from, __kernel_size_t n) +{ + extern void __copy_1page(void *, const void *); + + if(n <= 32) { + __builtin_memcpy(to, from, n); + } else if (((unsigned int) to & 7) != 0) { + /* Destination is not aligned on the double-word boundary */ + __memcpy(to, from, n); + } else { + switch(n) { + case PAGE_SIZE: + __copy_1page(to, from); + break; + default: + __memcpy(to, from, n); + break; + } + } + return to; +} + +static inline void *__nonconstant_memcpy(void *to, const void *from, __kernel_size_t n) +{ + __memcpy(to, from, n); + return to; +} + +#undef memcpy +#define memcpy(t, f, n) \ +(__builtin_constant_p(n) ? \ + __constant_memcpy((t),(f),(n)) : \ + __nonconstant_memcpy((t),(f),(n))) + +#define __HAVE_ARCH_MEMSET + +static inline void *__constant_c_and_count_memset(void *s, char c, __kernel_size_t count) +{ + extern void bzero_1page(void *); + extern __kernel_size_t __bzero(void *, __kernel_size_t); + + if(!c) { + if(count == PAGE_SIZE) + bzero_1page(s); + else + __bzero(s, count); + } else { + __memset(s, c, count); + } + return s; +} + +static inline void *__constant_c_memset(void *s, char c, __kernel_size_t count) +{ + extern __kernel_size_t __bzero(void *, __kernel_size_t); + + if(!c) + __bzero(s, count); + else + __memset(s, c, count); + return s; +} + +static inline void *__nonconstant_memset(void *s, char c, __kernel_size_t count) +{ + __memset(s, c, count); + return s; +} + +#undef memset +#define memset(s, c, count) \ +(__builtin_constant_p(c) ? (__builtin_constant_p(count) ? \ + __constant_c_and_count_memset((s), (c), (count)) : \ + __constant_c_memset((s), (c), (count))) \ + : __nonconstant_memset((s), (c), (count))) + +#define __HAVE_ARCH_MEMSCAN + +#undef memscan +#define memscan(__arg0, __char, __arg2) \ +({ \ + extern void *__memscan_zero(void *, size_t); \ + extern void *__memscan_generic(void *, int, size_t); \ + void *__retval, *__addr = (__arg0); \ + size_t __size = (__arg2); \ + \ + if(__builtin_constant_p(__char) && !(__char)) \ + __retval = __memscan_zero(__addr, __size); \ + else \ + __retval = __memscan_generic(__addr, (__char), __size); \ + \ + __retval; \ +}) + +#define __HAVE_ARCH_MEMCMP +extern int memcmp(const void *,const void *,__kernel_size_t); + +/* Now the str*() stuff... */ +#define __HAVE_ARCH_STRLEN +extern __kernel_size_t strlen(const char *); + +#define __HAVE_ARCH_STRNCMP + +extern int __strncmp(const char *, const char *, __kernel_size_t); + +static inline int __constant_strncmp(const char *src, const char *dest, __kernel_size_t count) +{ + register int retval; + switch(count) { + case 0: return 0; + case 1: return (src[0] - dest[0]); + case 2: retval = (src[0] - dest[0]); + if(!retval && src[0]) + retval = (src[1] - dest[1]); + return retval; + case 3: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) + retval = (src[2] - dest[2]); + } + return retval; + case 4: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if (!retval && src[2]) + retval = (src[3] - dest[3]); + } + } + return retval; + case 5: retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if (!retval && src[2]) { + retval = (src[3] - dest[3]); + if (!retval && src[3]) + retval = (src[4] - dest[4]); + } + } + } + return retval; + default: + retval = (src[0] - dest[0]); + if(!retval && src[0]) { + retval = (src[1] - dest[1]); + if(!retval && src[1]) { + retval = (src[2] - dest[2]); + if(!retval && src[2]) + retval = __strncmp(src+3,dest+3,count-3); + } + } + return retval; + } +} + +#undef strncmp +#define strncmp(__arg0, __arg1, __arg2) \ +(__builtin_constant_p(__arg2) ? \ + __constant_strncmp(__arg0, __arg1, __arg2) : \ + __strncmp(__arg0, __arg1, __arg2)) + +#endif /* !EXPORT_SYMTAB_STROPS */ + +#endif /* __KERNEL__ */ + +#endif /* !(__SPARC_STRING_H__) */ diff --git a/include/asm-sparc/string_64.h b/include/asm-sparc/string_64.h new file mode 100644 index 00000000000..43161f2d17e --- /dev/null +++ b/include/asm-sparc/string_64.h @@ -0,0 +1,83 @@ +/* + * string.h: External definitions for optimized assembly string + * routines for the Linux Kernel. + * + * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997,1999 Jakub Jelinek (jakub@redhat.com) + */ + +#ifndef __SPARC64_STRING_H__ +#define __SPARC64_STRING_H__ + +/* Really, userland/ksyms should not see any of this stuff. */ + +#ifdef __KERNEL__ + +#include <asm/asi.h> + +extern void *__memset(void *,int,__kernel_size_t); + +#ifndef EXPORT_SYMTAB_STROPS + +/* First the mem*() things. */ +#define __HAVE_ARCH_MEMMOVE +extern void *memmove(void *, const void *, __kernel_size_t); + +#define __HAVE_ARCH_MEMCPY +extern void *memcpy(void *, const void *, __kernel_size_t); + +#define __HAVE_ARCH_MEMSET +extern void *__builtin_memset(void *,int,__kernel_size_t); + +static inline void *__constant_memset(void *s, int c, __kernel_size_t count) +{ + extern __kernel_size_t __bzero(void *, __kernel_size_t); + + if (!c) { + __bzero(s, count); + return s; + } else + return __memset(s, c, count); +} + +#undef memset +#define memset(s, c, count) \ +((__builtin_constant_p(count) && (count) <= 32) ? \ + __builtin_memset((s), (c), (count)) : \ + (__builtin_constant_p(c) ? \ + __constant_memset((s), (c), (count)) : \ + __memset((s), (c), (count)))) + +#define __HAVE_ARCH_MEMSCAN + +#undef memscan +#define memscan(__arg0, __char, __arg2) \ +({ \ + extern void *__memscan_zero(void *, size_t); \ + extern void *__memscan_generic(void *, int, size_t); \ + void *__retval, *__addr = (__arg0); \ + size_t __size = (__arg2); \ + \ + if(__builtin_constant_p(__char) && !(__char)) \ + __retval = __memscan_zero(__addr, __size); \ + else \ + __retval = __memscan_generic(__addr, (__char), __size); \ + \ + __retval; \ +}) + +#define __HAVE_ARCH_MEMCMP +extern int memcmp(const void *,const void *,__kernel_size_t); + +/* Now the str*() stuff... */ +#define __HAVE_ARCH_STRLEN +extern __kernel_size_t strlen(const char *); + +#define __HAVE_ARCH_STRNCMP +extern int strncmp(const char *, const char *, __kernel_size_t); + +#endif /* !EXPORT_SYMTAB_STROPS */ + +#endif /* __KERNEL__ */ + +#endif /* !(__SPARC64_STRING_H__) */ diff --git a/include/asm-sparc/system.h b/include/asm-sparc/system.h index b4b024445fc..15e2a3bc4f6 100644 --- a/include/asm-sparc/system.h +++ b/include/asm-sparc/system.h @@ -1,288 +1,8 @@ -#ifndef __SPARC_SYSTEM_H -#define __SPARC_SYSTEM_H - -#include <linux/kernel.h> -#include <linux/threads.h> /* NR_CPUS */ -#include <linux/thread_info.h> - -#include <asm/page.h> -#include <asm/psr.h> -#include <asm/ptrace.h> -#include <asm/btfixup.h> -#include <asm/smp.h> - -#ifndef __ASSEMBLY__ - -#include <linux/irqflags.h> - -/* - * Sparc (general) CPU types - */ -enum sparc_cpu { - sun4 = 0x00, - sun4c = 0x01, - sun4m = 0x02, - sun4d = 0x03, - sun4e = 0x04, - sun4u = 0x05, /* V8 ploos ploos */ - sun_unknown = 0x06, - ap1000 = 0x07, /* almost a sun4m */ -}; - -/* Really, userland should not be looking at any of this... */ -#ifdef __KERNEL__ - -extern enum sparc_cpu sparc_cpu_model; - -#ifndef CONFIG_SUN4 -#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c) -#define ARCH_SUN4 0 +#ifndef ___ASM_SPARC_SYSTEM_H +#define ___ASM_SPARC_SYSTEM_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/system_64.h> #else -#define ARCH_SUN4C_SUN4 1 -#define ARCH_SUN4 1 +#include <asm-sparc/system_32.h> #endif - -#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ - -extern char reboot_command[]; - -extern struct thread_info *current_set[NR_CPUS]; - -extern unsigned long empty_bad_page; -extern unsigned long empty_bad_page_table; -extern unsigned long empty_zero_page; - -extern void sun_do_break(void); -extern int serial_console; -extern int stop_a_enabled; - -static inline int con_is_present(void) -{ - return serial_console ? 0 : 1; -} - -/* When a context switch happens we must flush all user windows so that - * the windows of the current process are flushed onto its stack. This - * way the windows are all clean for the next process and the stack - * frames are up to date. - */ -extern void flush_user_windows(void); -extern void kill_user_windows(void); -extern void synchronize_user_stack(void); -extern void fpsave(unsigned long *fpregs, unsigned long *fsr, - void *fpqueue, unsigned long *fpqdepth); - -#ifdef CONFIG_SMP -#define SWITCH_ENTER(prv) \ - do { \ - if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \ - put_psr(get_psr() | PSR_EF); \ - fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \ - &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \ - clear_tsk_thread_flag(prv, TIF_USEDFPU); \ - (prv)->thread.kregs->psr &= ~PSR_EF; \ - } \ - } while(0) - -#define SWITCH_DO_LAZY_FPU(next) /* */ -#else -#define SWITCH_ENTER(prv) /* */ -#define SWITCH_DO_LAZY_FPU(nxt) \ - do { \ - if (last_task_used_math != (nxt)) \ - (nxt)->thread.kregs->psr&=~PSR_EF; \ - } while(0) -#endif - -extern void flushw_all(void); - -/* - * Flush windows so that the VM switch which follows - * would not pull the stack from under us. - * - * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) - * XXX WTF is the above comment? Found in late teen 2.4.x. - */ -#define prepare_arch_switch(next) do { \ - __asm__ __volatile__( \ - ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \ - "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ - "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ - "save %sp, -0x40, %sp\n\t" \ - "restore; restore; restore; restore; restore; restore; restore"); \ -} while(0) - - /* Much care has gone into this code, do not touch it. - * - * We need to loadup regs l0/l1 for the newly forked child - * case because the trap return path relies on those registers - * holding certain values, gcc is told that they are clobbered. - * Gcc needs registers for 3 values in and 1 value out, so we - * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM - * - * Hey Dave, that do not touch sign is too much of an incentive - * - Anton & Pete - */ -#define switch_to(prev, next, last) do { \ - SWITCH_ENTER(prev); \ - SWITCH_DO_LAZY_FPU(next); \ - cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ - __asm__ __volatile__( \ - "sethi %%hi(here - 0x8), %%o7\n\t" \ - "mov %%g6, %%g3\n\t" \ - "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ - "rd %%psr, %%g4\n\t" \ - "std %%sp, [%%g6 + %4]\n\t" \ - "rd %%wim, %%g5\n\t" \ - "wr %%g4, 0x20, %%psr\n\t" \ - "nop\n\t" \ - "std %%g4, [%%g6 + %3]\n\t" \ - "ldd [%2 + %3], %%g4\n\t" \ - "mov %2, %%g6\n\t" \ - ".globl patchme_store_new_current\n" \ -"patchme_store_new_current:\n\t" \ - "st %2, [%1]\n\t" \ - "wr %%g4, 0x20, %%psr\n\t" \ - "nop\n\t" \ - "nop\n\t" \ - "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ - "ldd [%%g6 + %4], %%sp\n\t" \ - "wr %%g5, 0x0, %%wim\n\t" \ - "ldd [%%sp + 0x00], %%l0\n\t" \ - "ldd [%%sp + 0x38], %%i6\n\t" \ - "wr %%g4, 0x0, %%psr\n\t" \ - "nop\n\t" \ - "nop\n\t" \ - "jmpl %%o7 + 0x8, %%g0\n\t" \ - " ld [%%g3 + %5], %0\n\t" \ - "here:\n" \ - : "=&r" (last) \ - : "r" (&(current_set[hard_smp_processor_id()])), \ - "r" (task_thread_info(next)), \ - "i" (TI_KPSR), \ - "i" (TI_KSP), \ - "i" (TI_TASK) \ - : "g1", "g2", "g3", "g4", "g5", "g7", \ - "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ - "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3", "o7"); \ - } while(0) - -/* XXX Change this if we ever use a PSO mode kernel. */ -#define mb() __asm__ __volatile__ ("" : : : "memory") -#define rmb() mb() -#define wmb() mb() -#define read_barrier_depends() do { } while(0) -#define set_mb(__var, __value) do { __var = __value; mb(); } while(0) -#define smp_mb() __asm__ __volatile__("":::"memory") -#define smp_rmb() __asm__ __volatile__("":::"memory") -#define smp_wmb() __asm__ __volatile__("":::"memory") -#define smp_read_barrier_depends() do { } while(0) - -#define nop() __asm__ __volatile__ ("nop") - -/* This has special calling conventions */ -#ifndef CONFIG_SMP -BTFIXUPDEF_CALL(void, ___xchg32, void) -#endif - -static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) -{ -#ifdef CONFIG_SMP - __asm__ __volatile__("swap [%2], %0" - : "=&r" (val) - : "0" (val), "r" (m) - : "memory"); - return val; -#else - register unsigned long *ptr asm("g1"); - register unsigned long ret asm("g2"); - - ptr = (unsigned long *) m; - ret = val; - - /* Note: this is magic and the nop there is - really needed. */ - __asm__ __volatile__( - "mov %%o7, %%g4\n\t" - "call ___f____xchg32\n\t" - " nop\n\t" - : "=&r" (ret) - : "0" (ret), "r" (ptr) - : "g3", "g4", "g7", "memory", "cc"); - - return ret; #endif -} - -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) -{ - switch (size) { - case 4: - return xchg_u32(ptr, x); - }; - __xchg_called_with_bad_pointer(); - return x; -} - -/* Emulate cmpxchg() the same way we emulate atomics, - * by hashing the object address and indexing into an array - * of spinlocks to get a bit of performance... - * - * See arch/sparc/lib/atomic32.c for implementation. - * - * Cribbed from <asm-parisc/atomic.h> - */ -#define __HAVE_ARCH_CMPXCHG 1 - -/* bug catcher for when unsupported size is used - won't link */ -extern void __cmpxchg_called_with_bad_pointer(void); -/* we only need to support cmpxchg of a u32 on sparc */ -extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); - -/* don't worry...optimizer will get rid of most of this */ -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_); - default: - __cmpxchg_called_with_bad_pointer(); - break; - } - return old; -} - -#define cmpxchg(ptr, o, n) \ -({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ -}) - -#include <asm-generic/cmpxchg-local.h> - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) - -extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); - -#endif /* __KERNEL__ */ - -#endif /* __ASSEMBLY__ */ - -#define arch_align_stack(x) (x) - -#endif /* !(__SPARC_SYSTEM_H) */ diff --git a/include/asm-sparc/system_32.h b/include/asm-sparc/system_32.h new file mode 100644 index 00000000000..b4b024445fc --- /dev/null +++ b/include/asm-sparc/system_32.h @@ -0,0 +1,288 @@ +#ifndef __SPARC_SYSTEM_H +#define __SPARC_SYSTEM_H + +#include <linux/kernel.h> +#include <linux/threads.h> /* NR_CPUS */ +#include <linux/thread_info.h> + +#include <asm/page.h> +#include <asm/psr.h> +#include <asm/ptrace.h> +#include <asm/btfixup.h> +#include <asm/smp.h> + +#ifndef __ASSEMBLY__ + +#include <linux/irqflags.h> + +/* + * Sparc (general) CPU types + */ +enum sparc_cpu { + sun4 = 0x00, + sun4c = 0x01, + sun4m = 0x02, + sun4d = 0x03, + sun4e = 0x04, + sun4u = 0x05, /* V8 ploos ploos */ + sun_unknown = 0x06, + ap1000 = 0x07, /* almost a sun4m */ +}; + +/* Really, userland should not be looking at any of this... */ +#ifdef __KERNEL__ + +extern enum sparc_cpu sparc_cpu_model; + +#ifndef CONFIG_SUN4 +#define ARCH_SUN4C_SUN4 (sparc_cpu_model==sun4c) +#define ARCH_SUN4 0 +#else +#define ARCH_SUN4C_SUN4 1 +#define ARCH_SUN4 1 +#endif + +#define SUN4M_NCPUS 4 /* Architectural limit of sun4m. */ + +extern char reboot_command[]; + +extern struct thread_info *current_set[NR_CPUS]; + +extern unsigned long empty_bad_page; +extern unsigned long empty_bad_page_table; +extern unsigned long empty_zero_page; + +extern void sun_do_break(void); +extern int serial_console; +extern int stop_a_enabled; + +static inline int con_is_present(void) +{ + return serial_console ? 0 : 1; +} + +/* When a context switch happens we must flush all user windows so that + * the windows of the current process are flushed onto its stack. This + * way the windows are all clean for the next process and the stack + * frames are up to date. + */ +extern void flush_user_windows(void); +extern void kill_user_windows(void); +extern void synchronize_user_stack(void); +extern void fpsave(unsigned long *fpregs, unsigned long *fsr, + void *fpqueue, unsigned long *fpqdepth); + +#ifdef CONFIG_SMP +#define SWITCH_ENTER(prv) \ + do { \ + if (test_tsk_thread_flag(prv, TIF_USEDFPU)) { \ + put_psr(get_psr() | PSR_EF); \ + fpsave(&(prv)->thread.float_regs[0], &(prv)->thread.fsr, \ + &(prv)->thread.fpqueue[0], &(prv)->thread.fpqdepth); \ + clear_tsk_thread_flag(prv, TIF_USEDFPU); \ + (prv)->thread.kregs->psr &= ~PSR_EF; \ + } \ + } while(0) + +#define SWITCH_DO_LAZY_FPU(next) /* */ +#else +#define SWITCH_ENTER(prv) /* */ +#define SWITCH_DO_LAZY_FPU(nxt) \ + do { \ + if (last_task_used_math != (nxt)) \ + (nxt)->thread.kregs->psr&=~PSR_EF; \ + } while(0) +#endif + +extern void flushw_all(void); + +/* + * Flush windows so that the VM switch which follows + * would not pull the stack from under us. + * + * SWITCH_ENTER and SWITH_DO_LAZY_FPU do not work yet (e.g. SMP does not work) + * XXX WTF is the above comment? Found in late teen 2.4.x. + */ +#define prepare_arch_switch(next) do { \ + __asm__ __volatile__( \ + ".globl\tflush_patch_switch\nflush_patch_switch:\n\t" \ + "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ + "save %sp, -0x40, %sp; save %sp, -0x40, %sp; save %sp, -0x40, %sp\n\t" \ + "save %sp, -0x40, %sp\n\t" \ + "restore; restore; restore; restore; restore; restore; restore"); \ +} while(0) + + /* Much care has gone into this code, do not touch it. + * + * We need to loadup regs l0/l1 for the newly forked child + * case because the trap return path relies on those registers + * holding certain values, gcc is told that they are clobbered. + * Gcc needs registers for 3 values in and 1 value out, so we + * clobber every non-fixed-usage register besides l2/l3/o4/o5. -DaveM + * + * Hey Dave, that do not touch sign is too much of an incentive + * - Anton & Pete + */ +#define switch_to(prev, next, last) do { \ + SWITCH_ENTER(prev); \ + SWITCH_DO_LAZY_FPU(next); \ + cpu_set(smp_processor_id(), next->active_mm->cpu_vm_mask); \ + __asm__ __volatile__( \ + "sethi %%hi(here - 0x8), %%o7\n\t" \ + "mov %%g6, %%g3\n\t" \ + "or %%o7, %%lo(here - 0x8), %%o7\n\t" \ + "rd %%psr, %%g4\n\t" \ + "std %%sp, [%%g6 + %4]\n\t" \ + "rd %%wim, %%g5\n\t" \ + "wr %%g4, 0x20, %%psr\n\t" \ + "nop\n\t" \ + "std %%g4, [%%g6 + %3]\n\t" \ + "ldd [%2 + %3], %%g4\n\t" \ + "mov %2, %%g6\n\t" \ + ".globl patchme_store_new_current\n" \ +"patchme_store_new_current:\n\t" \ + "st %2, [%1]\n\t" \ + "wr %%g4, 0x20, %%psr\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + "nop\n\t" /* LEON needs all 3 nops: load to %sp depends on CWP. */ \ + "ldd [%%g6 + %4], %%sp\n\t" \ + "wr %%g5, 0x0, %%wim\n\t" \ + "ldd [%%sp + 0x00], %%l0\n\t" \ + "ldd [%%sp + 0x38], %%i6\n\t" \ + "wr %%g4, 0x0, %%psr\n\t" \ + "nop\n\t" \ + "nop\n\t" \ + "jmpl %%o7 + 0x8, %%g0\n\t" \ + " ld [%%g3 + %5], %0\n\t" \ + "here:\n" \ + : "=&r" (last) \ + : "r" (&(current_set[hard_smp_processor_id()])), \ + "r" (task_thread_info(next)), \ + "i" (TI_KPSR), \ + "i" (TI_KSP), \ + "i" (TI_TASK) \ + : "g1", "g2", "g3", "g4", "g5", "g7", \ + "l0", "l1", "l3", "l4", "l5", "l6", "l7", \ + "i0", "i1", "i2", "i3", "i4", "i5", \ + "o0", "o1", "o2", "o3", "o7"); \ + } while(0) + +/* XXX Change this if we ever use a PSO mode kernel. */ +#define mb() __asm__ __volatile__ ("" : : : "memory") +#define rmb() mb() +#define wmb() mb() +#define read_barrier_depends() do { } while(0) +#define set_mb(__var, __value) do { __var = __value; mb(); } while(0) +#define smp_mb() __asm__ __volatile__("":::"memory") +#define smp_rmb() __asm__ __volatile__("":::"memory") +#define smp_wmb() __asm__ __volatile__("":::"memory") +#define smp_read_barrier_depends() do { } while(0) + +#define nop() __asm__ __volatile__ ("nop") + +/* This has special calling conventions */ +#ifndef CONFIG_SMP +BTFIXUPDEF_CALL(void, ___xchg32, void) +#endif + +static inline unsigned long xchg_u32(__volatile__ unsigned long *m, unsigned long val) +{ +#ifdef CONFIG_SMP + __asm__ __volatile__("swap [%2], %0" + : "=&r" (val) + : "0" (val), "r" (m) + : "memory"); + return val; +#else + register unsigned long *ptr asm("g1"); + register unsigned long ret asm("g2"); + + ptr = (unsigned long *) m; + ret = val; + + /* Note: this is magic and the nop there is + really needed. */ + __asm__ __volatile__( + "mov %%o7, %%g4\n\t" + "call ___f____xchg32\n\t" + " nop\n\t" + : "=&r" (ret) + : "0" (ret), "r" (ptr) + : "g3", "g4", "g7", "memory", "cc"); + + return ret; +#endif +} + +#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, int size) +{ + switch (size) { + case 4: + return xchg_u32(ptr, x); + }; + __xchg_called_with_bad_pointer(); + return x; +} + +/* Emulate cmpxchg() the same way we emulate atomics, + * by hashing the object address and indexing into an array + * of spinlocks to get a bit of performance... + * + * See arch/sparc/lib/atomic32.c for implementation. + * + * Cribbed from <asm-parisc/atomic.h> + */ +#define __HAVE_ARCH_CMPXCHG 1 + +/* bug catcher for when unsupported size is used - won't link */ +extern void __cmpxchg_called_with_bad_pointer(void); +/* we only need to support cmpxchg of a u32 on sparc */ +extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_); + +/* don't worry...optimizer will get rid of most of this */ +static inline unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_); + default: + __cmpxchg_called_with_bad_pointer(); + break; + } + return old; +} + +#define cmpxchg(ptr, o, n) \ +({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ +}) + +#include <asm-generic/cmpxchg-local.h> + +/* + * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make + * them available. + */ +#define cmpxchg_local(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ + (unsigned long)(n), sizeof(*(ptr)))) +#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) + +extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); + +#endif /* __KERNEL__ */ + +#endif /* __ASSEMBLY__ */ + +#define arch_align_stack(x) (x) + +#endif /* !(__SPARC_SYSTEM_H) */ diff --git a/include/asm-sparc/system_64.h b/include/asm-sparc/system_64.h new file mode 100644 index 00000000000..db9e742a406 --- /dev/null +++ b/include/asm-sparc/system_64.h @@ -0,0 +1,355 @@ +#ifndef __SPARC64_SYSTEM_H +#define __SPARC64_SYSTEM_H + +#include <asm/ptrace.h> +#include <asm/processor.h> +#include <asm/visasm.h> + +#ifndef __ASSEMBLY__ + +#include <linux/irqflags.h> +#include <asm-generic/cmpxchg-local.h> + +/* + * Sparc (general) CPU types + */ +enum sparc_cpu { + sun4 = 0x00, + sun4c = 0x01, + sun4m = 0x02, + sun4d = 0x03, + sun4e = 0x04, + sun4u = 0x05, /* V8 ploos ploos */ + sun_unknown = 0x06, + ap1000 = 0x07, /* almost a sun4m */ +}; + +#define sparc_cpu_model sun4u + +/* This cannot ever be a sun4c nor sun4 :) That's just history. */ +#define ARCH_SUN4C_SUN4 0 +#define ARCH_SUN4 0 + +extern char reboot_command[]; + +/* These are here in an effort to more fully work around Spitfire Errata + * #51. Essentially, if a memory barrier occurs soon after a mispredicted + * branch, the chip can stop executing instructions until a trap occurs. + * Therefore, if interrupts are disabled, the chip can hang forever. + * + * It used to be believed that the memory barrier had to be right in the + * delay slot, but a case has been traced recently wherein the memory barrier + * was one instruction after the branch delay slot and the chip still hung. + * The offending sequence was the following in sym_wakeup_done() of the + * sym53c8xx_2 driver: + * + * call sym_ccb_from_dsa, 0 + * movge %icc, 0, %l0 + * brz,pn %o0, .LL1303 + * mov %o0, %l2 + * membar #LoadLoad + * + * The branch has to be mispredicted for the bug to occur. Therefore, we put + * the memory barrier explicitly into a "branch always, predicted taken" + * delay slot to avoid the problem case. + */ +#define membar_safe(type) \ +do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ + " membar " type "\n" \ + "1:\n" \ + : : : "memory"); \ +} while (0) + +#define mb() \ + membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad") +#define rmb() \ + membar_safe("#LoadLoad") +#define wmb() \ + membar_safe("#StoreStore") +#define membar_storeload() \ + membar_safe("#StoreLoad") +#define membar_storeload_storestore() \ + membar_safe("#StoreLoad | #StoreStore") +#define membar_storeload_loadload() \ + membar_safe("#StoreLoad | #LoadLoad") +#define membar_storestore_loadstore() \ + membar_safe("#StoreStore | #LoadStore") + +#endif + +#define nop() __asm__ __volatile__ ("nop") + +#define read_barrier_depends() do { } while(0) +#define set_mb(__var, __value) \ + do { __var = __value; membar_storeload_storestore(); } while(0) + +#ifdef CONFIG_SMP +#define smp_mb() mb() +#define smp_rmb() rmb() +#define smp_wmb() wmb() +#define smp_read_barrier_depends() read_barrier_depends() +#else +#define smp_mb() __asm__ __volatile__("":::"memory") +#define smp_rmb() __asm__ __volatile__("":::"memory") +#define smp_wmb() __asm__ __volatile__("":::"memory") +#define smp_read_barrier_depends() do { } while(0) +#endif + +#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory") + +#define flushw_all() __asm__ __volatile__("flushw") + +/* Performance counter register access. */ +#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p)) +#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p)) +#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p)) + +/* Blackbird errata workaround. See commentary in + * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt() + * for more information. + */ +#define reset_pic() \ + __asm__ __volatile__("ba,pt %xcc, 99f\n\t" \ + ".align 64\n" \ + "99:wr %g0, 0x0, %pic\n\t" \ + "rd %pic, %g0") + +#ifndef __ASSEMBLY__ + +extern void sun_do_break(void); +extern int stop_a_enabled; + +extern void fault_in_user_windows(void); +extern void synchronize_user_stack(void); + +extern void __flushw_user(void); +#define flushw_user() __flushw_user() + +#define flush_user_windows flushw_user +#define flush_register_windows flushw_all + +/* Don't hold the runqueue lock over context switch */ +#define __ARCH_WANT_UNLOCKED_CTXSW +#define prepare_arch_switch(next) \ +do { \ + flushw_all(); \ +} while (0) + + /* See what happens when you design the chip correctly? + * + * We tell gcc we clobber all non-fixed-usage registers except + * for l0/l1. It will use one for 'next' and the other to hold + * the output value of 'last'. 'next' is not referenced again + * past the invocation of switch_to in the scheduler, so we need + * not preserve it's value. Hairy, but it lets us remove 2 loads + * and 2 stores in this critical code path. -DaveM + */ +#define switch_to(prev, next, last) \ +do { if (test_thread_flag(TIF_PERFCTR)) { \ + unsigned long __tmp; \ + read_pcr(__tmp); \ + current_thread_info()->pcr_reg = __tmp; \ + read_pic(__tmp); \ + current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\ + current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \ + } \ + flush_tlb_pending(); \ + save_and_clear_fpu(); \ + /* If you are tempted to conditionalize the following */ \ + /* so that ASI is only written if it changes, think again. */ \ + __asm__ __volatile__("wr %%g0, %0, %%asi" \ + : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\ + trap_block[current_thread_info()->cpu].thread = \ + task_thread_info(next); \ + __asm__ __volatile__( \ + "mov %%g4, %%g7\n\t" \ + "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ + "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ + "rdpr %%wstate, %%o5\n\t" \ + "stx %%o6, [%%g6 + %6]\n\t" \ + "stb %%o5, [%%g6 + %5]\n\t" \ + "rdpr %%cwp, %%o5\n\t" \ + "stb %%o5, [%%g6 + %8]\n\t" \ + "mov %4, %%g6\n\t" \ + "ldub [%4 + %8], %%g1\n\t" \ + "wrpr %%g1, %%cwp\n\t" \ + "ldx [%%g6 + %6], %%o6\n\t" \ + "ldub [%%g6 + %5], %%o5\n\t" \ + "ldub [%%g6 + %7], %%o7\n\t" \ + "wrpr %%o5, 0x0, %%wstate\n\t" \ + "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ + "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ + "ldx [%%g6 + %9], %%g4\n\t" \ + "brz,pt %%o7, switch_to_pc\n\t" \ + " mov %%g7, %0\n\t" \ + "sethi %%hi(ret_from_syscall), %%g1\n\t" \ + "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ + " nop\n\t" \ + ".globl switch_to_pc\n\t" \ + "switch_to_pc:\n\t" \ + : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ + "=r" (__local_per_cpu_offset) \ + : "0" (task_thread_info(next)), \ + "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ + "i" (TI_CWP), "i" (TI_TASK) \ + : "cc", \ + "g1", "g2", "g3", "g7", \ + "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ + "i0", "i1", "i2", "i3", "i4", "i5", \ + "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ + /* If you fuck with this, update ret_from_syscall code too. */ \ + if (test_thread_flag(TIF_PERFCTR)) { \ + write_pcr(current_thread_info()->pcr_reg); \ + reset_pic(); \ + } \ +} while(0) + +static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" +" mov %0, %1\n" +"1: lduw [%4], %2\n" +" cas [%4], %2, %0\n" +" cmp %2, %0\n" +" bne,a,pn %%icc, 1b\n" +" mov %1, %0\n" +" membar #StoreLoad | #StoreStore\n" + : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) + : "0" (val), "r" (m) + : "cc", "memory"); + return val; +} + +static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) +{ + unsigned long tmp1, tmp2; + + __asm__ __volatile__( +" membar #StoreLoad | #LoadLoad\n" +" mov %0, %1\n" +"1: ldx [%4], %2\n" +" casx [%4], %2, %0\n" +" cmp %2, %0\n" +" bne,a,pn %%xcc, 1b\n" +" mov %1, %0\n" +" membar #StoreLoad | #StoreStore\n" + : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) + : "0" (val), "r" (m) + : "cc", "memory"); + return val; +} + +#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) + +extern void __xchg_called_with_bad_pointer(void); + +static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, + int size) +{ + switch (size) { + case 4: + return xchg32(ptr, x); + case 8: + return xchg64(ptr, x); + }; + __xchg_called_with_bad_pointer(); + return x; +} + +extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); + +/* + * Atomic compare and exchange. Compare OLD with MEM, if identical, + * store NEW in MEM. Return the initial value in MEM. Success is + * indicated by comparing RETURN with OLD. + */ + +#define __HAVE_ARCH_CMPXCHG 1 + +static inline unsigned long +__cmpxchg_u32(volatile int *m, int old, int new) +{ + __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" + "cas [%2], %3, %0\n\t" + "membar #StoreLoad | #StoreStore" + : "=&r" (new) + : "0" (new), "r" (m), "r" (old) + : "memory"); + + return new; +} + +static inline unsigned long +__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) +{ + __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" + "casx [%2], %3, %0\n\t" + "membar #StoreLoad | #StoreStore" + : "=&r" (new) + : "0" (new), "r" (m), "r" (old) + : "memory"); + + return new; +} + +/* This function doesn't exist, so you'll get a linker error + if something tries to do an invalid cmpxchg(). */ +extern void __cmpxchg_called_with_bad_pointer(void); + +static inline unsigned long +__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) +{ + switch (size) { + case 4: + return __cmpxchg_u32(ptr, old, new); + case 8: + return __cmpxchg_u64(ptr, old, new); + } + __cmpxchg_called_with_bad_pointer(); + return old; +} + +#define cmpxchg(ptr,o,n) \ + ({ \ + __typeof__(*(ptr)) _o_ = (o); \ + __typeof__(*(ptr)) _n_ = (n); \ + (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ + (unsigned long)_n_, sizeof(*(ptr))); \ + }) + +/* + * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make + * them available. + */ + +static inline unsigned long __cmpxchg_local(volatile void *ptr, + unsigned long old, + unsigned long new, int size) +{ + switch (size) { + case 4: + case 8: return __cmpxchg(ptr, old, new, size); + default: + return __cmpxchg_local_generic(ptr, old, new, size); + } + + return old; +} + +#define cmpxchg_local(ptr, o, n) \ + ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ + (unsigned long)(n), sizeof(*(ptr)))) +#define cmpxchg64_local(ptr, o, n) \ + ({ \ + BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ + cmpxchg_local((ptr), (o), (n)); \ + }) + +#endif /* !(__ASSEMBLY__) */ + +#define arch_align_stack(x) (x) + +#endif /* !(__SPARC64_SYSTEM_H) */ diff --git a/include/asm-sparc/thread_info.h b/include/asm-sparc/thread_info.h index 91b9f5888c8..64155cf89f3 100644 --- a/include/asm-sparc/thread_info.h +++ b/include/asm-sparc/thread_info.h @@ -1,151 +1,8 @@ -/* - * thread_info.h: sparc low-level thread information - * adapted from the ppc version by Pete Zaitcev, which was - * adapted from the i386 version by Paul Mackerras - * - * Copyright (C) 2002 David Howells (dhowells@redhat.com) - * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) - * - Incorporating suggestions made by Linus Torvalds and Dave Miller - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#ifdef __KERNEL__ - -#ifndef __ASSEMBLY__ - -#include <asm/btfixup.h> -#include <asm/ptrace.h> -#include <asm/page.h> - -/* - * Low level task data. - * - * If you change this, change the TI_* offsets below to match. - */ -#define NSWINS 8 -struct thread_info { - unsigned long uwinmask; - struct task_struct *task; /* main task structure */ - struct exec_domain *exec_domain; /* execution domain */ - unsigned long flags; /* low level flags */ - int cpu; /* cpu we're on */ - int preempt_count; /* 0 => preemptable, - <0 => BUG */ - int softirq_count; - int hardirq_count; - - /* Context switch saved kernel state. */ - unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ - unsigned long kpc; - unsigned long kpsr; - unsigned long kwim; - - /* A place to store user windows and stack pointers - * when the stack needs inspection. - */ - struct reg_window reg_window[NSWINS]; /* align for ldd! */ - unsigned long rwbuf_stkptrs[NSWINS]; - unsigned long w_saved; - - struct restart_block restart_block; -}; - -/* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. - */ -#define INIT_THREAD_INFO(tsk) \ -{ \ - .uwinmask = 0, \ - .task = &tsk, \ - .exec_domain = &default_exec_domain, \ - .flags = 0, \ - .cpu = 0, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the thread information struct from C */ -register struct thread_info *current_thread_info_reg asm("g6"); -#define current_thread_info() (current_thread_info_reg) - -/* - * thread information allocation - */ -#if PAGE_SHIFT == 13 -#define THREAD_INFO_ORDER 0 -#else /* PAGE_SHIFT */ -#define THREAD_INFO_ORDER 1 +#ifndef ___ASM_SPARC_THREAD_INFO_H +#define ___ASM_SPARC_THREAD_INFO_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/thread_info_64.h> +#else +#include <asm-sparc/thread_info_32.h> +#endif #endif - -BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) -#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() - -BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) -#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) - -#endif /* __ASSEMBLY__ */ - -/* - * Size of kernel stack for each process. - * Observe the order of get_free_pages() in alloc_thread_info(). - * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. - */ -#define THREAD_SIZE 8192 - -/* - * Offsets in thread_info structure, used in assembly code - * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. - */ -#define TI_UWINMASK 0x00 /* uwinmask */ -#define TI_TASK 0x04 -#define TI_EXECDOMAIN 0x08 /* exec_domain */ -#define TI_FLAGS 0x0c -#define TI_CPU 0x10 -#define TI_PREEMPT 0x14 /* preempt_count */ -#define TI_SOFTIRQ 0x18 /* softirq_count */ -#define TI_HARDIRQ 0x1c /* hardirq_count */ -#define TI_KSP 0x20 /* ksp */ -#define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ -#define TI_KPSR 0x28 /* kpsr */ -#define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ -#define TI_REG_WINDOW 0x30 -#define TI_RWIN_SPTRS 0x230 -#define TI_W_SAVED 0x250 -/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ - -#define PREEMPT_ACTIVE 0x4000000 - -/* - * thread information flag bit numbers - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -/* flag bit 1 is available */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ -#define TIF_USEDFPU 8 /* FPU was used by this task - * this quantum (SMP) */ -#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling - * TIF_NEED_RESCHED */ -#define TIF_MEMDIE 10 - -/* as above, but as bit values */ -#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) -#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) -#define _TIF_USEDFPU (1<<TIF_USEDFPU) -#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) - -#endif /* __KERNEL__ */ - -#endif /* _ASM_THREAD_INFO_H */ diff --git a/include/asm-sparc/thread_info_32.h b/include/asm-sparc/thread_info_32.h new file mode 100644 index 00000000000..91b9f5888c8 --- /dev/null +++ b/include/asm-sparc/thread_info_32.h @@ -0,0 +1,151 @@ +/* + * thread_info.h: sparc low-level thread information + * adapted from the ppc version by Pete Zaitcev, which was + * adapted from the i386 version by Paul Mackerras + * + * Copyright (C) 2002 David Howells (dhowells@redhat.com) + * Copyright (c) 2002 Pete Zaitcev (zaitcev@yahoo.com) + * - Incorporating suggestions made by Linus Torvalds and Dave Miller + */ + +#ifndef _ASM_THREAD_INFO_H +#define _ASM_THREAD_INFO_H + +#ifdef __KERNEL__ + +#ifndef __ASSEMBLY__ + +#include <asm/btfixup.h> +#include <asm/ptrace.h> +#include <asm/page.h> + +/* + * Low level task data. + * + * If you change this, change the TI_* offsets below to match. + */ +#define NSWINS 8 +struct thread_info { + unsigned long uwinmask; + struct task_struct *task; /* main task structure */ + struct exec_domain *exec_domain; /* execution domain */ + unsigned long flags; /* low level flags */ + int cpu; /* cpu we're on */ + int preempt_count; /* 0 => preemptable, + <0 => BUG */ + int softirq_count; + int hardirq_count; + + /* Context switch saved kernel state. */ + unsigned long ksp; /* ... ksp __attribute__ ((aligned (8))); */ + unsigned long kpc; + unsigned long kpsr; + unsigned long kwim; + + /* A place to store user windows and stack pointers + * when the stack needs inspection. + */ + struct reg_window reg_window[NSWINS]; /* align for ldd! */ + unsigned long rwbuf_stkptrs[NSWINS]; + unsigned long w_saved; + + struct restart_block restart_block; +}; + +/* + * macros/functions for gaining access to the thread information structure + * + * preempt_count needs to be 1 initially, until the scheduler is functional. + */ +#define INIT_THREAD_INFO(tsk) \ +{ \ + .uwinmask = 0, \ + .task = &tsk, \ + .exec_domain = &default_exec_domain, \ + .flags = 0, \ + .cpu = 0, \ + .preempt_count = 1, \ + .restart_block = { \ + .fn = do_no_restart_syscall, \ + }, \ +} + +#define init_thread_info (init_thread_union.thread_info) +#define init_stack (init_thread_union.stack) + +/* how to get the thread information struct from C */ +register struct thread_info *current_thread_info_reg asm("g6"); +#define current_thread_info() (current_thread_info_reg) + +/* + * thread information allocation + */ +#if PAGE_SHIFT == 13 +#define THREAD_INFO_ORDER 0 +#else /* PAGE_SHIFT */ +#define THREAD_INFO_ORDER 1 +#endif + +BTFIXUPDEF_CALL(struct thread_info *, alloc_thread_info, void) +#define alloc_thread_info(tsk) BTFIXUP_CALL(alloc_thread_info)() + +BTFIXUPDEF_CALL(void, free_thread_info, struct thread_info *) +#define free_thread_info(ti) BTFIXUP_CALL(free_thread_info)(ti) + +#endif /* __ASSEMBLY__ */ + +/* + * Size of kernel stack for each process. + * Observe the order of get_free_pages() in alloc_thread_info(). + * The sun4 has 8K stack too, because it's short on memory, and 16K is a waste. + */ +#define THREAD_SIZE 8192 + +/* + * Offsets in thread_info structure, used in assembly code + * The "#define REGWIN_SZ 0x40" was abolished, so no multiplications. + */ +#define TI_UWINMASK 0x00 /* uwinmask */ +#define TI_TASK 0x04 +#define TI_EXECDOMAIN 0x08 /* exec_domain */ +#define TI_FLAGS 0x0c +#define TI_CPU 0x10 +#define TI_PREEMPT 0x14 /* preempt_count */ +#define TI_SOFTIRQ 0x18 /* softirq_count */ +#define TI_HARDIRQ 0x1c /* hardirq_count */ +#define TI_KSP 0x20 /* ksp */ +#define TI_KPC 0x24 /* kpc (ldd'ed with kpc) */ +#define TI_KPSR 0x28 /* kpsr */ +#define TI_KWIM 0x2c /* kwim (ldd'ed with kpsr) */ +#define TI_REG_WINDOW 0x30 +#define TI_RWIN_SPTRS 0x230 +#define TI_W_SAVED 0x250 +/* #define TI_RESTART_BLOCK 0x25n */ /* Nobody cares */ + +#define PREEMPT_ACTIVE 0x4000000 + +/* + * thread information flag bit numbers + */ +#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ +/* flag bit 1 is available */ +#define TIF_SIGPENDING 2 /* signal pending */ +#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_RESTORE_SIGMASK 4 /* restore signal mask in do_signal() */ +#define TIF_USEDFPU 8 /* FPU was used by this task + * this quantum (SMP) */ +#define TIF_POLLING_NRFLAG 9 /* true if poll_idle() is polling + * TIF_NEED_RESCHED */ +#define TIF_MEMDIE 10 + +/* as above, but as bit values */ +#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) +#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) +#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) +#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) +#define _TIF_USEDFPU (1<<TIF_USEDFPU) +#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) + +#endif /* __KERNEL__ */ + +#endif /* _ASM_THREAD_INFO_H */ diff --git a/include/asm-sparc/thread_info_64.h b/include/asm-sparc/thread_info_64.h new file mode 100644 index 00000000000..c6d2e6c7f84 --- /dev/null +++ b/include/asm-sparc/thread_info_64.h @@ -0,0 +1,277 @@ +/* thread_info.h: sparc64 low-level thread information + * + * Copyright (C) 2002 David S. Miller (davem@redhat.com) + */ + +#ifndef _ASM_THREAD_INFO_H +#define _ASM_THREAD_INFO_H + +#ifdef __KERNEL__ + +#define NSWINS 7 + +#define TI_FLAG_BYTE_FAULT_CODE 0 +#define TI_FLAG_FAULT_CODE_SHIFT 56 +#define TI_FLAG_BYTE_WSTATE 1 +#define TI_FLAG_WSTATE_SHIFT 48 +#define TI_FLAG_BYTE_CWP 2 +#define TI_FLAG_CWP_SHIFT 40 +#define TI_FLAG_BYTE_CURRENT_DS 3 +#define TI_FLAG_CURRENT_DS_SHIFT 32 +#define TI_FLAG_BYTE_FPDEPTH 4 +#define TI_FLAG_FPDEPTH_SHIFT 24 +#define TI_FLAG_BYTE_WSAVED 5 +#define TI_FLAG_WSAVED_SHIFT 16 + +#include <asm/page.h> + +#ifndef __ASSEMBLY__ + +#include <asm/ptrace.h> +#include <asm/types.h> + +struct task_struct; +struct exec_domain; + +struct thread_info { + /* D$ line 1 */ + struct task_struct *task; + unsigned long flags; + __u8 fpsaved[7]; + __u8 status; + unsigned long ksp; + + /* D$ line 2 */ + unsigned long fault_address; + struct pt_regs *kregs; + struct exec_domain *exec_domain; + int preempt_count; /* 0 => preemptable, <0 => BUG */ + __u8 new_child; + __u8 syscall_noerror; + __u16 cpu; + + unsigned long *utraps; + + struct reg_window reg_window[NSWINS]; + unsigned long rwbuf_stkptrs[NSWINS]; + + unsigned long gsr[7]; + unsigned long xfsr[7]; + + __u64 __user *user_cntd0; + __u64 __user *user_cntd1; + __u64 kernel_cntd0, kernel_cntd1; + __u64 pcr_reg; + + struct restart_block restart_block; + + struct pt_regs *kern_una_regs; + unsigned int kern_una_insn; + + unsigned long fpregs[0] __attribute__ ((aligned(64))); +}; + +#endif /* !(__ASSEMBLY__) */ + +/* offsets into the thread_info struct for assembly code access */ +#define TI_TASK 0x00000000 +#define TI_FLAGS 0x00000008 +#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) +#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) +#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) +#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) +#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) +#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) +#define TI_FPSAVED 0x00000010 +#define TI_KSP 0x00000018 +#define TI_FAULT_ADDR 0x00000020 +#define TI_KREGS 0x00000028 +#define TI_EXEC_DOMAIN 0x00000030 +#define TI_PRE_COUNT 0x00000038 +#define TI_NEW_CHILD 0x0000003c +#define TI_SYS_NOERROR 0x0000003d +#define TI_CPU 0x0000003e +#define TI_UTRAPS 0x00000040 +#define TI_REG_WINDOW 0x00000048 +#define TI_RWIN_SPTRS 0x000003c8 +#define TI_GSR 0x00000400 +#define TI_XFSR 0x00000438 +#define TI_USER_CNTD0 0x00000470 +#define TI_USER_CNTD1 0x00000478 +#define TI_KERN_CNTD0 0x00000480 +#define TI_KERN_CNTD1 0x00000488 +#define TI_PCR 0x00000490 +#define TI_RESTART_BLOCK 0x00000498 +#define TI_KUNA_REGS 0x000004c0 +#define TI_KUNA_INSN 0x000004c8 +#define TI_FPREGS 0x00000500 + +/* We embed this in the uppermost byte of thread_info->flags */ +#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ +#define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ +#define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ +#define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ +#define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ + +#if PAGE_SHIFT == 13 +#define THREAD_SIZE (2*PAGE_SIZE) +#define THREAD_SHIFT (PAGE_SHIFT + 1) +#else /* PAGE_SHIFT == 13 */ +#define THREAD_SIZE PAGE_SIZE +#define THREAD_SHIFT PAGE_SHIFT +#endif /* PAGE_SHIFT == 13 */ + +#define PREEMPT_ACTIVE 0x4000000 + +/* + * macros/functions for gaining access to the thread information structure + * + * preempt_count needs to be 1 initially, until the scheduler is functional. + */ +#ifndef __ASSEMBLY__ + +#define INIT_THREAD_INFO(tsk) \ +{ \ + .task = &tsk, \ + .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ + .exec_domain = &default_exec_domain, \ + .preempt_count = 1, \ + .restart_block = { \ + .fn = do_no_restart_syscall, \ + }, \ +} + +#define init_thread_info (init_thread_union.thread_info) +#define init_stack (init_thread_union.stack) + +/* how to get the thread information struct from C */ +register struct thread_info *current_thread_info_reg asm("g6"); +#define current_thread_info() (current_thread_info_reg) + +/* thread information allocation */ +#if PAGE_SHIFT == 13 +#define __THREAD_INFO_ORDER 1 +#else /* PAGE_SHIFT == 13 */ +#define __THREAD_INFO_ORDER 0 +#endif /* PAGE_SHIFT == 13 */ + +#ifdef CONFIG_DEBUG_STACK_USAGE +#define alloc_thread_info(tsk) \ +({ \ + struct thread_info *ret; \ + \ + ret = (struct thread_info *) \ + __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ + if (ret) \ + memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ + ret; \ +}) +#else +#define alloc_thread_info(tsk) \ + ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) +#endif + +#define free_thread_info(ti) \ + free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) + +#define __thread_flag_byte_ptr(ti) \ + ((unsigned char *)(&((ti)->flags))) +#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) + +#define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) +#define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) +#define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) +#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) +#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) +#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) +#define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) +#define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) +#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) +#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) +#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) +#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) + +#endif /* !(__ASSEMBLY__) */ + +/* + * Thread information flags, only 16 bits are available as we encode + * other values into the upper 6 bytes. + * + * On trap return we need to test several values: + * + * user: need_resched, notify_resume, sigpending, wsaved, perfctr + * kernel: fpdepth + * + * So to check for work in the kernel case we simply load the fpdepth + * byte out of the flags and test it. For the user case we encode the + * lower 3 bytes of flags as follows: + * ---------------------------------------- + * | wsaved | flags byte 1 | flags byte 2 | + * ---------------------------------------- + * This optimizes the user test into: + * ldx [%g6 + TI_FLAGS], REG1 + * sethi %hi(_TIF_USER_WORK_MASK), REG2 + * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 + * andcc REG1, REG2, %g0 + * be,pt no_work_to_do + * nop + */ +#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ +/* flags bit 1 is available */ +#define TIF_SIGPENDING 2 /* signal pending */ +#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ +#define TIF_PERFCTR 4 /* performance counters active */ +#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ +/* flag bit 6 is available */ +#define TIF_32BIT 7 /* 32-bit binary */ +/* flag bit 8 is available */ +#define TIF_SECCOMP 9 /* secure computing */ +#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ +/* flag bit 11 is available */ +/* NOTE: Thread flags >= 12 should be ones we have no interest + * in using in assembly, else we can't use the mask as + * an immediate value in instructions such as andcc. + */ +#define TIF_ABI_PENDING 12 +#define TIF_MEMDIE 13 +#define TIF_POLLING_NRFLAG 14 + +#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) +#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) +#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) +#define _TIF_PERFCTR (1<<TIF_PERFCTR) +#define _TIF_UNALIGNED (1<<TIF_UNALIGNED) +#define _TIF_32BIT (1<<TIF_32BIT) +#define _TIF_SECCOMP (1<<TIF_SECCOMP) +#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) +#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) +#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) + +#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ + (_TIF_SIGPENDING | \ + _TIF_NEED_RESCHED | _TIF_PERFCTR)) + +/* + * Thread-synchronous status. + * + * This is different from the flags in that nobody else + * ever touches our thread-synchronous status, so we don't + * have to worry about atomic accesses. + * + * Note that there are only 8 bits available. + */ +#define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */ + +#ifndef __ASSEMBLY__ +#define HAVE_SET_RESTORE_SIGMASK 1 +static inline void set_restore_sigmask(void) +{ + struct thread_info *ti = current_thread_info(); + ti->status |= TS_RESTORE_SIGMASK; + set_bit(TIF_SIGPENDING, &ti->flags); +} +#endif /* !__ASSEMBLY__ */ + +#endif /* __KERNEL__ */ + +#endif /* _ASM_THREAD_INFO_H */ diff --git a/include/asm-sparc/timer.h b/include/asm-sparc/timer.h index 361e53898dd..475baa05a96 100644 --- a/include/asm-sparc/timer.h +++ b/include/asm-sparc/timer.h @@ -1,107 +1,8 @@ -/* - * timer.h: Definitions for the timer chips on the Sparc. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - */ - - -#ifndef _SPARC_TIMER_H -#define _SPARC_TIMER_H - -#include <asm/system.h> /* For SUN4M_NCPUS */ -#include <asm/sun4paddr.h> -#include <asm/btfixup.h> - -/* Timer structures. The interrupt timer has two properties which - * are the counter (which is handled in do_timer in sched.c) and the limit. - * This limit is where the timer's counter 'wraps' around. Oddly enough, - * the sun4c timer when it hits the limit wraps back to 1 and not zero - * thus when calculating the value at which it will fire a microsecond you - * must adjust by one. Thanks SUN for designing such great hardware ;( - */ - -/* Note that I am only going to use the timer that interrupts at - * Sparc IRQ 10. There is another one available that can fire at - * IRQ 14. Currently it is left untouched, we keep the PROM's limit - * register value and let the prom take these interrupts. This allows - * L1-A to work. - */ - -struct sun4c_timer_info { - __volatile__ unsigned int cur_count10; - __volatile__ unsigned int timer_limit10; - __volatile__ unsigned int cur_count14; - __volatile__ unsigned int timer_limit14; -}; - -#define SUN4C_TIMER_PHYSADDR 0xf3000000 -#ifdef CONFIG_SUN4 -#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR +#ifndef ___ASM_SPARC_TIMER_H +#define ___ASM_SPARC_TIMER_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/timer_64.h> #else -#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR +#include <asm-sparc/timer_32.h> +#endif #endif - -/* A sun4m has two blocks of registers which are probably of the same - * structure. LSI Logic's L64851 is told to _decrement_ from the limit - * value. Aurora behaves similarly but its limit value is compacted in - * other fashion (it's wider). Documented fields are defined here. - */ - -/* As with the interrupt register, we have two classes of timer registers - * which are per-cpu and master. Per-cpu timers only hit that cpu and are - * only level 14 ticks, master timer hits all cpus and is level 10. - */ - -#define SUN4M_PRM_CNT_L 0x80000000 -#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 - -struct sun4m_timer_percpu_info { - __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ - __volatile__ unsigned int l14_cur_count; - - /* This register appears to be write only and/or inaccessible - * on Uni-Processor sun4m machines. - */ - __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ - - __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ - __volatile__ unsigned char space[PAGE_SIZE - 16]; -}; - -struct sun4m_timer_regs { - struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; - volatile unsigned int l10_timer_limit; - volatile unsigned int l10_cur_count; - - /* Again, this appears to be write only and/or inaccessible - * on uni-processor sun4m machines. - */ - volatile unsigned int l10_limit_noclear; - - /* This register too, it must be magic. */ - volatile unsigned int foobar; - - volatile unsigned int cfg; /* equals zero at boot time... */ -}; - -#define SUN4D_PRM_CNT_L 0x80000000 -#define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 - -struct sun4d_timer_regs { - volatile unsigned int l10_timer_limit; - volatile unsigned int l10_cur_countx; - volatile unsigned int l10_limit_noclear; - volatile unsigned int ctrl; - volatile unsigned int l10_cur_count; -}; - -extern struct sun4d_timer_regs *sun4d_timers; - -extern __volatile__ unsigned int *master_l10_counter; -extern __volatile__ unsigned int *master_l10_limit; - -/* FIXME: Make do_[gs]ettimeofday btfixup calls */ -BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) -#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) - -#endif /* !(_SPARC_TIMER_H) */ diff --git a/include/asm-sparc/timer_32.h b/include/asm-sparc/timer_32.h new file mode 100644 index 00000000000..361e53898dd --- /dev/null +++ b/include/asm-sparc/timer_32.h @@ -0,0 +1,107 @@ +/* + * timer.h: Definitions for the timer chips on the Sparc. + * + * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) + */ + + +#ifndef _SPARC_TIMER_H +#define _SPARC_TIMER_H + +#include <asm/system.h> /* For SUN4M_NCPUS */ +#include <asm/sun4paddr.h> +#include <asm/btfixup.h> + +/* Timer structures. The interrupt timer has two properties which + * are the counter (which is handled in do_timer in sched.c) and the limit. + * This limit is where the timer's counter 'wraps' around. Oddly enough, + * the sun4c timer when it hits the limit wraps back to 1 and not zero + * thus when calculating the value at which it will fire a microsecond you + * must adjust by one. Thanks SUN for designing such great hardware ;( + */ + +/* Note that I am only going to use the timer that interrupts at + * Sparc IRQ 10. There is another one available that can fire at + * IRQ 14. Currently it is left untouched, we keep the PROM's limit + * register value and let the prom take these interrupts. This allows + * L1-A to work. + */ + +struct sun4c_timer_info { + __volatile__ unsigned int cur_count10; + __volatile__ unsigned int timer_limit10; + __volatile__ unsigned int cur_count14; + __volatile__ unsigned int timer_limit14; +}; + +#define SUN4C_TIMER_PHYSADDR 0xf3000000 +#ifdef CONFIG_SUN4 +#define SUN_TIMER_PHYSADDR SUN4_300_TIMER_PHYSADDR +#else +#define SUN_TIMER_PHYSADDR SUN4C_TIMER_PHYSADDR +#endif + +/* A sun4m has two blocks of registers which are probably of the same + * structure. LSI Logic's L64851 is told to _decrement_ from the limit + * value. Aurora behaves similarly but its limit value is compacted in + * other fashion (it's wider). Documented fields are defined here. + */ + +/* As with the interrupt register, we have two classes of timer registers + * which are per-cpu and master. Per-cpu timers only hit that cpu and are + * only level 14 ticks, master timer hits all cpus and is level 10. + */ + +#define SUN4M_PRM_CNT_L 0x80000000 +#define SUN4M_PRM_CNT_LVALUE 0x7FFFFC00 + +struct sun4m_timer_percpu_info { + __volatile__ unsigned int l14_timer_limit; /* Initial value is 0x009c4000 */ + __volatile__ unsigned int l14_cur_count; + + /* This register appears to be write only and/or inaccessible + * on Uni-Processor sun4m machines. + */ + __volatile__ unsigned int l14_limit_noclear; /* Data access error is here */ + + __volatile__ unsigned int cntrl; /* =1 after POST on Aurora */ + __volatile__ unsigned char space[PAGE_SIZE - 16]; +}; + +struct sun4m_timer_regs { + struct sun4m_timer_percpu_info cpu_timers[SUN4M_NCPUS]; + volatile unsigned int l10_timer_limit; + volatile unsigned int l10_cur_count; + + /* Again, this appears to be write only and/or inaccessible + * on uni-processor sun4m machines. + */ + volatile unsigned int l10_limit_noclear; + + /* This register too, it must be magic. */ + volatile unsigned int foobar; + + volatile unsigned int cfg; /* equals zero at boot time... */ +}; + +#define SUN4D_PRM_CNT_L 0x80000000 +#define SUN4D_PRM_CNT_LVALUE 0x7FFFFC00 + +struct sun4d_timer_regs { + volatile unsigned int l10_timer_limit; + volatile unsigned int l10_cur_countx; + volatile unsigned int l10_limit_noclear; + volatile unsigned int ctrl; + volatile unsigned int l10_cur_count; +}; + +extern struct sun4d_timer_regs *sun4d_timers; + +extern __volatile__ unsigned int *master_l10_counter; +extern __volatile__ unsigned int *master_l10_limit; + +/* FIXME: Make do_[gs]ettimeofday btfixup calls */ +BTFIXUPDEF_CALL(int, bus_do_settimeofday, struct timespec *tv) +#define bus_do_settimeofday(tv) BTFIXUP_CALL(bus_do_settimeofday)(tv) + +#endif /* !(_SPARC_TIMER_H) */ diff --git a/include/asm-sparc/timer_64.h b/include/asm-sparc/timer_64.h new file mode 100644 index 00000000000..5b779fd1f78 --- /dev/null +++ b/include/asm-sparc/timer_64.h @@ -0,0 +1,30 @@ +/* timer.h: System timer definitions for sun5. + * + * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) + */ + +#ifndef _SPARC64_TIMER_H +#define _SPARC64_TIMER_H + +#include <linux/types.h> +#include <linux/init.h> + +struct sparc64_tick_ops { + unsigned long (*get_tick)(void); + int (*add_compare)(unsigned long); + unsigned long softint_mask; + void (*disable_irq)(void); + + void (*init_tick)(void); + unsigned long (*add_tick)(unsigned long); + + char *name; +}; + +extern struct sparc64_tick_ops *tick_ops; + +extern unsigned long sparc64_get_clock_tick(unsigned int cpu); +extern void __devinit setup_sparc64_timer(void); +extern void __init time_init(void); + +#endif /* _SPARC64_TIMER_H */ diff --git a/include/asm-sparc/timex.h b/include/asm-sparc/timex.h index 71b45c90cca..01d9f199d45 100644 --- a/include/asm-sparc/timex.h +++ b/include/asm-sparc/timex.h @@ -1,15 +1,8 @@ -/* - * linux/include/asm-sparc/timex.h - * - * sparc architecture timex specifications - */ -#ifndef _ASMsparc_TIMEX_H -#define _ASMsparc_TIMEX_H - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -/* XXX Maybe do something better at some point... -DaveM */ -typedef unsigned long cycles_t; -#define get_cycles() (0) - +#ifndef ___ASM_SPARC_TIMEX_H +#define ___ASM_SPARC_TIMEX_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/timex_64.h> +#else +#include <asm-sparc/timex_32.h> +#endif #endif diff --git a/include/asm-sparc/timex_32.h b/include/asm-sparc/timex_32.h new file mode 100644 index 00000000000..71b45c90cca --- /dev/null +++ b/include/asm-sparc/timex_32.h @@ -0,0 +1,15 @@ +/* + * linux/include/asm-sparc/timex.h + * + * sparc architecture timex specifications + */ +#ifndef _ASMsparc_TIMEX_H +#define _ASMsparc_TIMEX_H + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ + +/* XXX Maybe do something better at some point... -DaveM */ +typedef unsigned long cycles_t; +#define get_cycles() (0) + +#endif diff --git a/include/asm-sparc/timex_64.h b/include/asm-sparc/timex_64.h new file mode 100644 index 00000000000..c622535c456 --- /dev/null +++ b/include/asm-sparc/timex_64.h @@ -0,0 +1,19 @@ +/* + * linux/include/asm-sparc64/timex.h + * + * sparc64 architecture timex specifications + */ +#ifndef _ASMsparc64_TIMEX_H +#define _ASMsparc64_TIMEX_H + +#include <asm/timer.h> + +#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ + +/* Getting on the cycle counter on sparc64. */ +typedef unsigned long cycles_t; +#define get_cycles() tick_ops->get_tick() + +#define ARCH_HAS_READ_CURRENT_TIMER + +#endif diff --git a/include/asm-sparc/tlb.h b/include/asm-sparc/tlb.h index 6d02d1ce53f..a821057327c 100644 --- a/include/asm-sparc/tlb.h +++ b/include/asm-sparc/tlb.h @@ -1,24 +1,8 @@ -#ifndef _SPARC_TLB_H -#define _SPARC_TLB_H - -#define tlb_start_vma(tlb, vma) \ -do { \ - flush_cache_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - -#define tlb_end_vma(tlb, vma) \ -do { \ - flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ -} while (0) - -#define __tlb_remove_tlb_entry(tlb, pte, address) \ - do { } while (0) - -#define tlb_flush(tlb) \ -do { \ - flush_tlb_mm((tlb)->mm); \ -} while (0) - -#include <asm-generic/tlb.h> - -#endif /* _SPARC_TLB_H */ +#ifndef ___ASM_SPARC_TLB_H +#define ___ASM_SPARC_TLB_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/tlb_64.h> +#else +#include <asm-sparc/tlb_32.h> +#endif +#endif diff --git a/include/asm-sparc/tlb_32.h b/include/asm-sparc/tlb_32.h new file mode 100644 index 00000000000..6d02d1ce53f --- /dev/null +++ b/include/asm-sparc/tlb_32.h @@ -0,0 +1,24 @@ +#ifndef _SPARC_TLB_H +#define _SPARC_TLB_H + +#define tlb_start_vma(tlb, vma) \ +do { \ + flush_cache_range(vma, vma->vm_start, vma->vm_end); \ +} while (0) + +#define tlb_end_vma(tlb, vma) \ +do { \ + flush_tlb_range(vma, vma->vm_start, vma->vm_end); \ +} while (0) + +#define __tlb_remove_tlb_entry(tlb, pte, address) \ + do { } while (0) + +#define tlb_flush(tlb) \ +do { \ + flush_tlb_mm((tlb)->mm); \ +} while (0) + +#include <asm-generic/tlb.h> + +#endif /* _SPARC_TLB_H */ diff --git a/include/asm-sparc/tlb_64.h b/include/asm-sparc/tlb_64.h new file mode 100644 index 00000000000..ec81cdedef2 --- /dev/null +++ b/include/asm-sparc/tlb_64.h @@ -0,0 +1,111 @@ +#ifndef _SPARC64_TLB_H +#define _SPARC64_TLB_H + +#include <linux/swap.h> +#include <linux/pagemap.h> +#include <asm/pgalloc.h> +#include <asm/tlbflush.h> +#include <asm/mmu_context.h> + +#define TLB_BATCH_NR 192 + +/* + * For UP we don't need to worry about TLB flush + * and page free order so much.. + */ +#ifdef CONFIG_SMP + #define FREE_PTE_NR 506 + #define tlb_fast_mode(bp) ((bp)->pages_nr == ~0U) +#else + #define FREE_PTE_NR 1 + #define tlb_fast_mode(bp) 1 +#endif + +struct mmu_gather { + struct mm_struct *mm; + unsigned int pages_nr; + unsigned int need_flush; + unsigned int fullmm; + unsigned int tlb_nr; + unsigned long vaddrs[TLB_BATCH_NR]; + struct page *pages[FREE_PTE_NR]; +}; + +DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); + +#ifdef CONFIG_SMP +extern void smp_flush_tlb_pending(struct mm_struct *, + unsigned long, unsigned long *); +#endif + +extern void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *); +extern void flush_tlb_pending(void); + +static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) +{ + struct mmu_gather *mp = &get_cpu_var(mmu_gathers); + + BUG_ON(mp->tlb_nr); + + mp->mm = mm; + mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U; + mp->fullmm = full_mm_flush; + + return mp; +} + + +static inline void tlb_flush_mmu(struct mmu_gather *mp) +{ + if (mp->need_flush) { + free_pages_and_swap_cache(mp->pages, mp->pages_nr); + mp->pages_nr = 0; + mp->need_flush = 0; + } + +} + +#ifdef CONFIG_SMP +extern void smp_flush_tlb_mm(struct mm_struct *mm); +#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm) +#else +#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT) +#endif + +static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end) +{ + tlb_flush_mmu(mp); + + if (mp->fullmm) + mp->fullmm = 0; + else + flush_tlb_pending(); + + /* keep the page table cache within bounds */ + check_pgt_cache(); + + put_cpu_var(mmu_gathers); +} + +static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page) +{ + if (tlb_fast_mode(mp)) { + free_page_and_swap_cache(page); + return; + } + mp->need_flush = 1; + mp->pages[mp->pages_nr++] = page; + if (mp->pages_nr >= FREE_PTE_NR) + tlb_flush_mmu(mp); +} + +#define tlb_remove_tlb_entry(mp,ptep,addr) do { } while (0) +#define pte_free_tlb(mp, ptepage) pte_free((mp)->mm, ptepage) +#define pmd_free_tlb(mp, pmdp) pmd_free((mp)->mm, pmdp) +#define pud_free_tlb(tlb,pudp) __pud_free_tlb(tlb,pudp) + +#define tlb_migrate_finish(mm) do { } while (0) +#define tlb_start_vma(tlb, vma) do { } while (0) +#define tlb_end_vma(tlb, vma) do { } while (0) + +#endif /* _SPARC64_TLB_H */ diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h index b957e29d2ae..6e6bc12227b 100644 --- a/include/asm-sparc/tlbflush.h +++ b/include/asm-sparc/tlbflush.h @@ -1,60 +1,8 @@ -#ifndef _SPARC_TLBFLUSH_H -#define _SPARC_TLBFLUSH_H - -#include <linux/mm.h> -// #include <asm/processor.h> - -/* - * TLB flushing: - * - * - flush_tlb() flushes the current mm struct TLBs XXX Exists? - * - flush_tlb_all() flushes all processes TLBs - * - flush_tlb_mm(mm) flushes the specified mm context TLB's - * - flush_tlb_page(vma, vmaddr) flushes one page - * - flush_tlb_range(vma, start, end) flushes a range of pages - * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages - */ - -#ifdef CONFIG_SMP - -BTFIXUPDEF_CALL(void, local_flush_tlb_all, void) -BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long) - -#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)() -#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm) -#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end) -#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr) - -extern void smp_flush_tlb_all(void); -extern void smp_flush_tlb_mm(struct mm_struct *mm); -extern void smp_flush_tlb_range(struct vm_area_struct *vma, - unsigned long start, - unsigned long end); -extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); - -#endif /* CONFIG_SMP */ - -BTFIXUPDEF_CALL(void, flush_tlb_all, void) -BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *) -BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) -BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) - -#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() -#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) -#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) -#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr) - -// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */ - -/* - * This is a kludge, until I know better. --zaitcev XXX - */ -static inline void flush_tlb_kernel_range(unsigned long start, - unsigned long end) -{ - flush_tlb_all(); -} - -#endif /* _SPARC_TLBFLUSH_H */ +#ifndef ___ASM_SPARC_TLBFLUSH_H +#define ___ASM_SPARC_TLBFLUSH_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/tlbflush_64.h> +#else +#include <asm-sparc/tlbflush_32.h> +#endif +#endif diff --git a/include/asm-sparc/tlbflush_32.h b/include/asm-sparc/tlbflush_32.h new file mode 100644 index 00000000000..fe0a71abc9b --- /dev/null +++ b/include/asm-sparc/tlbflush_32.h @@ -0,0 +1,60 @@ +#ifndef _SPARC_TLBFLUSH_H +#define _SPARC_TLBFLUSH_H + +#include <linux/mm.h> +// #include <asm/processor.h> + +/* + * TLB flushing: + * + * - flush_tlb() flushes the current mm struct TLBs XXX Exists? + * - flush_tlb_all() flushes all processes TLBs + * - flush_tlb_mm(mm) flushes the specified mm context TLB's + * - flush_tlb_page(vma, vmaddr) flushes one page + * - flush_tlb_range(vma, start, end) flushes a range of pages + * - flush_tlb_kernel_range(start, end) flushes a range of kernel pages + */ + +#ifdef CONFIG_SMP + +BTFIXUPDEF_CALL(void, local_flush_tlb_all, void) +BTFIXUPDEF_CALL(void, local_flush_tlb_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, local_flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, local_flush_tlb_page, struct vm_area_struct *, unsigned long) + +#define local_flush_tlb_all() BTFIXUP_CALL(local_flush_tlb_all)() +#define local_flush_tlb_mm(mm) BTFIXUP_CALL(local_flush_tlb_mm)(mm) +#define local_flush_tlb_range(vma,start,end) BTFIXUP_CALL(local_flush_tlb_range)(vma,start,end) +#define local_flush_tlb_page(vma,addr) BTFIXUP_CALL(local_flush_tlb_page)(vma,addr) + +extern void smp_flush_tlb_all(void); +extern void smp_flush_tlb_mm(struct mm_struct *mm); +extern void smp_flush_tlb_range(struct vm_area_struct *vma, + unsigned long start, + unsigned long end); +extern void smp_flush_tlb_page(struct vm_area_struct *mm, unsigned long page); + +#endif /* CONFIG_SMP */ + +BTFIXUPDEF_CALL(void, flush_tlb_all, void) +BTFIXUPDEF_CALL(void, flush_tlb_mm, struct mm_struct *) +BTFIXUPDEF_CALL(void, flush_tlb_range, struct vm_area_struct *, unsigned long, unsigned long) +BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long) + +#define flush_tlb_all() BTFIXUP_CALL(flush_tlb_all)() +#define flush_tlb_mm(mm) BTFIXUP_CALL(flush_tlb_mm)(mm) +#define flush_tlb_range(vma,start,end) BTFIXUP_CALL(flush_tlb_range)(vma,start,end) +#define flush_tlb_page(vma,addr) BTFIXUP_CALL(flush_tlb_page)(vma,addr) + +// #define flush_tlb() flush_tlb_mm(current->active_mm) /* XXX Sure? */ + +/* + * This is a kludge, until I know better. --zaitcev XXX + */ +static inline void flush_tlb_kernel_range(unsigned long start, + unsigned long end) +{ + flush_tlb_all(); +} + +#endif /* _SPARC_TLBFLUSH_H */ diff --git a/include/asm-sparc/tlbflush_64.h b/include/asm-sparc/tlbflush_64.h new file mode 100644 index 00000000000..fbb675dbe0c --- /dev/null +++ b/include/asm-sparc/tlbflush_64.h @@ -0,0 +1,44 @@ +#ifndef _SPARC64_TLBFLUSH_H +#define _SPARC64_TLBFLUSH_H + +#include <linux/mm.h> +#include <asm/mmu_context.h> + +/* TSB flush operations. */ +struct mmu_gather; +extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); +extern void flush_tsb_user(struct mmu_gather *mp); + +/* TLB flush operations. */ + +extern void flush_tlb_pending(void); + +#define flush_tlb_range(vma,start,end) \ + do { (void)(start); flush_tlb_pending(); } while (0) +#define flush_tlb_page(vma,addr) flush_tlb_pending() +#define flush_tlb_mm(mm) flush_tlb_pending() + +/* Local cpu only. */ +extern void __flush_tlb_all(void); + +extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); + +#ifndef CONFIG_SMP + +#define flush_tlb_kernel_range(start,end) \ +do { flush_tsb_kernel_range(start,end); \ + __flush_tlb_kernel_range(start,end); \ +} while (0) + +#else /* CONFIG_SMP */ + +extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); + +#define flush_tlb_kernel_range(start, end) \ +do { flush_tsb_kernel_range(start,end); \ + smp_flush_tlb_kernel_range(start, end); \ +} while (0) + +#endif /* ! CONFIG_SMP */ + +#endif /* _SPARC64_TLBFLUSH_H */ diff --git a/include/asm-sparc/topology.h b/include/asm-sparc/topology.h index ee5ac9c9da2..ed13630f32e 100644 --- a/include/asm-sparc/topology.h +++ b/include/asm-sparc/topology.h @@ -1,6 +1,8 @@ -#ifndef _ASM_SPARC_TOPOLOGY_H -#define _ASM_SPARC_TOPOLOGY_H - -#include <asm-generic/topology.h> - -#endif /* _ASM_SPARC_TOPOLOGY_H */ +#ifndef ___ASM_SPARC_TOPOLOGY_H +#define ___ASM_SPARC_TOPOLOGY_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/topology_64.h> +#else +#include <asm-sparc/topology_32.h> +#endif +#endif diff --git a/include/asm-sparc/topology_32.h b/include/asm-sparc/topology_32.h new file mode 100644 index 00000000000..ee5ac9c9da2 --- /dev/null +++ b/include/asm-sparc/topology_32.h @@ -0,0 +1,6 @@ +#ifndef _ASM_SPARC_TOPOLOGY_H +#define _ASM_SPARC_TOPOLOGY_H + +#include <asm-generic/topology.h> + +#endif /* _ASM_SPARC_TOPOLOGY_H */ diff --git a/include/asm-sparc/topology_64.h b/include/asm-sparc/topology_64.h new file mode 100644 index 00000000000..001c04027c8 --- /dev/null +++ b/include/asm-sparc/topology_64.h @@ -0,0 +1,86 @@ +#ifndef _ASM_SPARC64_TOPOLOGY_H +#define _ASM_SPARC64_TOPOLOGY_H + +#ifdef CONFIG_NUMA + +#include <asm/mmzone.h> + +static inline int cpu_to_node(int cpu) +{ + return numa_cpu_lookup_table[cpu]; +} + +#define parent_node(node) (node) + +static inline cpumask_t node_to_cpumask(int node) +{ + return numa_cpumask_lookup_table[node]; +} + +/* Returns a pointer to the cpumask of CPUs on Node 'node'. */ +#define node_to_cpumask_ptr(v, node) \ + cpumask_t *v = &(numa_cpumask_lookup_table[node]) + +#define node_to_cpumask_ptr_next(v, node) \ + v = &(numa_cpumask_lookup_table[node]) + +static inline int node_to_first_cpu(int node) +{ + cpumask_t tmp; + tmp = node_to_cpumask(node); + return first_cpu(tmp); +} + +struct pci_bus; +#ifdef CONFIG_PCI +extern int pcibus_to_node(struct pci_bus *pbus); +#else +static inline int pcibus_to_node(struct pci_bus *pbus) +{ + return -1; +} +#endif + +#define pcibus_to_cpumask(bus) \ + (pcibus_to_node(bus) == -1 ? \ + CPU_MASK_ALL : \ + node_to_cpumask(pcibus_to_node(bus))) + +#define SD_NODE_INIT (struct sched_domain) { \ + .min_interval = 8, \ + .max_interval = 32, \ + .busy_factor = 32, \ + .imbalance_pct = 125, \ + .cache_nice_tries = 2, \ + .busy_idx = 3, \ + .idle_idx = 2, \ + .newidle_idx = 0, \ + .wake_idx = 1, \ + .forkexec_idx = 1, \ + .flags = SD_LOAD_BALANCE \ + | SD_BALANCE_FORK \ + | SD_BALANCE_EXEC \ + | SD_SERIALIZE \ + | SD_WAKE_BALANCE, \ + .last_balance = jiffies, \ + .balance_interval = 1, \ +} + +#else /* CONFIG_NUMA */ + +#include <asm-generic/topology.h> + +#endif /* !(CONFIG_NUMA) */ + +#ifdef CONFIG_SMP +#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id) +#define topology_core_id(cpu) (cpu_data(cpu).core_id) +#define topology_core_siblings(cpu) (cpu_core_map[cpu]) +#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) +#define mc_capable() (sparc64_multi_core) +#define smt_capable() (sparc64_multi_core) +#endif /* CONFIG_SMP */ + +#define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) + +#endif /* _ASM_SPARC64_TOPOLOGY_H */ diff --git a/include/asm-sparc/uaccess.h b/include/asm-sparc/uaccess.h index 47d5619d43f..424facce523 100644 --- a/include/asm-sparc/uaccess.h +++ b/include/asm-sparc/uaccess.h @@ -1,336 +1,8 @@ -/* - * uaccess.h: User space memore access functions. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ -#ifndef _ASM_UACCESS_H -#define _ASM_UACCESS_H - -#ifdef __KERNEL__ -#include <linux/compiler.h> -#include <linux/sched.h> -#include <linux/string.h> -#include <linux/errno.h> -#include <asm/vac-ops.h> +#ifndef ___ASM_SPARC_UACCESS_H +#define ___ASM_SPARC_UACCESS_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/uaccess_64.h> +#else +#include <asm-sparc/uaccess_32.h> +#endif #endif - -#ifndef __ASSEMBLY__ - -/* Sparc is not segmented, however we need to be able to fool access_ok() - * when doing system calls from kernel mode legitimately. - * - * "For historical reasons, these macros are grossly misnamed." -Linus - */ - -#define KERNEL_DS ((mm_segment_t) { 0 }) -#define USER_DS ((mm_segment_t) { -1 }) - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define get_ds() (KERNEL_DS) -#define get_fs() (current->thread.current_ds) -#define set_fs(val) ((current->thread.current_ds) = (val)) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -/* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test - * can be fairly lightweight. - * No one can read/write anything from userland in the kernel space by setting - * large size and address near to PAGE_OFFSET - a fault will break his intentions. - */ -#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; }) -#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS)) -#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size))) -#define access_ok(type, addr, size) \ - ({ (void)(type); __access_ok((unsigned long)(addr), size); }) - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - * - * There is a special way how to put a range of potentially faulting - * insns (like twenty ldd/std's with now intervening other instructions) - * You specify address of first in insn and 0 in fixup and in the next - * exception_table_entry you specify last potentially faulting insn + 1 - * and in fixup the routine which should handle the fault. - * That fixup code will get - * (faulting_insn_address - first_insn_in_the_range_address)/4 - * in %g2 (ie. index of the faulting instruction in the range). - */ - -struct exception_table_entry -{ - unsigned long insn, fixup; -}; - -/* Returns 0 if exception not found and fixup otherwise. */ -extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2); - -extern void __ret_efault(void); - -/* Uh, these should become the main single-value transfer routines.. - * They automatically use the right size if we just have the right - * pointer type.. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - */ -#define put_user(x,ptr) ({ \ -unsigned long __pu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) - -#define get_user(x,ptr) ({ \ -unsigned long __gu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) - -/* - * The "__xxx" versions do not do address space checking, useful when - * doing multiple accesses to the same area (the user has to do the - * checks by hand with "access_ok()") - */ -#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) -#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) ((struct __large_struct __user *)(x)) - -#define __put_user_check(x,addr,size) ({ \ -register int __pu_ret; \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(x,,addr,__pu_ret); break; \ -case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} } else { __pu_ret = -EFAULT; } __pu_ret; }) - -#define __put_user_nocheck(x,addr,size) ({ \ -register int __pu_ret; \ -switch (size) { \ -case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(x,,addr,__pu_ret); break; \ -case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} __pu_ret; }) - -#define __put_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Put user asm, inline. */\n" \ -"1:\t" "st"#size " %1, %2\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "b 2b\n\t" \ - " mov %3, %0\n\t" \ - ".previous\n\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\t" \ - ".previous\n\n\t" \ - : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ - "i" (-EFAULT)) - -extern int __put_user_bad(void); - -#define __get_user_check(x,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; }) - -#define __get_user_check_ret(x,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -if (__access_ok(addr,size)) { \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} x = (type) __gu_val; } else return retval; }) - -#define __get_user_nocheck(x,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} x = (type) __gu_val; __gu_ret; }) - -#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} x = (type) __gu_val; }) - -#define __get_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user asm, inline. */\n" \ -"1:\t" "ld"#size " %2, %1\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "clr %1\n\t" \ - "b 2b\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ - "i" (-EFAULT)) - -#define __get_user_asm_ret(x,size,addr,retval) \ -if (__builtin_constant_p(retval) && retval == -EFAULT) \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size " %1, %0\n\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b,__ret_efault\n\n\t" \ - ".previous\n\t" \ - : "=&r" (x) : "m" (*__m(addr))); \ -else \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size " %1, %0\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "ret\n\t" \ - " restore %%g0, %2, %%o0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,#alloc\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=&r" (x) : "m" (*__m(addr)), "i" (retval)) - -extern int __get_user_bad(void); - -extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size); - -static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) -{ - if (n && __access_ok((unsigned long) to, n)) - return __copy_user(to, (__force void __user *) from, n); - else - return n; -} - -static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) -{ - return __copy_user(to, (__force void __user *) from, n); -} - -static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) -{ - if (n && __access_ok((unsigned long) from, n)) - return __copy_user((__force void __user *) to, from, n); - else - return n; -} - -static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) -{ - return __copy_user((__force void __user *) to, from, n); -} - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -static inline unsigned long __clear_user(void __user *addr, unsigned long size) -{ - unsigned long ret; - - __asm__ __volatile__ ( - ".section __ex_table,#alloc\n\t" - ".align 4\n\t" - ".word 1f,3\n\t" - ".previous\n\t" - "mov %2, %%o1\n" - "1:\n\t" - "call __bzero\n\t" - " mov %1, %%o0\n\t" - "mov %%o0, %0\n" - : "=r" (ret) : "r" (addr), "r" (size) : - "o0", "o1", "o2", "o3", "o4", "o5", "o7", - "g1", "g2", "g3", "g4", "g5", "g7", "cc"); - - return ret; -} - -static inline unsigned long clear_user(void __user *addr, unsigned long n) -{ - if (n && __access_ok((unsigned long) addr, n)) - return __clear_user(addr, n); - else - return n; -} - -extern long __strncpy_from_user(char *dest, const char __user *src, long count); - -static inline long strncpy_from_user(char *dest, const char __user *src, long count) -{ - if (__access_ok((unsigned long) src, count)) - return __strncpy_from_user(dest, src, count); - else - return -EFAULT; -} - -extern long __strlen_user(const char __user *); -extern long __strnlen_user(const char __user *, long len); - -static inline long strlen_user(const char __user *str) -{ - if (!access_ok(VERIFY_READ, str, 0)) - return 0; - else - return __strlen_user(str); -} - -static inline long strnlen_user(const char __user *str, long len) -{ - if (!access_ok(VERIFY_READ, str, 0)) - return 0; - else - return __strnlen_user(str, len); -} - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/uaccess_32.h b/include/asm-sparc/uaccess_32.h new file mode 100644 index 00000000000..47d5619d43f --- /dev/null +++ b/include/asm-sparc/uaccess_32.h @@ -0,0 +1,336 @@ +/* + * uaccess.h: User space memore access functions. + * + * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) + * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) + */ +#ifndef _ASM_UACCESS_H +#define _ASM_UACCESS_H + +#ifdef __KERNEL__ +#include <linux/compiler.h> +#include <linux/sched.h> +#include <linux/string.h> +#include <linux/errno.h> +#include <asm/vac-ops.h> +#endif + +#ifndef __ASSEMBLY__ + +/* Sparc is not segmented, however we need to be able to fool access_ok() + * when doing system calls from kernel mode legitimately. + * + * "For historical reasons, these macros are grossly misnamed." -Linus + */ + +#define KERNEL_DS ((mm_segment_t) { 0 }) +#define USER_DS ((mm_segment_t) { -1 }) + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +#define get_ds() (KERNEL_DS) +#define get_fs() (current->thread.current_ds) +#define set_fs(val) ((current->thread.current_ds) = (val)) + +#define segment_eq(a,b) ((a).seg == (b).seg) + +/* We have there a nice not-mapped page at PAGE_OFFSET - PAGE_SIZE, so that this test + * can be fairly lightweight. + * No one can read/write anything from userland in the kernel space by setting + * large size and address near to PAGE_OFFSET - a fault will break his intentions. + */ +#define __user_ok(addr, size) ({ (void)(size); (addr) < STACK_TOP; }) +#define __kernel_ok (segment_eq(get_fs(), KERNEL_DS)) +#define __access_ok(addr,size) (__user_ok((addr) & get_fs().seg,(size))) +#define access_ok(type, addr, size) \ + ({ (void)(type); __access_ok((unsigned long)(addr), size); }) + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + * + * There is a special way how to put a range of potentially faulting + * insns (like twenty ldd/std's with now intervening other instructions) + * You specify address of first in insn and 0 in fixup and in the next + * exception_table_entry you specify last potentially faulting insn + 1 + * and in fixup the routine which should handle the fault. + * That fixup code will get + * (faulting_insn_address - first_insn_in_the_range_address)/4 + * in %g2 (ie. index of the faulting instruction in the range). + */ + +struct exception_table_entry +{ + unsigned long insn, fixup; +}; + +/* Returns 0 if exception not found and fixup otherwise. */ +extern unsigned long search_extables_range(unsigned long addr, unsigned long *g2); + +extern void __ret_efault(void); + +/* Uh, these should become the main single-value transfer routines.. + * They automatically use the right size if we just have the right + * pointer type.. + * + * This gets kind of ugly. We want to return _two_ values in "get_user()" + * and yet we don't want to do any pointers, because that is too much + * of a performance impact. Thus we have a few rather ugly macros here, + * and hide all the ugliness from the user. + */ +#define put_user(x,ptr) ({ \ +unsigned long __pu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__put_user_check((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) + +#define get_user(x,ptr) ({ \ +unsigned long __gu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__get_user_check((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) + +/* + * The "__xxx" versions do not do address space checking, useful when + * doing multiple accesses to the same area (the user has to do the + * checks by hand with "access_ok()") + */ +#define __put_user(x,ptr) __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr))) +#define __get_user(x,ptr) __get_user_nocheck((x),(ptr),sizeof(*(ptr)),__typeof__(*(ptr))) + +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) ((struct __large_struct __user *)(x)) + +#define __put_user_check(x,addr,size) ({ \ +register int __pu_ret; \ +if (__access_ok(addr,size)) { \ +switch (size) { \ +case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(x,,addr,__pu_ret); break; \ +case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ +default: __pu_ret = __put_user_bad(); break; \ +} } else { __pu_ret = -EFAULT; } __pu_ret; }) + +#define __put_user_nocheck(x,addr,size) ({ \ +register int __pu_ret; \ +switch (size) { \ +case 1: __put_user_asm(x,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(x,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(x,,addr,__pu_ret); break; \ +case 8: __put_user_asm(x,d,addr,__pu_ret); break; \ +default: __pu_ret = __put_user_bad(); break; \ +} __pu_ret; }) + +#define __put_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Put user asm, inline. */\n" \ +"1:\t" "st"#size " %1, %2\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "b 2b\n\t" \ + " mov %3, %0\n\t" \ + ".previous\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\t" \ + ".previous\n\n\t" \ + : "=&r" (ret) : "r" (x), "m" (*__m(addr)), \ + "i" (-EFAULT)) + +extern int __put_user_bad(void); + +#define __get_user_check(x,addr,size,type) ({ \ +register int __gu_ret; \ +register unsigned long __gu_val; \ +if (__access_ok(addr,size)) { \ +switch (size) { \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ +case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ +} } else { __gu_val = 0; __gu_ret = -EFAULT; } x = (type) __gu_val; __gu_ret; }) + +#define __get_user_check_ret(x,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ +if (__access_ok(addr,size)) { \ +switch (size) { \ +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ +case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} x = (type) __gu_val; } else return retval; }) + +#define __get_user_nocheck(x,addr,size,type) ({ \ +register int __gu_ret; \ +register unsigned long __gu_val; \ +switch (size) { \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,,addr,__gu_ret); break; \ +case 8: __get_user_asm(__gu_val,d,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ +} x = (type) __gu_val; __gu_ret; }) + +#define __get_user_nocheck_ret(x,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ +switch (size) { \ +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,,addr,retval); break; \ +case 8: __get_user_asm_ret(__gu_val,d,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} x = (type) __gu_val; }) + +#define __get_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Get user asm, inline. */\n" \ +"1:\t" "ld"#size " %2, %1\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "clr %1\n\t" \ + "b 2b\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=&r" (ret), "=&r" (x) : "m" (*__m(addr)), \ + "i" (-EFAULT)) + +#define __get_user_asm_ret(x,size,addr,retval) \ +if (__builtin_constant_p(retval) && retval == -EFAULT) \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size " %1, %0\n\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b,__ret_efault\n\n\t" \ + ".previous\n\t" \ + : "=&r" (x) : "m" (*__m(addr))); \ +else \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size " %1, %0\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "ret\n\t" \ + " restore %%g0, %2, %%o0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,#alloc\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=&r" (x) : "m" (*__m(addr)), "i" (retval)) + +extern int __get_user_bad(void); + +extern unsigned long __copy_user(void __user *to, const void __user *from, unsigned long size); + +static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n) +{ + if (n && __access_ok((unsigned long) to, n)) + return __copy_user(to, (__force void __user *) from, n); + else + return n; +} + +static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n) +{ + return __copy_user(to, (__force void __user *) from, n); +} + +static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n) +{ + if (n && __access_ok((unsigned long) from, n)) + return __copy_user((__force void __user *) to, from, n); + else + return n; +} + +static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n) +{ + return __copy_user((__force void __user *) to, from, n); +} + +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + +static inline unsigned long __clear_user(void __user *addr, unsigned long size) +{ + unsigned long ret; + + __asm__ __volatile__ ( + ".section __ex_table,#alloc\n\t" + ".align 4\n\t" + ".word 1f,3\n\t" + ".previous\n\t" + "mov %2, %%o1\n" + "1:\n\t" + "call __bzero\n\t" + " mov %1, %%o0\n\t" + "mov %%o0, %0\n" + : "=r" (ret) : "r" (addr), "r" (size) : + "o0", "o1", "o2", "o3", "o4", "o5", "o7", + "g1", "g2", "g3", "g4", "g5", "g7", "cc"); + + return ret; +} + +static inline unsigned long clear_user(void __user *addr, unsigned long n) +{ + if (n && __access_ok((unsigned long) addr, n)) + return __clear_user(addr, n); + else + return n; +} + +extern long __strncpy_from_user(char *dest, const char __user *src, long count); + +static inline long strncpy_from_user(char *dest, const char __user *src, long count) +{ + if (__access_ok((unsigned long) src, count)) + return __strncpy_from_user(dest, src, count); + else + return -EFAULT; +} + +extern long __strlen_user(const char __user *); +extern long __strnlen_user(const char __user *, long len); + +static inline long strlen_user(const char __user *str) +{ + if (!access_ok(VERIFY_READ, str, 0)) + return 0; + else + return __strlen_user(str); +} + +static inline long strnlen_user(const char __user *str, long len) +{ + if (!access_ok(VERIFY_READ, str, 0)) + return 0; + else + return __strnlen_user(str, len); +} + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/uaccess_64.h b/include/asm-sparc/uaccess_64.h new file mode 100644 index 00000000000..296ef30e05c --- /dev/null +++ b/include/asm-sparc/uaccess_64.h @@ -0,0 +1,273 @@ +#ifndef _ASM_UACCESS_H +#define _ASM_UACCESS_H + +/* + * User space memory access functions + */ + +#ifdef __KERNEL__ +#include <linux/compiler.h> +#include <linux/sched.h> +#include <linux/string.h> +#include <asm/asi.h> +#include <asm/system.h> +#include <asm/spitfire.h> +#include <asm-generic/uaccess.h> +#endif + +#ifndef __ASSEMBLY__ + +/* + * Sparc64 is segmented, though more like the M68K than the I386. + * We use the secondary ASI to address user memory, which references a + * completely different VM map, thus there is zero chance of the user + * doing something queer and tricking us into poking kernel memory. + * + * What is left here is basically what is needed for the other parts of + * the kernel that expect to be able to manipulate, erum, "segments". + * Or perhaps more properly, permissions. + * + * "For historical reasons, these macros are grossly misnamed." -Linus + */ + +#define KERNEL_DS ((mm_segment_t) { ASI_P }) +#define USER_DS ((mm_segment_t) { ASI_AIUS }) /* har har har */ + +#define VERIFY_READ 0 +#define VERIFY_WRITE 1 + +#define get_fs() ((mm_segment_t) { get_thread_current_ds() }) +#define get_ds() (KERNEL_DS) + +#define segment_eq(a,b) ((a).seg == (b).seg) + +#define set_fs(val) \ +do { \ + set_thread_current_ds((val).seg); \ + __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \ +} while(0) + +static inline int __access_ok(const void __user * addr, unsigned long size) +{ + return 1; +} + +static inline int access_ok(int type, const void __user * addr, unsigned long size) +{ + return 1; +} + +/* + * The exception table consists of pairs of addresses: the first is the + * address of an instruction that is allowed to fault, and the second is + * the address at which the program should continue. No registers are + * modified, so it is entirely up to the continuation code to figure out + * what to do. + * + * All the routines below use bits of fixup code that are out of line + * with the main instruction path. This means when everything is well, + * we don't even have to jump over them. Further, they do not intrude + * on our cache or tlb entries. + */ + +struct exception_table_entry { + unsigned int insn, fixup; +}; + +extern void __ret_efault(void); +extern void __retl_efault(void); + +/* Uh, these should become the main single-value transfer routines.. + * They automatically use the right size if we just have the right + * pointer type.. + * + * This gets kind of ugly. We want to return _two_ values in "get_user()" + * and yet we don't want to do any pointers, because that is too much + * of a performance impact. Thus we have a few rather ugly macros here, + * and hide all the ugliness from the user. + */ +#define put_user(x,ptr) ({ \ +unsigned long __pu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) + +#define get_user(x,ptr) ({ \ +unsigned long __gu_addr = (unsigned long)(ptr); \ +__chk_user_ptr(ptr); \ +__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) + +#define __put_user(x,ptr) put_user(x,ptr) +#define __get_user(x,ptr) get_user(x,ptr) + +struct __large_struct { unsigned long buf[100]; }; +#define __m(x) ((struct __large_struct *)(x)) + +#define __put_user_nocheck(data,addr,size) ({ \ +register int __pu_ret; \ +switch (size) { \ +case 1: __put_user_asm(data,b,addr,__pu_ret); break; \ +case 2: __put_user_asm(data,h,addr,__pu_ret); break; \ +case 4: __put_user_asm(data,w,addr,__pu_ret); break; \ +case 8: __put_user_asm(data,x,addr,__pu_ret); break; \ +default: __pu_ret = __put_user_bad(); break; \ +} __pu_ret; }) + +#define __put_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Put user asm, inline. */\n" \ +"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "sethi %%hi(2b), %0\n\t" \ + "jmpl %0 + %%lo(2b), %%g0\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\t" \ + ".previous\n\n\t" \ + : "=r" (ret) : "r" (x), "r" (__m(addr)), \ + "i" (-EFAULT)) + +extern int __put_user_bad(void); + +#define __get_user_nocheck(data,addr,size,type) ({ \ +register int __gu_ret; \ +register unsigned long __gu_val; \ +switch (size) { \ +case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ +case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ +case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \ +case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \ +default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ +} data = (type) __gu_val; __gu_ret; }) + +#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \ +register unsigned long __gu_val __asm__ ("l1"); \ +switch (size) { \ +case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ +case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ +case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \ +case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \ +default: if (__get_user_bad()) return retval; \ +} data = (type) __gu_val; }) + +#define __get_user_asm(x,size,addr,ret) \ +__asm__ __volatile__( \ + "/* Get user asm, inline. */\n" \ +"1:\t" "ld"#size "a [%2] %%asi, %1\n\t" \ + "clr %0\n" \ +"2:\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "sethi %%hi(2b), %0\n\t" \ + "clr %1\n\t" \ + "jmpl %0 + %%lo(2b), %%g0\n\t" \ + " mov %3, %0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=r" (ret), "=r" (x) : "r" (__m(addr)), \ + "i" (-EFAULT)) + +#define __get_user_asm_ret(x,size,addr,retval) \ +if (__builtin_constant_p(retval) && retval == -EFAULT) \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b,__ret_efault\n\n\t" \ + ".previous\n\t" \ + : "=r" (x) : "r" (__m(addr))); \ +else \ +__asm__ __volatile__( \ + "/* Get user asm ret, inline. */\n" \ +"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ + ".section .fixup,#alloc,#execinstr\n\t" \ + ".align 4\n" \ +"3:\n\t" \ + "ret\n\t" \ + " restore %%g0, %2, %%o0\n\n\t" \ + ".previous\n\t" \ + ".section __ex_table,\"a\"\n\t" \ + ".align 4\n\t" \ + ".word 1b, 3b\n\n\t" \ + ".previous\n\t" \ + : "=r" (x) : "r" (__m(addr)), "i" (retval)) + +extern int __get_user_bad(void); + +extern unsigned long __must_check ___copy_from_user(void *to, + const void __user *from, + unsigned long size); +extern unsigned long copy_from_user_fixup(void *to, const void __user *from, + unsigned long size); +static inline unsigned long __must_check +copy_from_user(void *to, const void __user *from, unsigned long size) +{ + unsigned long ret = ___copy_from_user(to, from, size); + + if (unlikely(ret)) + ret = copy_from_user_fixup(to, from, size); + return ret; +} +#define __copy_from_user copy_from_user + +extern unsigned long __must_check ___copy_to_user(void __user *to, + const void *from, + unsigned long size); +extern unsigned long copy_to_user_fixup(void __user *to, const void *from, + unsigned long size); +static inline unsigned long __must_check +copy_to_user(void __user *to, const void *from, unsigned long size) +{ + unsigned long ret = ___copy_to_user(to, from, size); + + if (unlikely(ret)) + ret = copy_to_user_fixup(to, from, size); + return ret; +} +#define __copy_to_user copy_to_user + +extern unsigned long __must_check ___copy_in_user(void __user *to, + const void __user *from, + unsigned long size); +extern unsigned long copy_in_user_fixup(void __user *to, void __user *from, + unsigned long size); +static inline unsigned long __must_check +copy_in_user(void __user *to, void __user *from, unsigned long size) +{ + unsigned long ret = ___copy_in_user(to, from, size); + + if (unlikely(ret)) + ret = copy_in_user_fixup(to, from, size); + return ret; +} +#define __copy_in_user copy_in_user + +extern unsigned long __must_check __clear_user(void __user *, unsigned long); + +#define clear_user __clear_user + +extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count); + +#define strncpy_from_user __strncpy_from_user + +extern long __strlen_user(const char __user *); +extern long __strnlen_user(const char __user *, long len); + +#define strlen_user __strlen_user +#define strnlen_user __strnlen_user +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_UACCESS_H */ diff --git a/include/asm-sparc/unistd.h b/include/asm-sparc/unistd.h index 2338a027637..3c2609618a0 100644 --- a/include/asm-sparc/unistd.h +++ b/include/asm-sparc/unistd.h @@ -1,378 +1,8 @@ -#ifndef _SPARC_UNISTD_H -#define _SPARC_UNISTD_H - -/* - * System calls under the Sparc. - * - * Don't be scared by the ugly clobbers, it is the only way I can - * think of right now to force the arguments into fixed registers - * before the trap into the system call with gcc 'asm' statements. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * - * SunOS compatibility based upon preliminary work which is: - * - * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) - */ - -#define __NR_restart_syscall 0 /* Linux Specific */ -#define __NR_exit 1 /* Common */ -#define __NR_fork 2 /* Common */ -#define __NR_read 3 /* Common */ -#define __NR_write 4 /* Common */ -#define __NR_open 5 /* Common */ -#define __NR_close 6 /* Common */ -#define __NR_wait4 7 /* Common */ -#define __NR_creat 8 /* Common */ -#define __NR_link 9 /* Common */ -#define __NR_unlink 10 /* Common */ -#define __NR_execv 11 /* SunOS Specific */ -#define __NR_chdir 12 /* Common */ -#define __NR_chown 13 /* Common */ -#define __NR_mknod 14 /* Common */ -#define __NR_chmod 15 /* Common */ -#define __NR_lchown 16 /* Common */ -#define __NR_brk 17 /* Common */ -#define __NR_perfctr 18 /* Performance counter operations */ -#define __NR_lseek 19 /* Common */ -#define __NR_getpid 20 /* Common */ -#define __NR_capget 21 /* Linux Specific */ -#define __NR_capset 22 /* Linux Specific */ -#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ -#define __NR_getuid 24 /* Common */ -#define __NR_vmsplice 25 /* ENOSYS under SunOS */ -#define __NR_ptrace 26 /* Common */ -#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ -#define __NR_sigaltstack 28 /* Common */ -#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ -#define __NR_utime 30 /* Implemented via utimes() under SunOS */ -#define __NR_lchown32 31 /* Linux sparc32 specific */ -#define __NR_fchown32 32 /* Linux sparc32 specific */ -#define __NR_access 33 /* Common */ -#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ -#define __NR_chown32 35 /* Linux sparc32 specific */ -#define __NR_sync 36 /* Common */ -#define __NR_kill 37 /* Common */ -#define __NR_stat 38 /* Common */ -#define __NR_sendfile 39 /* Linux Specific */ -#define __NR_lstat 40 /* Common */ -#define __NR_dup 41 /* Common */ -#define __NR_pipe 42 /* Common */ -#define __NR_times 43 /* Implemented via getrusage() in SunOS */ -#define __NR_getuid32 44 /* Linux sparc32 specific */ -#define __NR_umount2 45 /* Linux Specific */ -#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ -#define __NR_getgid 47 /* Common */ -#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ -#define __NR_geteuid 49 /* SunOS calls getuid() */ -#define __NR_getegid 50 /* SunOS calls getgid() */ -#define __NR_acct 51 /* Common */ -/* #define __NR_memory_ordering 52 Linux sparc64 specific */ -#define __NR_getgid32 53 /* Linux sparc32 specific */ -#define __NR_ioctl 54 /* Common */ -#define __NR_reboot 55 /* Common */ -#define __NR_mmap2 56 /* Linux sparc32 Specific */ -#define __NR_symlink 57 /* Common */ -#define __NR_readlink 58 /* Common */ -#define __NR_execve 59 /* Common */ -#define __NR_umask 60 /* Common */ -#define __NR_chroot 61 /* Common */ -#define __NR_fstat 62 /* Common */ -#define __NR_fstat64 63 /* Linux Specific */ -#define __NR_getpagesize 64 /* Common */ -#define __NR_msync 65 /* Common in newer 1.3.x revs... */ -#define __NR_vfork 66 /* Common */ -#define __NR_pread64 67 /* Linux Specific */ -#define __NR_pwrite64 68 /* Linux Specific */ -#define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */ -#define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */ -#define __NR_mmap 71 /* Common */ -#define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */ -#define __NR_munmap 73 /* Common */ -#define __NR_mprotect 74 /* Common */ -#define __NR_madvise 75 /* Common */ -#define __NR_vhangup 76 /* Common */ -#define __NR_truncate64 77 /* Linux sparc32 Specific */ -#define __NR_mincore 78 /* Common */ -#define __NR_getgroups 79 /* Common */ -#define __NR_setgroups 80 /* Common */ -#define __NR_getpgrp 81 /* Common */ -#define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */ -#define __NR_setitimer 83 /* Common */ -#define __NR_ftruncate64 84 /* Linux sparc32 Specific */ -#define __NR_swapon 85 /* Common */ -#define __NR_getitimer 86 /* Common */ -#define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */ -#define __NR_sethostname 88 /* Common */ -#define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */ -#define __NR_dup2 90 /* Common */ -#define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */ -#define __NR_fcntl 92 /* Common */ -#define __NR_select 93 /* Common */ -#define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */ -#define __NR_fsync 95 /* Common */ -#define __NR_setpriority 96 /* Common */ -#define __NR_socket 97 /* Common */ -#define __NR_connect 98 /* Common */ -#define __NR_accept 99 /* Common */ -#define __NR_getpriority 100 /* Common */ -#define __NR_rt_sigreturn 101 /* Linux Specific */ -#define __NR_rt_sigaction 102 /* Linux Specific */ -#define __NR_rt_sigprocmask 103 /* Linux Specific */ -#define __NR_rt_sigpending 104 /* Linux Specific */ -#define __NR_rt_sigtimedwait 105 /* Linux Specific */ -#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ -#define __NR_rt_sigsuspend 107 /* Linux Specific */ -#define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */ -#define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */ -#define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */ -#define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */ -#define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */ -#define __NR_recvmsg 113 /* Common */ -#define __NR_sendmsg 114 /* Common */ -#define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */ -#define __NR_gettimeofday 116 /* Common */ -#define __NR_getrusage 117 /* Common */ -#define __NR_getsockopt 118 /* Common */ -#define __NR_getcwd 119 /* Linux Specific */ -#define __NR_readv 120 /* Common */ -#define __NR_writev 121 /* Common */ -#define __NR_settimeofday 122 /* Common */ -#define __NR_fchown 123 /* Common */ -#define __NR_fchmod 124 /* Common */ -#define __NR_recvfrom 125 /* Common */ -#define __NR_setreuid 126 /* Common */ -#define __NR_setregid 127 /* Common */ -#define __NR_rename 128 /* Common */ -#define __NR_truncate 129 /* Common */ -#define __NR_ftruncate 130 /* Common */ -#define __NR_flock 131 /* Common */ -#define __NR_lstat64 132 /* Linux Specific */ -#define __NR_sendto 133 /* Common */ -#define __NR_shutdown 134 /* Common */ -#define __NR_socketpair 135 /* Common */ -#define __NR_mkdir 136 /* Common */ -#define __NR_rmdir 137 /* Common */ -#define __NR_utimes 138 /* SunOS Specific */ -#define __NR_stat64 139 /* Linux Specific */ -#define __NR_sendfile64 140 /* adjtime under SunOS */ -#define __NR_getpeername 141 /* Common */ -#define __NR_futex 142 /* gethostid under SunOS */ -#define __NR_gettid 143 /* ENOSYS under SunOS */ -#define __NR_getrlimit 144 /* Common */ -#define __NR_setrlimit 145 /* Common */ -#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ -#define __NR_prctl 147 /* ENOSYS under SunOS */ -#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ -#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ -#define __NR_getsockname 150 /* Common */ -#define __NR_inotify_init 151 /* Linux specific */ -#define __NR_inotify_add_watch 152 /* Linux specific */ -#define __NR_poll 153 /* Common */ -#define __NR_getdents64 154 /* Linux specific */ -#define __NR_fcntl64 155 /* Linux sparc32 Specific */ -#define __NR_inotify_rm_watch 156 /* Linux specific */ -#define __NR_statfs 157 /* Common */ -#define __NR_fstatfs 158 /* Common */ -#define __NR_umount 159 /* Common */ -#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ -#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ -#define __NR_getdomainname 162 /* SunOS Specific */ -#define __NR_setdomainname 163 /* Common */ -/* #define __NR_utrap_install 164 Linux sparc64 specific */ -#define __NR_quotactl 165 /* Common */ -#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ -#define __NR_mount 167 /* Common */ -#define __NR_ustat 168 /* Common */ -#define __NR_setxattr 169 /* SunOS: semsys */ -#define __NR_lsetxattr 170 /* SunOS: msgsys */ -#define __NR_fsetxattr 171 /* SunOS: shmsys */ -#define __NR_getxattr 172 /* SunOS: auditsys */ -#define __NR_lgetxattr 173 /* SunOS: rfssys */ -#define __NR_getdents 174 /* Common */ -#define __NR_setsid 175 /* Common */ -#define __NR_fchdir 176 /* Common */ -#define __NR_fgetxattr 177 /* SunOS: fchroot */ -#define __NR_listxattr 178 /* SunOS: vpixsys */ -#define __NR_llistxattr 179 /* SunOS: aioread */ -#define __NR_flistxattr 180 /* SunOS: aiowrite */ -#define __NR_removexattr 181 /* SunOS: aiowait */ -#define __NR_lremovexattr 182 /* SunOS: aiocancel */ -#define __NR_sigpending 183 /* Common */ -#define __NR_query_module 184 /* Linux Specific */ -#define __NR_setpgid 185 /* Common */ -#define __NR_fremovexattr 186 /* SunOS: pathconf */ -#define __NR_tkill 187 /* SunOS: fpathconf */ -#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ -#define __NR_uname 189 /* Linux Specific */ -#define __NR_init_module 190 /* Linux Specific */ -#define __NR_personality 191 /* Linux Specific */ -#define __NR_remap_file_pages 192 /* Linux Specific */ -#define __NR_epoll_create 193 /* Linux Specific */ -#define __NR_epoll_ctl 194 /* Linux Specific */ -#define __NR_epoll_wait 195 /* Linux Specific */ -#define __NR_ioprio_set 196 /* Linux Specific */ -#define __NR_getppid 197 /* Linux Specific */ -#define __NR_sigaction 198 /* Linux Specific */ -#define __NR_sgetmask 199 /* Linux Specific */ -#define __NR_ssetmask 200 /* Linux Specific */ -#define __NR_sigsuspend 201 /* Linux Specific */ -#define __NR_oldlstat 202 /* Linux Specific */ -#define __NR_uselib 203 /* Linux Specific */ -#define __NR_readdir 204 /* Linux Specific */ -#define __NR_readahead 205 /* Linux Specific */ -#define __NR_socketcall 206 /* Linux Specific */ -#define __NR_syslog 207 /* Linux Specific */ -#define __NR_lookup_dcookie 208 /* Linux Specific */ -#define __NR_fadvise64 209 /* Linux Specific */ -#define __NR_fadvise64_64 210 /* Linux Specific */ -#define __NR_tgkill 211 /* Linux Specific */ -#define __NR_waitpid 212 /* Linux Specific */ -#define __NR_swapoff 213 /* Linux Specific */ -#define __NR_sysinfo 214 /* Linux Specific */ -#define __NR_ipc 215 /* Linux Specific */ -#define __NR_sigreturn 216 /* Linux Specific */ -#define __NR_clone 217 /* Linux Specific */ -#define __NR_ioprio_get 218 /* Linux Specific */ -#define __NR_adjtimex 219 /* Linux Specific */ -#define __NR_sigprocmask 220 /* Linux Specific */ -#define __NR_create_module 221 /* Linux Specific */ -#define __NR_delete_module 222 /* Linux Specific */ -#define __NR_get_kernel_syms 223 /* Linux Specific */ -#define __NR_getpgid 224 /* Linux Specific */ -#define __NR_bdflush 225 /* Linux Specific */ -#define __NR_sysfs 226 /* Linux Specific */ -#define __NR_afs_syscall 227 /* Linux Specific */ -#define __NR_setfsuid 228 /* Linux Specific */ -#define __NR_setfsgid 229 /* Linux Specific */ -#define __NR__newselect 230 /* Linux Specific */ -#define __NR_time 231 /* Linux Specific */ -#define __NR_splice 232 /* Linux Specific */ -#define __NR_stime 233 /* Linux Specific */ -#define __NR_statfs64 234 /* Linux Specific */ -#define __NR_fstatfs64 235 /* Linux Specific */ -#define __NR__llseek 236 /* Linux Specific */ -#define __NR_mlock 237 -#define __NR_munlock 238 -#define __NR_mlockall 239 -#define __NR_munlockall 240 -#define __NR_sched_setparam 241 -#define __NR_sched_getparam 242 -#define __NR_sched_setscheduler 243 -#define __NR_sched_getscheduler 244 -#define __NR_sched_yield 245 -#define __NR_sched_get_priority_max 246 -#define __NR_sched_get_priority_min 247 -#define __NR_sched_rr_get_interval 248 -#define __NR_nanosleep 249 -#define __NR_mremap 250 -#define __NR__sysctl 251 -#define __NR_getsid 252 -#define __NR_fdatasync 253 -#define __NR_nfsservctl 254 -#define __NR_sync_file_range 255 -#define __NR_clock_settime 256 -#define __NR_clock_gettime 257 -#define __NR_clock_getres 258 -#define __NR_clock_nanosleep 259 -#define __NR_sched_getaffinity 260 -#define __NR_sched_setaffinity 261 -#define __NR_timer_settime 262 -#define __NR_timer_gettime 263 -#define __NR_timer_getoverrun 264 -#define __NR_timer_delete 265 -#define __NR_timer_create 266 -/* #define __NR_vserver 267 Reserved for VSERVER */ -#define __NR_io_setup 268 -#define __NR_io_destroy 269 -#define __NR_io_submit 270 -#define __NR_io_cancel 271 -#define __NR_io_getevents 272 -#define __NR_mq_open 273 -#define __NR_mq_unlink 274 -#define __NR_mq_timedsend 275 -#define __NR_mq_timedreceive 276 -#define __NR_mq_notify 277 -#define __NR_mq_getsetattr 278 -#define __NR_waitid 279 -#define __NR_tee 280 -#define __NR_add_key 281 -#define __NR_request_key 282 -#define __NR_keyctl 283 -#define __NR_openat 284 -#define __NR_mkdirat 285 -#define __NR_mknodat 286 -#define __NR_fchownat 287 -#define __NR_futimesat 288 -#define __NR_fstatat64 289 -#define __NR_unlinkat 290 -#define __NR_renameat 291 -#define __NR_linkat 292 -#define __NR_symlinkat 293 -#define __NR_readlinkat 294 -#define __NR_fchmodat 295 -#define __NR_faccessat 296 -#define __NR_pselect6 297 -#define __NR_ppoll 298 -#define __NR_unshare 299 -#define __NR_set_robust_list 300 -#define __NR_get_robust_list 301 -#define __NR_migrate_pages 302 -#define __NR_mbind 303 -#define __NR_get_mempolicy 304 -#define __NR_set_mempolicy 305 -#define __NR_kexec_load 306 -#define __NR_move_pages 307 -#define __NR_getcpu 308 -#define __NR_epoll_pwait 309 -#define __NR_utimensat 310 -#define __NR_signalfd 311 -#define __NR_timerfd_create 312 -#define __NR_eventfd 313 -#define __NR_fallocate 314 -#define __NR_timerfd_settime 315 -#define __NR_timerfd_gettime 316 - -#define NR_SYSCALLS 317 - -/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, - * it never had the plain ones and there is no value to adding those - * old versions into the syscall table. - */ -#define __IGNORE_setresuid -#define __IGNORE_getresuid -#define __IGNORE_setresgid -#define __IGNORE_getresgid - -#ifdef __KERNEL__ -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _SPARC_UNISTD_H */ +#ifndef ___ASM_SPARC_UNISTD_H +#define ___ASM_SPARC_UNISTD_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/unistd_64.h> +#else +#include <asm-sparc/unistd_32.h> +#endif +#endif diff --git a/include/asm-sparc/unistd_32.h b/include/asm-sparc/unistd_32.h new file mode 100644 index 00000000000..2338a027637 --- /dev/null +++ b/include/asm-sparc/unistd_32.h @@ -0,0 +1,378 @@ +#ifndef _SPARC_UNISTD_H +#define _SPARC_UNISTD_H + +/* + * System calls under the Sparc. + * + * Don't be scared by the ugly clobbers, it is the only way I can + * think of right now to force the arguments into fixed registers + * before the trap into the system call with gcc 'asm' statements. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * + * SunOS compatibility based upon preliminary work which is: + * + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) + */ + +#define __NR_restart_syscall 0 /* Linux Specific */ +#define __NR_exit 1 /* Common */ +#define __NR_fork 2 /* Common */ +#define __NR_read 3 /* Common */ +#define __NR_write 4 /* Common */ +#define __NR_open 5 /* Common */ +#define __NR_close 6 /* Common */ +#define __NR_wait4 7 /* Common */ +#define __NR_creat 8 /* Common */ +#define __NR_link 9 /* Common */ +#define __NR_unlink 10 /* Common */ +#define __NR_execv 11 /* SunOS Specific */ +#define __NR_chdir 12 /* Common */ +#define __NR_chown 13 /* Common */ +#define __NR_mknod 14 /* Common */ +#define __NR_chmod 15 /* Common */ +#define __NR_lchown 16 /* Common */ +#define __NR_brk 17 /* Common */ +#define __NR_perfctr 18 /* Performance counter operations */ +#define __NR_lseek 19 /* Common */ +#define __NR_getpid 20 /* Common */ +#define __NR_capget 21 /* Linux Specific */ +#define __NR_capset 22 /* Linux Specific */ +#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ +#define __NR_getuid 24 /* Common */ +#define __NR_vmsplice 25 /* ENOSYS under SunOS */ +#define __NR_ptrace 26 /* Common */ +#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ +#define __NR_sigaltstack 28 /* Common */ +#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ +#define __NR_utime 30 /* Implemented via utimes() under SunOS */ +#define __NR_lchown32 31 /* Linux sparc32 specific */ +#define __NR_fchown32 32 /* Linux sparc32 specific */ +#define __NR_access 33 /* Common */ +#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ +#define __NR_chown32 35 /* Linux sparc32 specific */ +#define __NR_sync 36 /* Common */ +#define __NR_kill 37 /* Common */ +#define __NR_stat 38 /* Common */ +#define __NR_sendfile 39 /* Linux Specific */ +#define __NR_lstat 40 /* Common */ +#define __NR_dup 41 /* Common */ +#define __NR_pipe 42 /* Common */ +#define __NR_times 43 /* Implemented via getrusage() in SunOS */ +#define __NR_getuid32 44 /* Linux sparc32 specific */ +#define __NR_umount2 45 /* Linux Specific */ +#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ +#define __NR_getgid 47 /* Common */ +#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ +#define __NR_geteuid 49 /* SunOS calls getuid() */ +#define __NR_getegid 50 /* SunOS calls getgid() */ +#define __NR_acct 51 /* Common */ +/* #define __NR_memory_ordering 52 Linux sparc64 specific */ +#define __NR_getgid32 53 /* Linux sparc32 specific */ +#define __NR_ioctl 54 /* Common */ +#define __NR_reboot 55 /* Common */ +#define __NR_mmap2 56 /* Linux sparc32 Specific */ +#define __NR_symlink 57 /* Common */ +#define __NR_readlink 58 /* Common */ +#define __NR_execve 59 /* Common */ +#define __NR_umask 60 /* Common */ +#define __NR_chroot 61 /* Common */ +#define __NR_fstat 62 /* Common */ +#define __NR_fstat64 63 /* Linux Specific */ +#define __NR_getpagesize 64 /* Common */ +#define __NR_msync 65 /* Common in newer 1.3.x revs... */ +#define __NR_vfork 66 /* Common */ +#define __NR_pread64 67 /* Linux Specific */ +#define __NR_pwrite64 68 /* Linux Specific */ +#define __NR_geteuid32 69 /* Linux sparc32, sbrk under SunOS */ +#define __NR_getegid32 70 /* Linux sparc32, sstk under SunOS */ +#define __NR_mmap 71 /* Common */ +#define __NR_setreuid32 72 /* Linux sparc32, vadvise under SunOS */ +#define __NR_munmap 73 /* Common */ +#define __NR_mprotect 74 /* Common */ +#define __NR_madvise 75 /* Common */ +#define __NR_vhangup 76 /* Common */ +#define __NR_truncate64 77 /* Linux sparc32 Specific */ +#define __NR_mincore 78 /* Common */ +#define __NR_getgroups 79 /* Common */ +#define __NR_setgroups 80 /* Common */ +#define __NR_getpgrp 81 /* Common */ +#define __NR_setgroups32 82 /* Linux sparc32, setpgrp under SunOS */ +#define __NR_setitimer 83 /* Common */ +#define __NR_ftruncate64 84 /* Linux sparc32 Specific */ +#define __NR_swapon 85 /* Common */ +#define __NR_getitimer 86 /* Common */ +#define __NR_setuid32 87 /* Linux sparc32, gethostname under SunOS */ +#define __NR_sethostname 88 /* Common */ +#define __NR_setgid32 89 /* Linux sparc32, getdtablesize under SunOS */ +#define __NR_dup2 90 /* Common */ +#define __NR_setfsuid32 91 /* Linux sparc32, getdopt under SunOS */ +#define __NR_fcntl 92 /* Common */ +#define __NR_select 93 /* Common */ +#define __NR_setfsgid32 94 /* Linux sparc32, setdopt under SunOS */ +#define __NR_fsync 95 /* Common */ +#define __NR_setpriority 96 /* Common */ +#define __NR_socket 97 /* Common */ +#define __NR_connect 98 /* Common */ +#define __NR_accept 99 /* Common */ +#define __NR_getpriority 100 /* Common */ +#define __NR_rt_sigreturn 101 /* Linux Specific */ +#define __NR_rt_sigaction 102 /* Linux Specific */ +#define __NR_rt_sigprocmask 103 /* Linux Specific */ +#define __NR_rt_sigpending 104 /* Linux Specific */ +#define __NR_rt_sigtimedwait 105 /* Linux Specific */ +#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ +#define __NR_rt_sigsuspend 107 /* Linux Specific */ +#define __NR_setresuid32 108 /* Linux Specific, sigvec under SunOS */ +#define __NR_getresuid32 109 /* Linux Specific, sigblock under SunOS */ +#define __NR_setresgid32 110 /* Linux Specific, sigsetmask under SunOS */ +#define __NR_getresgid32 111 /* Linux Specific, sigpause under SunOS */ +#define __NR_setregid32 112 /* Linux sparc32, sigstack under SunOS */ +#define __NR_recvmsg 113 /* Common */ +#define __NR_sendmsg 114 /* Common */ +#define __NR_getgroups32 115 /* Linux sparc32, vtrace under SunOS */ +#define __NR_gettimeofday 116 /* Common */ +#define __NR_getrusage 117 /* Common */ +#define __NR_getsockopt 118 /* Common */ +#define __NR_getcwd 119 /* Linux Specific */ +#define __NR_readv 120 /* Common */ +#define __NR_writev 121 /* Common */ +#define __NR_settimeofday 122 /* Common */ +#define __NR_fchown 123 /* Common */ +#define __NR_fchmod 124 /* Common */ +#define __NR_recvfrom 125 /* Common */ +#define __NR_setreuid 126 /* Common */ +#define __NR_setregid 127 /* Common */ +#define __NR_rename 128 /* Common */ +#define __NR_truncate 129 /* Common */ +#define __NR_ftruncate 130 /* Common */ +#define __NR_flock 131 /* Common */ +#define __NR_lstat64 132 /* Linux Specific */ +#define __NR_sendto 133 /* Common */ +#define __NR_shutdown 134 /* Common */ +#define __NR_socketpair 135 /* Common */ +#define __NR_mkdir 136 /* Common */ +#define __NR_rmdir 137 /* Common */ +#define __NR_utimes 138 /* SunOS Specific */ +#define __NR_stat64 139 /* Linux Specific */ +#define __NR_sendfile64 140 /* adjtime under SunOS */ +#define __NR_getpeername 141 /* Common */ +#define __NR_futex 142 /* gethostid under SunOS */ +#define __NR_gettid 143 /* ENOSYS under SunOS */ +#define __NR_getrlimit 144 /* Common */ +#define __NR_setrlimit 145 /* Common */ +#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ +#define __NR_prctl 147 /* ENOSYS under SunOS */ +#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ +#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ +#define __NR_getsockname 150 /* Common */ +#define __NR_inotify_init 151 /* Linux specific */ +#define __NR_inotify_add_watch 152 /* Linux specific */ +#define __NR_poll 153 /* Common */ +#define __NR_getdents64 154 /* Linux specific */ +#define __NR_fcntl64 155 /* Linux sparc32 Specific */ +#define __NR_inotify_rm_watch 156 /* Linux specific */ +#define __NR_statfs 157 /* Common */ +#define __NR_fstatfs 158 /* Common */ +#define __NR_umount 159 /* Common */ +#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ +#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ +#define __NR_getdomainname 162 /* SunOS Specific */ +#define __NR_setdomainname 163 /* Common */ +/* #define __NR_utrap_install 164 Linux sparc64 specific */ +#define __NR_quotactl 165 /* Common */ +#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ +#define __NR_mount 167 /* Common */ +#define __NR_ustat 168 /* Common */ +#define __NR_setxattr 169 /* SunOS: semsys */ +#define __NR_lsetxattr 170 /* SunOS: msgsys */ +#define __NR_fsetxattr 171 /* SunOS: shmsys */ +#define __NR_getxattr 172 /* SunOS: auditsys */ +#define __NR_lgetxattr 173 /* SunOS: rfssys */ +#define __NR_getdents 174 /* Common */ +#define __NR_setsid 175 /* Common */ +#define __NR_fchdir 176 /* Common */ +#define __NR_fgetxattr 177 /* SunOS: fchroot */ +#define __NR_listxattr 178 /* SunOS: vpixsys */ +#define __NR_llistxattr 179 /* SunOS: aioread */ +#define __NR_flistxattr 180 /* SunOS: aiowrite */ +#define __NR_removexattr 181 /* SunOS: aiowait */ +#define __NR_lremovexattr 182 /* SunOS: aiocancel */ +#define __NR_sigpending 183 /* Common */ +#define __NR_query_module 184 /* Linux Specific */ +#define __NR_setpgid 185 /* Common */ +#define __NR_fremovexattr 186 /* SunOS: pathconf */ +#define __NR_tkill 187 /* SunOS: fpathconf */ +#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ +#define __NR_uname 189 /* Linux Specific */ +#define __NR_init_module 190 /* Linux Specific */ +#define __NR_personality 191 /* Linux Specific */ +#define __NR_remap_file_pages 192 /* Linux Specific */ +#define __NR_epoll_create 193 /* Linux Specific */ +#define __NR_epoll_ctl 194 /* Linux Specific */ +#define __NR_epoll_wait 195 /* Linux Specific */ +#define __NR_ioprio_set 196 /* Linux Specific */ +#define __NR_getppid 197 /* Linux Specific */ +#define __NR_sigaction 198 /* Linux Specific */ +#define __NR_sgetmask 199 /* Linux Specific */ +#define __NR_ssetmask 200 /* Linux Specific */ +#define __NR_sigsuspend 201 /* Linux Specific */ +#define __NR_oldlstat 202 /* Linux Specific */ +#define __NR_uselib 203 /* Linux Specific */ +#define __NR_readdir 204 /* Linux Specific */ +#define __NR_readahead 205 /* Linux Specific */ +#define __NR_socketcall 206 /* Linux Specific */ +#define __NR_syslog 207 /* Linux Specific */ +#define __NR_lookup_dcookie 208 /* Linux Specific */ +#define __NR_fadvise64 209 /* Linux Specific */ +#define __NR_fadvise64_64 210 /* Linux Specific */ +#define __NR_tgkill 211 /* Linux Specific */ +#define __NR_waitpid 212 /* Linux Specific */ +#define __NR_swapoff 213 /* Linux Specific */ +#define __NR_sysinfo 214 /* Linux Specific */ +#define __NR_ipc 215 /* Linux Specific */ +#define __NR_sigreturn 216 /* Linux Specific */ +#define __NR_clone 217 /* Linux Specific */ +#define __NR_ioprio_get 218 /* Linux Specific */ +#define __NR_adjtimex 219 /* Linux Specific */ +#define __NR_sigprocmask 220 /* Linux Specific */ +#define __NR_create_module 221 /* Linux Specific */ +#define __NR_delete_module 222 /* Linux Specific */ +#define __NR_get_kernel_syms 223 /* Linux Specific */ +#define __NR_getpgid 224 /* Linux Specific */ +#define __NR_bdflush 225 /* Linux Specific */ +#define __NR_sysfs 226 /* Linux Specific */ +#define __NR_afs_syscall 227 /* Linux Specific */ +#define __NR_setfsuid 228 /* Linux Specific */ +#define __NR_setfsgid 229 /* Linux Specific */ +#define __NR__newselect 230 /* Linux Specific */ +#define __NR_time 231 /* Linux Specific */ +#define __NR_splice 232 /* Linux Specific */ +#define __NR_stime 233 /* Linux Specific */ +#define __NR_statfs64 234 /* Linux Specific */ +#define __NR_fstatfs64 235 /* Linux Specific */ +#define __NR__llseek 236 /* Linux Specific */ +#define __NR_mlock 237 +#define __NR_munlock 238 +#define __NR_mlockall 239 +#define __NR_munlockall 240 +#define __NR_sched_setparam 241 +#define __NR_sched_getparam 242 +#define __NR_sched_setscheduler 243 +#define __NR_sched_getscheduler 244 +#define __NR_sched_yield 245 +#define __NR_sched_get_priority_max 246 +#define __NR_sched_get_priority_min 247 +#define __NR_sched_rr_get_interval 248 +#define __NR_nanosleep 249 +#define __NR_mremap 250 +#define __NR__sysctl 251 +#define __NR_getsid 252 +#define __NR_fdatasync 253 +#define __NR_nfsservctl 254 +#define __NR_sync_file_range 255 +#define __NR_clock_settime 256 +#define __NR_clock_gettime 257 +#define __NR_clock_getres 258 +#define __NR_clock_nanosleep 259 +#define __NR_sched_getaffinity 260 +#define __NR_sched_setaffinity 261 +#define __NR_timer_settime 262 +#define __NR_timer_gettime 263 +#define __NR_timer_getoverrun 264 +#define __NR_timer_delete 265 +#define __NR_timer_create 266 +/* #define __NR_vserver 267 Reserved for VSERVER */ +#define __NR_io_setup 268 +#define __NR_io_destroy 269 +#define __NR_io_submit 270 +#define __NR_io_cancel 271 +#define __NR_io_getevents 272 +#define __NR_mq_open 273 +#define __NR_mq_unlink 274 +#define __NR_mq_timedsend 275 +#define __NR_mq_timedreceive 276 +#define __NR_mq_notify 277 +#define __NR_mq_getsetattr 278 +#define __NR_waitid 279 +#define __NR_tee 280 +#define __NR_add_key 281 +#define __NR_request_key 282 +#define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_fstatat64 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 +#define __NR_unshare 299 +#define __NR_set_robust_list 300 +#define __NR_get_robust_list 301 +#define __NR_migrate_pages 302 +#define __NR_mbind 303 +#define __NR_get_mempolicy 304 +#define __NR_set_mempolicy 305 +#define __NR_kexec_load 306 +#define __NR_move_pages 307 +#define __NR_getcpu 308 +#define __NR_epoll_pwait 309 +#define __NR_utimensat 310 +#define __NR_signalfd 311 +#define __NR_timerfd_create 312 +#define __NR_eventfd 313 +#define __NR_fallocate 314 +#define __NR_timerfd_settime 315 +#define __NR_timerfd_gettime 316 + +#define NR_SYSCALLS 317 + +/* Sparc 32-bit only has the "setresuid32", "getresuid32" variants, + * it never had the plain ones and there is no value to adding those + * old versions into the syscall table. + */ +#define __IGNORE_setresuid +#define __IGNORE_getresuid +#define __IGNORE_setresgid +#define __IGNORE_getresgid + +#ifdef __KERNEL__ +#define __ARCH_WANT_IPC_PARSE_VERSION +#define __ARCH_WANT_OLD_READDIR +#define __ARCH_WANT_STAT64 +#define __ARCH_WANT_SYS_ALARM +#define __ARCH_WANT_SYS_GETHOSTNAME +#define __ARCH_WANT_SYS_PAUSE +#define __ARCH_WANT_SYS_SGETMASK +#define __ARCH_WANT_SYS_SIGNAL +#define __ARCH_WANT_SYS_TIME +#define __ARCH_WANT_SYS_UTIME +#define __ARCH_WANT_SYS_WAITPID +#define __ARCH_WANT_SYS_SOCKETCALL +#define __ARCH_WANT_SYS_FADVISE64 +#define __ARCH_WANT_SYS_GETPGRP +#define __ARCH_WANT_SYS_LLSEEK +#define __ARCH_WANT_SYS_NICE +#define __ARCH_WANT_SYS_OLDUMOUNT +#define __ARCH_WANT_SYS_SIGPENDING +#define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND + +/* + * "Conditional" syscalls + * + * What we want is __attribute__((weak,alias("sys_ni_syscall"))), + * but it doesn't work on all toolchains, so we just do it by hand + */ +#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") + +#endif /* __KERNEL__ */ +#endif /* _SPARC_UNISTD_H */ diff --git a/include/asm-sparc/unistd_64.h b/include/asm-sparc/unistd_64.h new file mode 100644 index 00000000000..13be4453a1f --- /dev/null +++ b/include/asm-sparc/unistd_64.h @@ -0,0 +1,373 @@ +#ifndef _SPARC64_UNISTD_H +#define _SPARC64_UNISTD_H + +/* + * System calls under the Sparc. + * + * Don't be scared by the ugly clobbers, it is the only way I can + * think of right now to force the arguments into fixed registers + * before the trap into the system call with gcc 'asm' statements. + * + * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) + * + * SunOS compatibility based upon preliminary work which is: + * + * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) + */ + +#define __NR_restart_syscall 0 /* Linux Specific */ +#define __NR_exit 1 /* Common */ +#define __NR_fork 2 /* Common */ +#define __NR_read 3 /* Common */ +#define __NR_write 4 /* Common */ +#define __NR_open 5 /* Common */ +#define __NR_close 6 /* Common */ +#define __NR_wait4 7 /* Common */ +#define __NR_creat 8 /* Common */ +#define __NR_link 9 /* Common */ +#define __NR_unlink 10 /* Common */ +#define __NR_execv 11 /* SunOS Specific */ +#define __NR_chdir 12 /* Common */ +#define __NR_chown 13 /* Common */ +#define __NR_mknod 14 /* Common */ +#define __NR_chmod 15 /* Common */ +#define __NR_lchown 16 /* Common */ +#define __NR_brk 17 /* Common */ +#define __NR_perfctr 18 /* Performance counter operations */ +#define __NR_lseek 19 /* Common */ +#define __NR_getpid 20 /* Common */ +#define __NR_capget 21 /* Linux Specific */ +#define __NR_capset 22 /* Linux Specific */ +#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ +#define __NR_getuid 24 /* Common */ +#define __NR_vmsplice 25 /* ENOSYS under SunOS */ +#define __NR_ptrace 26 /* Common */ +#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ +#define __NR_sigaltstack 28 /* Common */ +#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ +#define __NR_utime 30 /* Implemented via utimes() under SunOS */ +/* #define __NR_lchown32 31 Linux sparc32 specific */ +/* #define __NR_fchown32 32 Linux sparc32 specific */ +#define __NR_access 33 /* Common */ +#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ +/* #define __NR_chown32 35 Linux sparc32 specific */ +#define __NR_sync 36 /* Common */ +#define __NR_kill 37 /* Common */ +#define __NR_stat 38 /* Common */ +#define __NR_sendfile 39 /* Linux Specific */ +#define __NR_lstat 40 /* Common */ +#define __NR_dup 41 /* Common */ +#define __NR_pipe 42 /* Common */ +#define __NR_times 43 /* Implemented via getrusage() in SunOS */ +/* #define __NR_getuid32 44 Linux sparc32 specific */ +#define __NR_umount2 45 /* Linux Specific */ +#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ +#define __NR_getgid 47 /* Common */ +#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ +#define __NR_geteuid 49 /* SunOS calls getuid() */ +#define __NR_getegid 50 /* SunOS calls getgid() */ +#define __NR_acct 51 /* Common */ +#define __NR_memory_ordering 52 /* Linux Specific */ +/* #define __NR_getgid32 53 Linux sparc32 specific */ +#define __NR_ioctl 54 /* Common */ +#define __NR_reboot 55 /* Common */ +/* #define __NR_mmap2 56 Linux sparc32 Specific */ +#define __NR_symlink 57 /* Common */ +#define __NR_readlink 58 /* Common */ +#define __NR_execve 59 /* Common */ +#define __NR_umask 60 /* Common */ +#define __NR_chroot 61 /* Common */ +#define __NR_fstat 62 /* Common */ +#define __NR_fstat64 63 /* Linux Specific */ +#define __NR_getpagesize 64 /* Common */ +#define __NR_msync 65 /* Common in newer 1.3.x revs... */ +#define __NR_vfork 66 /* Common */ +#define __NR_pread64 67 /* Linux Specific */ +#define __NR_pwrite64 68 /* Linux Specific */ +/* #define __NR_geteuid32 69 Linux sparc32, sbrk under SunOS */ +/* #define __NR_getegid32 70 Linux sparc32, sstk under SunOS */ +#define __NR_mmap 71 /* Common */ +/* #define __NR_setreuid32 72 Linux sparc32, vadvise under SunOS */ +#define __NR_munmap 73 /* Common */ +#define __NR_mprotect 74 /* Common */ +#define __NR_madvise 75 /* Common */ +#define __NR_vhangup 76 /* Common */ +/* #define __NR_truncate64 77 Linux sparc32 Specific */ +#define __NR_mincore 78 /* Common */ +#define __NR_getgroups 79 /* Common */ +#define __NR_setgroups 80 /* Common */ +#define __NR_getpgrp 81 /* Common */ +/* #define __NR_setgroups32 82 Linux sparc32, setpgrp under SunOS */ +#define __NR_setitimer 83 /* Common */ +/* #define __NR_ftruncate64 84 Linux sparc32 Specific */ +#define __NR_swapon 85 /* Common */ +#define __NR_getitimer 86 /* Common */ +/* #define __NR_setuid32 87 Linux sparc32, gethostname under SunOS */ +#define __NR_sethostname 88 /* Common */ +/* #define __NR_setgid32 89 Linux sparc32, getdtablesize under SunOS */ +#define __NR_dup2 90 /* Common */ +/* #define __NR_setfsuid32 91 Linux sparc32, getdopt under SunOS */ +#define __NR_fcntl 92 /* Common */ +#define __NR_select 93 /* Common */ +/* #define __NR_setfsgid32 94 Linux sparc32, setdopt under SunOS */ +#define __NR_fsync 95 /* Common */ +#define __NR_setpriority 96 /* Common */ +#define __NR_socket 97 /* Common */ +#define __NR_connect 98 /* Common */ +#define __NR_accept 99 /* Common */ +#define __NR_getpriority 100 /* Common */ +#define __NR_rt_sigreturn 101 /* Linux Specific */ +#define __NR_rt_sigaction 102 /* Linux Specific */ +#define __NR_rt_sigprocmask 103 /* Linux Specific */ +#define __NR_rt_sigpending 104 /* Linux Specific */ +#define __NR_rt_sigtimedwait 105 /* Linux Specific */ +#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ +#define __NR_rt_sigsuspend 107 /* Linux Specific */ +#define __NR_setresuid 108 /* Linux Specific, sigvec under SunOS */ +#define __NR_getresuid 109 /* Linux Specific, sigblock under SunOS */ +#define __NR_setresgid 110 /* Linux Specific, sigsetmask under SunOS */ +#define __NR_getresgid 111 /* Linux Specific, sigpause under SunOS */ +/* #define __NR_setregid32 75 Linux sparc32, sigstack under SunOS */ +#define __NR_recvmsg 113 /* Common */ +#define __NR_sendmsg 114 /* Common */ +/* #define __NR_getgroups32 115 Linux sparc32, vtrace under SunOS */ +#define __NR_gettimeofday 116 /* Common */ +#define __NR_getrusage 117 /* Common */ +#define __NR_getsockopt 118 /* Common */ +#define __NR_getcwd 119 /* Linux Specific */ +#define __NR_readv 120 /* Common */ +#define __NR_writev 121 /* Common */ +#define __NR_settimeofday 122 /* Common */ +#define __NR_fchown 123 /* Common */ +#define __NR_fchmod 124 /* Common */ +#define __NR_recvfrom 125 /* Common */ +#define __NR_setreuid 126 /* Common */ +#define __NR_setregid 127 /* Common */ +#define __NR_rename 128 /* Common */ +#define __NR_truncate 129 /* Common */ +#define __NR_ftruncate 130 /* Common */ +#define __NR_flock 131 /* Common */ +#define __NR_lstat64 132 /* Linux Specific */ +#define __NR_sendto 133 /* Common */ +#define __NR_shutdown 134 /* Common */ +#define __NR_socketpair 135 /* Common */ +#define __NR_mkdir 136 /* Common */ +#define __NR_rmdir 137 /* Common */ +#define __NR_utimes 138 /* SunOS Specific */ +#define __NR_stat64 139 /* Linux Specific */ +#define __NR_sendfile64 140 /* adjtime under SunOS */ +#define __NR_getpeername 141 /* Common */ +#define __NR_futex 142 /* gethostid under SunOS */ +#define __NR_gettid 143 /* ENOSYS under SunOS */ +#define __NR_getrlimit 144 /* Common */ +#define __NR_setrlimit 145 /* Common */ +#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ +#define __NR_prctl 147 /* ENOSYS under SunOS */ +#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ +#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ +#define __NR_getsockname 150 /* Common */ +#define __NR_inotify_init 151 /* Linux specific */ +#define __NR_inotify_add_watch 152 /* Linux specific */ +#define __NR_poll 153 /* Common */ +#define __NR_getdents64 154 /* Linux specific */ +/* #define __NR_fcntl64 155 Linux sparc32 Specific */ +#define __NR_inotify_rm_watch 156 /* Linux specific */ +#define __NR_statfs 157 /* Common */ +#define __NR_fstatfs 158 /* Common */ +#define __NR_umount 159 /* Common */ +#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ +#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ +#define __NR_getdomainname 162 /* SunOS Specific */ +#define __NR_setdomainname 163 /* Common */ +#define __NR_utrap_install 164 /* SYSV ABI/v9 required */ +#define __NR_quotactl 165 /* Common */ +#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ +#define __NR_mount 167 /* Common */ +#define __NR_ustat 168 /* Common */ +#define __NR_setxattr 169 /* SunOS: semsys */ +#define __NR_lsetxattr 170 /* SunOS: msgsys */ +#define __NR_fsetxattr 171 /* SunOS: shmsys */ +#define __NR_getxattr 172 /* SunOS: auditsys */ +#define __NR_lgetxattr 173 /* SunOS: rfssys */ +#define __NR_getdents 174 /* Common */ +#define __NR_setsid 175 /* Common */ +#define __NR_fchdir 176 /* Common */ +#define __NR_fgetxattr 177 /* SunOS: fchroot */ +#define __NR_listxattr 178 /* SunOS: vpixsys */ +#define __NR_llistxattr 179 /* SunOS: aioread */ +#define __NR_flistxattr 180 /* SunOS: aiowrite */ +#define __NR_removexattr 181 /* SunOS: aiowait */ +#define __NR_lremovexattr 182 /* SunOS: aiocancel */ +#define __NR_sigpending 183 /* Common */ +#define __NR_query_module 184 /* Linux Specific */ +#define __NR_setpgid 185 /* Common */ +#define __NR_fremovexattr 186 /* SunOS: pathconf */ +#define __NR_tkill 187 /* SunOS: fpathconf */ +#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ +#define __NR_uname 189 /* Linux Specific */ +#define __NR_init_module 190 /* Linux Specific */ +#define __NR_personality 191 /* Linux Specific */ +#define __NR_remap_file_pages 192 /* Linux Specific */ +#define __NR_epoll_create 193 /* Linux Specific */ +#define __NR_epoll_ctl 194 /* Linux Specific */ +#define __NR_epoll_wait 195 /* Linux Specific */ +#define __NR_ioprio_set 196 /* Linux Specific */ +#define __NR_getppid 197 /* Linux Specific */ +#define __NR_sigaction 198 /* Linux Specific */ +#define __NR_sgetmask 199 /* Linux Specific */ +#define __NR_ssetmask 200 /* Linux Specific */ +#define __NR_sigsuspend 201 /* Linux Specific */ +#define __NR_oldlstat 202 /* Linux Specific */ +#define __NR_uselib 203 /* Linux Specific */ +#define __NR_readdir 204 /* Linux Specific */ +#define __NR_readahead 205 /* Linux Specific */ +#define __NR_socketcall 206 /* Linux Specific */ +#define __NR_syslog 207 /* Linux Specific */ +#define __NR_lookup_dcookie 208 /* Linux Specific */ +#define __NR_fadvise64 209 /* Linux Specific */ +#define __NR_fadvise64_64 210 /* Linux Specific */ +#define __NR_tgkill 211 /* Linux Specific */ +#define __NR_waitpid 212 /* Linux Specific */ +#define __NR_swapoff 213 /* Linux Specific */ +#define __NR_sysinfo 214 /* Linux Specific */ +#define __NR_ipc 215 /* Linux Specific */ +#define __NR_sigreturn 216 /* Linux Specific */ +#define __NR_clone 217 /* Linux Specific */ +#define __NR_ioprio_get 218 /* Linux Specific */ +#define __NR_adjtimex 219 /* Linux Specific */ +#define __NR_sigprocmask 220 /* Linux Specific */ +#define __NR_create_module 221 /* Linux Specific */ +#define __NR_delete_module 222 /* Linux Specific */ +#define __NR_get_kernel_syms 223 /* Linux Specific */ +#define __NR_getpgid 224 /* Linux Specific */ +#define __NR_bdflush 225 /* Linux Specific */ +#define __NR_sysfs 226 /* Linux Specific */ +#define __NR_afs_syscall 227 /* Linux Specific */ +#define __NR_setfsuid 228 /* Linux Specific */ +#define __NR_setfsgid 229 /* Linux Specific */ +#define __NR__newselect 230 /* Linux Specific */ +#ifdef __KERNEL__ +#define __NR_time 231 /* Linux sparc32 */ +#endif +#define __NR_splice 232 /* Linux Specific */ +#define __NR_stime 233 /* Linux Specific */ +#define __NR_statfs64 234 /* Linux Specific */ +#define __NR_fstatfs64 235 /* Linux Specific */ +#define __NR__llseek 236 /* Linux Specific */ +#define __NR_mlock 237 +#define __NR_munlock 238 +#define __NR_mlockall 239 +#define __NR_munlockall 240 +#define __NR_sched_setparam 241 +#define __NR_sched_getparam 242 +#define __NR_sched_setscheduler 243 +#define __NR_sched_getscheduler 244 +#define __NR_sched_yield 245 +#define __NR_sched_get_priority_max 246 +#define __NR_sched_get_priority_min 247 +#define __NR_sched_rr_get_interval 248 +#define __NR_nanosleep 249 +#define __NR_mremap 250 +#define __NR__sysctl 251 +#define __NR_getsid 252 +#define __NR_fdatasync 253 +#define __NR_nfsservctl 254 +#define __NR_sync_file_range 255 +#define __NR_clock_settime 256 +#define __NR_clock_gettime 257 +#define __NR_clock_getres 258 +#define __NR_clock_nanosleep 259 +#define __NR_sched_getaffinity 260 +#define __NR_sched_setaffinity 261 +#define __NR_timer_settime 262 +#define __NR_timer_gettime 263 +#define __NR_timer_getoverrun 264 +#define __NR_timer_delete 265 +#define __NR_timer_create 266 +/* #define __NR_vserver 267 Reserved for VSERVER */ +#define __NR_io_setup 268 +#define __NR_io_destroy 269 +#define __NR_io_submit 270 +#define __NR_io_cancel 271 +#define __NR_io_getevents 272 +#define __NR_mq_open 273 +#define __NR_mq_unlink 274 +#define __NR_mq_timedsend 275 +#define __NR_mq_timedreceive 276 +#define __NR_mq_notify 277 +#define __NR_mq_getsetattr 278 +#define __NR_waitid 279 +#define __NR_tee 280 +#define __NR_add_key 281 +#define __NR_request_key 282 +#define __NR_keyctl 283 +#define __NR_openat 284 +#define __NR_mkdirat 285 +#define __NR_mknodat 286 +#define __NR_fchownat 287 +#define __NR_futimesat 288 +#define __NR_fstatat64 289 +#define __NR_unlinkat 290 +#define __NR_renameat 291 +#define __NR_linkat 292 +#define __NR_symlinkat 293 +#define __NR_readlinkat 294 +#define __NR_fchmodat 295 +#define __NR_faccessat 296 +#define __NR_pselect6 297 +#define __NR_ppoll 298 +#define __NR_unshare 299 +#define __NR_set_robust_list 300 +#define __NR_get_robust_list 301 +#define __NR_migrate_pages 302 +#define __NR_mbind 303 +#define __NR_get_mempolicy 304 +#define __NR_set_mempolicy 305 +#define __NR_kexec_load 306 +#define __NR_move_pages 307 +#define __NR_getcpu 308 +#define __NR_epoll_pwait 309 +#define __NR_utimensat 310 +#define __NR_signalfd 311 +#define __NR_timerfd_create 312 +#define __NR_eventfd 313 +#define __NR_fallocate 314 +#define __NR_timerfd_settime 315 +#define __NR_timerfd_gettime 316 + +#define NR_SYSCALLS 317 + +#ifdef __KERNEL__ +#define __ARCH_WANT_IPC_PARSE_VERSION +#define __ARCH_WANT_OLD_READDIR +#define __ARCH_WANT_STAT64 +#define __ARCH_WANT_SYS_ALARM +#define __ARCH_WANT_SYS_GETHOSTNAME +#define __ARCH_WANT_SYS_PAUSE +#define __ARCH_WANT_SYS_SGETMASK +#define __ARCH_WANT_SYS_SIGNAL +#define __ARCH_WANT_SYS_TIME +#define __ARCH_WANT_COMPAT_SYS_TIME +#define __ARCH_WANT_SYS_UTIME +#define __ARCH_WANT_SYS_WAITPID +#define __ARCH_WANT_SYS_SOCKETCALL +#define __ARCH_WANT_SYS_FADVISE64 +#define __ARCH_WANT_SYS_GETPGRP +#define __ARCH_WANT_SYS_LLSEEK +#define __ARCH_WANT_SYS_NICE +#define __ARCH_WANT_SYS_OLDUMOUNT +#define __ARCH_WANT_SYS_SIGPENDING +#define __ARCH_WANT_SYS_SIGPROCMASK +#define __ARCH_WANT_SYS_RT_SIGSUSPEND +#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND + +/* + * "Conditional" syscalls + * + * What we want is __attribute__((weak,alias("sys_ni_syscall"))), + * but it doesn't work on all toolchains, so we just do it by hand + */ +#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") + +#endif /* __KERNEL__ */ +#endif /* _SPARC64_UNISTD_H */ diff --git a/include/asm-sparc/xor.h b/include/asm-sparc/xor.h index f34b2cfa820..35089a838c3 100644 --- a/include/asm-sparc/xor.h +++ b/include/asm-sparc/xor.h @@ -1,269 +1,8 @@ -/* - * include/asm-sparc/xor.h - * - * Optimized RAID-5 checksumming functions for 32-bit Sparc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * You should have received a copy of the GNU General Public License - * (for example /usr/src/linux/COPYING); if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -/* - * High speed xor_block operation for RAID4/5 utilizing the - * ldd/std SPARC instructions. - * - * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) - */ - -static void -sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - } while (--lines > 0); -} - -static void -sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - } while (--lines > 0); -} - -static void -sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%3 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%3 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%3 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%3 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3), "r" (p4) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - p4 += 8; - } while (--lines > 0); -} - -static void -sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, - unsigned long *p3, unsigned long *p4, unsigned long *p5) -{ - int lines = bytes / (sizeof (long)) / 8; - - do { - __asm__ __volatile__( - "ldd [%0 + 0x00], %%g2\n\t" - "ldd [%0 + 0x08], %%g4\n\t" - "ldd [%0 + 0x10], %%o0\n\t" - "ldd [%0 + 0x18], %%o2\n\t" - "ldd [%1 + 0x00], %%o4\n\t" - "ldd [%1 + 0x08], %%l0\n\t" - "ldd [%1 + 0x10], %%l2\n\t" - "ldd [%1 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%2 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%2 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%2 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%2 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%3 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%3 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%3 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%3 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "ldd [%4 + 0x00], %%o4\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "ldd [%4 + 0x08], %%l0\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "ldd [%4 + 0x10], %%l2\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "ldd [%4 + 0x18], %%l4\n\t" - "xor %%g2, %%o4, %%g2\n\t" - "xor %%g3, %%o5, %%g3\n\t" - "xor %%g4, %%l0, %%g4\n\t" - "xor %%g5, %%l1, %%g5\n\t" - "xor %%o0, %%l2, %%o0\n\t" - "xor %%o1, %%l3, %%o1\n\t" - "xor %%o2, %%l4, %%o2\n\t" - "xor %%o3, %%l5, %%o3\n\t" - "std %%g2, [%0 + 0x00]\n\t" - "std %%g4, [%0 + 0x08]\n\t" - "std %%o0, [%0 + 0x10]\n\t" - "std %%o2, [%0 + 0x18]\n" - : - : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) - : "g2", "g3", "g4", "g5", - "o0", "o1", "o2", "o3", "o4", "o5", - "l0", "l1", "l2", "l3", "l4", "l5"); - p1 += 8; - p2 += 8; - p3 += 8; - p4 += 8; - p5 += 8; - } while (--lines > 0); -} - -static struct xor_block_template xor_block_SPARC = { - .name = "SPARC", - .do_2 = sparc_2, - .do_3 = sparc_3, - .do_4 = sparc_4, - .do_5 = sparc_5, -}; - -/* For grins, also test the generic routines. */ -#include <asm-generic/xor.h> - -#undef XOR_TRY_TEMPLATES -#define XOR_TRY_TEMPLATES \ - do { \ - xor_speed(&xor_block_8regs); \ - xor_speed(&xor_block_32regs); \ - xor_speed(&xor_block_SPARC); \ - } while (0) +#ifndef ___ASM_SPARC_XOR_H +#define ___ASM_SPARC_XOR_H +#if defined(__sparc__) && defined(__arch64__) +#include <asm-sparc/xor_64.h> +#else +#include <asm-sparc/xor_32.h> +#endif +#endif diff --git a/include/asm-sparc/xor_32.h b/include/asm-sparc/xor_32.h new file mode 100644 index 00000000000..f34b2cfa820 --- /dev/null +++ b/include/asm-sparc/xor_32.h @@ -0,0 +1,269 @@ +/* + * include/asm-sparc/xor.h + * + * Optimized RAID-5 checksumming functions for 32-bit Sparc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * You should have received a copy of the GNU General Public License + * (for example /usr/src/linux/COPYING); if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +/* + * High speed xor_block operation for RAID4/5 utilizing the + * ldd/std SPARC instructions. + * + * Copyright (C) 1999 Jakub Jelinek (jj@ultra.linux.cz) + */ + +static void +sparc_2(unsigned long bytes, unsigned long *p1, unsigned long *p2) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + } while (--lines > 0); +} + +static void +sparc_3(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + } while (--lines > 0); +} + +static void +sparc_4(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%3 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%3 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%3 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%3 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3), "r" (p4) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + p4 += 8; + } while (--lines > 0); +} + +static void +sparc_5(unsigned long bytes, unsigned long *p1, unsigned long *p2, + unsigned long *p3, unsigned long *p4, unsigned long *p5) +{ + int lines = bytes / (sizeof (long)) / 8; + + do { + __asm__ __volatile__( + "ldd [%0 + 0x00], %%g2\n\t" + "ldd [%0 + 0x08], %%g4\n\t" + "ldd [%0 + 0x10], %%o0\n\t" + "ldd [%0 + 0x18], %%o2\n\t" + "ldd [%1 + 0x00], %%o4\n\t" + "ldd [%1 + 0x08], %%l0\n\t" + "ldd [%1 + 0x10], %%l2\n\t" + "ldd [%1 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%2 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%2 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%2 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%2 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%3 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%3 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%3 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%3 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "ldd [%4 + 0x00], %%o4\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "ldd [%4 + 0x08], %%l0\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "ldd [%4 + 0x10], %%l2\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "ldd [%4 + 0x18], %%l4\n\t" + "xor %%g2, %%o4, %%g2\n\t" + "xor %%g3, %%o5, %%g3\n\t" + "xor %%g4, %%l0, %%g4\n\t" + "xor %%g5, %%l1, %%g5\n\t" + "xor %%o0, %%l2, %%o0\n\t" + "xor %%o1, %%l3, %%o1\n\t" + "xor %%o2, %%l4, %%o2\n\t" + "xor %%o3, %%l5, %%o3\n\t" + "std %%g2, [%0 + 0x00]\n\t" + "std %%g4, [%0 + 0x08]\n\t" + "std %%o0, [%0 + 0x10]\n\t" + "std %%o2, [%0 + 0x18]\n" + : + : "r" (p1), "r" (p2), "r" (p3), "r" (p4), "r" (p5) + : "g2", "g3", "g4", "g5", + "o0", "o1", "o2", "o3", "o4", "o5", + "l0", "l1", "l2", "l3", "l4", "l5"); + p1 += 8; + p2 += 8; + p3 += 8; + p4 += 8; + p5 += 8; + } while (--lines > 0); +} + +static struct xor_block_template xor_block_SPARC = { + .name = "SPARC", + .do_2 = sparc_2, + .do_3 = sparc_3, + .do_4 = sparc_4, + .do_5 = sparc_5, +}; + +/* For grins, also test the generic routines. */ +#include <asm-generic/xor.h> + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_8regs); \ + xor_speed(&xor_block_32regs); \ + xor_speed(&xor_block_SPARC); \ + } while (0) diff --git a/include/asm-sparc/xor_64.h b/include/asm-sparc/xor_64.h new file mode 100644 index 00000000000..a0233884fc9 --- /dev/null +++ b/include/asm-sparc/xor_64.h @@ -0,0 +1,70 @@ +/* + * include/asm-sparc64/xor.h + * + * High speed xor_block operation for RAID4/5 utilizing the + * UltraSparc Visual Instruction Set and Niagara block-init + * twin-load instructions. + * + * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) + * Copyright (C) 2006 David S. Miller <davem@davemloft.net> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * You should have received a copy of the GNU General Public License + * (for example /usr/src/linux/COPYING); if not, write to the Free + * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <asm/spitfire.h> + +extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); +extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, + unsigned long *); +extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *); +extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *, unsigned long *); + +/* XXX Ugh, write cheetah versions... -DaveM */ + +static struct xor_block_template xor_block_VIS = { + .name = "VIS", + .do_2 = xor_vis_2, + .do_3 = xor_vis_3, + .do_4 = xor_vis_4, + .do_5 = xor_vis_5, +}; + +extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); +extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, + unsigned long *); +extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *); +extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, + unsigned long *, unsigned long *, unsigned long *); + +static struct xor_block_template xor_block_niagara = { + .name = "Niagara", + .do_2 = xor_niagara_2, + .do_3 = xor_niagara_3, + .do_4 = xor_niagara_4, + .do_5 = xor_niagara_5, +}; + +#undef XOR_TRY_TEMPLATES +#define XOR_TRY_TEMPLATES \ + do { \ + xor_speed(&xor_block_VIS); \ + xor_speed(&xor_block_niagara); \ + } while (0) + +/* For VIS for everything except Niagara. */ +#define XOR_SELECT_TEMPLATE(FASTEST) \ + ((tlb_type == hypervisor && \ + (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ + sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ + &xor_block_niagara : \ + &xor_block_VIS) diff --git a/include/asm-sparc64/Kbuild b/include/asm-sparc64/Kbuild index 7e88c1292d1..6cdaf9d33b3 100644 --- a/include/asm-sparc64/Kbuild +++ b/include/asm-sparc64/Kbuild @@ -1,21 +1 @@ -include include/asm-generic/Kbuild.asm - -ALTARCH := sparc -ARCHDEF := defined __sparc__ && defined __arch64__ -ALTARCHDEF := defined __sparc__ && !defined __arch64__ - -header-y += asi.h -header-y += bpp.h -header-y += display7seg.h -header-y += envctrl.h -header-y += openprom.h -header-y += openpromio.h -header-y += psrcompat.h -header-y += pstate.h -header-y += reg.h -header-y += uctx.h -header-y += utrap.h -header-y += watchdog.h - -unifdef-y += fbio.h -unifdef-y += perfctr.h +# dummy file to avoid breaking make headers_install diff --git a/include/asm-sparc64/atomic.h b/include/asm-sparc64/atomic.h index 2c71ec4a3b1..f5126826ba3 100644 --- a/include/asm-sparc64/atomic.h +++ b/include/asm-sparc64/atomic.h @@ -1,128 +1 @@ -/* atomic.h: Thankfully the V9 is at least reasonable for this - * stuff. - * - * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) - */ - -#ifndef __ARCH_SPARC64_ATOMIC__ -#define __ARCH_SPARC64_ATOMIC__ - -#include <linux/types.h> -#include <asm/system.h> - -typedef struct { volatile int counter; } atomic_t; -typedef struct { volatile __s64 counter; } atomic64_t; - -#define ATOMIC_INIT(i) { (i) } -#define ATOMIC64_INIT(i) { (i) } - -#define atomic_read(v) ((v)->counter) -#define atomic64_read(v) ((v)->counter) - -#define atomic_set(v, i) (((v)->counter) = i) -#define atomic64_set(v, i) (((v)->counter) = i) - -extern void atomic_add(int, atomic_t *); -extern void atomic64_add(int, atomic64_t *); -extern void atomic_sub(int, atomic_t *); -extern void atomic64_sub(int, atomic64_t *); - -extern int atomic_add_ret(int, atomic_t *); -extern int atomic64_add_ret(int, atomic64_t *); -extern int atomic_sub_ret(int, atomic_t *); -extern int atomic64_sub_ret(int, atomic64_t *); - -#define atomic_dec_return(v) atomic_sub_ret(1, v) -#define atomic64_dec_return(v) atomic64_sub_ret(1, v) - -#define atomic_inc_return(v) atomic_add_ret(1, v) -#define atomic64_inc_return(v) atomic64_add_ret(1, v) - -#define atomic_sub_return(i, v) atomic_sub_ret(i, v) -#define atomic64_sub_return(i, v) atomic64_sub_ret(i, v) - -#define atomic_add_return(i, v) atomic_add_ret(i, v) -#define atomic64_add_return(i, v) atomic64_add_ret(i, v) - -/* - * atomic_inc_and_test - increment and test - * @v: pointer of type atomic_t - * - * Atomically increments @v by 1 - * and returns true if the result is zero, or false for all - * other cases. - */ -#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) -#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) - -#define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) -#define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) - -#define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0) -#define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0) - -#define atomic_inc(v) atomic_add(1, v) -#define atomic64_inc(v) atomic64_add(1, v) - -#define atomic_dec(v) atomic_sub(1, v) -#define atomic64_dec(v) atomic64_sub(1, v) - -#define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) -#define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) - -#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) -#define atomic_xchg(v, new) (xchg(&((v)->counter), new)) - -static inline int atomic_add_unless(atomic_t *v, int a, int u) -{ - int c, old; - c = atomic_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) - -#define atomic64_cmpxchg(v, o, n) \ - ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) -#define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) - -static inline int atomic64_add_unless(atomic64_t *v, long a, long u) -{ - long c, old; - c = atomic64_read(v); - for (;;) { - if (unlikely(c == (u))) - break; - old = atomic64_cmpxchg((v), c, c + (a)); - if (likely(old == c)) - break; - c = old; - } - return c != (u); -} - -#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) - -/* Atomic operations are already serializing */ -#ifdef CONFIG_SMP -#define smp_mb__before_atomic_dec() membar_storeload_loadload(); -#define smp_mb__after_atomic_dec() membar_storeload_storestore(); -#define smp_mb__before_atomic_inc() membar_storeload_loadload(); -#define smp_mb__after_atomic_inc() membar_storeload_storestore(); -#else -#define smp_mb__before_atomic_dec() barrier() -#define smp_mb__after_atomic_dec() barrier() -#define smp_mb__before_atomic_inc() barrier() -#define smp_mb__after_atomic_inc() barrier() -#endif - -#include <asm-generic/atomic.h> -#endif /* !(__ARCH_SPARC64_ATOMIC__) */ +#include <asm-sparc/atomic.h> diff --git a/include/asm-sparc64/auxio.h b/include/asm-sparc64/auxio.h index c4100494c7a..46c9042f30b 100644 --- a/include/asm-sparc64/auxio.h +++ b/include/asm-sparc64/auxio.h @@ -1,100 +1 @@ -/* - * auxio.h: Definitions and code for the Auxiliary I/O registers. - * - * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu) - * - * Refactoring for unified NCR/PCIO support 2002 Eric Brower (ebrower@usa.net) - */ -#ifndef _SPARC64_AUXIO_H -#define _SPARC64_AUXIO_H - -/* AUXIO implementations: - * sbus-based NCR89C105 "Slavio" - * LED/Floppy (AUX1) register - * Power (AUX2) register - * - * ebus-based auxio on PCIO - * LED Auxio Register - * Power Auxio Register - * - * Register definitions from NCR _NCR89C105 Chip Specification_ - * - * SLAVIO AUX1 @ 0x1900000 - * ------------------------------------------------- - * | (R) | (R) | D | (R) | E | M | T | L | - * ------------------------------------------------- - * (R) - bit 7:6,4 are reserved and should be masked in s/w - * D - Floppy Density Sense (1=high density) R/O - * E - Link Test Enable, directly reflected on AT&T 7213 LTE pin - * M - Monitor/Mouse Mux, directly reflected on MON_MSE_MUX pin - * T - Terminal Count: sends TC pulse to 82077 floppy controller - * L - System LED on front panel (0=off, 1=on) - */ -#define AUXIO_AUX1_MASK 0xc0 /* Mask bits */ -#define AUXIO_AUX1_FDENS 0x20 /* Floppy Density Sense */ -#define AUXIO_AUX1_LTE 0x08 /* Link Test Enable */ -#define AUXIO_AUX1_MMUX 0x04 /* Monitor/Mouse Mux */ -#define AUXIO_AUX1_FTCNT 0x02 /* Terminal Count, */ -#define AUXIO_AUX1_LED 0x01 /* System LED */ - -/* SLAVIO AUX2 @ 0x1910000 - * ------------------------------------------------- - * | (R) | (R) | D | (R) | (R) | (R) | C | F | - * ------------------------------------------------- - * (R) - bits 7:6,4:2 are reserved and should be masked in s/w - * D - Power Failure Detect (1=power fail) - * C - Clear Power Failure Detect Int (1=clear) - * F - Power Off (1=power off) - */ -#define AUXIO_AUX2_MASK 0xdc /* Mask Bits */ -#define AUXIO_AUX2_PFAILDET 0x20 /* Power Fail Detect */ -#define AUXIO_AUX2_PFAILCLR 0x02 /* Clear Pwr Fail Det Intr */ -#define AUXIO_AUX2_PWR_OFF 0x01 /* Power Off */ - -/* Register definitions from Sun Microsystems _PCIO_ p/n 802-7837 - * - * PCIO LED Auxio @ 0x726000 - * ------------------------------------------------- - * | 31:1 Unused | LED | - * ------------------------------------------------- - * Bits 31:1 unused - * LED - System LED on front panel (0=off, 1=on) - */ -#define AUXIO_PCIO_LED 0x01 /* System LED */ - -/* PCIO Power Auxio @ 0x724000 - * ------------------------------------------------- - * | 31:2 Unused | CPO | SPO | - * ------------------------------------------------- - * Bits 31:2 unused - * CPO - Courtesy Power Off (1=off) - * SPO - System Power Off (1=off) - */ -#define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ -#define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ - -#ifndef __ASSEMBLY__ - -extern void __iomem *auxio_register; - -#define AUXIO_LTE_ON 1 -#define AUXIO_LTE_OFF 0 - -/* auxio_set_lte - Set Link Test Enable (TPE Link Detect) - * - * on - AUXIO_LTE_ON or AUXIO_LTE_OFF - */ -extern void auxio_set_lte(int on); - -#define AUXIO_LED_ON 1 -#define AUXIO_LED_OFF 0 - -/* auxio_set_led - Set system front panel LED - * - * on - AUXIO_LED_ON or AUXIO_LED_OFF - */ -extern void auxio_set_led(int on); - -#endif /* ifndef __ASSEMBLY__ */ - -#endif /* !(_SPARC64_AUXIO_H) */ +#include <asm-sparc/auxio.h> diff --git a/include/asm-sparc64/bitops.h b/include/asm-sparc64/bitops.h index bb87b808022..204404355bd 100644 --- a/include/asm-sparc64/bitops.h +++ b/include/asm-sparc64/bitops.h @@ -1,107 +1 @@ -/* - * bitops.h: Bit string operations on the V9. - * - * Copyright 1996, 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _SPARC64_BITOPS_H -#define _SPARC64_BITOPS_H - -#ifndef _LINUX_BITOPS_H -#error only <linux/bitops.h> can be included directly -#endif - -#include <linux/compiler.h> -#include <asm/byteorder.h> - -extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr); -extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr); -extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr); -extern void set_bit(unsigned long nr, volatile unsigned long *addr); -extern void clear_bit(unsigned long nr, volatile unsigned long *addr); -extern void change_bit(unsigned long nr, volatile unsigned long *addr); - -#include <asm-generic/bitops/non-atomic.h> - -#ifdef CONFIG_SMP -#define smp_mb__before_clear_bit() membar_storeload_loadload() -#define smp_mb__after_clear_bit() membar_storeload_storestore() -#else -#define smp_mb__before_clear_bit() barrier() -#define smp_mb__after_clear_bit() barrier() -#endif - -#include <asm-generic/bitops/ffz.h> -#include <asm-generic/bitops/__ffs.h> -#include <asm-generic/bitops/fls.h> -#include <asm-generic/bitops/__fls.h> -#include <asm-generic/bitops/fls64.h> - -#ifdef __KERNEL__ - -#include <asm-generic/bitops/sched.h> -#include <asm-generic/bitops/ffs.h> - -/* - * hweightN: returns the hamming weight (i.e. the number - * of bits set) of a N-bit word - */ - -#ifdef ULTRA_HAS_POPULATION_COUNT - -static inline unsigned int hweight64(unsigned long w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w)); - return res; -} - -static inline unsigned int hweight32(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffffffff)); - return res; -} - -static inline unsigned int hweight16(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xffff)); - return res; -} - -static inline unsigned int hweight8(unsigned int w) -{ - unsigned int res; - - __asm__ ("popc %1,%0" : "=r" (res) : "r" (w & 0xff)); - return res; -} - -#else - -#include <asm-generic/bitops/hweight.h> - -#endif -#include <asm-generic/bitops/lock.h> -#endif /* __KERNEL__ */ - -#include <asm-generic/bitops/find.h> - -#ifdef __KERNEL__ - -#include <asm-generic/bitops/ext2-non-atomic.h> - -#define ext2_set_bit_atomic(lock,nr,addr) \ - test_and_set_bit((nr) ^ 0x38,(unsigned long *)(addr)) -#define ext2_clear_bit_atomic(lock,nr,addr) \ - test_and_clear_bit((nr) ^ 0x38,(unsigned long *)(addr)) - -#include <asm-generic/bitops/minix.h> - -#endif /* __KERNEL__ */ - -#endif /* defined(_SPARC64_BITOPS_H) */ +#include <asm-sparc/bitops.h> diff --git a/include/asm-sparc64/cacheflush.h b/include/asm-sparc64/cacheflush.h index 122e4058dd9..cf5b6b3e8a5 100644 --- a/include/asm-sparc64/cacheflush.h +++ b/include/asm-sparc64/cacheflush.h @@ -1,76 +1 @@ -#ifndef _SPARC64_CACHEFLUSH_H -#define _SPARC64_CACHEFLUSH_H - -#include <asm/page.h> - -#ifndef __ASSEMBLY__ - -#include <linux/mm.h> - -/* Cache flush operations. */ - -/* These are the same regardless of whether this is an SMP kernel or not. */ -#define flush_cache_mm(__mm) \ - do { if ((__mm) == current->mm) flushw_user(); } while(0) -#define flush_cache_dup_mm(mm) flush_cache_mm(mm) -#define flush_cache_range(vma, start, end) \ - flush_cache_mm((vma)->vm_mm) -#define flush_cache_page(vma, page, pfn) \ - flush_cache_mm((vma)->vm_mm) - -/* - * On spitfire, the icache doesn't snoop local stores and we don't - * use block commit stores (which invalidate icache lines) during - * module load, so we need this. - */ -extern void flush_icache_range(unsigned long start, unsigned long end); -extern void __flush_icache_page(unsigned long); - -extern void __flush_dcache_page(void *addr, int flush_icache); -extern void flush_dcache_page_impl(struct page *page); -#ifdef CONFIG_SMP -extern void smp_flush_dcache_page_impl(struct page *page, int cpu); -extern void flush_dcache_page_all(struct mm_struct *mm, struct page *page); -#else -#define smp_flush_dcache_page_impl(page,cpu) flush_dcache_page_impl(page) -#define flush_dcache_page_all(mm,page) flush_dcache_page_impl(page) -#endif - -extern void __flush_dcache_range(unsigned long start, unsigned long end); -extern void flush_dcache_page(struct page *page); - -#define flush_icache_page(vma, pg) do { } while(0) -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) - -extern void flush_ptrace_access(struct vm_area_struct *, struct page *, - unsigned long uaddr, void *kaddr, - unsigned long len, int write); - -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ - flush_ptrace_access(vma, page, vaddr, src, len, 0); \ - } while (0) - -#define copy_from_user_page(vma, page, vaddr, dst, src, len) \ - do { \ - flush_cache_page(vma, vaddr, page_to_pfn(page)); \ - memcpy(dst, src, len); \ - flush_ptrace_access(vma, page, vaddr, dst, len, 1); \ - } while (0) - -#define flush_dcache_mmap_lock(mapping) do { } while (0) -#define flush_dcache_mmap_unlock(mapping) do { } while (0) - -#define flush_cache_vmap(start, end) do { } while (0) -#define flush_cache_vunmap(start, end) do { } while (0) - -#ifdef CONFIG_DEBUG_PAGEALLOC -/* internal debugging function */ -void kernel_map_pages(struct page *page, int numpages, int enable); -#endif - -#endif /* !__ASSEMBLY__ */ - -#endif /* _SPARC64_CACHEFLUSH_H */ +#include <asm-sparc/cacheflush.h> diff --git a/include/asm-sparc64/checksum.h b/include/asm-sparc64/checksum.h index b290564c8ce..c3966c5e29d 100644 --- a/include/asm-sparc64/checksum.h +++ b/include/asm-sparc64/checksum.h @@ -1,167 +1 @@ -#ifndef __SPARC64_CHECKSUM_H -#define __SPARC64_CHECKSUM_H - -/* checksum.h: IP/UDP/TCP checksum routines on the V9. - * - * Copyright(C) 1995 Linus Torvalds - * Copyright(C) 1995 Miguel de Icaza - * Copyright(C) 1996 David S. Miller - * Copyright(C) 1996 Eddie C. Dost - * Copyright(C) 1997 Jakub Jelinek - * - * derived from: - * Alpha checksum c-code - * ix86 inline assembly - * RFC1071 Computing the Internet Checksum - */ - -#include <linux/in6.h> -#include <asm/uaccess.h> - -/* computes the checksum of a memory block at buff, length len, - * and adds in "sum" (32-bit) - * - * returns a 32-bit number suitable for feeding into itself - * or csum_tcpudp_magic - * - * this function must be called with even lengths, except - * for the last fragment, which may be odd - * - * it's best to have buff aligned on a 32-bit boundary - */ -extern __wsum csum_partial(const void * buff, int len, __wsum sum); - -/* the same as csum_partial, but copies from user space while it - * checksums - * - * here even more important to align src and dst on a 32-bit (or even - * better 64-bit) boundary - */ -extern __wsum csum_partial_copy_nocheck(const void *src, void *dst, - int len, __wsum sum); - -extern long __csum_partial_copy_from_user(const void __user *src, - void *dst, int len, - __wsum sum); - -static inline __wsum -csum_partial_copy_from_user(const void __user *src, - void *dst, int len, - __wsum sum, int *err) -{ - long ret = __csum_partial_copy_from_user(src, dst, len, sum); - if (ret < 0) - *err = -EFAULT; - return (__force __wsum) ret; -} - -/* - * Copy and checksum to user - */ -#define HAVE_CSUM_COPY_USER -extern long __csum_partial_copy_to_user(const void *src, - void __user *dst, int len, - __wsum sum); - -static inline __wsum -csum_and_copy_to_user(const void *src, - void __user *dst, int len, - __wsum sum, int *err) -{ - long ret = __csum_partial_copy_to_user(src, dst, len, sum); - if (ret < 0) - *err = -EFAULT; - return (__force __wsum) ret; -} - -/* ihl is always 5 or greater, almost always is 5, and iph is word aligned - * the majority of the time. - */ -extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); - -/* Fold a partial checksum without adding pseudo headers. */ -static inline __sum16 csum_fold(__wsum sum) -{ - unsigned int tmp; - - __asm__ __volatile__( -" addcc %0, %1, %1\n" -" srl %1, 16, %1\n" -" addc %1, %%g0, %1\n" -" xnor %%g0, %1, %0\n" - : "=&r" (sum), "=r" (tmp) - : "0" (sum), "1" ((__force u32)sum<<16) - : "cc"); - return (__force __sum16)sum; -} - -static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, - unsigned int len, - unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__( -" addcc %1, %0, %0\n" -" addccc %2, %0, %0\n" -" addccc %3, %0, %0\n" -" addc %0, %%g0, %0\n" - : "=r" (sum), "=r" (saddr) - : "r" (daddr), "r" (proto + len), "0" (sum), "1" (saddr) - : "cc"); - return sum; -} - -/* - * computes the checksum of the TCP/UDP pseudo-header - * returns a 16-bit checksum, already complemented - */ -static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr, - unsigned short len, - unsigned short proto, - __wsum sum) -{ - return csum_fold(csum_tcpudp_nofold(saddr,daddr,len,proto,sum)); -} - -#define _HAVE_ARCH_IPV6_CSUM - -static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr, - const struct in6_addr *daddr, - __u32 len, unsigned short proto, - __wsum sum) -{ - __asm__ __volatile__ ( -" addcc %3, %4, %%g7\n" -" addccc %5, %%g7, %%g7\n" -" lduw [%2 + 0x0c], %%g2\n" -" lduw [%2 + 0x08], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%2 + 0x04], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%2 + 0x00], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%1 + 0x0c], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%1 + 0x08], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" lduw [%1 + 0x04], %%g2\n" -" addccc %%g3, %%g7, %%g7\n" -" lduw [%1 + 0x00], %%g3\n" -" addccc %%g2, %%g7, %%g7\n" -" addccc %%g3, %%g7, %0\n" -" addc 0, %0, %0\n" - : "=&r" (sum) - : "r" (saddr), "r" (daddr), "r"(htonl(len)), - "r"(htonl(proto)), "r"(sum) - : "g2", "g3", "g7", "cc"); - - return csum_fold(sum); -} - -/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */ -static inline __sum16 ip_compute_csum(const void *buff, int len) -{ - return csum_fold(csum_partial(buff, len, 0)); -} - -#endif /* !(__SPARC64_CHECKSUM_H) */ +#include <asm-sparc/checksum.h> diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h index 532975ecfe1..3220e134a57 100644 --- a/include/asm-sparc64/cpudata.h +++ b/include/asm-sparc64/cpudata.h @@ -1,240 +1 @@ -/* cpudata.h: Per-cpu parameters. - * - * Copyright (C) 2003, 2005, 2006 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_CPUDATA_H -#define _SPARC64_CPUDATA_H - -#include <asm/hypervisor.h> -#include <asm/asi.h> - -#ifndef __ASSEMBLY__ - -#include <linux/percpu.h> -#include <linux/threads.h> - -typedef struct { - /* Dcache line 1 */ - unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ - unsigned int __pad0; - unsigned long clock_tick; /* %tick's per second */ - unsigned long __pad; - unsigned int __pad1; - unsigned int __pad2; - - /* Dcache line 2, rarely used */ - unsigned int dcache_size; - unsigned int dcache_line_size; - unsigned int icache_size; - unsigned int icache_line_size; - unsigned int ecache_size; - unsigned int ecache_line_size; - int core_id; - int proc_id; -} cpuinfo_sparc; - -DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); -#define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) -#define local_cpu_data() __get_cpu_var(__cpu_data) - -/* Trap handling code needs to get at a few critical values upon - * trap entry and to process TSB misses. These cannot be in the - * per_cpu() area as we really need to lock them into the TLB and - * thus make them part of the main kernel image. As a result we - * try to make this as small as possible. - * - * This is padded out and aligned to 64-bytes to avoid false sharing - * on SMP. - */ - -/* If you modify the size of this structure, please update - * TRAP_BLOCK_SZ_SHIFT below. - */ -struct thread_info; -struct trap_per_cpu { -/* D-cache line 1: Basic thread information, cpu and device mondo queues */ - struct thread_info *thread; - unsigned long pgd_paddr; - unsigned long cpu_mondo_pa; - unsigned long dev_mondo_pa; - -/* D-cache line 2: Error Mondo Queue and kernel buffer pointers */ - unsigned long resum_mondo_pa; - unsigned long resum_kernel_buf_pa; - unsigned long nonresum_mondo_pa; - unsigned long nonresum_kernel_buf_pa; - -/* Dcache lines 3, 4, 5, and 6: Hypervisor Fault Status */ - struct hv_fault_status fault_info; - -/* Dcache line 7: Physical addresses of CPU send mondo block and CPU list. */ - unsigned long cpu_mondo_block_pa; - unsigned long cpu_list_pa; - unsigned long tsb_huge; - unsigned long tsb_huge_temp; - -/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ - unsigned long irq_worklist_pa; - unsigned int cpu_mondo_qmask; - unsigned int dev_mondo_qmask; - unsigned int resum_qmask; - unsigned int nonresum_qmask; - void *hdesc; -} __attribute__((aligned(64))); -extern struct trap_per_cpu trap_block[NR_CPUS]; -extern void init_cur_cpu_trap(struct thread_info *); -extern void setup_tba(void); -extern int ncpus_probed; -extern void __init cpu_probe(void); -extern const struct seq_operations cpuinfo_op; - -extern unsigned long real_hard_smp_processor_id(void); - -struct cpuid_patch_entry { - unsigned int addr; - unsigned int cheetah_safari[4]; - unsigned int cheetah_jbus[4]; - unsigned int starfire[4]; - unsigned int sun4v[4]; -}; -extern struct cpuid_patch_entry __cpuid_patch, __cpuid_patch_end; - -struct sun4v_1insn_patch_entry { - unsigned int addr; - unsigned int insn; -}; -extern struct sun4v_1insn_patch_entry __sun4v_1insn_patch, - __sun4v_1insn_patch_end; - -struct sun4v_2insn_patch_entry { - unsigned int addr; - unsigned int insns[2]; -}; -extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch, - __sun4v_2insn_patch_end; - -#endif /* !(__ASSEMBLY__) */ - -#define TRAP_PER_CPU_THREAD 0x00 -#define TRAP_PER_CPU_PGD_PADDR 0x08 -#define TRAP_PER_CPU_CPU_MONDO_PA 0x10 -#define TRAP_PER_CPU_DEV_MONDO_PA 0x18 -#define TRAP_PER_CPU_RESUM_MONDO_PA 0x20 -#define TRAP_PER_CPU_RESUM_KBUF_PA 0x28 -#define TRAP_PER_CPU_NONRESUM_MONDO_PA 0x30 -#define TRAP_PER_CPU_NONRESUM_KBUF_PA 0x38 -#define TRAP_PER_CPU_FAULT_INFO 0x40 -#define TRAP_PER_CPU_CPU_MONDO_BLOCK_PA 0xc0 -#define TRAP_PER_CPU_CPU_LIST_PA 0xc8 -#define TRAP_PER_CPU_TSB_HUGE 0xd0 -#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 -#define TRAP_PER_CPU_IRQ_WORKLIST_PA 0xe0 -#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe8 -#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xec -#define TRAP_PER_CPU_RESUM_QMASK 0xf0 -#define TRAP_PER_CPU_NONRESUM_QMASK 0xf4 - -#define TRAP_BLOCK_SZ_SHIFT 8 - -#include <asm/scratchpad.h> - -#define __GET_CPUID(REG) \ - /* Spitfire implementation (default). */ \ -661: ldxa [%g0] ASI_UPA_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x1f, REG; \ - nop; \ - .section .cpuid_patch, "ax"; \ - /* Instruction location. */ \ - .word 661b; \ - /* Cheetah Safari implementation. */ \ - ldxa [%g0] ASI_SAFARI_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x3ff, REG; \ - nop; \ - /* Cheetah JBUS implementation. */ \ - ldxa [%g0] ASI_JBUS_CONFIG, REG; \ - srlx REG, 17, REG; \ - and REG, 0x1f, REG; \ - nop; \ - /* Starfire implementation. */ \ - sethi %hi(0x1fff40000d0 >> 9), REG; \ - sllx REG, 9, REG; \ - or REG, 0xd0, REG; \ - lduwa [REG] ASI_PHYS_BYPASS_EC_E, REG;\ - /* sun4v implementation. */ \ - mov SCRATCHPAD_CPUID, REG; \ - ldxa [REG] ASI_SCRATCHPAD, REG; \ - nop; \ - nop; \ - .previous; - -#ifdef CONFIG_SMP - -#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - __GET_CPUID(TMP) \ - sethi %hi(trap_block), DEST; \ - sllx TMP, TRAP_BLOCK_SZ_SHIFT, TMP; \ - or DEST, %lo(trap_block), DEST; \ - add DEST, TMP, DEST; \ - -/* Clobbers TMP, current address space PGD phys address into DEST. */ -#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; - -/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ -#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; - -/* Clobbers TMP, loads DEST with current thread info pointer. */ -#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_THREAD], DEST; - -/* Given the current thread info pointer in THR, load the per-cpu - * area base of the current processor into DEST. REG1, REG2, and REG3 are - * clobbered. - * - * You absolutely cannot use DEST as a temporary in this code. The - * reason is that traps can happen during execution, and return from - * trap will load the fully resolved DEST per-cpu base. This can corrupt - * the calculations done by the macro mid-stream. - */ -#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ - lduh [THR + TI_CPU], REG1; \ - sethi %hi(__per_cpu_shift), REG3; \ - sethi %hi(__per_cpu_base), REG2; \ - ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ - ldx [REG2 + %lo(__per_cpu_base)], REG2; \ - sllx REG1, REG3, REG3; \ - add REG3, REG2, DEST; - -#else - -#define TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - sethi %hi(trap_block), DEST; \ - or DEST, %lo(trap_block), DEST; \ - -/* Uniprocessor versions, we know the cpuid is zero. */ -#define TRAP_LOAD_PGD_PHYS(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_PGD_PADDR], DEST; - -/* Clobbers TMP, loads local processor's IRQ work area into DEST. */ -#define TRAP_LOAD_IRQ_WORK_PA(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - add DEST, TRAP_PER_CPU_IRQ_WORKLIST_PA, DEST; - -#define TRAP_LOAD_THREAD_REG(DEST, TMP) \ - TRAP_LOAD_TRAP_BLOCK(DEST, TMP) \ - ldx [DEST + TRAP_PER_CPU_THREAD], DEST; - -/* No per-cpu areas on uniprocessor, so no need to load DEST. */ -#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) - -#endif /* !(CONFIG_SMP) */ - -#endif /* _SPARC64_CPUDATA_H */ +#include <asm-sparc/cpudata.h> diff --git a/include/asm-sparc64/delay.h b/include/asm-sparc64/delay.h index a77aa622d76..33dc5589d84 100644 --- a/include/asm-sparc64/delay.h +++ b/include/asm-sparc64/delay.h @@ -1,17 +1 @@ -/* delay.h: Linux delay routines on sparc64. - * - * Copyright (C) 1996, 2004, 2007 David S. Miller (davem@davemloft.net). - */ - -#ifndef _SPARC64_DELAY_H -#define _SPARC64_DELAY_H - -#ifndef __ASSEMBLY__ - -extern void __delay(unsigned long loops); -extern void udelay(unsigned long usecs); -#define mdelay(n) udelay((n) * 1000) - -#endif /* !__ASSEMBLY__ */ - -#endif /* _SPARC64_DELAY_H */ +#include <asm-sparc/delay.h> diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h index 38cbec76a33..380b7b63147 100644 --- a/include/asm-sparc64/dma-mapping.h +++ b/include/asm-sparc64/dma-mapping.h @@ -1,154 +1 @@ -#ifndef _ASM_SPARC64_DMA_MAPPING_H -#define _ASM_SPARC64_DMA_MAPPING_H - -#include <linux/scatterlist.h> -#include <linux/mm.h> - -#define DMA_ERROR_CODE (~(dma_addr_t)0x0) - -struct dma_ops { - void *(*alloc_coherent)(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag); - void (*free_coherent)(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle); - dma_addr_t (*map_single)(struct device *dev, void *cpu_addr, - size_t size, - enum dma_data_direction direction); - void (*unmap_single)(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction); - int (*map_sg)(struct device *dev, struct scatterlist *sg, int nents, - enum dma_data_direction direction); - void (*unmap_sg)(struct device *dev, struct scatterlist *sg, - int nhwentries, - enum dma_data_direction direction); - void (*sync_single_for_cpu)(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction); - void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, - int nelems, - enum dma_data_direction direction); -}; -extern const struct dma_ops *dma_ops; - -extern int dma_supported(struct device *dev, u64 mask); -extern int dma_set_mask(struct device *dev, u64 dma_mask); - -static inline void *dma_alloc_coherent(struct device *dev, size_t size, - dma_addr_t *dma_handle, gfp_t flag) -{ - return dma_ops->alloc_coherent(dev, size, dma_handle, flag); -} - -static inline void dma_free_coherent(struct device *dev, size_t size, - void *cpu_addr, dma_addr_t dma_handle) -{ - dma_ops->free_coherent(dev, size, cpu_addr, dma_handle); -} - -static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr, - size_t size, - enum dma_data_direction direction) -{ - return dma_ops->map_single(dev, cpu_addr, size, direction); -} - -static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr, - size_t size, - enum dma_data_direction direction) -{ - dma_ops->unmap_single(dev, dma_addr, size, direction); -} - -static inline dma_addr_t dma_map_page(struct device *dev, struct page *page, - unsigned long offset, size_t size, - enum dma_data_direction direction) -{ - return dma_ops->map_single(dev, page_address(page) + offset, - size, direction); -} - -static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address, - size_t size, - enum dma_data_direction direction) -{ - dma_ops->unmap_single(dev, dma_address, size, direction); -} - -static inline int dma_map_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - return dma_ops->map_sg(dev, sg, nents, direction); -} - -static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) -{ - dma_ops->unmap_sg(dev, sg, nents, direction); -} - -static inline void dma_sync_single_for_cpu(struct device *dev, - dma_addr_t dma_handle, size_t size, - enum dma_data_direction direction) -{ - dma_ops->sync_single_for_cpu(dev, dma_handle, size, direction); -} - -static inline void dma_sync_single_for_device(struct device *dev, - dma_addr_t dma_handle, - size_t size, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void dma_sync_single_range_for_cpu(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction); -} - -static inline void dma_sync_single_range_for_device(struct device *dev, - dma_addr_t dma_handle, - unsigned long offset, - size_t size, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - - -static inline void dma_sync_sg_for_cpu(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - dma_ops->sync_sg_for_cpu(dev, sg, nelems, direction); -} - -static inline void dma_sync_sg_for_device(struct device *dev, - struct scatterlist *sg, int nelems, - enum dma_data_direction direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline int dma_mapping_error(dma_addr_t dma_addr) -{ - return (dma_addr == DMA_ERROR_CODE); -} - -static inline int dma_get_cache_alignment(void) -{ - /* no easy way to get cache size on all processors, so return - * the maximum possible, to be safe */ - return (1 << INTERNODE_CACHE_SHIFT); -} - -#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) -#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) -#define dma_is_consistent(d, h) (1) - -#endif /* _ASM_SPARC64_DMA_MAPPING_H */ +#include <asm-sparc/dma-mapping.h> diff --git a/include/asm-sparc64/dma.h b/include/asm-sparc64/dma.h index 9d4c024bd3b..2e36248e6b5 100644 --- a/include/asm-sparc64/dma.h +++ b/include/asm-sparc64/dma.h @@ -1,205 +1 @@ -/* - * include/asm-sparc64/dma.h - * - * Copyright 1996 (C) David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef _ASM_SPARC64_DMA_H -#define _ASM_SPARC64_DMA_H - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/spinlock.h> - -#include <asm/sbus.h> -#include <asm/delay.h> -#include <asm/oplib.h> - -/* These are irrelevant for Sparc DMA, but we leave it in so that - * things can compile. - */ -#define MAX_DMA_CHANNELS 8 -#define DMA_MODE_READ 1 -#define DMA_MODE_WRITE 2 -#define MAX_DMA_ADDRESS (~0UL) - -/* Useful constants */ -#define SIZE_16MB (16*1024*1024) -#define SIZE_64K (64*1024) - -/* SBUS DMA controller reg offsets */ -#define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */ -#define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */ -#define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */ -#define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */ - -/* DVMA chip revisions */ -enum dvma_rev { - dvmarev0, - dvmaesc1, - dvmarev1, - dvmarev2, - dvmarev3, - dvmarevplus, - dvmahme -}; - -#define DMA_HASCOUNT(rev) ((rev)==dvmaesc1) - -/* Linux DMA information structure, filled during probe. */ -struct sbus_dma { - struct sbus_dma *next; - struct sbus_dev *sdev; - void __iomem *regs; - - /* Status, misc info */ - int node; /* Prom node for this DMA device */ - int running; /* Are we doing DMA now? */ - int allocated; /* Are we "owned" by anyone yet? */ - - /* Transfer information. */ - u32 addr; /* Start address of current transfer */ - int nbytes; /* Size of current transfer */ - int realbytes; /* For splitting up large transfers, etc. */ - - /* DMA revision */ - enum dvma_rev revision; -}; - -extern struct sbus_dma *dma_chain; - -/* Broken hardware... */ -#define DMA_ISBROKEN(dma) ((dma)->revision == dvmarev1) -#define DMA_ISESC1(dma) ((dma)->revision == dvmaesc1) - -/* Main routines in dma.c */ -extern void dvma_init(struct sbus_bus *); - -/* Fields in the cond_reg register */ -/* First, the version identification bits */ -#define DMA_DEVICE_ID 0xf0000000 /* Device identification bits */ -#define DMA_VERS0 0x00000000 /* Sunray DMA version */ -#define DMA_ESCV1 0x40000000 /* DMA ESC Version 1 */ -#define DMA_VERS1 0x80000000 /* DMA rev 1 */ -#define DMA_VERS2 0xa0000000 /* DMA rev 2 */ -#define DMA_VERHME 0xb0000000 /* DMA hme gate array */ -#define DMA_VERSPLUS 0x90000000 /* DMA rev 1 PLUS */ - -#define DMA_HNDL_INTR 0x00000001 /* An IRQ needs to be handled */ -#define DMA_HNDL_ERROR 0x00000002 /* We need to take an error */ -#define DMA_FIFO_ISDRAIN 0x0000000c /* The DMA FIFO is draining */ -#define DMA_INT_ENAB 0x00000010 /* Turn on interrupts */ -#define DMA_FIFO_INV 0x00000020 /* Invalidate the FIFO */ -#define DMA_ACC_SZ_ERR 0x00000040 /* The access size was bad */ -#define DMA_FIFO_STDRAIN 0x00000040 /* DMA_VERS1 Drain the FIFO */ -#define DMA_RST_SCSI 0x00000080 /* Reset the SCSI controller */ -#define DMA_RST_ENET DMA_RST_SCSI /* Reset the ENET controller */ -#define DMA_ST_WRITE 0x00000100 /* write from device to memory */ -#define DMA_ENABLE 0x00000200 /* Fire up DMA, handle requests */ -#define DMA_PEND_READ 0x00000400 /* DMA_VERS1/0/PLUS Pending Read */ -#define DMA_ESC_BURST 0x00000800 /* 1=16byte 0=32byte */ -#define DMA_READ_AHEAD 0x00001800 /* DMA read ahead partial longword */ -#define DMA_DSBL_RD_DRN 0x00001000 /* No EC drain on slave reads */ -#define DMA_BCNT_ENAB 0x00002000 /* If on, use the byte counter */ -#define DMA_TERM_CNTR 0x00004000 /* Terminal counter */ -#define DMA_SCSI_SBUS64 0x00008000 /* HME: Enable 64-bit SBUS mode. */ -#define DMA_CSR_DISAB 0x00010000 /* No FIFO drains during csr */ -#define DMA_SCSI_DISAB 0x00020000 /* No FIFO drains during reg */ -#define DMA_DSBL_WR_INV 0x00020000 /* No EC inval. on slave writes */ -#define DMA_ADD_ENABLE 0x00040000 /* Special ESC DVMA optimization */ -#define DMA_E_BURSTS 0x000c0000 /* ENET: SBUS r/w burst mask */ -#define DMA_E_BURST32 0x00040000 /* ENET: SBUS 32 byte r/w burst */ -#define DMA_E_BURST16 0x00000000 /* ENET: SBUS 16 byte r/w burst */ -#define DMA_BRST_SZ 0x000c0000 /* SCSI: SBUS r/w burst size */ -#define DMA_BRST64 0x000c0000 /* SCSI: 64byte bursts (HME on UltraSparc only) */ -#define DMA_BRST32 0x00040000 /* SCSI: 32byte bursts */ -#define DMA_BRST16 0x00000000 /* SCSI: 16byte bursts */ -#define DMA_BRST0 0x00080000 /* SCSI: no bursts (non-HME gate arrays) */ -#define DMA_ADDR_DISAB 0x00100000 /* No FIFO drains during addr */ -#define DMA_2CLKS 0x00200000 /* Each transfer = 2 clock ticks */ -#define DMA_3CLKS 0x00400000 /* Each transfer = 3 clock ticks */ -#define DMA_EN_ENETAUI DMA_3CLKS /* Put lance into AUI-cable mode */ -#define DMA_CNTR_DISAB 0x00800000 /* No IRQ when DMA_TERM_CNTR set */ -#define DMA_AUTO_NADDR 0x01000000 /* Use "auto nxt addr" feature */ -#define DMA_SCSI_ON 0x02000000 /* Enable SCSI dma */ -#define DMA_PARITY_OFF 0x02000000 /* HME: disable parity checking */ -#define DMA_LOADED_ADDR 0x04000000 /* Address has been loaded */ -#define DMA_LOADED_NADDR 0x08000000 /* Next address has been loaded */ -#define DMA_RESET_FAS366 0x08000000 /* HME: Assert RESET to FAS366 */ - -/* Values describing the burst-size property from the PROM */ -#define DMA_BURST1 0x01 -#define DMA_BURST2 0x02 -#define DMA_BURST4 0x04 -#define DMA_BURST8 0x08 -#define DMA_BURST16 0x10 -#define DMA_BURST32 0x20 -#define DMA_BURST64 0x40 -#define DMA_BURSTBITS 0x7f - -/* Determine highest possible final transfer address given a base */ -#define DMA_MAXEND(addr) (0x01000000UL-(((unsigned long)(addr))&0x00ffffffUL)) - -/* Yes, I hack a lot of elisp in my spare time... */ -#define DMA_ERROR_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_HNDL_ERROR)) -#define DMA_IRQ_P(regs) ((sbus_readl((regs) + DMA_CSR)) & (DMA_HNDL_INTR | DMA_HNDL_ERROR)) -#define DMA_WRITE_P(regs) ((sbus_readl((regs) + DMA_CSR) & DMA_ST_WRITE)) -#define DMA_OFF(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp &= ~DMA_ENABLE; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_INTSOFF(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp &= ~DMA_INT_ENAB; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_INTSON(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= DMA_INT_ENAB; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_PUNTFIFO(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= DMA_FIFO_INV; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_SETSTART(__regs, __addr) \ - sbus_writel((u32)(__addr), (__regs) + DMA_ADDR); -#define DMA_BEGINDMA_W(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= (DMA_ST_WRITE|DMA_ENABLE|DMA_INT_ENAB); \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) -#define DMA_BEGINDMA_R(__regs) \ -do { u32 tmp = sbus_readl((__regs) + DMA_CSR); \ - tmp |= (DMA_ENABLE|DMA_INT_ENAB); \ - tmp &= ~DMA_ST_WRITE; \ - sbus_writel(tmp, (__regs) + DMA_CSR); \ -} while(0) - -/* For certain DMA chips, we need to disable ints upon irq entry - * and turn them back on when we are done. So in any ESP interrupt - * handler you *must* call DMA_IRQ_ENTRY upon entry and DMA_IRQ_EXIT - * when leaving the handler. You have been warned... - */ -#define DMA_IRQ_ENTRY(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \ - } while (0) - -#define DMA_IRQ_EXIT(dma, dregs) do { \ - if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \ - } while(0) - -#define for_each_dvma(dma) \ - for((dma) = dma_chain; (dma); (dma) = (dma)->next) - -/* From PCI */ - -#ifdef CONFIG_PCI -extern int isa_dma_bridge_buggy; -#else -#define isa_dma_bridge_buggy (0) -#endif - -#endif /* !(_ASM_SPARC64_DMA_H) */ +#include <asm-sparc/dma.h> diff --git a/include/asm-sparc64/ebus.h b/include/asm-sparc64/ebus.h index fcc62b97ced..d7d476158bd 100644 --- a/include/asm-sparc64/ebus.h +++ b/include/asm-sparc64/ebus.h @@ -1,94 +1 @@ -/* - * ebus.h: PCI to Ebus pseudo driver software state. - * - * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) - * Copyright (C) 1999 David S. Miller (davem@redhat.com) - */ - -#ifndef __SPARC64_EBUS_H -#define __SPARC64_EBUS_H - -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> - -struct linux_ebus_child { - struct linux_ebus_child *next; - struct linux_ebus_device *parent; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; - -struct linux_ebus_device { - struct of_device ofdev; - struct linux_ebus_device *next; - struct linux_ebus_child *children; - struct linux_ebus *bus; - struct device_node *prom_node; - struct resource resource[PROMREG_MAX]; - int num_addrs; - unsigned int irqs[PROMINTR_MAX]; - int num_irqs; -}; -#define to_ebus_device(d) container_of(d, struct linux_ebus_device, ofdev.dev) - -struct linux_ebus { - struct of_device ofdev; - struct linux_ebus *next; - struct linux_ebus_device *devices; - struct pci_dev *self; - int index; - int is_rio; - struct device_node *prom_node; -}; -#define to_ebus(d) container_of(d, struct linux_ebus, ofdev.dev) - -struct ebus_dma_info { - spinlock_t lock; - void __iomem *regs; - - unsigned int flags; -#define EBUS_DMA_FLAG_USE_EBDMA_HANDLER 0x00000001 -#define EBUS_DMA_FLAG_TCI_DISABLE 0x00000002 - - /* These are only valid is EBUS_DMA_FLAG_USE_EBDMA_HANDLER is - * set. - */ - void (*callback)(struct ebus_dma_info *p, int event, void *cookie); - void *client_cookie; - unsigned int irq; -#define EBUS_DMA_EVENT_ERROR 1 -#define EBUS_DMA_EVENT_DMA 2 -#define EBUS_DMA_EVENT_DEVICE 4 - - unsigned char name[64]; -}; - -extern int ebus_dma_register(struct ebus_dma_info *p); -extern int ebus_dma_irq_enable(struct ebus_dma_info *p, int on); -extern void ebus_dma_unregister(struct ebus_dma_info *p); -extern int ebus_dma_request(struct ebus_dma_info *p, dma_addr_t bus_addr, - size_t len); -extern void ebus_dma_prepare(struct ebus_dma_info *p, int write); -extern unsigned int ebus_dma_residue(struct ebus_dma_info *p); -extern unsigned int ebus_dma_addr(struct ebus_dma_info *p); -extern void ebus_dma_enable(struct ebus_dma_info *p, int on); - -extern struct linux_ebus *ebus_chain; - -extern void ebus_init(void); - -#define for_each_ebus(bus) \ - for((bus) = ebus_chain; (bus); (bus) = (bus)->next) - -#define for_each_ebusdev(dev, bus) \ - for((dev) = (bus)->devices; (dev); (dev) = (dev)->next) - -#define for_each_edevchild(dev, child) \ - for((child) = (dev)->children; (child); (child) = (child)->next) - -#endif /* !(__SPARC64_EBUS_H) */ +#include <asm-sparc/ebus.h> diff --git a/include/asm-sparc64/elf.h b/include/asm-sparc64/elf.h index 0818a1308f4..f256d9472c8 100644 --- a/include/asm-sparc64/elf.h +++ b/include/asm-sparc64/elf.h @@ -1,217 +1 @@ -#ifndef __ASM_SPARC64_ELF_H -#define __ASM_SPARC64_ELF_H - -/* - * ELF register definitions.. - */ - -#include <asm/ptrace.h> -#include <asm/processor.h> -#include <asm/uaccess.h> -#include <asm/spitfire.h> - -/* - * Sparc section types - */ -#define STT_REGISTER 13 - -/* - * Sparc ELF relocation types - */ -#define R_SPARC_NONE 0 -#define R_SPARC_8 1 -#define R_SPARC_16 2 -#define R_SPARC_32 3 -#define R_SPARC_DISP8 4 -#define R_SPARC_DISP16 5 -#define R_SPARC_DISP32 6 -#define R_SPARC_WDISP30 7 -#define R_SPARC_WDISP22 8 -#define R_SPARC_HI22 9 -#define R_SPARC_22 10 -#define R_SPARC_13 11 -#define R_SPARC_LO10 12 -#define R_SPARC_GOT10 13 -#define R_SPARC_GOT13 14 -#define R_SPARC_GOT22 15 -#define R_SPARC_PC10 16 -#define R_SPARC_PC22 17 -#define R_SPARC_WPLT30 18 -#define R_SPARC_COPY 19 -#define R_SPARC_GLOB_DAT 20 -#define R_SPARC_JMP_SLOT 21 -#define R_SPARC_RELATIVE 22 -#define R_SPARC_UA32 23 -#define R_SPARC_PLT32 24 -#define R_SPARC_HIPLT22 25 -#define R_SPARC_LOPLT10 26 -#define R_SPARC_PCPLT32 27 -#define R_SPARC_PCPLT22 28 -#define R_SPARC_PCPLT10 29 -#define R_SPARC_10 30 -#define R_SPARC_11 31 -#define R_SPARC_64 32 -#define R_SPARC_OLO10 33 -#define R_SPARC_WDISP16 40 -#define R_SPARC_WDISP19 41 -#define R_SPARC_7 43 -#define R_SPARC_5 44 -#define R_SPARC_6 45 - -/* Bits present in AT_HWCAP, primarily for Sparc32. */ - -#define HWCAP_SPARC_FLUSH 1 /* CPU supports flush instruction. */ -#define HWCAP_SPARC_STBAR 2 -#define HWCAP_SPARC_SWAP 4 -#define HWCAP_SPARC_MULDIV 8 -#define HWCAP_SPARC_V9 16 -#define HWCAP_SPARC_ULTRA3 32 -#define HWCAP_SPARC_BLKINIT 64 -#define HWCAP_SPARC_N2 128 - -#define CORE_DUMP_USE_REGSET - -/* - * These are used to set parameters in the core dumps. - */ -#define ELF_ARCH EM_SPARCV9 -#define ELF_CLASS ELFCLASS64 -#define ELF_DATA ELFDATA2MSB - -/* Format of 64-bit elf_gregset_t is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * TSTATE - * TPC - * TNPC - * Y - */ -typedef unsigned long elf_greg_t; -#define ELF_NGREG 36 -typedef elf_greg_t elf_gregset_t[ELF_NGREG]; - -typedef struct { - unsigned long pr_regs[32]; - unsigned long pr_fsr; - unsigned long pr_gsr; - unsigned long pr_fprs; -} elf_fpregset_t; - -/* Format of 32-bit elf_gregset_t is: - * G0 --> G7 - * O0 --> O7 - * L0 --> L7 - * I0 --> I7 - * PSR, PC, nPC, Y, WIM, TBR - */ -typedef unsigned int compat_elf_greg_t; -#define COMPAT_ELF_NGREG 38 -typedef compat_elf_greg_t compat_elf_gregset_t[COMPAT_ELF_NGREG]; - -typedef struct { - union { - unsigned int pr_regs[32]; - unsigned long pr_dregs[16]; - } pr_fr; - unsigned int __unused; - unsigned int pr_fsr; - unsigned char pr_qcnt; - unsigned char pr_q_entrysize; - unsigned char pr_en; - unsigned int pr_q[64]; -} compat_elf_fpregset_t; - -/* UltraSparc extensions. Still unused, but will be eventually. */ -typedef struct { - unsigned int pr_type; - unsigned int pr_align; - union { - struct { - union { - unsigned int pr_regs[32]; - unsigned long pr_dregs[16]; - long double pr_qregs[8]; - } pr_xfr; - } pr_v8p; - unsigned int pr_xfsr; - unsigned int pr_fprs; - unsigned int pr_xg[8]; - unsigned int pr_xo[8]; - unsigned long pr_tstate; - unsigned int pr_filler[8]; - } pr_un; -} elf_xregset_t; - -/* - * This is used to ensure we don't load something for the wrong architecture. - */ -#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH) -#define compat_elf_check_arch(x) ((x)->e_machine == EM_SPARC || \ - (x)->e_machine == EM_SPARC32PLUS) -#define compat_start_thread start_thread32 - -#define USE_ELF_CORE_DUMP -#define ELF_EXEC_PAGESIZE PAGE_SIZE - -/* This is the location that an ET_DYN program is loaded if exec'ed. Typical - use of this is to invoke "./ld.so someprog" to test out a new version of - the loader. We need to make sure that it is out of the way of the program - that it will "exec", and that there is sufficient room for the brk. */ - -#define ELF_ET_DYN_BASE 0x0000010000000000UL -#define COMPAT_ELF_ET_DYN_BASE 0x0000000070000000UL - - -/* This yields a mask that user programs can use to figure out what - instruction set this cpu supports. */ - -/* On Ultra, we support all of the v8 capabilities. */ -static inline unsigned int sparc64_elf_hwcap(void) -{ - unsigned int cap = (HWCAP_SPARC_FLUSH | HWCAP_SPARC_STBAR | - HWCAP_SPARC_SWAP | HWCAP_SPARC_MULDIV | - HWCAP_SPARC_V9); - - if (tlb_type == cheetah || tlb_type == cheetah_plus) - cap |= HWCAP_SPARC_ULTRA3; - else if (tlb_type == hypervisor) { - if (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || - sun4v_chip_type == SUN4V_CHIP_NIAGARA2) - cap |= HWCAP_SPARC_BLKINIT; - if (sun4v_chip_type == SUN4V_CHIP_NIAGARA2) - cap |= HWCAP_SPARC_N2; - } - - return cap; -} - -#define ELF_HWCAP sparc64_elf_hwcap(); - -/* This yields a string that ld.so will use to load implementation - specific libraries for optimization. This is more specific in - intent than poking at uname or /proc/cpuinfo. */ - -#define ELF_PLATFORM (NULL) - -#define SET_PERSONALITY(ex, ibcs2) \ -do { unsigned long new_flags = current_thread_info()->flags; \ - new_flags &= _TIF_32BIT; \ - if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \ - new_flags |= _TIF_32BIT; \ - else \ - new_flags &= ~_TIF_32BIT; \ - if ((current_thread_info()->flags & _TIF_32BIT) \ - != new_flags) \ - set_thread_flag(TIF_ABI_PENDING); \ - else \ - clear_thread_flag(TIF_ABI_PENDING); \ - /* flush_thread will update pgd cache */ \ - if (ibcs2) \ - set_personality(PER_SVR4); \ - else if (current->personality != PER_LINUX32) \ - set_personality(PER_LINUX); \ -} while (0) - -#endif /* !(__ASM_SPARC64_ELF_H) */ +#include <asm-sparc/elf.h> diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h index ca19f80a9b7..21487811443 100644 --- a/include/asm-sparc64/floppy.h +++ b/include/asm-sparc64/floppy.h @@ -1,782 +1 @@ -/* floppy.h: Sparc specific parts of the Floppy driver. - * - * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net) - * Copyright (C) 1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - * - * Ultra/PCI support added: Sep 1997 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef __ASM_SPARC64_FLOPPY_H -#define __ASM_SPARC64_FLOPPY_H - -#include <linux/init.h> -#include <linux/pci.h> - -#include <asm/page.h> -#include <asm/pgtable.h> -#include <asm/system.h> -#include <asm/idprom.h> -#include <asm/oplib.h> -#include <asm/auxio.h> -#include <asm/sbus.h> -#include <asm/irq.h> - - -/* - * Define this to enable exchanging drive 0 and 1 if only drive 1 is - * probed on PCI machines. - */ -#undef PCI_FDC_SWAP_DRIVES - - -/* References: - * 1) Netbsd Sun floppy driver. - * 2) NCR 82077 controller manual - * 3) Intel 82077 controller manual - */ -struct sun_flpy_controller { - volatile unsigned char status1_82077; /* Auxiliary Status reg. 1 */ - volatile unsigned char status2_82077; /* Auxiliary Status reg. 2 */ - volatile unsigned char dor_82077; /* Digital Output reg. */ - volatile unsigned char tapectl_82077; /* Tape Control reg */ - volatile unsigned char status_82077; /* Main Status Register. */ -#define drs_82077 status_82077 /* Digital Rate Select reg. */ - volatile unsigned char data_82077; /* Data fifo. */ - volatile unsigned char ___unused; - volatile unsigned char dir_82077; /* Digital Input reg. */ -#define dcr_82077 dir_82077 /* Config Control reg. */ -}; - -/* You'll only ever find one controller on an Ultra anyways. */ -static struct sun_flpy_controller *sun_fdc = (struct sun_flpy_controller *)-1; -unsigned long fdc_status; -static struct sbus_dev *floppy_sdev = NULL; - -struct sun_floppy_ops { - unsigned char (*fd_inb) (unsigned long port); - void (*fd_outb) (unsigned char value, unsigned long port); - void (*fd_enable_dma) (void); - void (*fd_disable_dma) (void); - void (*fd_set_dma_mode) (int); - void (*fd_set_dma_addr) (char *); - void (*fd_set_dma_count) (int); - unsigned int (*get_dma_residue) (void); - int (*fd_request_irq) (void); - void (*fd_free_irq) (void); - int (*fd_eject) (int); -}; - -static struct sun_floppy_ops sun_fdops; - -#define fd_inb(port) sun_fdops.fd_inb(port) -#define fd_outb(value,port) sun_fdops.fd_outb(value,port) -#define fd_enable_dma() sun_fdops.fd_enable_dma() -#define fd_disable_dma() sun_fdops.fd_disable_dma() -#define fd_request_dma() (0) /* nothing... */ -#define fd_free_dma() /* nothing... */ -#define fd_clear_dma_ff() /* nothing... */ -#define fd_set_dma_mode(mode) sun_fdops.fd_set_dma_mode(mode) -#define fd_set_dma_addr(addr) sun_fdops.fd_set_dma_addr(addr) -#define fd_set_dma_count(count) sun_fdops.fd_set_dma_count(count) -#define get_dma_residue(x) sun_fdops.get_dma_residue() -#define fd_cacheflush(addr, size) /* nothing... */ -#define fd_request_irq() sun_fdops.fd_request_irq() -#define fd_free_irq() sun_fdops.fd_free_irq() -#define fd_eject(drive) sun_fdops.fd_eject(drive) - -/* Super paranoid... */ -#undef HAVE_DISABLE_HLT - -static int sun_floppy_types[2] = { 0, 0 }; - -/* Here is where we catch the floppy driver trying to initialize, - * therefore this is where we call the PROM device tree probing - * routine etc. on the Sparc. - */ -#define FLOPPY0_TYPE sun_floppy_init() -#define FLOPPY1_TYPE sun_floppy_types[1] - -#define FDC1 ((unsigned long)sun_fdc) - -#define N_FDC 1 -#define N_DRIVE 8 - -/* No 64k boundary crossing problems on the Sparc. */ -#define CROSS_64KB(a,s) (0) - -static unsigned char sun_82077_fd_inb(unsigned long port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to read unknown port %lx\n", port); - panic("floppy: Port bolixed."); - case 4: /* FD_STATUS */ - return sbus_readb(&sun_fdc->status_82077) & ~STATUS_DMA; - case 5: /* FD_DATA */ - return sbus_readb(&sun_fdc->data_82077); - case 7: /* FD_DIR */ - /* XXX: Is DCL on 0x80 in sun4m? */ - return sbus_readb(&sun_fdc->dir_82077); - }; - panic("sun_82072_fd_inb: How did I get here?"); -} - -static void sun_82077_fd_outb(unsigned char value, unsigned long port) -{ - udelay(5); - switch(port & 7) { - default: - printk("floppy: Asked to write to unknown port %lx\n", port); - panic("floppy: Port bolixed."); - case 2: /* FD_DOR */ - /* Happily, the 82077 has a real DOR register. */ - sbus_writeb(value, &sun_fdc->dor_82077); - break; - case 5: /* FD_DATA */ - sbus_writeb(value, &sun_fdc->data_82077); - break; - case 7: /* FD_DCR */ - sbus_writeb(value, &sun_fdc->dcr_82077); - break; - case 4: /* FD_STATUS */ - sbus_writeb(value, &sun_fdc->status_82077); - break; - }; - return; -} - -/* For pseudo-dma (Sun floppy drives have no real DMA available to - * them so we must eat the data fifo bytes directly ourselves) we have - * three state variables. doing_pdma tells our inline low-level - * assembly floppy interrupt entry point whether it should sit and eat - * bytes from the fifo or just transfer control up to the higher level - * floppy interrupt c-code. I tried very hard but I could not get the - * pseudo-dma to work in c-code without getting many overruns and - * underruns. If non-zero, doing_pdma encodes the direction of - * the transfer for debugging. 1=read 2=write - */ -unsigned char *pdma_vaddr; -unsigned long pdma_size; -volatile int doing_pdma = 0; - -/* This is software state */ -char *pdma_base = NULL; -unsigned long pdma_areasize; - -/* Common routines to all controller types on the Sparc. */ -static void sun_fd_disable_dma(void) -{ - doing_pdma = 0; - if (pdma_base) { - mmu_unlockarea(pdma_base, pdma_areasize); - pdma_base = NULL; - } -} - -static void sun_fd_set_dma_mode(int mode) -{ - switch(mode) { - case DMA_MODE_READ: - doing_pdma = 1; - break; - case DMA_MODE_WRITE: - doing_pdma = 2; - break; - default: - printk("Unknown dma mode %d\n", mode); - panic("floppy: Giving up..."); - } -} - -static void sun_fd_set_dma_addr(char *buffer) -{ - pdma_vaddr = buffer; -} - -static void sun_fd_set_dma_count(int length) -{ - pdma_size = length; -} - -static void sun_fd_enable_dma(void) -{ - pdma_vaddr = mmu_lockarea(pdma_vaddr, pdma_size); - pdma_base = pdma_vaddr; - pdma_areasize = pdma_size; -} - -irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie) -{ - if (likely(doing_pdma)) { - void __iomem *stat = (void __iomem *) fdc_status; - unsigned char *vaddr = pdma_vaddr; - unsigned long size = pdma_size; - u8 val; - - while (size) { - val = readb(stat); - if (unlikely(!(val & 0x80))) { - pdma_vaddr = vaddr; - pdma_size = size; - return IRQ_HANDLED; - } - if (unlikely(!(val & 0x20))) { - pdma_vaddr = vaddr; - pdma_size = size; - doing_pdma = 0; - goto main_interrupt; - } - if (val & 0x40) { - /* read */ - *vaddr++ = readb(stat + 1); - } else { - unsigned char data = *vaddr++; - - /* write */ - writeb(data, stat + 1); - } - size--; - } - - pdma_vaddr = vaddr; - pdma_size = size; - - /* Send Terminal Count pulse to floppy controller. */ - val = readb(auxio_register); - val |= AUXIO_AUX1_FTCNT; - writeb(val, auxio_register); - val &= ~AUXIO_AUX1_FTCNT; - writeb(val, auxio_register); - - doing_pdma = 0; - } - -main_interrupt: - return floppy_interrupt(irq, dev_cookie); -} - -static int sun_fd_request_irq(void) -{ - static int once = 0; - int error; - - if(!once) { - once = 1; - - error = request_irq(FLOPPY_IRQ, sparc_floppy_irq, - IRQF_DISABLED, "floppy", NULL); - - return ((error == 0) ? 0 : -1); - } - return 0; -} - -static void sun_fd_free_irq(void) -{ -} - -static unsigned int sun_get_dma_residue(void) -{ - /* XXX This isn't really correct. XXX */ - return 0; -} - -static int sun_fd_eject(int drive) -{ - set_dor(0x00, 0xff, 0x90); - udelay(500); - set_dor(0x00, 0x6f, 0x00); - udelay(500); - return 0; -} - -#ifdef CONFIG_PCI -#include <asm/ebus.h> -#include <asm/ns87303.h> - -static struct ebus_dma_info sun_pci_fd_ebus_dma; -static struct pci_dev *sun_pci_ebus_dev; -static int sun_pci_broken_drive = -1; - -struct sun_pci_dma_op { - unsigned int addr; - int len; - int direction; - char *buf; -}; -static struct sun_pci_dma_op sun_pci_dma_current = { -1U, 0, 0, NULL}; -static struct sun_pci_dma_op sun_pci_dma_pending = { -1U, 0, 0, NULL}; - -extern irqreturn_t floppy_interrupt(int irq, void *dev_id); - -static unsigned char sun_pci_fd_inb(unsigned long port) -{ - udelay(5); - return inb(port); -} - -static void sun_pci_fd_outb(unsigned char val, unsigned long port) -{ - udelay(5); - outb(val, port); -} - -static void sun_pci_fd_broken_outb(unsigned char val, unsigned long port) -{ - udelay(5); - /* - * XXX: Due to SUN's broken floppy connector on AX and AXi - * we need to turn on MOTOR_0 also, if the floppy is - * jumpered to DS1 (like most PC floppies are). I hope - * this does not hurt correct hardware like the AXmp. - * (Eddie, Sep 12 1998). - */ - if (port == ((unsigned long)sun_fdc) + 2) { - if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x20)) { - val |= 0x10; - } - } - outb(val, port); -} - -#ifdef PCI_FDC_SWAP_DRIVES -static void sun_pci_fd_lde_broken_outb(unsigned char val, unsigned long port) -{ - udelay(5); - /* - * XXX: Due to SUN's broken floppy connector on AX and AXi - * we need to turn on MOTOR_0 also, if the floppy is - * jumpered to DS1 (like most PC floppies are). I hope - * this does not hurt correct hardware like the AXmp. - * (Eddie, Sep 12 1998). - */ - if (port == ((unsigned long)sun_fdc) + 2) { - if (((val & 0x03) == sun_pci_broken_drive) && (val & 0x10)) { - val &= ~(0x03); - val |= 0x21; - } - } - outb(val, port); -} -#endif /* PCI_FDC_SWAP_DRIVES */ - -static void sun_pci_fd_enable_dma(void) -{ - BUG_ON((NULL == sun_pci_dma_pending.buf) || - (0 == sun_pci_dma_pending.len) || - (0 == sun_pci_dma_pending.direction)); - - sun_pci_dma_current.buf = sun_pci_dma_pending.buf; - sun_pci_dma_current.len = sun_pci_dma_pending.len; - sun_pci_dma_current.direction = sun_pci_dma_pending.direction; - - sun_pci_dma_pending.buf = NULL; - sun_pci_dma_pending.len = 0; - sun_pci_dma_pending.direction = 0; - sun_pci_dma_pending.addr = -1U; - - sun_pci_dma_current.addr = - pci_map_single(sun_pci_ebus_dev, - sun_pci_dma_current.buf, - sun_pci_dma_current.len, - sun_pci_dma_current.direction); - - ebus_dma_enable(&sun_pci_fd_ebus_dma, 1); - - if (ebus_dma_request(&sun_pci_fd_ebus_dma, - sun_pci_dma_current.addr, - sun_pci_dma_current.len)) - BUG(); -} - -static void sun_pci_fd_disable_dma(void) -{ - ebus_dma_enable(&sun_pci_fd_ebus_dma, 0); - if (sun_pci_dma_current.addr != -1U) - pci_unmap_single(sun_pci_ebus_dev, - sun_pci_dma_current.addr, - sun_pci_dma_current.len, - sun_pci_dma_current.direction); - sun_pci_dma_current.addr = -1U; -} - -static void sun_pci_fd_set_dma_mode(int mode) -{ - if (mode == DMA_MODE_WRITE) - sun_pci_dma_pending.direction = PCI_DMA_TODEVICE; - else - sun_pci_dma_pending.direction = PCI_DMA_FROMDEVICE; - - ebus_dma_prepare(&sun_pci_fd_ebus_dma, mode != DMA_MODE_WRITE); -} - -static void sun_pci_fd_set_dma_count(int length) -{ - sun_pci_dma_pending.len = length; -} - -static void sun_pci_fd_set_dma_addr(char *buffer) -{ - sun_pci_dma_pending.buf = buffer; -} - -static unsigned int sun_pci_get_dma_residue(void) -{ - return ebus_dma_residue(&sun_pci_fd_ebus_dma); -} - -static int sun_pci_fd_request_irq(void) -{ - return ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 1); -} - -static void sun_pci_fd_free_irq(void) -{ - ebus_dma_irq_enable(&sun_pci_fd_ebus_dma, 0); -} - -static int sun_pci_fd_eject(int drive) -{ - return -EINVAL; -} - -void sun_pci_fd_dma_callback(struct ebus_dma_info *p, int event, void *cookie) -{ - floppy_interrupt(0, NULL); -} - -/* - * Floppy probing, we'd like to use /dev/fd0 for a single Floppy on PCI, - * even if this is configured using DS1, thus looks like /dev/fd1 with - * the cabling used in Ultras. - */ -#define DOR (port + 2) -#define MSR (port + 4) -#define FIFO (port + 5) - -static void sun_pci_fd_out_byte(unsigned long port, unsigned char val, - unsigned long reg) -{ - unsigned char status; - int timeout = 1000; - - while (!((status = inb(MSR)) & 0x80) && --timeout) - udelay(100); - outb(val, reg); -} - -static unsigned char sun_pci_fd_sensei(unsigned long port) -{ - unsigned char result[2] = { 0x70, 0x00 }; - unsigned char status; - int i = 0; - - sun_pci_fd_out_byte(port, 0x08, FIFO); - do { - int timeout = 1000; - - while (!((status = inb(MSR)) & 0x80) && --timeout) - udelay(100); - - if (!timeout) - break; - - if ((status & 0xf0) == 0xd0) - result[i++] = inb(FIFO); - else - break; - } while (i < 2); - - return result[0]; -} - -static void sun_pci_fd_reset(unsigned long port) -{ - unsigned char mask = 0x00; - unsigned char status; - int timeout = 10000; - - outb(0x80, MSR); - do { - status = sun_pci_fd_sensei(port); - if ((status & 0xc0) == 0xc0) - mask |= 1 << (status & 0x03); - else - udelay(100); - } while ((mask != 0x0f) && --timeout); -} - -static int sun_pci_fd_test_drive(unsigned long port, int drive) -{ - unsigned char status, data; - int timeout = 1000; - int ready; - - sun_pci_fd_reset(port); - - data = (0x10 << drive) | 0x0c | drive; - sun_pci_fd_out_byte(port, data, DOR); - - sun_pci_fd_out_byte(port, 0x07, FIFO); - sun_pci_fd_out_byte(port, drive & 0x03, FIFO); - - do { - udelay(100); - status = sun_pci_fd_sensei(port); - } while (((status & 0xc0) == 0x80) && --timeout); - - if (!timeout) - ready = 0; - else - ready = (status & 0x10) ? 0 : 1; - - sun_pci_fd_reset(port); - return ready; -} -#undef FIFO -#undef MSR -#undef DOR - -#endif /* CONFIG_PCI */ - -#ifdef CONFIG_PCI -static int __init ebus_fdthree_p(struct linux_ebus_device *edev) -{ - if (!strcmp(edev->prom_node->name, "fdthree")) - return 1; - if (!strcmp(edev->prom_node->name, "floppy")) { - const char *compat; - - compat = of_get_property(edev->prom_node, - "compatible", NULL); - if (compat && !strcmp(compat, "fdthree")) - return 1; - } - return 0; -} -#endif - -static unsigned long __init sun_floppy_init(void) -{ - char state[128]; - struct sbus_bus *bus; - struct sbus_dev *sdev = NULL; - static int initialized = 0; - - if (initialized) - return sun_floppy_types[0]; - initialized = 1; - - for_all_sbusdev (sdev, bus) { - if (!strcmp(sdev->prom_name, "SUNW,fdtwo")) - break; - } - if(sdev) { - floppy_sdev = sdev; - FLOPPY_IRQ = sdev->irqs[0]; - } else { -#ifdef CONFIG_PCI - struct linux_ebus *ebus; - struct linux_ebus_device *edev = NULL; - unsigned long config = 0; - void __iomem *auxio_reg; - const char *state_prop; - - for_each_ebus(ebus) { - for_each_ebusdev(edev, ebus) { - if (ebus_fdthree_p(edev)) - goto ebus_done; - } - } - ebus_done: - if (!edev) - return 0; - - state_prop = of_get_property(edev->prom_node, "status", NULL); - if (state_prop && !strncmp(state_prop, "disabled", 8)) - return 0; - - FLOPPY_IRQ = edev->irqs[0]; - - /* Make sure the high density bit is set, some systems - * (most notably Ultra5/Ultra10) come up with it clear. - */ - auxio_reg = (void __iomem *) edev->resource[2].start; - writel(readl(auxio_reg)|0x2, auxio_reg); - - sun_pci_ebus_dev = ebus->self; - - spin_lock_init(&sun_pci_fd_ebus_dma.lock); - - /* XXX ioremap */ - sun_pci_fd_ebus_dma.regs = (void __iomem *) - edev->resource[1].start; - if (!sun_pci_fd_ebus_dma.regs) - return 0; - - sun_pci_fd_ebus_dma.flags = (EBUS_DMA_FLAG_USE_EBDMA_HANDLER | - EBUS_DMA_FLAG_TCI_DISABLE); - sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; - sun_pci_fd_ebus_dma.client_cookie = NULL; - sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; - strcpy(sun_pci_fd_ebus_dma.name, "floppy"); - if (ebus_dma_register(&sun_pci_fd_ebus_dma)) - return 0; - - /* XXX ioremap */ - sun_fdc = (struct sun_flpy_controller *)edev->resource[0].start; - - sun_fdops.fd_inb = sun_pci_fd_inb; - sun_fdops.fd_outb = sun_pci_fd_outb; - - can_use_virtual_dma = use_virtual_dma = 0; - sun_fdops.fd_enable_dma = sun_pci_fd_enable_dma; - sun_fdops.fd_disable_dma = sun_pci_fd_disable_dma; - sun_fdops.fd_set_dma_mode = sun_pci_fd_set_dma_mode; - sun_fdops.fd_set_dma_addr = sun_pci_fd_set_dma_addr; - sun_fdops.fd_set_dma_count = sun_pci_fd_set_dma_count; - sun_fdops.get_dma_residue = sun_pci_get_dma_residue; - - sun_fdops.fd_request_irq = sun_pci_fd_request_irq; - sun_fdops.fd_free_irq = sun_pci_fd_free_irq; - - sun_fdops.fd_eject = sun_pci_fd_eject; - - fdc_status = (unsigned long) &sun_fdc->status_82077; - - /* - * XXX: Find out on which machines this is really needed. - */ - if (1) { - sun_pci_broken_drive = 1; - sun_fdops.fd_outb = sun_pci_fd_broken_outb; - } - - allowed_drive_mask = 0; - if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 0)) - sun_floppy_types[0] = 4; - if (sun_pci_fd_test_drive((unsigned long)sun_fdc, 1)) - sun_floppy_types[1] = 4; - - /* - * Find NS87303 SuperIO config registers (through ecpp). - */ - for_each_ebus(ebus) { - for_each_ebusdev(edev, ebus) { - if (!strcmp(edev->prom_node->name, "ecpp")) { - config = edev->resource[1].start; - goto config_done; - } - } - } - config_done: - - /* - * Sanity check, is this really the NS87303? - */ - switch (config & 0x3ff) { - case 0x02e: - case 0x15c: - case 0x26e: - case 0x398: - break; - default: - config = 0; - } - - if (!config) - return sun_floppy_types[0]; - - /* Enable PC-AT mode. */ - ns87303_modify(config, ASC, 0, 0xc0); - -#ifdef PCI_FDC_SWAP_DRIVES - /* - * If only Floppy 1 is present, swap drives. - */ - if (!sun_floppy_types[0] && sun_floppy_types[1]) { - /* - * Set the drive exchange bit in FCR on NS87303, - * make sure other bits are sane before doing so. - */ - ns87303_modify(config, FER, FER_EDM, 0); - ns87303_modify(config, ASC, ASC_DRV2_SEL, 0); - ns87303_modify(config, FCR, 0, FCR_LDE); - - config = sun_floppy_types[0]; - sun_floppy_types[0] = sun_floppy_types[1]; - sun_floppy_types[1] = config; - - if (sun_pci_broken_drive != -1) { - sun_pci_broken_drive = 1 - sun_pci_broken_drive; - sun_fdops.fd_outb = sun_pci_fd_lde_broken_outb; - } - } -#endif /* PCI_FDC_SWAP_DRIVES */ - - return sun_floppy_types[0]; -#else - return 0; -#endif - } - prom_getproperty(sdev->prom_node, "status", state, sizeof(state)); - if(!strncmp(state, "disabled", 8)) - return 0; - - /* - * We cannot do sbus_ioremap here: it does request_region, - * which the generic floppy driver tries to do once again. - * But we must use the sdev resource values as they have - * had parent ranges applied. - */ - sun_fdc = (struct sun_flpy_controller *) - (sdev->resource[0].start + - ((sdev->resource[0].flags & 0x1ffUL) << 32UL)); - - /* Last minute sanity check... */ - if(sbus_readb(&sun_fdc->status1_82077) == 0xff) { - sun_fdc = (struct sun_flpy_controller *)-1; - return 0; - } - - sun_fdops.fd_inb = sun_82077_fd_inb; - sun_fdops.fd_outb = sun_82077_fd_outb; - - can_use_virtual_dma = use_virtual_dma = 1; - sun_fdops.fd_enable_dma = sun_fd_enable_dma; - sun_fdops.fd_disable_dma = sun_fd_disable_dma; - sun_fdops.fd_set_dma_mode = sun_fd_set_dma_mode; - sun_fdops.fd_set_dma_addr = sun_fd_set_dma_addr; - sun_fdops.fd_set_dma_count = sun_fd_set_dma_count; - sun_fdops.get_dma_residue = sun_get_dma_residue; - - sun_fdops.fd_request_irq = sun_fd_request_irq; - sun_fdops.fd_free_irq = sun_fd_free_irq; - - sun_fdops.fd_eject = sun_fd_eject; - - fdc_status = (unsigned long) &sun_fdc->status_82077; - - /* Success... */ - allowed_drive_mask = 0x01; - sun_floppy_types[0] = 4; - sun_floppy_types[1] = 0; - - return sun_floppy_types[0]; -} - -#define EXTRA_FLOPPY_PARAMS - -static DEFINE_SPINLOCK(dma_spin_lock); - -#define claim_dma_lock() \ -({ unsigned long flags; \ - spin_lock_irqsave(&dma_spin_lock, flags); \ - flags; \ -}) - -#define release_dma_lock(__flags) \ - spin_unlock_irqrestore(&dma_spin_lock, __flags); - -#endif /* !(__ASM_SPARC64_FLOPPY_H) */ +#include <asm-sparc/floppy.h> diff --git a/include/asm-sparc64/futex.h b/include/asm-sparc64/futex.h index d8378935ae9..1ceb0bb2fe5 100644 --- a/include/asm-sparc64/futex.h +++ b/include/asm-sparc64/futex.h @@ -1,110 +1 @@ -#ifndef _SPARC64_FUTEX_H -#define _SPARC64_FUTEX_H - -#include <linux/futex.h> -#include <linux/uaccess.h> -#include <asm/errno.h> -#include <asm/system.h> - -#define __futex_cas_op(insn, ret, oldval, uaddr, oparg) \ - __asm__ __volatile__( \ - "\n1: lduwa [%3] %%asi, %2\n" \ - " " insn "\n" \ - "2: casa [%3] %%asi, %2, %1\n" \ - " cmp %2, %1\n" \ - " bne,pn %%icc, 1b\n" \ - " mov 0, %0\n" \ - "3:\n" \ - " .section .fixup,#alloc,#execinstr\n" \ - " .align 4\n" \ - "4: sethi %%hi(3b), %0\n" \ - " jmpl %0 + %%lo(3b), %%g0\n" \ - " mov %5, %0\n" \ - " .previous\n" \ - " .section __ex_table,\"a\"\n" \ - " .align 4\n" \ - " .word 1b, 4b\n" \ - " .word 2b, 4b\n" \ - " .previous\n" \ - : "=&r" (ret), "=&r" (oldval), "=&r" (tem) \ - : "r" (uaddr), "r" (oparg), "i" (-EFAULT) \ - : "memory") - -static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) -{ - int op = (encoded_op >> 28) & 7; - int cmp = (encoded_op >> 24) & 15; - int oparg = (encoded_op << 8) >> 20; - int cmparg = (encoded_op << 20) >> 20; - int oldval = 0, ret, tem; - - if (unlikely(!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))) - return -EFAULT; - if (unlikely((((unsigned long) uaddr) & 0x3UL))) - return -EINVAL; - - if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) - oparg = 1 << oparg; - - pagefault_disable(); - - switch (op) { - case FUTEX_OP_SET: - __futex_cas_op("mov\t%4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ADD: - __futex_cas_op("add\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_OR: - __futex_cas_op("or\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_ANDN: - __futex_cas_op("and\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - case FUTEX_OP_XOR: - __futex_cas_op("xor\t%2, %4, %1", ret, oldval, uaddr, oparg); - break; - default: - ret = -ENOSYS; - } - - pagefault_enable(); - - if (!ret) { - switch (cmp) { - case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; - case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; - case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; - case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; - case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; - case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; - default: ret = -ENOSYS; - } - } - return ret; -} - -static inline int -futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) -{ - __asm__ __volatile__( - "\n1: casa [%3] %%asi, %2, %0\n" - "2:\n" - " .section .fixup,#alloc,#execinstr\n" - " .align 4\n" - "3: sethi %%hi(2b), %0\n" - " jmpl %0 + %%lo(2b), %%g0\n" - " mov %4, %0\n" - " .previous\n" - " .section __ex_table,\"a\"\n" - " .align 4\n" - " .word 1b, 3b\n" - " .previous\n" - : "=r" (newval) - : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT) - : "memory"); - - return newval; -} - -#endif /* !(_SPARC64_FUTEX_H) */ +#include <asm-sparc/futex.h> diff --git a/include/asm-sparc64/hardirq.h b/include/asm-sparc64/hardirq.h index 7c29fd1a87a..63dca3db11f 100644 --- a/include/asm-sparc64/hardirq.h +++ b/include/asm-sparc64/hardirq.h @@ -1,19 +1 @@ -/* hardirq.h: 64-bit Sparc hard IRQ support. - * - * Copyright (C) 1997, 1998, 2005 David S. Miller (davem@davemloft.net) - */ - -#ifndef __SPARC64_HARDIRQ_H -#define __SPARC64_HARDIRQ_H - -#include <asm/cpudata.h> - -#define __ARCH_IRQ_STAT -#define local_softirq_pending() \ - (local_cpu_data().__softirq_pending) - -void ack_bad_irq(unsigned int irq); - -#define HARDIRQ_BITS 8 - -#endif /* !(__SPARC64_HARDIRQ_H) */ +#include <asm-sparc/hardirq.h> diff --git a/include/asm-sparc64/head.h b/include/asm-sparc64/head.h index 10e9dabc4c4..2254c09e53f 100644 --- a/include/asm-sparc64/head.h +++ b/include/asm-sparc64/head.h @@ -1,76 +1 @@ -#ifndef _SPARC64_HEAD_H -#define _SPARC64_HEAD_H - -#include <asm/pstate.h> - - /* wrpr %g0, val, %gl */ -#define SET_GL(val) \ - .word 0xa1902000 | val - - /* rdpr %gl, %gN */ -#define GET_GL_GLOBAL(N) \ - .word 0x81540000 | (N << 25) - -#define KERNBASE 0x400000 - -#define PTREGS_OFF (STACK_BIAS + STACKFRAME_SZ) - -#define __CHEETAH_ID 0x003e0014 -#define __JALAPENO_ID 0x003e0016 -#define __SERRANO_ID 0x003e0022 - -#define CHEETAH_MANUF 0x003e -#define CHEETAH_IMPL 0x0014 /* Ultra-III */ -#define CHEETAH_PLUS_IMPL 0x0015 /* Ultra-III+ */ -#define JALAPENO_IMPL 0x0016 /* Ultra-IIIi */ -#define JAGUAR_IMPL 0x0018 /* Ultra-IV */ -#define PANTHER_IMPL 0x0019 /* Ultra-IV+ */ -#define SERRANO_IMPL 0x0022 /* Ultra-IIIi+ */ - -#define BRANCH_IF_SUN4V(tmp1,label) \ - sethi %hi(is_sun4v), %tmp1; \ - lduw [%tmp1 + %lo(is_sun4v)], %tmp1; \ - brnz,pn %tmp1, label; \ - nop - -#define BRANCH_IF_CHEETAH_BASE(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - sethi %hi(__CHEETAH_ID), %tmp2; \ - srlx %tmp1, 32, %tmp1; \ - or %tmp2, %lo(__CHEETAH_ID), %tmp2;\ - cmp %tmp1, %tmp2; \ - be,pn %icc, label; \ - nop; - -#define BRANCH_IF_JALAPENO(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - sethi %hi(__JALAPENO_ID), %tmp2; \ - srlx %tmp1, 32, %tmp1; \ - or %tmp2, %lo(__JALAPENO_ID), %tmp2;\ - cmp %tmp1, %tmp2; \ - be,pn %icc, label; \ - nop; - -#define BRANCH_IF_CHEETAH_PLUS_OR_FOLLOWON(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_MANUF; \ - bne,pt %xcc, 99f; \ - sllx %tmp1, 16, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_PLUS_IMPL; \ - bgeu,pt %xcc, label; \ -99: nop; - -#define BRANCH_IF_ANY_CHEETAH(tmp1,tmp2,label) \ - rdpr %ver, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_MANUF; \ - bne,pt %xcc, 99f; \ - sllx %tmp1, 16, %tmp1; \ - srlx %tmp1, (32 + 16), %tmp2; \ - cmp %tmp2, CHEETAH_IMPL; \ - bgeu,pt %xcc, label; \ -99: nop; - -#endif /* !(_SPARC64_HEAD_H) */ +#include <asm-sparc/head.h> diff --git a/include/asm-sparc64/ide.h b/include/asm-sparc64/ide.h index 1282676da1c..7125317a428 100644 --- a/include/asm-sparc64/ide.h +++ b/include/asm-sparc64/ide.h @@ -1,118 +1 @@ -/* - * ide.h: Ultra/PCI specific IDE glue. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) - */ - -#ifndef _SPARC64_IDE_H -#define _SPARC64_IDE_H - -#ifdef __KERNEL__ - -#include <asm/pgalloc.h> -#include <asm/io.h> -#include <asm/spitfire.h> -#include <asm/cacheflush.h> -#include <asm/page.h> - -#ifndef MAX_HWIFS -# ifdef CONFIG_BLK_DEV_IDEPCI -#define MAX_HWIFS 10 -# else -#define MAX_HWIFS 2 -# endif -#endif - -#define __ide_insl(data_reg, buffer, wcount) \ - __ide_insw(data_reg, buffer, (wcount)<<1) -#define __ide_outsl(data_reg, buffer, wcount) \ - __ide_outsw(data_reg, buffer, (wcount)<<1) - -/* On sparc64, I/O ports and MMIO registers are accessed identically. */ -#define __ide_mm_insw __ide_insw -#define __ide_mm_insl __ide_insl -#define __ide_mm_outsw __ide_outsw -#define __ide_mm_outsl __ide_outsl - -static inline unsigned int inw_be(void __iomem *addr) -{ - unsigned int ret; - - __asm__ __volatile__("lduha [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline void __ide_insw(void __iomem *port, void *dst, u32 count) -{ -#ifdef DCACHE_ALIASING_POSSIBLE - unsigned long end = (unsigned long)dst + (count << 1); -#endif - u16 *ps = dst; - u32 *pi; - - if(((u64)ps) & 0x2) { - *ps++ = inw_be(port); - count--; - } - pi = (u32 *)ps; - while(count >= 2) { - u32 w; - - w = inw_be(port) << 16; - w |= inw_be(port); - *pi++ = w; - count -= 2; - } - ps = (u16 *)pi; - if(count) - *ps++ = inw_be(port); - -#ifdef DCACHE_ALIASING_POSSIBLE - __flush_dcache_range((unsigned long)dst, end); -#endif -} - -static inline void outw_be(unsigned short w, void __iomem *addr) -{ - __asm__ __volatile__("stha %0, [%1] %2" - : /* no outputs */ - : "r" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void __ide_outsw(void __iomem *port, void *src, u32 count) -{ -#ifdef DCACHE_ALIASING_POSSIBLE - unsigned long end = (unsigned long)src + (count << 1); -#endif - const u16 *ps = src; - const u32 *pi; - - if(((u64)src) & 0x2) { - outw_be(*ps++, port); - count--; - } - pi = (const u32 *)ps; - while(count >= 2) { - u32 w; - - w = *pi++; - outw_be((w >> 16), port); - outw_be(w, port); - count -= 2; - } - ps = (const u16 *)pi; - if(count) - outw_be(*ps, port); - -#ifdef DCACHE_ALIASING_POSSIBLE - __flush_dcache_range((unsigned long)src, end); -#endif -} - -#endif /* __KERNEL__ */ - -#endif /* _SPARC64_IDE_H */ +#include <asm-sparc/ide.h> diff --git a/include/asm-sparc64/io.h b/include/asm-sparc64/io.h index 3158960f3eb..25ff258dfd3 100644 --- a/include/asm-sparc64/io.h +++ b/include/asm-sparc64/io.h @@ -1,511 +1 @@ -#ifndef __SPARC64_IO_H -#define __SPARC64_IO_H - -#include <linux/kernel.h> -#include <linux/compiler.h> -#include <linux/types.h> - -#include <asm/page.h> /* IO address mapping routines need this */ -#include <asm/system.h> -#include <asm/asi.h> - -/* PC crapola... */ -#define __SLOW_DOWN_IO do { } while (0) -#define SLOW_DOWN_IO do { } while (0) - -/* BIO layer definitions. */ -extern unsigned long kern_base, kern_size; -#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) -#define BIO_VMERGE_BOUNDARY 8192 - -static inline u8 _inb(unsigned long addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_inb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u16 _inw(unsigned long addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_inw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u32 _inl(unsigned long addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_inl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline void _outb(u8 b, unsigned long addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_outb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _outw(u16 w, unsigned long addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_outw */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _outl(u32 l, unsigned long addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_outl */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -#define inb(__addr) (_inb((unsigned long)(__addr))) -#define inw(__addr) (_inw((unsigned long)(__addr))) -#define inl(__addr) (_inl((unsigned long)(__addr))) -#define outb(__b, __addr) (_outb((u8)(__b), (unsigned long)(__addr))) -#define outw(__w, __addr) (_outw((u16)(__w), (unsigned long)(__addr))) -#define outl(__l, __addr) (_outl((u32)(__l), (unsigned long)(__addr))) - -#define inb_p(__addr) inb(__addr) -#define outb_p(__b, __addr) outb(__b, __addr) -#define inw_p(__addr) inw(__addr) -#define outw_p(__w, __addr) outw(__w, __addr) -#define inl_p(__addr) inl(__addr) -#define outl_p(__l, __addr) outl(__l, __addr) - -extern void outsb(unsigned long, const void *, unsigned long); -extern void outsw(unsigned long, const void *, unsigned long); -extern void outsl(unsigned long, const void *, unsigned long); -extern void insb(unsigned long, void *, unsigned long); -extern void insw(unsigned long, void *, unsigned long); -extern void insl(unsigned long, void *, unsigned long); - -static inline void ioread8_rep(void __iomem *port, void *buf, unsigned long count) -{ - insb((unsigned long __force)port, buf, count); -} -static inline void ioread16_rep(void __iomem *port, void *buf, unsigned long count) -{ - insw((unsigned long __force)port, buf, count); -} - -static inline void ioread32_rep(void __iomem *port, void *buf, unsigned long count) -{ - insl((unsigned long __force)port, buf, count); -} - -static inline void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsb((unsigned long __force)port, buf, count); -} - -static inline void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsw((unsigned long __force)port, buf, count); -} - -static inline void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count) -{ - outsl((unsigned long __force)port, buf, count); -} - -/* Memory functions, same as I/O accesses on Ultra. */ -static inline u8 _readb(const volatile void __iomem *addr) -{ u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - return ret; -} - -static inline u16 _readw(const volatile void __iomem *addr) -{ u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u32 _readl(const volatile void __iomem *addr) -{ u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline u64 _readq(const volatile void __iomem *addr) -{ u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); - - return ret; -} - -static inline void _writeb(u8 b, volatile void __iomem *addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writew(u16 w, volatile void __iomem *addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writel(u32 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -static inline void _writeq(u64 q, volatile void __iomem *addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_writeq */" - : /* no outputs */ - : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E_L) - : "memory"); -} - -#define readb(__addr) _readb(__addr) -#define readw(__addr) _readw(__addr) -#define readl(__addr) _readl(__addr) -#define readq(__addr) _readq(__addr) -#define readb_relaxed(__addr) _readb(__addr) -#define readw_relaxed(__addr) _readw(__addr) -#define readl_relaxed(__addr) _readl(__addr) -#define readq_relaxed(__addr) _readq(__addr) -#define writeb(__b, __addr) _writeb(__b, __addr) -#define writew(__w, __addr) _writew(__w, __addr) -#define writel(__l, __addr) _writel(__l, __addr) -#define writeq(__q, __addr) _writeq(__q, __addr) - -/* Now versions without byte-swapping. */ -static inline u8 _raw_readb(unsigned long addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* pci_raw_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u16 _raw_readw(unsigned long addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* pci_raw_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u32 _raw_readl(unsigned long addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* pci_raw_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline u64 _raw_readq(unsigned long addr) -{ - u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* pci_raw_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - - return ret; -} - -static inline void _raw_writeb(u8 b, unsigned long addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* pci_raw_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writew(u16 w, unsigned long addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* pci_raw_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writel(u32 l, unsigned long addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* pci_raw_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -static inline void _raw_writeq(u64 q, unsigned long addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* pci_raw_writeq */" - : /* no outputs */ - : "Jr" (q), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -#define __raw_readb(__addr) (_raw_readb((unsigned long)(__addr))) -#define __raw_readw(__addr) (_raw_readw((unsigned long)(__addr))) -#define __raw_readl(__addr) (_raw_readl((unsigned long)(__addr))) -#define __raw_readq(__addr) (_raw_readq((unsigned long)(__addr))) -#define __raw_writeb(__b, __addr) (_raw_writeb((u8)(__b), (unsigned long)(__addr))) -#define __raw_writew(__w, __addr) (_raw_writew((u16)(__w), (unsigned long)(__addr))) -#define __raw_writel(__l, __addr) (_raw_writel((u32)(__l), (unsigned long)(__addr))) -#define __raw_writeq(__q, __addr) (_raw_writeq((u64)(__q), (unsigned long)(__addr))) - -/* Valid I/O Space regions are anywhere, because each PCI bus supported - * can live in an arbitrary area of the physical address range. - */ -#define IO_SPACE_LIMIT 0xffffffffffffffffUL - -/* Now, SBUS variants, only difference from PCI is that we do - * not use little-endian ASIs. - */ -static inline u8 _sbus_readb(const volatile void __iomem *addr) -{ - u8 ret; - - __asm__ __volatile__("lduba\t[%1] %2, %0\t/* sbus_readb */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u16 _sbus_readw(const volatile void __iomem *addr) -{ - u16 ret; - - __asm__ __volatile__("lduha\t[%1] %2, %0\t/* sbus_readw */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u32 _sbus_readl(const volatile void __iomem *addr) -{ - u32 ret; - - __asm__ __volatile__("lduwa\t[%1] %2, %0\t/* sbus_readl */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline u64 _sbus_readq(const volatile void __iomem *addr) -{ - u64 ret; - - __asm__ __volatile__("ldxa\t[%1] %2, %0\t/* sbus_readq */" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); - - return ret; -} - -static inline void _sbus_writeb(u8 b, volatile void __iomem *addr) -{ - __asm__ __volatile__("stba\t%r0, [%1] %2\t/* sbus_writeb */" - : /* no outputs */ - : "Jr" (b), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writew(u16 w, volatile void __iomem *addr) -{ - __asm__ __volatile__("stha\t%r0, [%1] %2\t/* sbus_writew */" - : /* no outputs */ - : "Jr" (w), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writel(u32 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stwa\t%r0, [%1] %2\t/* sbus_writel */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -static inline void _sbus_writeq(u64 l, volatile void __iomem *addr) -{ - __asm__ __volatile__("stxa\t%r0, [%1] %2\t/* sbus_writeq */" - : /* no outputs */ - : "Jr" (l), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E) - : "memory"); -} - -#define sbus_readb(__addr) _sbus_readb(__addr) -#define sbus_readw(__addr) _sbus_readw(__addr) -#define sbus_readl(__addr) _sbus_readl(__addr) -#define sbus_readq(__addr) _sbus_readq(__addr) -#define sbus_writeb(__b, __addr) _sbus_writeb(__b, __addr) -#define sbus_writew(__w, __addr) _sbus_writew(__w, __addr) -#define sbus_writel(__l, __addr) _sbus_writel(__l, __addr) -#define sbus_writeq(__l, __addr) _sbus_writeq(__l, __addr) - -static inline void _sbus_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - while(n--) { - sbus_writeb(c, dst); - dst++; - } -} - -#define sbus_memset_io(d,c,sz) _sbus_memset_io(d,c,sz) - -static inline void -_memset_io(volatile void __iomem *dst, int c, __kernel_size_t n) -{ - volatile void __iomem *d = dst; - - while (n--) { - writeb(c, d); - d++; - } -} - -#define memset_io(d,c,sz) _memset_io(d,c,sz) - -static inline void -_memcpy_fromio(void *dst, const volatile void __iomem *src, __kernel_size_t n) -{ - char *d = dst; - - while (n--) { - char tmp = readb(src); - *d++ = tmp; - src++; - } -} - -#define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) - -static inline void -_memcpy_toio(volatile void __iomem *dst, const void *src, __kernel_size_t n) -{ - const char *s = src; - volatile void __iomem *d = dst; - - while (n--) { - char tmp = *s++; - writeb(tmp, d); - d++; - } -} - -#define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) - -#define mmiowb() - -#ifdef __KERNEL__ - -/* On sparc64 we have the whole physical IO address space accessible - * using physically addressed loads and stores, so this does nothing. - */ -static inline void __iomem *ioremap(unsigned long offset, unsigned long size) -{ - return (void __iomem *)offset; -} - -#define ioremap_nocache(X,Y) ioremap((X),(Y)) - -static inline void iounmap(volatile void __iomem *addr) -{ -} - -#define ioread8(X) readb(X) -#define ioread16(X) readw(X) -#define ioread32(X) readl(X) -#define iowrite8(val,X) writeb(val,X) -#define iowrite16(val,X) writew(val,X) -#define iowrite32(val,X) writel(val,X) - -/* Create a virtual mapping cookie for an IO port range */ -extern void __iomem *ioport_map(unsigned long port, unsigned int nr); -extern void ioport_unmap(void __iomem *); - -/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ -struct pci_dev; -extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); -extern void pci_iounmap(struct pci_dev *dev, void __iomem *); - -/* Similarly for SBUS. */ -#define sbus_ioremap(__res, __offset, __size, __name) \ -({ unsigned long __ret; \ - __ret = (__res)->start + (((__res)->flags & 0x1ffUL) << 32UL); \ - __ret += (unsigned long) (__offset); \ - if (! request_region((__ret), (__size), (__name))) \ - __ret = 0UL; \ - (void __iomem *) __ret; \ -}) - -#define sbus_iounmap(__addr, __size) \ - release_region((unsigned long)(__addr), (__size)) - -/* - * Convert a physical pointer to a virtual kernel pointer for /dev/mem - * access - */ -#define xlate_dev_mem_ptr(p) __va(p) - -/* - * Convert a virtual cached pointer to an uncached pointer - */ -#define xlate_dev_kmem_ptr(p) p - -#endif - -#endif /* !(__SPARC64_IO_H) */ +#include <asm-sparc/io.h> diff --git a/include/asm-sparc64/iommu.h b/include/asm-sparc64/iommu.h index d7b9afcba08..76252bb85e9 100644 --- a/include/asm-sparc64/iommu.h +++ b/include/asm-sparc64/iommu.h @@ -1,62 +1 @@ -/* iommu.h: Definitions for the sun5 IOMMU. - * - * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) - */ -#ifndef _SPARC64_IOMMU_H -#define _SPARC64_IOMMU_H - -/* The format of an iopte in the page tables. */ -#define IOPTE_VALID 0x8000000000000000UL -#define IOPTE_64K 0x2000000000000000UL -#define IOPTE_STBUF 0x1000000000000000UL -#define IOPTE_INTRA 0x0800000000000000UL -#define IOPTE_CONTEXT 0x07ff800000000000UL -#define IOPTE_PAGE 0x00007fffffffe000UL -#define IOPTE_CACHE 0x0000000000000010UL -#define IOPTE_WRITE 0x0000000000000002UL - -#define IOMMU_NUM_CTXS 4096 - -struct iommu_arena { - unsigned long *map; - unsigned int hint; - unsigned int limit; -}; - -struct iommu { - spinlock_t lock; - struct iommu_arena arena; - void (*flush_all)(struct iommu *); - iopte_t *page_table; - u32 page_table_map_base; - unsigned long iommu_control; - unsigned long iommu_tsbbase; - unsigned long iommu_flush; - unsigned long iommu_flushinv; - unsigned long iommu_tags; - unsigned long iommu_ctxflush; - unsigned long write_complete_reg; - unsigned long dummy_page; - unsigned long dummy_page_pa; - unsigned long ctx_lowest_free; - DECLARE_BITMAP(ctx_bitmap, IOMMU_NUM_CTXS); - u32 dma_addr_mask; -}; - -struct strbuf { - int strbuf_enabled; - unsigned long strbuf_control; - unsigned long strbuf_pflush; - unsigned long strbuf_fsync; - unsigned long strbuf_ctxflush; - unsigned long strbuf_ctxmatch_base; - unsigned long strbuf_flushflag_pa; - volatile unsigned long *strbuf_flushflag; - volatile unsigned long __flushflag_buf[(64+(64-1)) / sizeof(long)]; -}; - -extern int iommu_table_init(struct iommu *iommu, int tsbsize, - u32 dma_offset, u32 dma_addr_mask, - int numa_node); - -#endif /* !(_SPARC64_IOMMU_H) */ +#include <asm-sparc/iommu.h> diff --git a/include/asm-sparc64/ipcbuf.h b/include/asm-sparc64/ipcbuf.h index 9c5bf1bc423..41dfaf1149b 100644 --- a/include/asm-sparc64/ipcbuf.h +++ b/include/asm-sparc64/ipcbuf.h @@ -1,28 +1 @@ -#ifndef _SPARC64_IPCBUF_H -#define _SPARC64_IPCBUF_H - -/* - * The ipc64_perm structure for sparc64 architecture. - * Note extra padding because this structure is passed back and forth - * between kernel and user space. - * - * Pad space is left for: - * - 32-bit seq - * - 2 miscellaneous 64-bit values - */ - -struct ipc64_perm -{ - __kernel_key_t key; - __kernel_uid_t uid; - __kernel_gid_t gid; - __kernel_uid_t cuid; - __kernel_gid_t cgid; - __kernel_mode_t mode; - unsigned short __pad1; - unsigned short seq; - unsigned long __unused1; - unsigned long __unused2; -}; - -#endif /* _SPARC64_IPCBUF_H */ +#include <asm-sparc/ipcbuf.h> diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h index 0bb9bf53174..b2102e65947 100644 --- a/include/asm-sparc64/irq.h +++ b/include/asm-sparc64/irq.h @@ -1,93 +1 @@ -/* irq.h: IRQ registers on the 64-bit Sparc. - * - * Copyright (C) 1996 David S. Miller (davem@davemloft.net) - * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz) - */ - -#ifndef _SPARC64_IRQ_H -#define _SPARC64_IRQ_H - -#include <linux/linkage.h> -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/interrupt.h> -#include <asm/pil.h> -#include <asm/ptrace.h> - -/* IMAP/ICLR register defines */ -#define IMAP_VALID 0x80000000UL /* IRQ Enabled */ -#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */ -#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */ -#define IMAP_TID_SHIFT 26 -#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */ -#define IMAP_AID_SHIFT 26 -#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */ -#define IMAP_NID_SHIFT 21 -#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */ -#define IMAP_INO 0x0000003fUL /* IRQ Number */ -#define IMAP_INR 0x000007ffUL /* Full interrupt number*/ - -#define ICLR_IDLE 0x00000000UL /* Idle state */ -#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */ -#define ICLR_PENDING 0x00000003UL /* Pending state */ - -/* The largest number of unique interrupt sources we support. - * If this needs to ever be larger than 255, you need to change - * the type of ino_bucket->virt_irq as appropriate. - * - * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq(). - */ -#define NR_IRQS 255 - -extern void irq_install_pre_handler(int virt_irq, - void (*func)(unsigned int, void *, void *), - void *arg1, void *arg2); -#define irq_canonicalize(irq) (irq) -extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap); -extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino); -extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino); -extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p, - unsigned int msi_devino_start, - unsigned int msi_devino_end); -extern void sun4v_destroy_msi(unsigned int virt_irq); -extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p, - unsigned int msi_devino_start, - unsigned int msi_devino_end, - unsigned long imap_base, - unsigned long iclr_base); -extern void sun4u_destroy_msi(unsigned int virt_irq); -extern unsigned int sbus_build_irq(void *sbus, unsigned int ino); - -extern unsigned char virt_irq_alloc(unsigned int dev_handle, - unsigned int dev_ino); -#ifdef CONFIG_PCI_MSI -extern void virt_irq_free(unsigned int virt_irq); -#endif - -extern void __init init_IRQ(void); -extern void fixup_irqs(void); - -static inline void set_softint(unsigned long bits) -{ - __asm__ __volatile__("wr %0, 0x0, %%set_softint" - : /* No outputs */ - : "r" (bits)); -} - -static inline void clear_softint(unsigned long bits) -{ - __asm__ __volatile__("wr %0, 0x0, %%clear_softint" - : /* No outputs */ - : "r" (bits)); -} - -static inline unsigned long get_softint(void) -{ - unsigned long retval; - - __asm__ __volatile__("rd %%softint, %0" - : "=r" (retval)); - return retval; -} - -#endif +#include <asm-sparc/irq.h> diff --git a/include/asm-sparc64/irqflags.h b/include/asm-sparc64/irqflags.h index 024fc54d068..27b091fc3fa 100644 --- a/include/asm-sparc64/irqflags.h +++ b/include/asm-sparc64/irqflags.h @@ -1,89 +1 @@ -/* - * include/asm-sparc64/irqflags.h - * - * IRQ flags handling - * - * This file gets included from lowlevel asm headers too, to provide - * wrapped versions of the local_irq_*() APIs, based on the - * raw_local_irq_*() functions from the lowlevel headers. - */ -#ifndef _ASM_IRQFLAGS_H -#define _ASM_IRQFLAGS_H - -#ifndef __ASSEMBLY__ - -static inline unsigned long __raw_local_save_flags(void) -{ - unsigned long flags; - - __asm__ __volatile__( - "rdpr %%pil, %0" - : "=r" (flags) - ); - - return flags; -} - -#define raw_local_save_flags(flags) \ - do { (flags) = __raw_local_save_flags(); } while (0) - -static inline void raw_local_irq_restore(unsigned long flags) -{ - __asm__ __volatile__( - "wrpr %0, %%pil" - : /* no output */ - : "r" (flags) - : "memory" - ); -} - -static inline void raw_local_irq_disable(void) -{ - __asm__ __volatile__( - "wrpr 15, %%pil" - : /* no outputs */ - : /* no inputs */ - : "memory" - ); -} - -static inline void raw_local_irq_enable(void) -{ - __asm__ __volatile__( - "wrpr 0, %%pil" - : /* no outputs */ - : /* no inputs */ - : "memory" - ); -} - -static inline int raw_irqs_disabled_flags(unsigned long flags) -{ - return (flags > 0); -} - -static inline int raw_irqs_disabled(void) -{ - unsigned long flags = __raw_local_save_flags(); - - return raw_irqs_disabled_flags(flags); -} - -/* - * For spinlocks, etc: - */ -static inline unsigned long __raw_local_irq_save(void) -{ - unsigned long flags = __raw_local_save_flags(); - - raw_local_irq_disable(); - - return flags; -} - -#define raw_local_irq_save(flags) \ - do { (flags) = __raw_local_irq_save(); } while (0) - -#endif /* (__ASSEMBLY__) */ - -#endif /* !(_ASM_IRQFLAGS_H) */ +#include <asm-sparc/irqflags.h> diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h index f905b773235..78cfd5d2749 100644 --- a/include/asm-sparc64/kdebug.h +++ b/include/asm-sparc64/kdebug.h @@ -1,19 +1 @@ -#ifndef _SPARC64_KDEBUG_H -#define _SPARC64_KDEBUG_H - -struct pt_regs; - -extern void bad_trap(struct pt_regs *, long); - -/* Grossly misnamed. */ -enum die_val { - DIE_OOPS = 1, - DIE_DEBUG, /* ta 0x70 */ - DIE_DEBUG_2, /* ta 0x71 */ - DIE_DIE, - DIE_TRAP, - DIE_TRAP_TL1, - DIE_CALL, -}; - -#endif +#include <asm-sparc/kdebug.h> diff --git a/include/asm-sparc64/mc146818rtc.h b/include/asm-sparc64/mc146818rtc.h index e9c0fcc25c6..97842e6ed1c 100644 --- a/include/asm-sparc64/mc146818rtc.h +++ b/include/asm-sparc64/mc146818rtc.h @@ -1,34 +1 @@ -/* - * Machine dependent access functions for RTC registers. - */ -#ifndef __ASM_SPARC64_MC146818RTC_H -#define __ASM_SPARC64_MC146818RTC_H - -#include <asm/io.h> - -#ifndef RTC_PORT -#ifdef CONFIG_PCI -extern unsigned long ds1287_regs; -#else -#define ds1287_regs (0UL) -#endif -#define RTC_PORT(x) (ds1287_regs + (x)) -#define RTC_ALWAYS_BCD 0 -#endif - -/* - * The yet supported machines all access the RTC index register via - * an ISA port access but the way to access the date register differs ... - */ -#define CMOS_READ(addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -inb_p(RTC_PORT(1)); \ -}) -#define CMOS_WRITE(val, addr) ({ \ -outb_p((addr),RTC_PORT(0)); \ -outb_p((val),RTC_PORT(1)); \ -}) - -#define RTC_IRQ 8 - -#endif /* __ASM_SPARC64_MC146818RTC_H */ +#include <asm-sparc/mc146818rtc.h> diff --git a/include/asm-sparc64/mmu.h b/include/asm-sparc64/mmu.h index 8abc58f0f9d..e677a64d8db 100644 --- a/include/asm-sparc64/mmu.h +++ b/include/asm-sparc64/mmu.h @@ -1,127 +1 @@ -#ifndef __MMU_H -#define __MMU_H - -#include <linux/const.h> -#include <asm/page.h> -#include <asm/hypervisor.h> - -#define CTX_NR_BITS 13 - -#define TAG_CONTEXT_BITS ((_AC(1,UL) << CTX_NR_BITS) - _AC(1,UL)) - -/* UltraSPARC-III+ and later have a feature whereby you can - * select what page size the various Data-TLB instances in the - * chip. In order to gracefully support this, we put the version - * field in a spot outside of the areas of the context register - * where this parameter is specified. - */ -#define CTX_VERSION_SHIFT 22 -#define CTX_VERSION_MASK ((~0UL) << CTX_VERSION_SHIFT) - -#define CTX_PGSZ_8KB _AC(0x0,UL) -#define CTX_PGSZ_64KB _AC(0x1,UL) -#define CTX_PGSZ_512KB _AC(0x2,UL) -#define CTX_PGSZ_4MB _AC(0x3,UL) -#define CTX_PGSZ_BITS _AC(0x7,UL) -#define CTX_PGSZ0_NUC_SHIFT 61 -#define CTX_PGSZ1_NUC_SHIFT 58 -#define CTX_PGSZ0_SHIFT 16 -#define CTX_PGSZ1_SHIFT 19 -#define CTX_PGSZ_MASK ((CTX_PGSZ_BITS << CTX_PGSZ0_SHIFT) | \ - (CTX_PGSZ_BITS << CTX_PGSZ1_SHIFT)) - -#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) -#define CTX_PGSZ_BASE CTX_PGSZ_8KB -#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) -#define CTX_PGSZ_BASE CTX_PGSZ_64KB -#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) -#define CTX_PGSZ_BASE CTX_PGSZ_512KB -#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) -#define CTX_PGSZ_BASE CTX_PGSZ_4MB -#else -#error No page size specified in kernel configuration -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define CTX_PGSZ_HUGE CTX_PGSZ_4MB -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define CTX_PGSZ_HUGE CTX_PGSZ_512KB -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define CTX_PGSZ_HUGE CTX_PGSZ_64KB -#endif - -#define CTX_PGSZ_KERN CTX_PGSZ_4MB - -/* Thus, when running on UltraSPARC-III+ and later, we use the following - * PRIMARY_CONTEXT register values for the kernel context. - */ -#define CTX_CHEETAH_PLUS_NUC \ - ((CTX_PGSZ_KERN << CTX_PGSZ0_NUC_SHIFT) | \ - (CTX_PGSZ_BASE << CTX_PGSZ1_NUC_SHIFT)) - -#define CTX_CHEETAH_PLUS_CTX0 \ - ((CTX_PGSZ_KERN << CTX_PGSZ0_SHIFT) | \ - (CTX_PGSZ_BASE << CTX_PGSZ1_SHIFT)) - -/* If you want "the TLB context number" use CTX_NR_MASK. If you - * want "the bits I program into the context registers" use - * CTX_HW_MASK. - */ -#define CTX_NR_MASK TAG_CONTEXT_BITS -#define CTX_HW_MASK (CTX_NR_MASK | CTX_PGSZ_MASK) - -#define CTX_FIRST_VERSION ((_AC(1,UL) << CTX_VERSION_SHIFT) + _AC(1,UL)) -#define CTX_VALID(__ctx) \ - (!(((__ctx.sparc64_ctx_val) ^ tlb_context_cache) & CTX_VERSION_MASK)) -#define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) -#define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) - -#ifndef __ASSEMBLY__ - -#define TSB_ENTRY_ALIGNMENT 16 - -struct tsb { - unsigned long tag; - unsigned long pte; -} __attribute__((aligned(TSB_ENTRY_ALIGNMENT))); - -extern void __tsb_insert(unsigned long ent, unsigned long tag, unsigned long pte); -extern void tsb_flush(unsigned long ent, unsigned long tag); -extern void tsb_init(struct tsb *tsb, unsigned long size); - -struct tsb_config { - struct tsb *tsb; - unsigned long tsb_rss_limit; - unsigned long tsb_nentries; - unsigned long tsb_reg_val; - unsigned long tsb_map_vaddr; - unsigned long tsb_map_pte; -}; - -#define MM_TSB_BASE 0 - -#ifdef CONFIG_HUGETLB_PAGE -#define MM_TSB_HUGE 1 -#define MM_NUM_TSBS 2 -#else -#define MM_NUM_TSBS 1 -#endif - -typedef struct { - spinlock_t lock; - unsigned long sparc64_ctx_val; - unsigned long huge_pte_count; - struct tsb_config tsb_block[MM_NUM_TSBS]; - struct hv_tsb_descr tsb_descr[MM_NUM_TSBS]; -} mm_context_t; - -#endif /* !__ASSEMBLY__ */ - -#define TSB_CONFIG_TSB 0x00 -#define TSB_CONFIG_RSS_LIMIT 0x08 -#define TSB_CONFIG_NENTRIES 0x10 -#define TSB_CONFIG_REG_VAL 0x18 -#define TSB_CONFIG_MAP_VADDR 0x20 -#define TSB_CONFIG_MAP_PTE 0x28 - -#endif /* __MMU_H */ +#include <asm-sparc/mmu.h> diff --git a/include/asm-sparc64/mmu_context.h b/include/asm-sparc64/mmu_context.h index 5693ab48260..877fee94bd4 100644 --- a/include/asm-sparc64/mmu_context.h +++ b/include/asm-sparc64/mmu_context.h @@ -1,155 +1 @@ -#ifndef __SPARC64_MMU_CONTEXT_H -#define __SPARC64_MMU_CONTEXT_H - -/* Derived heavily from Linus's Alpha/AXP ASN code... */ - -#ifndef __ASSEMBLY__ - -#include <linux/spinlock.h> -#include <asm/system.h> -#include <asm/spitfire.h> -#include <asm-generic/mm_hooks.h> - -static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) -{ -} - -extern spinlock_t ctx_alloc_lock; -extern unsigned long tlb_context_cache; -extern unsigned long mmu_context_bmap[]; - -extern void get_new_mmu_context(struct mm_struct *mm); -#ifdef CONFIG_SMP -extern void smp_new_mmu_context_version(void); -#else -#define smp_new_mmu_context_version() do { } while (0) -#endif - -extern int init_new_context(struct task_struct *tsk, struct mm_struct *mm); -extern void destroy_context(struct mm_struct *mm); - -extern void __tsb_context_switch(unsigned long pgd_pa, - struct tsb_config *tsb_base, - struct tsb_config *tsb_huge, - unsigned long tsb_descr_pa); - -static inline void tsb_context_switch(struct mm_struct *mm) -{ - __tsb_context_switch(__pa(mm->pgd), - &mm->context.tsb_block[0], -#ifdef CONFIG_HUGETLB_PAGE - (mm->context.tsb_block[1].tsb ? - &mm->context.tsb_block[1] : - NULL) -#else - NULL -#endif - , __pa(&mm->context.tsb_descr[0])); -} - -extern void tsb_grow(struct mm_struct *mm, unsigned long tsb_index, unsigned long mm_rss); -#ifdef CONFIG_SMP -extern void smp_tsb_sync(struct mm_struct *mm); -#else -#define smp_tsb_sync(__mm) do { } while (0) -#endif - -/* Set MMU context in the actual hardware. */ -#define load_secondary_context(__mm) \ - __asm__ __volatile__( \ - "\n661: stxa %0, [%1] %2\n" \ - " .section .sun4v_1insn_patch, \"ax\"\n" \ - " .word 661b\n" \ - " stxa %0, [%1] %3\n" \ - " .previous\n" \ - " flush %%g6\n" \ - : /* No outputs */ \ - : "r" (CTX_HWBITS((__mm)->context)), \ - "r" (SECONDARY_CONTEXT), "i" (ASI_DMMU), "i" (ASI_MMU)) - -extern void __flush_tlb_mm(unsigned long, unsigned long); - -/* Switch the current MM context. Interrupts are disabled. */ -static inline void switch_mm(struct mm_struct *old_mm, struct mm_struct *mm, struct task_struct *tsk) -{ - unsigned long ctx_valid, flags; - int cpu; - - if (unlikely(mm == &init_mm)) - return; - - spin_lock_irqsave(&mm->context.lock, flags); - ctx_valid = CTX_VALID(mm->context); - if (!ctx_valid) - get_new_mmu_context(mm); - - /* We have to be extremely careful here or else we will miss - * a TSB grow if we switch back and forth between a kernel - * thread and an address space which has it's TSB size increased - * on another processor. - * - * It is possible to play some games in order to optimize the - * switch, but the safest thing to do is to unconditionally - * perform the secondary context load and the TSB context switch. - * - * For reference the bad case is, for address space "A": - * - * CPU 0 CPU 1 - * run address space A - * set cpu0's bits in cpu_vm_mask - * switch to kernel thread, borrow - * address space A via entry_lazy_tlb - * run address space A - * set cpu1's bit in cpu_vm_mask - * flush_tlb_pending() - * reset cpu_vm_mask to just cpu1 - * TSB grow - * run address space A - * context was valid, so skip - * TSB context switch - * - * At that point cpu0 continues to use a stale TSB, the one from - * before the TSB grow performed on cpu1. cpu1 did not cross-call - * cpu0 to update it's TSB because at that point the cpu_vm_mask - * only had cpu1 set in it. - */ - load_secondary_context(mm); - tsb_context_switch(mm); - - /* Any time a processor runs a context on an address space - * for the first time, we must flush that context out of the - * local TLB. - */ - cpu = smp_processor_id(); - if (!ctx_valid || !cpu_isset(cpu, mm->cpu_vm_mask)) { - cpu_set(cpu, mm->cpu_vm_mask); - __flush_tlb_mm(CTX_HWBITS(mm->context), - SECONDARY_CONTEXT); - } - spin_unlock_irqrestore(&mm->context.lock, flags); -} - -#define deactivate_mm(tsk,mm) do { } while (0) - -/* Activate a new MM instance for the current task. */ -static inline void activate_mm(struct mm_struct *active_mm, struct mm_struct *mm) -{ - unsigned long flags; - int cpu; - - spin_lock_irqsave(&mm->context.lock, flags); - if (!CTX_VALID(mm->context)) - get_new_mmu_context(mm); - cpu = smp_processor_id(); - if (!cpu_isset(cpu, mm->cpu_vm_mask)) - cpu_set(cpu, mm->cpu_vm_mask); - - load_secondary_context(mm); - __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT); - tsb_context_switch(mm); - spin_unlock_irqrestore(&mm->context.lock, flags); -} - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_MMU_CONTEXT_H) */ +#include <asm-sparc/mmu_context.h> diff --git a/include/asm-sparc64/module.h b/include/asm-sparc64/module.h index 3d77ba46578..a9606db55e4 100644 --- a/include/asm-sparc64/module.h +++ b/include/asm-sparc64/module.h @@ -1,7 +1 @@ -#ifndef _ASM_SPARC64_MODULE_H -#define _ASM_SPARC64_MODULE_H -struct mod_arch_specific { }; -#define Elf_Shdr Elf64_Shdr -#define Elf_Sym Elf64_Sym -#define Elf_Ehdr Elf64_Ehdr -#endif /* _ASM_SPARC64_MODULE_H */ +#include <asm-sparc/module.h> diff --git a/include/asm-sparc64/mostek.h b/include/asm-sparc64/mostek.h index c5652de2ace..95a752f7e87 100644 --- a/include/asm-sparc64/mostek.h +++ b/include/asm-sparc64/mostek.h @@ -1,143 +1 @@ -/* mostek.h: Describes the various Mostek time of day clock registers. - * - * Copyright (C) 1995 David S. Miller (davem@davemloft.net) - * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) - */ - -#ifndef _SPARC64_MOSTEK_H -#define _SPARC64_MOSTEK_H - -#include <asm/idprom.h> - -/* M48T02 Register Map (adapted from Sun NVRAM/Hostid FAQ) - * - * Data - * Address Function - * Bit 7 Bit 6 Bit 5 Bit 4Bit 3 Bit 2 Bit 1 Bit 0 - * 7ff - - - - - - - - Year 00-99 - * 7fe 0 0 0 - - - - - Month 01-12 - * 7fd 0 0 - - - - - - Date 01-31 - * 7fc 0 FT 0 0 0 - - - Day 01-07 - * 7fb KS 0 - - - - - - Hours 00-23 - * 7fa 0 - - - - - - - Minutes 00-59 - * 7f9 ST - - - - - - - Seconds 00-59 - * 7f8 W R S - - - - - Control - * - * * ST is STOP BIT - * * W is WRITE BIT - * * R is READ BIT - * * S is SIGN BIT - * * FT is FREQ TEST BIT - * * KS is KICK START BIT - */ - -/* The Mostek 48t02 real time clock and NVRAM chip. The registers - * other than the control register are in binary coded decimal. Some - * control bits also live outside the control register. - * - * We now deal with physical addresses for I/O to the chip. -DaveM - */ -static inline u8 mostek_read(void __iomem *addr) -{ - u8 ret; - - __asm__ __volatile__("lduba [%1] %2, %0" - : "=r" (ret) - : "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); - return ret; -} - -static inline void mostek_write(void __iomem *addr, u8 val) -{ - __asm__ __volatile__("stba %0, [%1] %2" - : /* no outputs */ - : "r" (val), "r" (addr), "i" (ASI_PHYS_BYPASS_EC_E)); -} - -#define MOSTEK_EEPROM 0x0000UL -#define MOSTEK_IDPROM 0x07d8UL -#define MOSTEK_CREG 0x07f8UL -#define MOSTEK_SEC 0x07f9UL -#define MOSTEK_MIN 0x07faUL -#define MOSTEK_HOUR 0x07fbUL -#define MOSTEK_DOW 0x07fcUL -#define MOSTEK_DOM 0x07fdUL -#define MOSTEK_MONTH 0x07feUL -#define MOSTEK_YEAR 0x07ffUL - -extern spinlock_t mostek_lock; -extern void __iomem *mstk48t02_regs; - -/* Control register values. */ -#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */ -#define MSTK_CREG_READ 0x40 /* Stop updates to allow a clean read. */ -#define MSTK_CREG_SIGN 0x20 /* Slow/speed clock in calibration mode. */ - -/* Control bits that live in the other registers. */ -#define MSTK_STOP 0x80 /* Stop the clock oscillator. (sec) */ -#define MSTK_KICK_START 0x80 /* Kick start the clock chip. (hour) */ -#define MSTK_FREQ_TEST 0x40 /* Frequency test mode. (day) */ - -#define MSTK_YEAR_ZERO 1968 /* If year reg has zero, it is 1968. */ -#define MSTK_CVT_YEAR(yr) ((yr) + MSTK_YEAR_ZERO) - -/* Masks that define how much space each value takes up. */ -#define MSTK_SEC_MASK 0x7f -#define MSTK_MIN_MASK 0x7f -#define MSTK_HOUR_MASK 0x3f -#define MSTK_DOW_MASK 0x07 -#define MSTK_DOM_MASK 0x3f -#define MSTK_MONTH_MASK 0x1f -#define MSTK_YEAR_MASK 0xffU - -/* Binary coded decimal conversion macros. */ -#define MSTK_REGVAL_TO_DECIMAL(x) (((x) & 0x0F) + 0x0A * ((x) >> 0x04)) -#define MSTK_DECIMAL_TO_REGVAL(x) ((((x) / 0x0A) << 0x04) + ((x) % 0x0A)) - -/* Generic register set and get macros for internal use. */ -#define MSTK_GET(regs,name) \ - (MSTK_REGVAL_TO_DECIMAL(mostek_read(regs + MOSTEK_ ## name) & MSTK_ ## name ## _MASK)) -#define MSTK_SET(regs,name,value) \ -do { u8 __val = mostek_read(regs + MOSTEK_ ## name); \ - __val &= ~(MSTK_ ## name ## _MASK); \ - __val |= (MSTK_DECIMAL_TO_REGVAL(value) & \ - (MSTK_ ## name ## _MASK)); \ - mostek_write(regs + MOSTEK_ ## name, __val); \ -} while(0) - -/* Macros to make register access easier on our fingers. These give you - * the decimal value of the register requested if applicable. You pass - * the a pointer to a 'struct mostek48t02'. - */ -#define MSTK_REG_CREG(regs) (mostek_read((regs) + MOSTEK_CREG)) -#define MSTK_REG_SEC(regs) MSTK_GET(regs,SEC) -#define MSTK_REG_MIN(regs) MSTK_GET(regs,MIN) -#define MSTK_REG_HOUR(regs) MSTK_GET(regs,HOUR) -#define MSTK_REG_DOW(regs) MSTK_GET(regs,DOW) -#define MSTK_REG_DOM(regs) MSTK_GET(regs,DOM) -#define MSTK_REG_MONTH(regs) MSTK_GET(regs,MONTH) -#define MSTK_REG_YEAR(regs) MSTK_GET(regs,YEAR) - -#define MSTK_SET_REG_SEC(regs,value) MSTK_SET(regs,SEC,value) -#define MSTK_SET_REG_MIN(regs,value) MSTK_SET(regs,MIN,value) -#define MSTK_SET_REG_HOUR(regs,value) MSTK_SET(regs,HOUR,value) -#define MSTK_SET_REG_DOW(regs,value) MSTK_SET(regs,DOW,value) -#define MSTK_SET_REG_DOM(regs,value) MSTK_SET(regs,DOM,value) -#define MSTK_SET_REG_MONTH(regs,value) MSTK_SET(regs,MONTH,value) -#define MSTK_SET_REG_YEAR(regs,value) MSTK_SET(regs,YEAR,value) - - -/* The Mostek 48t08 clock chip. Found on Sun4m's I think. It has the - * same (basically) layout of the 48t02 chip except for the extra - * NVRAM on board (8 KB against the 48t02's 2 KB). - */ -#define MOSTEK_48T08_OFFSET 0x0000UL /* Lower NVRAM portions */ -#define MOSTEK_48T08_48T02 0x1800UL /* Offset to 48T02 chip */ - -/* SUN5 systems usually have 48t59 model clock chipsets. But we keep the older - * clock chip definitions around just in case. - */ -#define MOSTEK_48T59_OFFSET 0x0000UL /* Lower NVRAM portions */ -#define MOSTEK_48T59_48T02 0x1800UL /* Offset to 48T02 chip */ - -#endif /* !(_SPARC64_MOSTEK_H) */ +#include <asm-sparc/mostek.h> diff --git a/include/asm-sparc64/namei.h b/include/asm-sparc64/namei.h index cbc1b4c0689..1344a910ba2 100644 --- a/include/asm-sparc64/namei.h +++ b/include/asm-sparc64/namei.h @@ -1,13 +1 @@ -/* - * linux/include/asm-sparc64/namei.h - * - * Routines to handle famous /usr/gnemul/s*. - * Included from linux/fs/namei.c - */ - -#ifndef __SPARC64_NAMEI_H -#define __SPARC64_NAMEI_H - -#define __emul_prefix() NULL - -#endif /* __SPARC64_NAMEI_H */ +#include <asm-sparc/namei.h> diff --git a/include/asm-sparc64/of_platform.h b/include/asm-sparc64/of_platform.h index 78aa032b674..f7c427b8bc6 100644 --- a/include/asm-sparc64/of_platform.h +++ b/include/asm-sparc64/of_platform.h @@ -1,25 +1 @@ -#ifndef _ASM_SPARC64_OF_PLATFORM_H -#define _ASM_SPARC64_OF_PLATFORM_H -/* - * Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp. - * <benh@kernel.crashing.org> - * Modified for Sparc by merging parts of asm-sparc/of_device.h - * by Stephen Rothwell - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - */ - -/* This is just here during the transition */ -#include <linux/of_platform.h> - -extern struct bus_type isa_bus_type; -extern struct bus_type ebus_bus_type; -extern struct bus_type sbus_bus_type; - -#define of_bus_type of_platform_bus_type /* for compatibility */ - -#endif /* _ASM_SPARC64_OF_PLATFORM_H */ +#include <asm-sparc/of_platform.h> diff --git a/include/asm-sparc64/openprom.h b/include/asm-sparc64/openprom.h index b69e4a8c917..acf4b234fae 100644 --- a/include/asm-sparc64/openprom.h +++ b/include/asm-sparc64/openprom.h @@ -1,280 +1 @@ -#ifndef __SPARC64_OPENPROM_H -#define __SPARC64_OPENPROM_H - -/* openprom.h: Prom structures and defines for access to the OPENBOOT - * prom routines and data areas. - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASSEMBLY__ -/* V0 prom device operations. */ -struct linux_dev_v0_funcs { - int (*v0_devopen)(char *device_str); - int (*v0_devclose)(int dev_desc); - int (*v0_rdblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrblkdev)(int dev_desc, int num_blks, int blk_st, char *buf); - int (*v0_wrnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdnetdev)(int dev_desc, int num_bytes, char *buf); - int (*v0_rdchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_wrchardev)(int dev_desc, int num_bytes, int dummy, char *buf); - int (*v0_seekdev)(int dev_desc, long logical_offst, int from); -}; - -/* V2 and later prom device operations. */ -struct linux_dev_v2_funcs { - int (*v2_inst2pkg)(int d); /* Convert ihandle to phandle */ - char * (*v2_dumb_mem_alloc)(char *va, unsigned sz); - void (*v2_dumb_mem_free)(char *va, unsigned sz); - - /* To map devices into virtual I/O space. */ - char * (*v2_dumb_mmap)(char *virta, int which_io, unsigned paddr, unsigned sz); - void (*v2_dumb_munmap)(char *virta, unsigned size); - - int (*v2_dev_open)(char *devpath); - void (*v2_dev_close)(int d); - int (*v2_dev_read)(int d, char *buf, int nbytes); - int (*v2_dev_write)(int d, char *buf, int nbytes); - int (*v2_dev_seek)(int d, int hi, int lo); - - /* Never issued (multistage load support) */ - void (*v2_wheee2)(void); - void (*v2_wheee3)(void); -}; - -struct linux_mlist_v0 { - struct linux_mlist_v0 *theres_more; - unsigned start_adr; - unsigned num_bytes; -}; - -struct linux_mem_v0 { - struct linux_mlist_v0 **v0_totphys; - struct linux_mlist_v0 **v0_prommap; - struct linux_mlist_v0 **v0_available; /* What we can use */ -}; - -/* Arguments sent to the kernel from the boot prompt. */ -struct linux_arguments_v0 { - char *argv[8]; - char args[100]; - char boot_dev[2]; - int boot_dev_ctrl; - int boot_dev_unit; - int dev_partition; - char *kernel_file_name; - void *aieee1; /* XXX */ -}; - -/* V2 and up boot things. */ -struct linux_bootargs_v2 { - char **bootpath; - char **bootargs; - int *fd_stdin; - int *fd_stdout; -}; - -/* The top level PROM vector. */ -struct linux_romvec { - /* Version numbers. */ - unsigned int pv_magic_cookie; - unsigned int pv_romvers; - unsigned int pv_plugin_revision; - unsigned int pv_printrev; - - /* Version 0 memory descriptors. */ - struct linux_mem_v0 pv_v0mem; - - /* Node operations. */ - struct linux_nodeops *pv_nodeops; - - char **pv_bootstr; - struct linux_dev_v0_funcs pv_v0devops; - - char *pv_stdin; - char *pv_stdout; -#define PROMDEV_KBD 0 /* input from keyboard */ -#define PROMDEV_SCREEN 0 /* output to screen */ -#define PROMDEV_TTYA 1 /* in/out to ttya */ -#define PROMDEV_TTYB 2 /* in/out to ttyb */ - - /* Blocking getchar/putchar. NOT REENTRANT! (grr) */ - int (*pv_getchar)(void); - void (*pv_putchar)(int ch); - - /* Non-blocking variants. */ - int (*pv_nbgetchar)(void); - int (*pv_nbputchar)(int ch); - - void (*pv_putstr)(char *str, int len); - - /* Miscellany. */ - void (*pv_reboot)(char *bootstr); - void (*pv_printf)(__const__ char *fmt, ...); - void (*pv_abort)(void); - __volatile__ int *pv_ticks; - void (*pv_halt)(void); - void (**pv_synchook)(void); - - /* Evaluate a forth string, not different proto for V0 and V2->up. */ - union { - void (*v0_eval)(int len, char *str); - void (*v2_eval)(char *str); - } pv_fortheval; - - struct linux_arguments_v0 **pv_v0bootargs; - - /* Get ether address. */ - unsigned int (*pv_enaddr)(int d, char *enaddr); - - struct linux_bootargs_v2 pv_v2bootargs; - struct linux_dev_v2_funcs pv_v2devops; - - int filler[15]; - - /* This one is sun4c/sun4 only. */ - void (*pv_setctxt)(int ctxt, char *va, int pmeg); - - /* Prom version 3 Multiprocessor routines. This stuff is crazy. - * No joke. Calling these when there is only one cpu probably - * crashes the machine, have to test this. :-) - */ - - /* v3_cpustart() will start the cpu 'whichcpu' in mmu-context - * 'thiscontext' executing at address 'prog_counter' - */ - int (*v3_cpustart)(unsigned int whichcpu, int ctxtbl_ptr, - int thiscontext, char *prog_counter); - - /* v3_cpustop() will cause cpu 'whichcpu' to stop executing - * until a resume cpu call is made. - */ - int (*v3_cpustop)(unsigned int whichcpu); - - /* v3_cpuidle() will idle cpu 'whichcpu' until a stop or - * resume cpu call is made. - */ - int (*v3_cpuidle)(unsigned int whichcpu); - - /* v3_cpuresume() will resume processor 'whichcpu' executing - * starting with whatever 'pc' and 'npc' were left at the - * last 'idle' or 'stop' call. - */ - int (*v3_cpuresume)(unsigned int whichcpu); -}; - -/* Routines for traversing the prom device tree. */ -struct linux_nodeops { - int (*no_nextnode)(int node); - int (*no_child)(int node); - int (*no_proplen)(int node, char *name); - int (*no_getprop)(int node, char *name, char *val); - int (*no_setprop)(int node, char *name, char *val, int len); - char * (*no_nextprop)(int node, char *name); -}; - -/* More fun PROM structures for device probing. */ -#define PROMREG_MAX 24 -#define PROMVADDR_MAX 16 -#define PROMINTR_MAX 32 - -struct linux_prom_registers { - unsigned which_io; /* hi part of physical address */ - unsigned phys_addr; /* The physical address of this register */ - int reg_size; /* How many bytes does this register take up? */ -}; - -struct linux_prom64_registers { - unsigned long phys_addr; - unsigned long reg_size; -}; - -struct linux_prom_irqs { - int pri; /* IRQ priority */ - int vector; /* This is foobar, what does it do? */ -}; - -/* Element of the "ranges" vector */ -struct linux_prom_ranges { - unsigned int ot_child_space; - unsigned int ot_child_base; /* Bus feels this */ - unsigned int ot_parent_space; - unsigned int ot_parent_base; /* CPU looks from here */ - unsigned int or_size; -}; - -struct linux_prom64_ranges { - unsigned long ot_child_base; /* Bus feels this */ - unsigned long ot_parent_base; /* CPU looks from here */ - unsigned long or_size; -}; - -/* Ranges and reg properties are a bit different for PCI. */ -struct linux_prom_pci_registers { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_ranges { - unsigned int child_phys_hi; /* Only certain bits are encoded here. */ - unsigned int child_phys_mid; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_lo; - - unsigned int size_hi; - unsigned int size_lo; -}; - -struct linux_prom_pci_intmap { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - - unsigned int interrupt; - - int cnode; - unsigned int cinterrupt; -}; - -struct linux_prom_pci_intmask { - unsigned int phys_hi; - unsigned int phys_mid; - unsigned int phys_lo; - unsigned int interrupt; -}; - -struct linux_prom_ebus_ranges { - unsigned int child_phys_hi; - unsigned int child_phys_lo; - - unsigned int parent_phys_hi; - unsigned int parent_phys_mid; - unsigned int parent_phys_lo; - - unsigned int size; -}; - -struct linux_prom_ebus_intmap { - unsigned int phys_hi; - unsigned int phys_lo; - - unsigned int interrupt; - - int cnode; - unsigned int cinterrupt; -}; - -struct linux_prom_ebus_intmask { - unsigned int phys_hi; - unsigned int phys_lo; - unsigned int interrupt; -}; -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_OPENPROM_H) */ +#include <asm-sparc/openprom.h> diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h index 55c5bb27e4d..d93e44e6351 100644 --- a/include/asm-sparc64/oplib.h +++ b/include/asm-sparc64/oplib.h @@ -1,322 +1 @@ -/* oplib.h: Describes the interface and available routines in the - * Linux Prom library. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * Copyright (C) 1996 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef __SPARC64_OPLIB_H -#define __SPARC64_OPLIB_H - -#include <asm/openprom.h> - -/* OBP version string. */ -extern char prom_version[]; - -/* Root node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_root_node; - -/* PROM stdin and stdout */ -extern int prom_stdin, prom_stdout; - -/* /chosen node of the prom device tree, this stays constant after - * initialization is complete. - */ -extern int prom_chosen_node; - -/* Helper values and strings in arch/sparc64/kernel/head.S */ -extern const char prom_peer_name[]; -extern const char prom_compatible_name[]; -extern const char prom_root_compatible[]; -extern const char prom_cpu_compatible[]; -extern const char prom_finddev_name[]; -extern const char prom_chosen_path[]; -extern const char prom_cpu_path[]; -extern const char prom_getprop_name[]; -extern const char prom_mmu_name[]; -extern const char prom_callmethod_name[]; -extern const char prom_translate_name[]; -extern const char prom_map_name[]; -extern const char prom_unmap_name[]; -extern int prom_mmu_ihandle_cache; -extern unsigned int prom_boot_mapped_pc; -extern unsigned int prom_boot_mapping_mode; -extern unsigned long prom_boot_mapping_phys_high, prom_boot_mapping_phys_low; - -struct linux_mlist_p1275 { - struct linux_mlist_p1275 *theres_more; - unsigned long start_adr; - unsigned long num_bytes; -}; - -struct linux_mem_p1275 { - struct linux_mlist_p1275 **p1275_totphys; - struct linux_mlist_p1275 **p1275_prommap; - struct linux_mlist_p1275 **p1275_available; /* What we can use */ -}; - -/* The functions... */ - -/* You must call prom_init() before using any of the library services, - * preferably as early as possible. Pass it the romvec pointer. - */ -extern void prom_init(void *cif_handler, void *cif_stack); - -/* Boot argument acquisition, returns the boot command line string. */ -extern char *prom_getbootargs(void); - -/* Device utilities. */ - -/* Device operations. */ - -/* Open the device described by the passed string. Note, that the format - * of the string is different on V0 vs. V2->higher proms. The caller must - * know what he/she is doing! Returns the device descriptor, an int. - */ -extern int prom_devopen(const char *device_string); - -/* Close a previously opened device described by the passed integer - * descriptor. - */ -extern int prom_devclose(int device_handle); - -/* Do a seek operation on the device described by the passed integer - * descriptor. - */ -extern void prom_seek(int device_handle, unsigned int seek_hival, - unsigned int seek_lowval); - -/* Miscellaneous routines, don't really fit in any category per se. */ - -/* Reboot the machine with the command line passed. */ -extern void prom_reboot(const char *boot_command); - -/* Evaluate the forth string passed. */ -extern void prom_feval(const char *forth_string); - -/* Enter the prom, with possibility of continuation with the 'go' - * command in newer proms. - */ -extern void prom_cmdline(void); - -/* Enter the prom, with no chance of continuation for the stand-alone - * which calls this. - */ -extern void prom_halt(void) __attribute__ ((noreturn)); - -/* Halt and power-off the machine. */ -extern void prom_halt_power_off(void) __attribute__ ((noreturn)); - -/* Set the PROM 'sync' callback function to the passed function pointer. - * When the user gives the 'sync' command at the prom prompt while the - * kernel is still active, the prom will call this routine. - * - */ -typedef int (*callback_func_t)(long *cmd); -extern void prom_setcallback(callback_func_t func_ptr); - -/* Acquire the IDPROM of the root node in the prom device tree. This - * gets passed a buffer where you would like it stuffed. The return value - * is the format type of this idprom or 0xff on error. - */ -extern unsigned char prom_get_idprom(char *idp_buffer, int idpbuf_size); - -/* Character operations to/from the console.... */ - -/* Non-blocking get character from console. */ -extern int prom_nbgetchar(void); - -/* Non-blocking put character to console. */ -extern int prom_nbputchar(char character); - -/* Blocking get character from console. */ -extern char prom_getchar(void); - -/* Blocking put character to console. */ -extern void prom_putchar(char character); - -/* Prom's internal routines, don't use in kernel/boot code. */ -extern void prom_printf(const char *fmt, ...); -extern void prom_write(const char *buf, unsigned int len); - -/* Multiprocessor operations... */ -#ifdef CONFIG_SMP -/* Start the CPU with the given device tree node at the passed program - * counter with the given arg passed in via register %o0. - */ -extern void prom_startcpu(int cpunode, unsigned long pc, unsigned long arg); - -/* Start the CPU with the given cpu ID at the passed program - * counter with the given arg passed in via register %o0. - */ -extern void prom_startcpu_cpuid(int cpuid, unsigned long pc, unsigned long arg); - -/* Stop the CPU with the given cpu ID. */ -extern void prom_stopcpu_cpuid(int cpuid); - -/* Stop the current CPU. */ -extern void prom_stopself(void); - -/* Idle the current CPU. */ -extern void prom_idleself(void); - -/* Resume the CPU with the passed device tree node. */ -extern void prom_resumecpu(int cpunode); -#endif - -/* Power management interfaces. */ - -/* Put the current CPU to sleep. */ -extern void prom_sleepself(void); - -/* Put the entire system to sleep. */ -extern int prom_sleepsystem(void); - -/* Initiate a wakeup event. */ -extern int prom_wakeupsystem(void); - -/* MMU and memory related OBP interfaces. */ - -/* Get unique string identifying SIMM at given physical address. */ -extern int prom_getunumber(int syndrome_code, - unsigned long phys_addr, - char *buf, int buflen); - -/* Retain physical memory to the caller across soft resets. */ -extern unsigned long prom_retain(const char *name, - unsigned long pa_low, unsigned long pa_high, - long size, long align); - -/* Load explicit I/D TLB entries into the calling processor. */ -extern long prom_itlb_load(unsigned long index, - unsigned long tte_data, - unsigned long vaddr); - -extern long prom_dtlb_load(unsigned long index, - unsigned long tte_data, - unsigned long vaddr); - -/* Map/Unmap client program address ranges. First the format of - * the mapping mode argument. - */ -#define PROM_MAP_WRITE 0x0001 /* Writable */ -#define PROM_MAP_READ 0x0002 /* Readable - sw */ -#define PROM_MAP_EXEC 0x0004 /* Executable - sw */ -#define PROM_MAP_LOCKED 0x0010 /* Locked, use i/dtlb load calls for this instead */ -#define PROM_MAP_CACHED 0x0020 /* Cacheable in both L1 and L2 caches */ -#define PROM_MAP_SE 0x0040 /* Side-Effects */ -#define PROM_MAP_GLOB 0x0080 /* Global */ -#define PROM_MAP_IE 0x0100 /* Invert-Endianness */ -#define PROM_MAP_DEFAULT (PROM_MAP_WRITE | PROM_MAP_READ | PROM_MAP_EXEC | PROM_MAP_CACHED) - -extern int prom_map(int mode, unsigned long size, - unsigned long vaddr, unsigned long paddr); -extern void prom_unmap(unsigned long size, unsigned long vaddr); - - -/* PROM device tree traversal functions... */ - -#ifdef PROMLIB_INTERNAL - -/* Internal version of prom_getchild. */ -extern int __prom_getchild(int parent_node); - -/* Internal version of prom_getsibling. */ -extern int __prom_getsibling(int node); - -#endif - -/* Get the child node of the given node, or zero if no child exists. */ -extern int prom_getchild(int parent_node); - -/* Get the next sibling node of the given node, or zero if no further - * siblings exist. - */ -extern int prom_getsibling(int node); - -/* Get the length, at the passed node, of the given property type. - * Returns -1 on error (ie. no such property at this node). - */ -extern int prom_getproplen(int thisnode, const char *property); - -/* Fetch the requested property using the given buffer. Returns - * the number of bytes the prom put into your buffer or -1 on error. - */ -extern int prom_getproperty(int thisnode, const char *property, - char *prop_buffer, int propbuf_size); - -/* Acquire an integer property. */ -extern int prom_getint(int node, const char *property); - -/* Acquire an integer property, with a default value. */ -extern int prom_getintdefault(int node, const char *property, int defval); - -/* Acquire a boolean property, 0=FALSE 1=TRUE. */ -extern int prom_getbool(int node, const char *prop); - -/* Acquire a string property, null string on error. */ -extern void prom_getstring(int node, const char *prop, char *buf, int bufsize); - -/* Does the passed node have the given "name"? YES=1 NO=0 */ -extern int prom_nodematch(int thisnode, const char *name); - -/* Search all siblings starting at the passed node for "name" matching - * the given string. Returns the node on success, zero on failure. - */ -extern int prom_searchsiblings(int node_start, const char *name); - -/* Return the first property type, as a string, for the given node. - * Returns a null string on error. Buffer should be at least 32B long. - */ -extern char *prom_firstprop(int node, char *buffer); - -/* Returns the next property after the passed property for the given - * node. Returns null string on failure. Buffer should be at least 32B long. - */ -extern char *prom_nextprop(int node, const char *prev_property, char *buffer); - -/* Returns 1 if the specified node has given property. */ -extern int prom_node_has_property(int node, const char *property); - -/* Returns phandle of the path specified */ -extern int prom_finddevice(const char *name); - -/* Set the indicated property at the given node with the passed value. - * Returns the number of bytes of your value that the prom took. - */ -extern int prom_setprop(int node, const char *prop_name, char *prop_value, - int value_size); - -extern int prom_pathtoinode(const char *path); -extern int prom_inst2pkg(int); -extern int prom_service_exists(const char *service_name); -extern void prom_sun4v_guest_soft_state(void); - -extern int prom_ihandle2path(int handle, char *buffer, int bufsize); - -/* Client interface level routines. */ -extern long p1275_cmd(const char *, long, ...); - -#if 0 -#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x)) -#else -#define P1275_SIZE(x) x -#endif - -/* We support at most 16 input and 1 output argument */ -#define P1275_ARG_NUMBER 0 -#define P1275_ARG_IN_STRING 1 -#define P1275_ARG_OUT_BUF 2 -#define P1275_ARG_OUT_32B 3 -#define P1275_ARG_IN_FUNCTION 4 -#define P1275_ARG_IN_BUF 5 -#define P1275_ARG_IN_64B 6 - -#define P1275_IN(x) ((x) & 0xf) -#define P1275_OUT(x) (((x) << 4) & 0xf0) -#define P1275_INOUT(i,o) (P1275_IN(i)|P1275_OUT(o)) -#define P1275_ARG(n,x) ((x) << ((n)*3 + 8)) - -#endif /* !(__SPARC64_OPLIB_H) */ +#include <asm-sparc/oplib.h> diff --git a/include/asm-sparc64/page.h b/include/asm-sparc64/page.h index 93f0881b766..f46c1fb5302 100644 --- a/include/asm-sparc64/page.h +++ b/include/asm-sparc64/page.h @@ -1,142 +1 @@ -#ifndef _SPARC64_PAGE_H -#define _SPARC64_PAGE_H - -#include <linux/const.h> - -#if defined(CONFIG_SPARC64_PAGE_SIZE_8KB) -#define PAGE_SHIFT 13 -#elif defined(CONFIG_SPARC64_PAGE_SIZE_64KB) -#define PAGE_SHIFT 16 -#elif defined(CONFIG_SPARC64_PAGE_SIZE_512KB) -#define PAGE_SHIFT 19 -#elif defined(CONFIG_SPARC64_PAGE_SIZE_4MB) -#define PAGE_SHIFT 22 -#else -#error No page size specified in kernel configuration -#endif - -#define PAGE_SIZE (_AC(1,UL) << PAGE_SHIFT) -#define PAGE_MASK (~(PAGE_SIZE-1)) - -/* Flushing for D-cache alias handling is only needed if - * the page size is smaller than 16K. - */ -#if PAGE_SHIFT < 14 -#define DCACHE_ALIASING_POSSIBLE -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define HPAGE_SHIFT 22 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define HPAGE_SHIFT 19 -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define HPAGE_SHIFT 16 -#endif - -#ifdef CONFIG_HUGETLB_PAGE -#define HPAGE_SIZE (_AC(1,UL) << HPAGE_SHIFT) -#define HPAGE_MASK (~(HPAGE_SIZE - 1UL)) -#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT) -#define HAVE_ARCH_HUGETLB_UNMAPPED_AREA -#endif - -#ifndef __ASSEMBLY__ - -extern void _clear_page(void *page); -#define clear_page(X) _clear_page((void *)(X)) -struct page; -extern void clear_user_page(void *addr, unsigned long vaddr, struct page *page); -#define copy_page(X,Y) memcpy((void *)(X), (void *)(Y), PAGE_SIZE) -extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct page *topage); - -/* Unlike sparc32, sparc64's parameter passing API is more - * sane in that structures which as small enough are passed - * in registers instead of on the stack. Thus, setting - * STRICT_MM_TYPECHECKS does not generate worse code so - * let's enable it to get the type checking. - */ - -#define STRICT_MM_TYPECHECKS - -#ifdef STRICT_MM_TYPECHECKS -/* These are used to make use of C type-checking.. */ -typedef struct { unsigned long pte; } pte_t; -typedef struct { unsigned long iopte; } iopte_t; -typedef struct { unsigned int pmd; } pmd_t; -typedef struct { unsigned int pgd; } pgd_t; -typedef struct { unsigned long pgprot; } pgprot_t; - -#define pte_val(x) ((x).pte) -#define iopte_val(x) ((x).iopte) -#define pmd_val(x) ((x).pmd) -#define pgd_val(x) ((x).pgd) -#define pgprot_val(x) ((x).pgprot) - -#define __pte(x) ((pte_t) { (x) } ) -#define __iopte(x) ((iopte_t) { (x) } ) -#define __pmd(x) ((pmd_t) { (x) } ) -#define __pgd(x) ((pgd_t) { (x) } ) -#define __pgprot(x) ((pgprot_t) { (x) } ) - -#else -/* .. while these make it easier on the compiler */ -typedef unsigned long pte_t; -typedef unsigned long iopte_t; -typedef unsigned int pmd_t; -typedef unsigned int pgd_t; -typedef unsigned long pgprot_t; - -#define pte_val(x) (x) -#define iopte_val(x) (x) -#define pmd_val(x) (x) -#define pgd_val(x) (x) -#define pgprot_val(x) (x) - -#define __pte(x) (x) -#define __iopte(x) (x) -#define __pmd(x) (x) -#define __pgd(x) (x) -#define __pgprot(x) (x) - -#endif /* (STRICT_MM_TYPECHECKS) */ - -typedef struct page *pgtable_t; - -#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_32BIT) ? \ - (_AC(0x0000000070000000,UL)) : \ - (_AC(0xfffff80000000000,UL) + (1UL << 32UL))) - -#include <asm-generic/memory_model.h> - -#endif /* !(__ASSEMBLY__) */ - -/* to align the pointer to the (next) page boundary */ -#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK) - -/* We used to stick this into a hard-coded global register (%g4) - * but that does not make sense anymore. - */ -#define PAGE_OFFSET _AC(0xFFFFF80000000000,UL) - -#ifndef __ASSEMBLY__ - -#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) -#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) - -#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) - -#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr)>>PAGE_SHIFT) - -#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) - -#define virt_to_phys __pa -#define phys_to_virt __va - -#endif /* !(__ASSEMBLY__) */ - -#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - -#include <asm-generic/page.h> - -#endif /* _SPARC64_PAGE_H */ +#include <asm-sparc/page.h> diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h index f59f2571295..da54c4d1f39 100644 --- a/include/asm-sparc64/pci.h +++ b/include/asm-sparc64/pci.h @@ -1,209 +1 @@ -#ifndef __SPARC64_PCI_H -#define __SPARC64_PCI_H - -#ifdef __KERNEL__ - -#include <linux/dma-mapping.h> - -/* Can be used to override the logic in pci_scan_bus for skipping - * already-configured bus numbers - to be used for buggy BIOSes - * or architectures with incomplete PCI setup by the loader. - */ -#define pcibios_assign_all_busses() 0 -#define pcibios_scan_all_fns(a, b) 0 - -#define PCIBIOS_MIN_IO 0UL -#define PCIBIOS_MIN_MEM 0UL - -#define PCI_IRQ_NONE 0xffffffff - -#define PCI_CACHE_LINE_BYTES 64 - -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} - -static inline void pcibios_penalize_isa_irq(int irq, int active) -{ - /* We don't do dynamic PCI IRQ allocation */ -} - -/* The PCI address space does not equal the physical memory - * address space. The networking and block device layers use - * this boolean for bounce buffer decisions. - */ -#define PCI_DMA_BUS_IS_PHYS (0) - -static inline void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, - dma_addr_t *dma_handle) -{ - return dma_alloc_coherent(&pdev->dev, size, dma_handle, GFP_ATOMIC); -} - -static inline void pci_free_consistent(struct pci_dev *pdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - return dma_free_coherent(&pdev->dev, size, vaddr, dma_handle); -} - -static inline dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, - size_t size, int direction) -{ - return dma_map_single(&pdev->dev, ptr, size, - (enum dma_data_direction) direction); -} - -static inline void pci_unmap_single(struct pci_dev *pdev, dma_addr_t dma_addr, - size_t size, int direction) -{ - dma_unmap_single(&pdev->dev, dma_addr, size, - (enum dma_data_direction) direction); -} - -#define pci_map_page(dev, page, off, size, dir) \ - pci_map_single(dev, (page_address(page) + (off)), size, dir) -#define pci_unmap_page(dev,addr,sz,dir) \ - pci_unmap_single(dev,addr,sz,dir) - -/* pci_unmap_{single,page} is not a nop, thus... */ -#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ - dma_addr_t ADDR_NAME; -#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ - __u32 LEN_NAME; -#define pci_unmap_addr(PTR, ADDR_NAME) \ - ((PTR)->ADDR_NAME) -#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ - (((PTR)->ADDR_NAME) = (VAL)) -#define pci_unmap_len(PTR, LEN_NAME) \ - ((PTR)->LEN_NAME) -#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ - (((PTR)->LEN_NAME) = (VAL)) - -static inline int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sg, - int nents, int direction) -{ - return dma_map_sg(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sg, - int nents, int direction) -{ - dma_unmap_sg(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - dma_sync_single_for_cpu(&pdev->dev, dma_handle, size, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_single_for_device(struct pci_dev *pdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, - struct scatterlist *sg, - int nents, int direction) -{ - dma_sync_sg_for_cpu(&pdev->dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void pci_dma_sync_sg_for_device(struct pci_dev *pdev, - struct scatterlist *sg, - int nelems, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -/* Return whether the given PCI device DMA address mask can - * be supported properly. For example, if your device can - * only drive the low 24-bits during PCI bus mastering, then - * you would pass 0x00ffffff as the mask to this function. - */ -extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); - -/* PCI IOMMU mapping bypass support. */ - -/* PCI 64-bit addressing works for all slots on all controller - * types on sparc64. However, it requires that the device - * can drive enough of the 64 bits. - */ -#define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) -#define PCI64_ADDR_BASE 0xfffc000000000000UL - -static inline int pci_dma_mapping_error(dma_addr_t dma_addr) -{ - return dma_mapping_error(dma_addr); -} - -#ifdef CONFIG_PCI -static inline void pci_dma_burst_advice(struct pci_dev *pdev, - enum pci_dma_burst_strategy *strat, - unsigned long *strategy_parameter) -{ - unsigned long cacheline_size; - u8 byte; - - pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); - if (byte == 0) - cacheline_size = 1024; - else - cacheline_size = (int) byte * 4; - - *strat = PCI_DMA_BURST_BOUNDARY; - *strategy_parameter = cacheline_size; -} -#endif - -/* Return the index of the PCI controller for device PDEV. */ - -extern int pci_domain_nr(struct pci_bus *bus); -static inline int pci_proc_domain(struct pci_bus *bus) -{ - return 1; -} - -/* Platform support for /proc/bus/pci/X/Y mmap()s. */ - -#define HAVE_PCI_MMAP -#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA -#define get_pci_unmapped_area get_fb_unmapped_area - -extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, - enum pci_mmap_state mmap_state, - int write_combine); - -extern void -pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, - struct resource *res); - -extern void -pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, - struct pci_bus_region *region); - -extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); - -static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) -{ - return PCI_IRQ_NONE; -} - -struct device_node; -extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); - -#define HAVE_ARCH_PCI_RESOURCE_TO_USER -extern void pci_resource_to_user(const struct pci_dev *dev, int bar, - const struct resource *rsrc, - resource_size_t *start, resource_size_t *end); -#endif /* __KERNEL__ */ - -#endif /* __SPARC64_PCI_H */ +#include <asm-sparc/pci.h> diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h index bee64593023..292729bb350 100644 --- a/include/asm-sparc64/percpu.h +++ b/include/asm-sparc64/percpu.h @@ -1,28 +1 @@ -#ifndef __ARCH_SPARC64_PERCPU__ -#define __ARCH_SPARC64_PERCPU__ - -#include <linux/compiler.h> - -register unsigned long __local_per_cpu_offset asm("g5"); - -#ifdef CONFIG_SMP - -extern void real_setup_per_cpu_areas(void); - -extern unsigned long __per_cpu_base; -extern unsigned long __per_cpu_shift; -#define __per_cpu_offset(__cpu) \ - (__per_cpu_base + ((unsigned long)(__cpu) << __per_cpu_shift)) -#define per_cpu_offset(x) (__per_cpu_offset(x)) - -#define __my_cpu_offset __local_per_cpu_offset - -#else /* ! SMP */ - -#define real_setup_per_cpu_areas() do { } while (0) - -#endif /* SMP */ - -#include <asm-generic/percpu.h> - -#endif /* __ARCH_SPARC64_PERCPU__ */ +#include <asm-sparc/percpu.h> diff --git a/include/asm-sparc64/pgalloc.h b/include/asm-sparc64/pgalloc.h index 326de104d01..bec31641011 100644 --- a/include/asm-sparc64/pgalloc.h +++ b/include/asm-sparc64/pgalloc.h @@ -1,81 +1 @@ -#ifndef _SPARC64_PGALLOC_H -#define _SPARC64_PGALLOC_H - -#include <linux/kernel.h> -#include <linux/sched.h> -#include <linux/mm.h> -#include <linux/slab.h> -#include <linux/quicklist.h> - -#include <asm/spitfire.h> -#include <asm/cpudata.h> -#include <asm/cacheflush.h> -#include <asm/page.h> - -/* Page table allocation/freeing. */ - -static inline pgd_t *pgd_alloc(struct mm_struct *mm) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd) -{ - quicklist_free(0, NULL, pgd); -} - -#define pud_populate(MM, PUD, PMD) pud_set(PUD, PMD) - -static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd) -{ - quicklist_free(0, NULL, pmd); -} - -static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, - unsigned long address) -{ - return quicklist_alloc(0, GFP_KERNEL, NULL); -} - -static inline pgtable_t pte_alloc_one(struct mm_struct *mm, - unsigned long address) -{ - struct page *page; - void *pg; - - pg = quicklist_alloc(0, GFP_KERNEL, NULL); - if (!pg) - return NULL; - page = virt_to_page(pg); - pgtable_page_ctor(page); - return page; -} - -static inline void pte_free_kernel(struct mm_struct *mm, pte_t *pte) -{ - quicklist_free(0, NULL, pte); -} - -static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage) -{ - pgtable_page_dtor(ptepage); - quicklist_free_page(0, NULL, ptepage); -} - - -#define pmd_populate_kernel(MM, PMD, PTE) pmd_set(PMD, PTE) -#define pmd_populate(MM,PMD,PTE_PAGE) \ - pmd_populate_kernel(MM,PMD,page_address(PTE_PAGE)) -#define pmd_pgtable(pmd) pmd_page(pmd) - -static inline void check_pgt_cache(void) -{ - quicklist_trim(0, NULL, 25, 16); -} - -#endif /* _SPARC64_PGALLOC_H */ +#include <asm-sparc/pgalloc.h> diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h index b87017747b5..9decbd99aef 100644 --- a/include/asm-sparc64/pgtable.h +++ b/include/asm-sparc64/pgtable.h @@ -1,781 +1 @@ -/* - * pgtable.h: SpitFire page table operations. - * - * Copyright 1996,1997 David S. Miller (davem@caip.rutgers.edu) - * Copyright 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz) - */ - -#ifndef _SPARC64_PGTABLE_H -#define _SPARC64_PGTABLE_H - -/* This file contains the functions and defines necessary to modify and use - * the SpitFire page tables. - */ - -#include <asm-generic/pgtable-nopud.h> - -#include <linux/compiler.h> -#include <linux/const.h> -#include <asm/types.h> -#include <asm/spitfire.h> -#include <asm/asi.h> -#include <asm/system.h> -#include <asm/page.h> -#include <asm/processor.h> - -/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB). - * The page copy blockops can use 0x6000000 to 0x8000000. - * The TSB is mapped in the 0x8000000 to 0xa000000 range. - * The PROM resides in an area spanning 0xf0000000 to 0x100000000. - * The vmalloc area spans 0x100000000 to 0x200000000. - * Since modules need to be in the lowest 32-bits of the address space, - * we place them right before the OBP area from 0x10000000 to 0xf0000000. - * There is a single static kernel PMD which maps from 0x0 to address - * 0x400000000. - */ -#define TLBTEMP_BASE _AC(0x0000000006000000,UL) -#define TSBMAP_BASE _AC(0x0000000008000000,UL) -#define MODULES_VADDR _AC(0x0000000010000000,UL) -#define MODULES_LEN _AC(0x00000000e0000000,UL) -#define MODULES_END _AC(0x00000000f0000000,UL) -#define LOW_OBP_ADDRESS _AC(0x00000000f0000000,UL) -#define HI_OBP_ADDRESS _AC(0x0000000100000000,UL) -#define VMALLOC_START _AC(0x0000000100000000,UL) -#define VMALLOC_END _AC(0x0000000200000000,UL) -#define VMEMMAP_BASE _AC(0x0000000200000000,UL) - -#define vmemmap ((struct page *)VMEMMAP_BASE) - -/* XXX All of this needs to be rethought so we can take advantage - * XXX cheetah's full 64-bit virtual address space, ie. no more hole - * XXX in the middle like on spitfire. -DaveM - */ -/* - * Given a virtual address, the lowest PAGE_SHIFT bits determine offset - * into the page; the next higher PAGE_SHIFT-3 bits determine the pte# - * in the proper pagetable (the -3 is from the 8 byte ptes, and each page - * table is a single page long). The next higher PMD_BITS determine pmd# - * in the proper pmdtable (where we must have PMD_BITS <= (PAGE_SHIFT-2) - * since the pmd entries are 4 bytes, and each pmd page is a single page - * long). Finally, the higher few bits determine pgde#. - */ - -/* PMD_SHIFT determines the size of the area a second-level page - * table can map - */ -#define PMD_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3)) -#define PMD_SIZE (_AC(1,UL) << PMD_SHIFT) -#define PMD_MASK (~(PMD_SIZE-1)) -#define PMD_BITS (PAGE_SHIFT - 2) - -/* PGDIR_SHIFT determines what a third-level page table entry can map */ -#define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-3) + PMD_BITS) -#define PGDIR_SIZE (_AC(1,UL) << PGDIR_SHIFT) -#define PGDIR_MASK (~(PGDIR_SIZE-1)) -#define PGDIR_BITS (PAGE_SHIFT - 2) - -#ifndef __ASSEMBLY__ - -#include <linux/sched.h> - -/* Entries per page directory level. */ -#define PTRS_PER_PTE (1UL << (PAGE_SHIFT-3)) -#define PTRS_PER_PMD (1UL << PMD_BITS) -#define PTRS_PER_PGD (1UL << PGDIR_BITS) - -/* Kernel has a separate 44bit address space. */ -#define FIRST_USER_ADDRESS 0 - -#define pte_ERROR(e) __builtin_trap() -#define pmd_ERROR(e) __builtin_trap() -#define pgd_ERROR(e) __builtin_trap() - -#endif /* !(__ASSEMBLY__) */ - -/* PTE bits which are the same in SUN4U and SUN4V format. */ -#define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ -#define _PAGE_R _AC(0x8000000000000000,UL) /* Keep ref bit uptodate*/ - -/* SUN4U pte bits... */ -#define _PAGE_SZ4MB_4U _AC(0x6000000000000000,UL) /* 4MB Page */ -#define _PAGE_SZ512K_4U _AC(0x4000000000000000,UL) /* 512K Page */ -#define _PAGE_SZ64K_4U _AC(0x2000000000000000,UL) /* 64K Page */ -#define _PAGE_SZ8K_4U _AC(0x0000000000000000,UL) /* 8K Page */ -#define _PAGE_NFO_4U _AC(0x1000000000000000,UL) /* No Fault Only */ -#define _PAGE_IE_4U _AC(0x0800000000000000,UL) /* Invert Endianness */ -#define _PAGE_SOFT2_4U _AC(0x07FC000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_RES1_4U _AC(0x0002000000000000,UL) /* Reserved */ -#define _PAGE_SZ32MB_4U _AC(0x0001000000000000,UL) /* (Panther) 32MB page */ -#define _PAGE_SZ256MB_4U _AC(0x2001000000000000,UL) /* (Panther) 256MB page */ -#define _PAGE_SZALL_4U _AC(0x6001000000000000,UL) /* All pgsz bits */ -#define _PAGE_SN_4U _AC(0x0000800000000000,UL) /* (Cheetah) Snoop */ -#define _PAGE_RES2_4U _AC(0x0000780000000000,UL) /* Reserved */ -#define _PAGE_PADDR_4U _AC(0x000007FFFFFFE000,UL) /* (Cheetah) pa[42:13] */ -#define _PAGE_SOFT_4U _AC(0x0000000000001F80,UL) /* Software bits: */ -#define _PAGE_EXEC_4U _AC(0x0000000000001000,UL) /* Executable SW bit */ -#define _PAGE_MODIFIED_4U _AC(0x0000000000000800,UL) /* Modified (dirty) */ -#define _PAGE_FILE_4U _AC(0x0000000000000800,UL) /* Pagecache page */ -#define _PAGE_ACCESSED_4U _AC(0x0000000000000400,UL) /* Accessed (ref'd) */ -#define _PAGE_READ_4U _AC(0x0000000000000200,UL) /* Readable SW Bit */ -#define _PAGE_WRITE_4U _AC(0x0000000000000100,UL) /* Writable SW Bit */ -#define _PAGE_PRESENT_4U _AC(0x0000000000000080,UL) /* Present */ -#define _PAGE_L_4U _AC(0x0000000000000040,UL) /* Locked TTE */ -#define _PAGE_CP_4U _AC(0x0000000000000020,UL) /* Cacheable in P-Cache */ -#define _PAGE_CV_4U _AC(0x0000000000000010,UL) /* Cacheable in V-Cache */ -#define _PAGE_E_4U _AC(0x0000000000000008,UL) /* side-Effect */ -#define _PAGE_P_4U _AC(0x0000000000000004,UL) /* Privileged Page */ -#define _PAGE_W_4U _AC(0x0000000000000002,UL) /* Writable */ - -/* SUN4V pte bits... */ -#define _PAGE_NFO_4V _AC(0x4000000000000000,UL) /* No Fault Only */ -#define _PAGE_SOFT2_4V _AC(0x3F00000000000000,UL) /* Software bits, set 2 */ -#define _PAGE_MODIFIED_4V _AC(0x2000000000000000,UL) /* Modified (dirty) */ -#define _PAGE_ACCESSED_4V _AC(0x1000000000000000,UL) /* Accessed (ref'd) */ -#define _PAGE_READ_4V _AC(0x0800000000000000,UL) /* Readable SW Bit */ -#define _PAGE_WRITE_4V _AC(0x0400000000000000,UL) /* Writable SW Bit */ -#define _PAGE_PADDR_4V _AC(0x00FFFFFFFFFFE000,UL) /* paddr[55:13] */ -#define _PAGE_IE_4V _AC(0x0000000000001000,UL) /* Invert Endianness */ -#define _PAGE_E_4V _AC(0x0000000000000800,UL) /* side-Effect */ -#define _PAGE_CP_4V _AC(0x0000000000000400,UL) /* Cacheable in P-Cache */ -#define _PAGE_CV_4V _AC(0x0000000000000200,UL) /* Cacheable in V-Cache */ -#define _PAGE_P_4V _AC(0x0000000000000100,UL) /* Privileged Page */ -#define _PAGE_EXEC_4V _AC(0x0000000000000080,UL) /* Executable Page */ -#define _PAGE_W_4V _AC(0x0000000000000040,UL) /* Writable */ -#define _PAGE_SOFT_4V _AC(0x0000000000000030,UL) /* Software bits */ -#define _PAGE_FILE_4V _AC(0x0000000000000020,UL) /* Pagecache page */ -#define _PAGE_PRESENT_4V _AC(0x0000000000000010,UL) /* Present */ -#define _PAGE_RESV_4V _AC(0x0000000000000008,UL) /* Reserved */ -#define _PAGE_SZ16GB_4V _AC(0x0000000000000007,UL) /* 16GB Page */ -#define _PAGE_SZ2GB_4V _AC(0x0000000000000006,UL) /* 2GB Page */ -#define _PAGE_SZ256MB_4V _AC(0x0000000000000005,UL) /* 256MB Page */ -#define _PAGE_SZ32MB_4V _AC(0x0000000000000004,UL) /* 32MB Page */ -#define _PAGE_SZ4MB_4V _AC(0x0000000000000003,UL) /* 4MB Page */ -#define _PAGE_SZ512K_4V _AC(0x0000000000000002,UL) /* 512K Page */ -#define _PAGE_SZ64K_4V _AC(0x0000000000000001,UL) /* 64K Page */ -#define _PAGE_SZ8K_4V _AC(0x0000000000000000,UL) /* 8K Page */ -#define _PAGE_SZALL_4V _AC(0x0000000000000007,UL) /* All pgsz bits */ - -#if PAGE_SHIFT == 13 -#define _PAGE_SZBITS_4U _PAGE_SZ8K_4U -#define _PAGE_SZBITS_4V _PAGE_SZ8K_4V -#elif PAGE_SHIFT == 16 -#define _PAGE_SZBITS_4U _PAGE_SZ64K_4U -#define _PAGE_SZBITS_4V _PAGE_SZ64K_4V -#elif PAGE_SHIFT == 19 -#define _PAGE_SZBITS_4U _PAGE_SZ512K_4U -#define _PAGE_SZBITS_4V _PAGE_SZ512K_4V -#elif PAGE_SHIFT == 22 -#define _PAGE_SZBITS_4U _PAGE_SZ4MB_4U -#define _PAGE_SZBITS_4V _PAGE_SZ4MB_4V -#else -#error Wrong PAGE_SHIFT specified -#endif - -#if defined(CONFIG_HUGETLB_PAGE_SIZE_4MB) -#define _PAGE_SZHUGE_4U _PAGE_SZ4MB_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ4MB_4V -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K) -#define _PAGE_SZHUGE_4U _PAGE_SZ512K_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ512K_4V -#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K) -#define _PAGE_SZHUGE_4U _PAGE_SZ64K_4U -#define _PAGE_SZHUGE_4V _PAGE_SZ64K_4V -#endif - -/* These are actually filled in at boot time by sun4{u,v}_pgprot_init() */ -#define __P000 __pgprot(0) -#define __P001 __pgprot(0) -#define __P010 __pgprot(0) -#define __P011 __pgprot(0) -#define __P100 __pgprot(0) -#define __P101 __pgprot(0) -#define __P110 __pgprot(0) -#define __P111 __pgprot(0) - -#define __S000 __pgprot(0) -#define __S001 __pgprot(0) -#define __S010 __pgprot(0) -#define __S011 __pgprot(0) -#define __S100 __pgprot(0) -#define __S101 __pgprot(0) -#define __S110 __pgprot(0) -#define __S111 __pgprot(0) - -#ifndef __ASSEMBLY__ - -extern pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long); - -extern unsigned long pte_sz_bits(unsigned long size); - -extern pgprot_t PAGE_KERNEL; -extern pgprot_t PAGE_KERNEL_LOCKED; -extern pgprot_t PAGE_COPY; -extern pgprot_t PAGE_SHARED; - -/* XXX This uglyness is for the atyfb driver's sparc mmap() support. XXX */ -extern unsigned long _PAGE_IE; -extern unsigned long _PAGE_E; -extern unsigned long _PAGE_CACHE; - -extern unsigned long pg_iobits; -extern unsigned long _PAGE_ALL_SZ_BITS; -extern unsigned long _PAGE_SZBITS; - -extern struct page *mem_map_zero; -#define ZERO_PAGE(vaddr) (mem_map_zero) - -/* PFNs are real physical page numbers. However, mem_map only begins to record - * per-page information starting at pfn_base. This is to handle systems where - * the first physical page in the machine is at some huge physical address, - * such as 4GB. This is common on a partitioned E10000, for example. - */ -static inline pte_t pfn_pte(unsigned long pfn, pgprot_t prot) -{ - unsigned long paddr = pfn << PAGE_SHIFT; - unsigned long sz_bits; - - sz_bits = 0UL; - if (_PAGE_SZBITS_4U != 0UL || _PAGE_SZBITS_4V != 0UL) { - __asm__ __volatile__( - "\n661: sethi %%uhi(%1), %0\n" - " sllx %0, 32, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " nop\n" - " .previous\n" - : "=r" (sz_bits) - : "i" (_PAGE_SZBITS_4U), "i" (_PAGE_SZBITS_4V)); - } - return __pte(paddr | sz_bits | pgprot_val(prot)); -} -#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot)) - -/* This one can be done with two shifts. */ -static inline unsigned long pte_pfn(pte_t pte) -{ - unsigned long ret; - - __asm__ __volatile__( - "\n661: sllx %1, %2, %0\n" - " srlx %0, %3, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sllx %1, %4, %0\n" - " srlx %0, %5, %0\n" - " .previous\n" - : "=r" (ret) - : "r" (pte_val(pte)), - "i" (21), "i" (21 + PAGE_SHIFT), - "i" (8), "i" (8 + PAGE_SHIFT)); - - return ret; -} -#define pte_page(x) pfn_to_page(pte_pfn(x)) - -static inline pte_t pte_modify(pte_t pte, pgprot_t prot) -{ - unsigned long mask, tmp; - - /* SUN4U: 0x600307ffffffecb8 (negated == 0x9ffcf80000001347) - * SUN4V: 0x30ffffffffffee17 (negated == 0xcf000000000011e8) - * - * Even if we use negation tricks the result is still a 6 - * instruction sequence, so don't try to play fancy and just - * do the most straightforward implementation. - * - * Note: We encode this into 3 sun4v 2-insn patch sequences. - */ - - __asm__ __volatile__( - "\n661: sethi %%uhi(%2), %1\n" - " sethi %%hi(%2), %0\n" - "\n662: or %1, %%ulo(%2), %1\n" - " or %0, %%lo(%2), %0\n" - "\n663: sllx %1, 32, %1\n" - " or %0, %1, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%3), %1\n" - " sethi %%hi(%3), %0\n" - " .word 662b\n" - " or %1, %%ulo(%3), %1\n" - " or %0, %%lo(%3), %0\n" - " .word 663b\n" - " sllx %1, 32, %1\n" - " or %0, %1, %0\n" - " .previous\n" - : "=r" (mask), "=r" (tmp) - : "i" (_PAGE_PADDR_4U | _PAGE_MODIFIED_4U | _PAGE_ACCESSED_4U | - _PAGE_CP_4U | _PAGE_CV_4U | _PAGE_E_4U | _PAGE_PRESENT_4U | - _PAGE_SZBITS_4U), - "i" (_PAGE_PADDR_4V | _PAGE_MODIFIED_4V | _PAGE_ACCESSED_4V | - _PAGE_CP_4V | _PAGE_CV_4V | _PAGE_E_4V | _PAGE_PRESENT_4V | - _PAGE_SZBITS_4V)); - - return __pte((pte_val(pte) & mask) | (pgprot_val(prot) & ~mask)); -} - -static inline pte_t pgoff_to_pte(unsigned long off) -{ - off <<= PAGE_SHIFT; - - __asm__ __volatile__( - "\n661: or %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " or %0, %3, %0\n" - " .previous\n" - : "=r" (off) - : "0" (off), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - - return __pte(off); -} - -static inline pgprot_t pgprot_noncached(pgprot_t prot) -{ - unsigned long val = pgprot_val(prot); - - __asm__ __volatile__( - "\n661: andn %0, %2, %0\n" - " or %0, %3, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " andn %0, %4, %0\n" - " or %0, %5, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_CP_4U | _PAGE_CV_4U), "i" (_PAGE_E_4U), - "i" (_PAGE_CP_4V | _PAGE_CV_4V), "i" (_PAGE_E_4V)); - - return __pgprot(val); -} -/* Various pieces of code check for platform support by ifdef testing - * on "pgprot_noncached". That's broken and should be fixed, but for - * now... - */ -#define pgprot_noncached pgprot_noncached - -#ifdef CONFIG_HUGETLB_PAGE -static inline pte_t pte_mkhuge(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: sethi %%uhi(%1), %0\n" - " sllx %0, 32, %0\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " nop\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_SZHUGE_4U), "i" (_PAGE_SZHUGE_4V)); - - return __pte(pte_val(pte) | mask); -} -#endif - -static inline pte_t pte_mkdirty(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: or %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " or %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), - "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkclean(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: andn %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " andn %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_MODIFIED_4U | _PAGE_W_4U), - "i" (_PAGE_MODIFIED_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkwrite(pte_t pte) -{ - unsigned long val = pte_val(pte), mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); - - return __pte(val | mask); -} - -static inline pte_t pte_wrprotect(pte_t pte) -{ - unsigned long val = pte_val(pte), tmp; - - __asm__ __volatile__( - "\n661: andn %0, %3, %0\n" - " nop\n" - "\n662: nop\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%4), %1\n" - " sllx %1, 32, %1\n" - " .word 662b\n" - " or %1, %%lo(%4), %1\n" - " andn %0, %1, %0\n" - " .previous\n" - : "=r" (val), "=r" (tmp) - : "0" (val), "i" (_PAGE_WRITE_4U | _PAGE_W_4U), - "i" (_PAGE_WRITE_4V | _PAGE_W_4V)); - - return __pte(val); -} - -static inline pte_t pte_mkold(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - mask |= _PAGE_R; - - return __pte(pte_val(pte) & ~mask); -} - -static inline pte_t pte_mkyoung(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - mask |= _PAGE_R; - - return __pte(pte_val(pte) | mask); -} - -static inline pte_t pte_mkspecial(pte_t pte) -{ - return pte; -} - -static inline unsigned long pte_young(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_ACCESSED_4U), "i" (_PAGE_ACCESSED_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_dirty(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_MODIFIED_4U), "i" (_PAGE_MODIFIED_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_write(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: mov %1, %0\n" - " nop\n" - " .section .sun4v_2insn_patch, \"ax\"\n" - " .word 661b\n" - " sethi %%uhi(%2), %0\n" - " sllx %0, 32, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_WRITE_4U), "i" (_PAGE_WRITE_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_exec(pte_t pte) -{ - unsigned long mask; - - __asm__ __volatile__( - "\n661: sethi %%hi(%1), %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " mov %2, %0\n" - " .previous\n" - : "=r" (mask) - : "i" (_PAGE_EXEC_4U), "i" (_PAGE_EXEC_4V)); - - return (pte_val(pte) & mask); -} - -static inline unsigned long pte_file(pte_t pte) -{ - unsigned long val = pte_val(pte); - - __asm__ __volatile__( - "\n661: and %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " and %0, %3, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_FILE_4U), "i" (_PAGE_FILE_4V)); - - return val; -} - -static inline unsigned long pte_present(pte_t pte) -{ - unsigned long val = pte_val(pte); - - __asm__ __volatile__( - "\n661: and %0, %2, %0\n" - " .section .sun4v_1insn_patch, \"ax\"\n" - " .word 661b\n" - " and %0, %3, %0\n" - " .previous\n" - : "=r" (val) - : "0" (val), "i" (_PAGE_PRESENT_4U), "i" (_PAGE_PRESENT_4V)); - - return val; -} - -static inline int pte_special(pte_t pte) -{ - return 0; -} - -#define pmd_set(pmdp, ptep) \ - (pmd_val(*(pmdp)) = (__pa((unsigned long) (ptep)) >> 11UL)) -#define pud_set(pudp, pmdp) \ - (pud_val(*(pudp)) = (__pa((unsigned long) (pmdp)) >> 11UL)) -#define __pmd_page(pmd) \ - ((unsigned long) __va((((unsigned long)pmd_val(pmd))<<11UL))) -#define pmd_page(pmd) virt_to_page((void *)__pmd_page(pmd)) -#define pud_page_vaddr(pud) \ - ((unsigned long) __va((((unsigned long)pud_val(pud))<<11UL))) -#define pud_page(pud) virt_to_page((void *)pud_page_vaddr(pud)) -#define pmd_none(pmd) (!pmd_val(pmd)) -#define pmd_bad(pmd) (0) -#define pmd_present(pmd) (pmd_val(pmd) != 0U) -#define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0U) -#define pud_none(pud) (!pud_val(pud)) -#define pud_bad(pud) (0) -#define pud_present(pud) (pud_val(pud) != 0U) -#define pud_clear(pudp) (pud_val(*(pudp)) = 0U) - -/* Same in both SUN4V and SUN4U. */ -#define pte_none(pte) (!pte_val(pte)) - -/* to find an entry in a page-table-directory. */ -#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)) -#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) - -/* to find an entry in a kernel page-table-directory */ -#define pgd_offset_k(address) pgd_offset(&init_mm, address) - -/* Find an entry in the second-level page table.. */ -#define pmd_offset(pudp, address) \ - ((pmd_t *) pud_page_vaddr(*(pudp)) + \ - (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))) - -/* Find an entry in the third-level page table.. */ -#define pte_index(dir, address) \ - ((pte_t *) __pmd_page(*(dir)) + \ - ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) -#define pte_offset_kernel pte_index -#define pte_offset_map pte_index -#define pte_offset_map_nested pte_index -#define pte_unmap(pte) do { } while (0) -#define pte_unmap_nested(pte) do { } while (0) - -/* Actual page table PTE updates. */ -extern void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr, pte_t *ptep, pte_t orig); - -static inline void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte) -{ - pte_t orig = *ptep; - - *ptep = pte; - - /* It is more efficient to let flush_tlb_kernel_range() - * handle init_mm tlb flushes. - * - * SUN4V NOTE: _PAGE_VALID is the same value in both the SUN4U - * and SUN4V pte layout, so this inline test is fine. - */ - if (likely(mm != &init_mm) && (pte_val(orig) & _PAGE_VALID)) - tlb_batch_add(mm, addr, ptep, orig); -} - -#define pte_clear(mm,addr,ptep) \ - set_pte_at((mm), (addr), (ptep), __pte(0UL)) - -#ifdef DCACHE_ALIASING_POSSIBLE -#define __HAVE_ARCH_MOVE_PTE -#define move_pte(pte, prot, old_addr, new_addr) \ -({ \ - pte_t newpte = (pte); \ - if (tlb_type != hypervisor && pte_present(pte)) { \ - unsigned long this_pfn = pte_pfn(pte); \ - \ - if (pfn_valid(this_pfn) && \ - (((old_addr) ^ (new_addr)) & (1 << 13))) \ - flush_dcache_page_all(current->mm, \ - pfn_to_page(this_pfn)); \ - } \ - newpte; \ -}) -#endif - -extern pgd_t swapper_pg_dir[2048]; -extern pmd_t swapper_low_pmd_dir[2048]; - -extern void paging_init(void); -extern unsigned long find_ecache_flush_span(unsigned long size); - -/* These do nothing with the way I have things setup. */ -#define mmu_lockarea(vaddr, len) (vaddr) -#define mmu_unlockarea(vaddr, len) do { } while(0) - -struct vm_area_struct; -extern void update_mmu_cache(struct vm_area_struct *, unsigned long, pte_t); - -/* Encode and de-code a swap entry */ -#define __swp_type(entry) (((entry).val >> PAGE_SHIFT) & 0xffUL) -#define __swp_offset(entry) ((entry).val >> (PAGE_SHIFT + 8UL)) -#define __swp_entry(type, offset) \ - ( (swp_entry_t) \ - { \ - (((long)(type) << PAGE_SHIFT) | \ - ((long)(offset) << (PAGE_SHIFT + 8UL))) \ - } ) -#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) -#define __swp_entry_to_pte(x) ((pte_t) { (x).val }) - -/* File offset in PTE support. */ -extern unsigned long pte_file(pte_t); -#define pte_to_pgoff(pte) (pte_val(pte) >> PAGE_SHIFT) -extern pte_t pgoff_to_pte(unsigned long); -#define PTE_FILE_MAX_BITS (64UL - PAGE_SHIFT - 1UL) - -extern unsigned long *sparc64_valid_addr_bitmap; - -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -#define kern_addr_valid(addr) \ - (test_bit(__pa((unsigned long)(addr))>>22, sparc64_valid_addr_bitmap)) - -extern int page_in_phys_avail(unsigned long paddr); - -extern int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long from, - unsigned long pfn, - unsigned long size, pgprot_t prot); - -/* - * For sparc32&64, the pfn in io_remap_pfn_range() carries <iospace> in - * its high 4 bits. These macros/functions put it there or get it from there. - */ -#define MK_IOSPACE_PFN(space, pfn) (pfn | (space << (BITS_PER_LONG - 4))) -#define GET_IOSPACE(pfn) (pfn >> (BITS_PER_LONG - 4)) -#define GET_PFN(pfn) (pfn & 0x0fffffffffffffffUL) - -#include <asm-generic/pgtable.h> - -/* We provide our own get_unmapped_area to cope with VA holes and - * SHM area cache aliasing for userland. - */ -#define HAVE_ARCH_UNMAPPED_AREA -#define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN - -/* We provide a special get_unmapped_area for framebuffer mmaps to try and use - * the largest alignment possible such that larget PTEs can be used. - */ -extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long, - unsigned long, unsigned long, - unsigned long); -#define HAVE_ARCH_FB_UNMAPPED_AREA - -extern void pgtable_cache_init(void); -extern void sun4v_register_fault_status(void); -extern void sun4v_ktsb_register(void); -extern void __init cheetah_ecache_flush_init(void); -extern void sun4v_patch_tlb_handlers(void); - -extern unsigned long cmdline_memory_size; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_SPARC64_PGTABLE_H) */ +#include <asm-sparc/pgtable.h> diff --git a/include/asm-sparc64/posix_types.h b/include/asm-sparc64/posix_types.h index 4eaaa019663..8cee9920023 100644 --- a/include/asm-sparc64/posix_types.h +++ b/include/asm-sparc64/posix_types.h @@ -1,122 +1 @@ -#ifndef __ARCH_SPARC64_POSIX_TYPES_H -#define __ARCH_SPARC64_POSIX_TYPES_H - -/* - * This file is generally used by user-level software, so you need to - * be a little careful about namespace pollution etc. Also, we cannot - * assume GCC is being used. - */ - -typedef unsigned long __kernel_size_t; -typedef long __kernel_ssize_t; -typedef long __kernel_ptrdiff_t; -typedef long __kernel_time_t; -typedef long __kernel_clock_t; -typedef int __kernel_pid_t; -typedef int __kernel_ipc_pid_t; -typedef unsigned int __kernel_uid_t; -typedef unsigned int __kernel_gid_t; -typedef unsigned long __kernel_ino_t; -typedef unsigned int __kernel_mode_t; -typedef unsigned short __kernel_umode_t; -typedef unsigned int __kernel_nlink_t; -typedef int __kernel_daddr_t; -typedef long __kernel_off_t; -typedef char * __kernel_caddr_t; -typedef unsigned short __kernel_uid16_t; -typedef unsigned short __kernel_gid16_t; -typedef int __kernel_clockid_t; -typedef int __kernel_timer_t; - -typedef unsigned short __kernel_old_uid_t; -typedef unsigned short __kernel_old_gid_t; -typedef __kernel_uid_t __kernel_uid32_t; -typedef __kernel_gid_t __kernel_gid32_t; - -typedef unsigned int __kernel_old_dev_t; - -/* Note this piece of asymmetry from the v9 ABI. */ -typedef int __kernel_suseconds_t; - -#ifdef __GNUC__ -typedef long long __kernel_loff_t; -#endif - -typedef struct { - int val[2]; -} __kernel_fsid_t; - -#if defined(__KERNEL__) - -#undef __FD_SET -static inline void __FD_SET(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] |= (1UL<<_rem); -} - -#undef __FD_CLR -static inline void __FD_CLR(unsigned long fd, __kernel_fd_set *fdsetp) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - fdsetp->fds_bits[_tmp] &= ~(1UL<<_rem); -} - -#undef __FD_ISSET -static inline int __FD_ISSET(unsigned long fd, __const__ __kernel_fd_set *p) -{ - unsigned long _tmp = fd / __NFDBITS; - unsigned long _rem = fd % __NFDBITS; - return (p->fds_bits[_tmp] & (1UL<<_rem)) != 0; -} - -/* - * This will unroll the loop for the normal constant cases (8 or 32 longs, - * for 256 and 1024-bit fd_sets respectively) - */ -#undef __FD_ZERO -static inline void __FD_ZERO(__kernel_fd_set *p) -{ - unsigned long *tmp = p->fds_bits; - int i; - - if (__builtin_constant_p(__FDSET_LONGS)) { - switch (__FDSET_LONGS) { - case 32: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - tmp[16] = 0; tmp[17] = 0; tmp[18] = 0; tmp[19] = 0; - tmp[20] = 0; tmp[21] = 0; tmp[22] = 0; tmp[23] = 0; - tmp[24] = 0; tmp[25] = 0; tmp[26] = 0; tmp[27] = 0; - tmp[28] = 0; tmp[29] = 0; tmp[30] = 0; tmp[31] = 0; - return; - case 16: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - tmp[ 8] = 0; tmp[ 9] = 0; tmp[10] = 0; tmp[11] = 0; - tmp[12] = 0; tmp[13] = 0; tmp[14] = 0; tmp[15] = 0; - return; - case 8: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - tmp[ 4] = 0; tmp[ 5] = 0; tmp[ 6] = 0; tmp[ 7] = 0; - return; - case 4: - tmp[ 0] = 0; tmp[ 1] = 0; tmp[ 2] = 0; tmp[ 3] = 0; - return; - } - } - i = __FDSET_LONGS; - while (i) { - i--; - *tmp = 0; - tmp++; - } -} - -#endif /* defined(__KERNEL__) */ - -#endif /* !(__ARCH_SPARC64_POSIX_TYPES_H) */ +#include <asm-sparc/posix_types.h> diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h index 26b4e525576..21de6cc182e 100644 --- a/include/asm-sparc64/processor.h +++ b/include/asm-sparc64/processor.h @@ -1,237 +1 @@ -/* - * include/asm-sparc64/processor.h - * - * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __ASM_SPARC64_PROCESSOR_H -#define __ASM_SPARC64_PROCESSOR_H - -/* - * Sparc64 implementation of macro that returns current - * instruction pointer ("program counter"). - */ -#define current_text_addr() ({ void *pc; __asm__("rd %%pc, %0" : "=r" (pc)); pc; }) - -#include <asm/asi.h> -#include <asm/pstate.h> -#include <asm/ptrace.h> -#include <asm/page.h> - -/* The sparc has no problems with write protection */ -#define wp_works_ok 1 -#define wp_works_ok__is_a_macro /* for versions in ksyms.c */ - -/* - * User lives in his very own context, and cannot reference us. Note - * that TASK_SIZE is a misnomer, it really gives maximum user virtual - * address that the kernel will allocate out. - * - * XXX No longer using virtual page tables, kill this upper limit... - */ -#define VA_BITS 44 -#ifndef __ASSEMBLY__ -#define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) -#else -#define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) -#endif - -#define TASK_SIZE ((unsigned long)-VPTE_SIZE) -#define TASK_SIZE_OF(tsk) \ - (test_tsk_thread_flag(tsk,TIF_32BIT) ? \ - (1UL << 32UL) : TASK_SIZE) -#ifdef __KERNEL__ - -#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE) -#define STACK_TOP64 (0x0000080000000000UL - (1UL << 32UL)) - -#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \ - STACK_TOP32 : STACK_TOP64) - -#define STACK_TOP_MAX STACK_TOP64 - -#endif - -#ifndef __ASSEMBLY__ - -typedef struct { - unsigned char seg; -} mm_segment_t; - -/* The Sparc processor specific thread struct. */ -/* XXX This should die, everything can go into thread_info now. */ -struct thread_struct { -#ifdef CONFIG_DEBUG_SPINLOCK - /* How many spinlocks held by this thread. - * Used with spin lock debugging to catch tasks - * sleeping illegally with locks held. - */ - int smp_lock_count; - unsigned int smp_lock_pc; -#else - int dummy; /* f'in gcc bug... */ -#endif -}; - -#endif /* !(__ASSEMBLY__) */ - -#ifndef CONFIG_DEBUG_SPINLOCK -#define INIT_THREAD { \ - 0, \ -} -#else /* CONFIG_DEBUG_SPINLOCK */ -#define INIT_THREAD { \ -/* smp_lock_count, smp_lock_pc, */ \ - 0, 0, \ -} -#endif /* !(CONFIG_DEBUG_SPINLOCK) */ - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> - -/* Return saved PC of a blocked thread. */ -struct task_struct; -extern unsigned long thread_saved_pc(struct task_struct *); - -/* On Uniprocessor, even in RMO processes see TSO semantics */ -#ifdef CONFIG_SMP -#define TSTATE_INITIAL_MM TSTATE_TSO -#else -#define TSTATE_INITIAL_MM TSTATE_RMO -#endif - -/* Do necessary setup to start up a newly executed thread. */ -#define start_thread(regs, pc, sp) \ -do { \ - unsigned long __asi = ASI_PNF; \ - regs->tstate = (regs->tstate & (TSTATE_CWP)) | (TSTATE_INITIAL_MM|TSTATE_IE) | (__asi << 24UL); \ - regs->tpc = ((pc & (~3)) - 4); \ - regs->tnpc = regs->tpc + 4; \ - regs->y = 0; \ - set_thread_wstate(1 << 3); \ - if (current_thread_info()->utraps) { \ - if (*(current_thread_info()->utraps) < 2) \ - kfree(current_thread_info()->utraps); \ - else \ - (*(current_thread_info()->utraps))--; \ - current_thread_info()->utraps = NULL; \ - } \ - __asm__ __volatile__( \ - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ - "stx %1, [%0 + %2 + 0x70]\n\t" \ - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ - "wrpr %%g0, (1 << 3), %%wstate\n\t" \ - : \ - : "r" (regs), "r" (sp - sizeof(struct reg_window) - STACK_BIAS), \ - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ -} while (0) - -#define start_thread32(regs, pc, sp) \ -do { \ - unsigned long __asi = ASI_PNF; \ - pc &= 0x00000000ffffffffUL; \ - sp &= 0x00000000ffffffffUL; \ - regs->tstate = (regs->tstate & (TSTATE_CWP))|(TSTATE_INITIAL_MM|TSTATE_IE|TSTATE_AM) | (__asi << 24UL); \ - regs->tpc = ((pc & (~3)) - 4); \ - regs->tnpc = regs->tpc + 4; \ - regs->y = 0; \ - set_thread_wstate(2 << 3); \ - if (current_thread_info()->utraps) { \ - if (*(current_thread_info()->utraps) < 2) \ - kfree(current_thread_info()->utraps); \ - else \ - (*(current_thread_info()->utraps))--; \ - current_thread_info()->utraps = NULL; \ - } \ - __asm__ __volatile__( \ - "stx %%g0, [%0 + %2 + 0x00]\n\t" \ - "stx %%g0, [%0 + %2 + 0x08]\n\t" \ - "stx %%g0, [%0 + %2 + 0x10]\n\t" \ - "stx %%g0, [%0 + %2 + 0x18]\n\t" \ - "stx %%g0, [%0 + %2 + 0x20]\n\t" \ - "stx %%g0, [%0 + %2 + 0x28]\n\t" \ - "stx %%g0, [%0 + %2 + 0x30]\n\t" \ - "stx %%g0, [%0 + %2 + 0x38]\n\t" \ - "stx %%g0, [%0 + %2 + 0x40]\n\t" \ - "stx %%g0, [%0 + %2 + 0x48]\n\t" \ - "stx %%g0, [%0 + %2 + 0x50]\n\t" \ - "stx %%g0, [%0 + %2 + 0x58]\n\t" \ - "stx %%g0, [%0 + %2 + 0x60]\n\t" \ - "stx %%g0, [%0 + %2 + 0x68]\n\t" \ - "stx %1, [%0 + %2 + 0x70]\n\t" \ - "stx %%g0, [%0 + %2 + 0x78]\n\t" \ - "wrpr %%g0, (2 << 3), %%wstate\n\t" \ - : \ - : "r" (regs), "r" (sp - sizeof(struct reg_window32)), \ - "i" ((const unsigned long)(&((struct pt_regs *)0)->u_regs[0]))); \ -} while (0) - -/* Free all resources held by a thread. */ -#define release_thread(tsk) do { } while (0) - -/* Prepare to copy thread state - unlazy all lazy status */ -#define prepare_to_copy(tsk) do { } while (0) - -extern pid_t kernel_thread(int (*fn)(void *), void * arg, unsigned long flags); - -extern unsigned long get_wchan(struct task_struct *task); - -#define task_pt_regs(tsk) (task_thread_info(tsk)->kregs) -#define KSTK_EIP(tsk) (task_pt_regs(tsk)->tpc) -#define KSTK_ESP(tsk) (task_pt_regs(tsk)->u_regs[UREG_FP]) - -#define cpu_relax() barrier() - -/* Prefetch support. This is tuned for UltraSPARC-III and later. - * UltraSPARC-I will treat these as nops, and UltraSPARC-II has - * a shallower prefetch queue than later chips. - */ -#define ARCH_HAS_PREFETCH -#define ARCH_HAS_PREFETCHW -#define ARCH_HAS_SPINLOCK_PREFETCH - -static inline void prefetch(const void *x) -{ - /* We do not use the read prefetch mnemonic because that - * prefetches into the prefetch-cache which only is accessible - * by floating point operations in UltraSPARC-III and later. - * By contrast, "#one_write" prefetches into the L2 cache - * in shared state. - */ - __asm__ __volatile__("prefetch [%0], #one_write" - : /* no outputs */ - : "r" (x)); -} - -static inline void prefetchw(const void *x) -{ - /* The most optimal prefetch to use for writes is - * "#n_writes". This brings the cacheline into the - * L2 cache in "owned" state. - */ - __asm__ __volatile__("prefetch [%0], #n_writes" - : /* no outputs */ - : "r" (x)); -} - -#define spin_lock_prefetch(x) prefetchw(x) - -#define HAVE_ARCH_PICK_MMAP_LAYOUT - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__ASM_SPARC64_PROCESSOR_H) */ +#include <asm-sparc/processor.h> diff --git a/include/asm-sparc64/ptrace.h b/include/asm-sparc64/ptrace.h index b163da79bb6..1a55b9fb3b0 100644 --- a/include/asm-sparc64/ptrace.h +++ b/include/asm-sparc64/ptrace.h @@ -1,346 +1 @@ -#ifndef _SPARC64_PTRACE_H -#define _SPARC64_PTRACE_H - -#include <asm/pstate.h> - -/* This struct defines the way the registers are stored on the - * stack during a system call and basically all traps. - */ - -/* This magic value must have the low 9 bits clear, - * as that is where we encode the %tt value, see below. - */ -#define PT_REGS_MAGIC 0x57ac6c00 - -#ifndef __ASSEMBLY__ - -#include <linux/types.h> - -struct pt_regs { - unsigned long u_regs[16]; /* globals and ins */ - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned int y; - - /* We encode a magic number, PT_REGS_MAGIC, along - * with the %tt (trap type) register value at trap - * entry time. The magic number allows us to identify - * accurately a trap stack frame in the stack - * unwinder, and the %tt value allows us to test - * things like "in a system call" etc. for an arbitray - * process. - * - * The PT_REGS_MAGIC is choosen such that it can be - * loaded completely using just a sethi instruction. - */ - unsigned int magic; -}; - -static inline int pt_regs_trap_type(struct pt_regs *regs) -{ - return regs->magic & 0x1ff; -} - -static inline bool pt_regs_is_syscall(struct pt_regs *regs) -{ - return (regs->tstate & TSTATE_SYSCALL); -} - -static inline bool pt_regs_clear_syscall(struct pt_regs *regs) -{ - return (regs->tstate &= ~TSTATE_SYSCALL); -} - -struct pt_regs32 { - unsigned int psr; - unsigned int pc; - unsigned int npc; - unsigned int y; - unsigned int u_regs[16]; /* globals and ins */ -}; - -#define UREG_G0 0 -#define UREG_G1 1 -#define UREG_G2 2 -#define UREG_G3 3 -#define UREG_G4 4 -#define UREG_G5 5 -#define UREG_G6 6 -#define UREG_G7 7 -#define UREG_I0 8 -#define UREG_I1 9 -#define UREG_I2 10 -#define UREG_I3 11 -#define UREG_I4 12 -#define UREG_I5 13 -#define UREG_I6 14 -#define UREG_I7 15 -#define UREG_FP UREG_I6 -#define UREG_RETPC UREG_I7 - -/* A V9 register window */ -struct reg_window { - unsigned long locals[8]; - unsigned long ins[8]; -}; - -/* A 32-bit register window. */ -struct reg_window32 { - unsigned int locals[8]; - unsigned int ins[8]; -}; - -/* A V9 Sparc stack frame */ -struct sparc_stackf { - unsigned long locals[8]; - unsigned long ins[6]; - struct sparc_stackf *fp; - unsigned long callers_pc; - char *structptr; - unsigned long xargs[6]; - unsigned long xxargs[1]; -}; - -/* A 32-bit Sparc stack frame */ -struct sparc_stackf32 { - unsigned int locals[8]; - unsigned int ins[6]; - unsigned int fp; - unsigned int callers_pc; - unsigned int structptr; - unsigned int xargs[6]; - unsigned int xxargs[1]; -}; - -struct sparc_trapf { - unsigned long locals[8]; - unsigned long ins[8]; - unsigned long _unused; - struct pt_regs *regs; -}; - -#define TRACEREG_SZ sizeof(struct pt_regs) -#define STACKFRAME_SZ sizeof(struct sparc_stackf) - -#define TRACEREG32_SZ sizeof(struct pt_regs32) -#define STACKFRAME32_SZ sizeof(struct sparc_stackf32) - -#ifdef __KERNEL__ - -struct global_reg_snapshot { - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned long o7; - unsigned long i7; - struct thread_info *thread; - unsigned long pad1; - unsigned long pad2; -}; - -#define __ARCH_WANT_COMPAT_SYS_PTRACE - -#define force_successful_syscall_return() \ -do { current_thread_info()->syscall_noerror = 1; \ -} while (0) -#define user_mode(regs) (!((regs)->tstate & TSTATE_PRIV)) -#define instruction_pointer(regs) ((regs)->tpc) -#define regs_return_value(regs) ((regs)->u_regs[UREG_I0]) -#ifdef CONFIG_SMP -extern unsigned long profile_pc(struct pt_regs *); -#else -#define profile_pc(regs) instruction_pointer(regs) -#endif -extern void show_regs(struct pt_regs *); -extern void __show_regs(struct pt_regs *); -#endif - -#else /* __ASSEMBLY__ */ -/* For assembly code. */ -#define TRACEREG_SZ 0xa0 -#define STACKFRAME_SZ 0xc0 - -#define TRACEREG32_SZ 0x50 -#define STACKFRAME32_SZ 0x60 -#endif - -#ifdef __KERNEL__ -#define STACK_BIAS 2047 -#endif - -/* These are for pt_regs. */ -#define PT_V9_G0 0x00 -#define PT_V9_G1 0x08 -#define PT_V9_G2 0x10 -#define PT_V9_G3 0x18 -#define PT_V9_G4 0x20 -#define PT_V9_G5 0x28 -#define PT_V9_G6 0x30 -#define PT_V9_G7 0x38 -#define PT_V9_I0 0x40 -#define PT_V9_I1 0x48 -#define PT_V9_I2 0x50 -#define PT_V9_I3 0x58 -#define PT_V9_I4 0x60 -#define PT_V9_I5 0x68 -#define PT_V9_I6 0x70 -#define PT_V9_FP PT_V9_I6 -#define PT_V9_I7 0x78 -#define PT_V9_TSTATE 0x80 -#define PT_V9_TPC 0x88 -#define PT_V9_TNPC 0x90 -#define PT_V9_Y 0x98 -#define PT_V9_MAGIC 0x9c -#define PT_TSTATE PT_V9_TSTATE -#define PT_TPC PT_V9_TPC -#define PT_TNPC PT_V9_TNPC - -/* These for pt_regs32. */ -#define PT_PSR 0x0 -#define PT_PC 0x4 -#define PT_NPC 0x8 -#define PT_Y 0xc -#define PT_G0 0x10 -#define PT_WIM PT_G0 -#define PT_G1 0x14 -#define PT_G2 0x18 -#define PT_G3 0x1c -#define PT_G4 0x20 -#define PT_G5 0x24 -#define PT_G6 0x28 -#define PT_G7 0x2c -#define PT_I0 0x30 -#define PT_I1 0x34 -#define PT_I2 0x38 -#define PT_I3 0x3c -#define PT_I4 0x40 -#define PT_I5 0x44 -#define PT_I6 0x48 -#define PT_FP PT_I6 -#define PT_I7 0x4c - -/* Reg_window offsets */ -#define RW_V9_L0 0x00 -#define RW_V9_L1 0x08 -#define RW_V9_L2 0x10 -#define RW_V9_L3 0x18 -#define RW_V9_L4 0x20 -#define RW_V9_L5 0x28 -#define RW_V9_L6 0x30 -#define RW_V9_L7 0x38 -#define RW_V9_I0 0x40 -#define RW_V9_I1 0x48 -#define RW_V9_I2 0x50 -#define RW_V9_I3 0x58 -#define RW_V9_I4 0x60 -#define RW_V9_I5 0x68 -#define RW_V9_I6 0x70 -#define RW_V9_I7 0x78 - -#define RW_L0 0x00 -#define RW_L1 0x04 -#define RW_L2 0x08 -#define RW_L3 0x0c -#define RW_L4 0x10 -#define RW_L5 0x14 -#define RW_L6 0x18 -#define RW_L7 0x1c -#define RW_I0 0x20 -#define RW_I1 0x24 -#define RW_I2 0x28 -#define RW_I3 0x2c -#define RW_I4 0x30 -#define RW_I5 0x34 -#define RW_I6 0x38 -#define RW_I7 0x3c - -/* Stack_frame offsets */ -#define SF_V9_L0 0x00 -#define SF_V9_L1 0x08 -#define SF_V9_L2 0x10 -#define SF_V9_L3 0x18 -#define SF_V9_L4 0x20 -#define SF_V9_L5 0x28 -#define SF_V9_L6 0x30 -#define SF_V9_L7 0x38 -#define SF_V9_I0 0x40 -#define SF_V9_I1 0x48 -#define SF_V9_I2 0x50 -#define SF_V9_I3 0x58 -#define SF_V9_I4 0x60 -#define SF_V9_I5 0x68 -#define SF_V9_FP 0x70 -#define SF_V9_PC 0x78 -#define SF_V9_RETP 0x80 -#define SF_V9_XARG0 0x88 -#define SF_V9_XARG1 0x90 -#define SF_V9_XARG2 0x98 -#define SF_V9_XARG3 0xa0 -#define SF_V9_XARG4 0xa8 -#define SF_V9_XARG5 0xb0 -#define SF_V9_XXARG 0xb8 - -#define SF_L0 0x00 -#define SF_L1 0x04 -#define SF_L2 0x08 -#define SF_L3 0x0c -#define SF_L4 0x10 -#define SF_L5 0x14 -#define SF_L6 0x18 -#define SF_L7 0x1c -#define SF_I0 0x20 -#define SF_I1 0x24 -#define SF_I2 0x28 -#define SF_I3 0x2c -#define SF_I4 0x30 -#define SF_I5 0x34 -#define SF_FP 0x38 -#define SF_PC 0x3c -#define SF_RETP 0x40 -#define SF_XARG0 0x44 -#define SF_XARG1 0x48 -#define SF_XARG2 0x4c -#define SF_XARG3 0x50 -#define SF_XARG4 0x54 -#define SF_XARG5 0x58 -#define SF_XXARG 0x5c - -#ifdef __KERNEL__ - -/* global_reg_snapshot offsets */ -#define GR_SNAP_TSTATE 0x00 -#define GR_SNAP_TPC 0x08 -#define GR_SNAP_TNPC 0x10 -#define GR_SNAP_O7 0x18 -#define GR_SNAP_I7 0x20 -#define GR_SNAP_THREAD 0x28 -#define GR_SNAP_PAD1 0x30 -#define GR_SNAP_PAD2 0x38 - -#endif /* __KERNEL__ */ - -/* Stuff for the ptrace system call */ -#define PTRACE_SPARC_DETACH 11 -#define PTRACE_GETREGS 12 -#define PTRACE_SETREGS 13 -#define PTRACE_GETFPREGS 14 -#define PTRACE_SETFPREGS 15 -#define PTRACE_READDATA 16 -#define PTRACE_WRITEDATA 17 -#define PTRACE_READTEXT 18 -#define PTRACE_WRITETEXT 19 -#define PTRACE_GETFPAREGS 20 -#define PTRACE_SETFPAREGS 21 - -/* There are for debugging 64-bit processes, either from a 32 or 64 bit - * parent. Thus their complements are for debugging 32-bit processes only. - */ - -#define PTRACE_GETREGS64 22 -#define PTRACE_SETREGS64 23 -/* PTRACE_SYSCALL is 24 */ -#define PTRACE_GETFPREGS64 25 -#define PTRACE_SETFPREGS64 26 - -#endif /* !(_SPARC64_PTRACE_H) */ +#include <asm-sparc/ptrace.h> diff --git a/include/asm-sparc64/reg.h b/include/asm-sparc64/reg.h index 77aa4804a60..495bab27da0 100644 --- a/include/asm-sparc64/reg.h +++ b/include/asm-sparc64/reg.h @@ -1,56 +1 @@ -/* - * linux/asm-sparc64/reg.h - * Layout of the registers as expected by gdb on the Sparc - * we should replace the user.h definitions with those in - * this file, we don't even use the other - * -miguel - * - * The names of the structures, constants and aliases in this file - * have the same names as the sunos ones, some programs rely on these - * names (gdb for example). - * - */ - -#ifndef __SPARC64_REG_H -#define __SPARC64_REG_H - -struct regs { - unsigned long r_g1; - unsigned long r_g2; - unsigned long r_g3; - unsigned long r_g4; - unsigned long r_g5; - unsigned long r_g6; - unsigned long r_g7; - unsigned long r_o0; - unsigned long r_o1; - unsigned long r_o2; - unsigned long r_o3; - unsigned long r_o4; - unsigned long r_o5; - unsigned long r_o6; - unsigned long r_o7; - unsigned long __pad; - unsigned long r_tstate; - unsigned long r_tpc; - unsigned long r_tnpc; - unsigned int r_y; - unsigned int r_fprs; -}; - -#define FPU_REGS_TYPE unsigned int -#define FPU_FSR_TYPE unsigned long - -struct fp_status { - unsigned long fpu_fr[32]; - unsigned long Fpu_fsr; -}; - -struct fpu { - struct fp_status f_fpstatus; -}; - -#define fpu_regs f_fpstatus.fpu_fr -#define fpu_fsr f_fpstatus.Fpu_fsr - -#endif /* __SPARC64_REG_H */ +#include <asm-sparc/reg.h> diff --git a/include/asm-sparc64/sbus.h b/include/asm-sparc64/sbus.h index 24a04a55cf8..0cab0e89b87 100644 --- a/include/asm-sparc64/sbus.h +++ b/include/asm-sparc64/sbus.h @@ -1,190 +1 @@ -/* sbus.h: Defines for the Sun SBus. - * - * Copyright (C) 1996, 1999, 2007 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_SBUS_H -#define _SPARC64_SBUS_H - -#include <linux/dma-mapping.h> -#include <linux/ioport.h> - -#include <asm/oplib.h> -#include <asm/prom.h> -#include <asm/of_device.h> -#include <asm/iommu.h> -#include <asm/scatterlist.h> - -/* We scan which devices are on the SBus using the PROM node device - * tree. SBus devices are described in two different ways. You can - * either get an absolute address at which to access the device, or - * you can get a SBus 'slot' number and an offset within that slot. - */ - -/* The base address at which to calculate device OBIO addresses. */ -#define SUN_SBUS_BVADDR 0x00000000 -#define SBUS_OFF_MASK 0x0fffffff - -/* These routines are used to calculate device address from slot - * numbers + offsets, and vice versa. - */ - -static inline unsigned long sbus_devaddr(int slotnum, unsigned long offset) -{ - return (unsigned long) (SUN_SBUS_BVADDR+((slotnum)<<28)+(offset)); -} - -static inline int sbus_dev_slot(unsigned long dev_addr) -{ - return (int) (((dev_addr)-SUN_SBUS_BVADDR)>>28); -} - -struct sbus_bus; - -/* Linux SBUS device tables */ -struct sbus_dev { - struct of_device ofdev; - struct sbus_bus *bus; - struct sbus_dev *next; - struct sbus_dev *child; - struct sbus_dev *parent; - int prom_node; - char prom_name[64]; - int slot; - - struct resource resource[PROMREG_MAX]; - - struct linux_prom_registers reg_addrs[PROMREG_MAX]; - int num_registers; - - struct linux_prom_ranges device_ranges[PROMREG_MAX]; - int num_device_ranges; - - unsigned int irqs[4]; - int num_irqs; -}; -#define to_sbus_device(d) container_of(d, struct sbus_dev, ofdev.dev) - -/* This struct describes the SBus(s) found on this machine. */ -struct sbus_bus { - struct of_device ofdev; - struct sbus_dev *devices; /* Tree of SBUS devices */ - struct sbus_bus *next; /* Next SBUS in system */ - int prom_node; /* OBP node of SBUS */ - char prom_name[64]; /* Usually "sbus" or "sbi" */ - int clock_freq; - - struct linux_prom_ranges sbus_ranges[PROMREG_MAX]; - int num_sbus_ranges; - - int portid; -}; -#define to_sbus(d) container_of(d, struct sbus_bus, ofdev.dev) - -extern struct sbus_bus *sbus_root; - -/* Device probing routines could find these handy */ -#define for_each_sbus(bus) \ - for((bus) = sbus_root; (bus); (bus)=(bus)->next) - -#define for_each_sbusdev(device, bus) \ - for((device) = (bus)->devices; (device); (device)=(device)->next) - -#define for_all_sbusdev(device, bus) \ - for ((bus) = sbus_root; (bus); (bus) = (bus)->next) \ - for ((device) = (bus)->devices; (device); (device) = (device)->next) - -/* Driver DVMA interfaces. */ -#define sbus_can_dma_64bit(sdev) (1) -#define sbus_can_burst64(sdev) (1) -extern void sbus_set_sbus64(struct sbus_dev *, int); -extern void sbus_fill_device_irq(struct sbus_dev *); - -static inline void *sbus_alloc_consistent(struct sbus_dev *sdev , size_t size, - dma_addr_t *dma_handle) -{ - return dma_alloc_coherent(&sdev->ofdev.dev, size, - dma_handle, GFP_ATOMIC); -} - -static inline void sbus_free_consistent(struct sbus_dev *sdev, size_t size, - void *vaddr, dma_addr_t dma_handle) -{ - return dma_free_coherent(&sdev->ofdev.dev, size, vaddr, dma_handle); -} - -#define SBUS_DMA_BIDIRECTIONAL DMA_BIDIRECTIONAL -#define SBUS_DMA_TODEVICE DMA_TO_DEVICE -#define SBUS_DMA_FROMDEVICE DMA_FROM_DEVICE -#define SBUS_DMA_NONE DMA_NONE - -/* All the rest use streaming mode mappings. */ -static inline dma_addr_t sbus_map_single(struct sbus_dev *sdev, void *ptr, - size_t size, int direction) -{ - return dma_map_single(&sdev->ofdev.dev, ptr, size, - (enum dma_data_direction) direction); -} - -static inline void sbus_unmap_single(struct sbus_dev *sdev, - dma_addr_t dma_addr, size_t size, - int direction) -{ - dma_unmap_single(&sdev->ofdev.dev, dma_addr, size, - (enum dma_data_direction) direction); -} - -static inline int sbus_map_sg(struct sbus_dev *sdev, struct scatterlist *sg, - int nents, int direction) -{ - return dma_map_sg(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} - -static inline void sbus_unmap_sg(struct sbus_dev *sdev, struct scatterlist *sg, - int nents, int direction) -{ - dma_unmap_sg(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} - -/* Finally, allow explicit synchronization of streamable mappings. */ -static inline void sbus_dma_sync_single_for_cpu(struct sbus_dev *sdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - dma_sync_single_for_cpu(&sdev->ofdev.dev, dma_handle, size, - (enum dma_data_direction) direction); -} -#define sbus_dma_sync_single sbus_dma_sync_single_for_cpu - -static inline void sbus_dma_sync_single_for_device(struct sbus_dev *sdev, - dma_addr_t dma_handle, - size_t size, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -static inline void sbus_dma_sync_sg_for_cpu(struct sbus_dev *sdev, - struct scatterlist *sg, - int nents, int direction) -{ - dma_sync_sg_for_cpu(&sdev->ofdev.dev, sg, nents, - (enum dma_data_direction) direction); -} -#define sbus_dma_sync_sg sbus_dma_sync_sg_for_cpu - -static inline void sbus_dma_sync_sg_for_device(struct sbus_dev *sdev, - struct scatterlist *sg, - int nents, int direction) -{ - /* No flushing needed to sync cpu writes to the device. */ -} - -extern void sbus_arch_bus_ranges_init(struct device_node *, struct sbus_bus *); -extern void sbus_setup_iommu(struct sbus_bus *, struct device_node *); -extern void sbus_setup_arch_props(struct sbus_bus *, struct device_node *); -extern int sbus_arch_preinit(void); -extern void sbus_arch_postinit(void); - -#endif /* !(_SPARC64_SBUS_H) */ +#include <asm-sparc/sbus.h> diff --git a/include/asm-sparc64/scatterlist.h b/include/asm-sparc64/scatterlist.h index 81bd058f938..b7fef95953c 100644 --- a/include/asm-sparc64/scatterlist.h +++ b/include/asm-sparc64/scatterlist.h @@ -1,27 +1 @@ -#ifndef _SPARC64_SCATTERLIST_H -#define _SPARC64_SCATTERLIST_H - -#include <asm/page.h> -#include <asm/types.h> - -struct scatterlist { -#ifdef CONFIG_DEBUG_SG - unsigned long sg_magic; -#endif - unsigned long page_link; - unsigned int offset; - - unsigned int length; - - dma_addr_t dma_address; - __u32 dma_length; -}; - -#define sg_dma_address(sg) ((sg)->dma_address) -#define sg_dma_len(sg) ((sg)->dma_length) - -#define ISA_DMA_THRESHOLD (~0UL) - -#define ARCH_HAS_SG_CHAIN - -#endif /* !(_SPARC64_SCATTERLIST_H) */ +#include <asm-sparc/scatterlist.h> diff --git a/include/asm-sparc64/sections.h b/include/asm-sparc64/sections.h index 3f4b9fdc28d..721496f8b2b 100644 --- a/include/asm-sparc64/sections.h +++ b/include/asm-sparc64/sections.h @@ -1,9 +1 @@ -#ifndef _SPARC64_SECTIONS_H -#define _SPARC64_SECTIONS_H - -/* nothing to see, move along */ -#include <asm-generic/sections.h> - -extern char _start[]; - -#endif +#include <asm-sparc/sections.h> diff --git a/include/asm-sparc64/sfp-machine.h b/include/asm-sparc64/sfp-machine.h index c9331b02d9c..7bbc4fecdc7 100644 --- a/include/asm-sparc64/sfp-machine.h +++ b/include/asm-sparc64/sfp-machine.h @@ -1,93 +1 @@ -/* Machine-dependent software floating-point definitions. - Sparc64 kernel version. - Copyright (C) 1997,1998,1999 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Richard Henderson (rth@cygnus.com), - Jakub Jelinek (jj@ultra.linux.cz) and - David S. Miller (davem@redhat.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Library General Public License as - published by the Free Software Foundation; either version 2 of the - License, or (at your option) any later version. - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Library General Public License for more details. - - You should have received a copy of the GNU Library General Public - License along with the GNU C Library; see the file COPYING.LIB. If - not, write to the Free Software Foundation, Inc., - 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - -#ifndef _SFP_MACHINE_H -#define _SFP_MACHINE_H - -#define _FP_W_TYPE_SIZE 64 -#define _FP_W_TYPE unsigned long -#define _FP_WS_TYPE signed long -#define _FP_I_TYPE long - -#define _FP_MUL_MEAT_S(R,X,Y) \ - _FP_MUL_MEAT_1_imm(_FP_WFRACBITS_S,R,X,Y) -#define _FP_MUL_MEAT_D(R,X,Y) \ - _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) -#define _FP_MUL_MEAT_Q(R,X,Y) \ - _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) - -#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_imm(S,R,X,Y,_FP_DIV_HELP_imm) -#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_1_udiv_norm(D,R,X,Y) -#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) - -#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1) -#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1) -#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1 -#define _FP_NANSIGN_S 0 -#define _FP_NANSIGN_D 0 -#define _FP_NANSIGN_Q 0 - -#define _FP_KEEPNANFRACP 1 - -/* If one NaN is signaling and the other is not, - * we choose that one, otherwise we choose X. - */ -/* For _Qp_* and _Q_*, this should prefer X, for - * CPU instruction emulation this should prefer Y. - * (see SPAMv9 B.2.2 section). - */ -#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \ - do { \ - if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs) \ - && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs)) \ - { \ - R##_s = X##_s; \ - _FP_FRAC_COPY_##wc(R,X); \ - } \ - else \ - { \ - R##_s = Y##_s; \ - _FP_FRAC_COPY_##wc(R,Y); \ - } \ - R##_c = FP_CLS_NAN; \ - } while (0) - -/* Obtain the current rounding mode. */ -#ifndef FP_ROUNDMODE -#define FP_ROUNDMODE ((current_thread_info()->xfsr[0] >> 30) & 0x3) -#endif - -/* Exception flags. */ -#define FP_EX_INVALID (1 << 4) -#define FP_EX_OVERFLOW (1 << 3) -#define FP_EX_UNDERFLOW (1 << 2) -#define FP_EX_DIVZERO (1 << 1) -#define FP_EX_INEXACT (1 << 0) - -#define FP_HANDLE_EXCEPTIONS return _fex - -#define FP_INHIBIT_RESULTS ((current_thread_info()->xfsr[0] >> 23) & _fex) - -#define FP_TRAPPING_EXCEPTIONS ((current_thread_info()->xfsr[0] >> 23) & 0x1f) - -#endif +#include <asm-sparc/sfp-machine.h> diff --git a/include/asm-sparc64/shmparam.h b/include/asm-sparc64/shmparam.h index 1ed0d6701a9..5fa3a9b05e7 100644 --- a/include/asm-sparc64/shmparam.h +++ b/include/asm-sparc64/shmparam.h @@ -1,10 +1 @@ -#ifndef _ASMSPARC64_SHMPARAM_H -#define _ASMSPARC64_SHMPARAM_H - -#include <asm/spitfire.h> - -#define __ARCH_FORCE_SHMLBA 1 -/* attach addr a multiple of this */ -#define SHMLBA ((PAGE_SIZE > L1DCACHE_SIZE) ? PAGE_SIZE : L1DCACHE_SIZE) - -#endif /* _ASMSPARC64_SHMPARAM_H */ +#include <asm-sparc/shmparam.h> diff --git a/include/asm-sparc64/sigcontext.h b/include/asm-sparc64/sigcontext.h index 1c868d680cf..5b16dcce44f 100644 --- a/include/asm-sparc64/sigcontext.h +++ b/include/asm-sparc64/sigcontext.h @@ -1,87 +1 @@ -#ifndef __SPARC64_SIGCONTEXT_H -#define __SPARC64_SIGCONTEXT_H - -#ifdef __KERNEL__ -#include <asm/ptrace.h> -#endif - -#ifndef __ASSEMBLY__ - -#ifdef __KERNEL__ - -#define __SUNOS_MAXWIN 31 - -/* This is what SunOS does, so shall I unless we use new 32bit signals or rt signals. */ -struct sigcontext32 { - int sigc_onstack; /* state to restore */ - int sigc_mask; /* sigmask to restore */ - int sigc_sp; /* stack pointer */ - int sigc_pc; /* program counter */ - int sigc_npc; /* next program counter */ - int sigc_psr; /* for condition codes etc */ - int sigc_g1; /* User uses these two registers */ - int sigc_o0; /* within the trampoline code. */ - - /* Now comes information regarding the users window set - * at the time of the signal. - */ - int sigc_oswins; /* outstanding windows */ - - /* stack ptrs for each regwin buf */ - unsigned sigc_spbuf[__SUNOS_MAXWIN]; - - /* Windows to restore after signal */ - struct reg_window32 sigc_wbuf[__SUNOS_MAXWIN]; -}; - -#endif - -#ifdef __KERNEL__ - -/* This is what we use for 32bit new non-rt signals. */ - -typedef struct { - struct { - unsigned int psr; - unsigned int pc; - unsigned int npc; - unsigned int y; - unsigned int u_regs[16]; /* globals and ins */ - } si_regs; - int si_mask; -} __siginfo32_t; - -#endif - -typedef struct { - unsigned int si_float_regs [64]; - unsigned long si_fsr; - unsigned long si_gsr; - unsigned long si_fprs; -} __siginfo_fpu_t; - -/* This is what SunOS doesn't, so we have to write this alone - and do it properly. */ -struct sigcontext { - /* The size of this array has to match SI_MAX_SIZE from siginfo.h */ - char sigc_info[128]; - struct { - unsigned long u_regs[16]; /* globals and ins */ - unsigned long tstate; - unsigned long tpc; - unsigned long tnpc; - unsigned int y; - unsigned int fprs; - } sigc_regs; - __siginfo_fpu_t * sigc_fpu_save; - struct { - void * ss_sp; - int ss_flags; - unsigned long ss_size; - } sigc_stack; - unsigned long sigc_mask; -}; - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_SIGCONTEXT_H) */ +#include <asm-sparc/sigcontext.h> diff --git a/include/asm-sparc64/siginfo.h b/include/asm-sparc64/siginfo.h index c96e6c30f8b..8ffd6ebabc7 100644 --- a/include/asm-sparc64/siginfo.h +++ b/include/asm-sparc64/siginfo.h @@ -1,32 +1 @@ -#ifndef _SPARC64_SIGINFO_H -#define _SPARC64_SIGINFO_H - -#define SI_PAD_SIZE32 ((SI_MAX_SIZE/sizeof(int)) - 3) - -#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) -#define __ARCH_SI_TRAPNO -#define __ARCH_SI_BAND_T int - -#include <asm-generic/siginfo.h> - -#ifdef __KERNEL__ - -#include <linux/compat.h> - -#ifdef CONFIG_COMPAT - -struct compat_siginfo; - -#endif /* CONFIG_COMPAT */ - -#endif /* __KERNEL__ */ - -#define SI_NOINFO 32767 /* no information in siginfo_t */ - -/* - * SIGEMT si_codes - */ -#define EMT_TAGOVF (__SI_FAULT|1) /* tag overflow */ -#define NSIGEMT 1 - -#endif +#include <asm-sparc/siginfo.h> diff --git a/include/asm-sparc64/signal.h b/include/asm-sparc64/signal.h index 2a7c7934ac0..79705e5d49c 100644 --- a/include/asm-sparc64/signal.h +++ b/include/asm-sparc64/signal.h @@ -1,194 +1 @@ -#ifndef _ASMSPARC64_SIGNAL_H -#define _ASMSPARC64_SIGNAL_H - -#include <asm/sigcontext.h> - -#ifdef __KERNEL__ -#ifndef __ASSEMBLY__ -#include <linux/personality.h> -#include <linux/types.h> -#endif -#endif - -/* On the Sparc the signal handlers get passed a 'sub-signal' code - * for certain signal types, which we document here. - */ -#define SIGHUP 1 -#define SIGINT 2 -#define SIGQUIT 3 -#define SIGILL 4 -#define SUBSIG_STACK 0 -#define SUBSIG_ILLINST 2 -#define SUBSIG_PRIVINST 3 -#define SUBSIG_BADTRAP(t) (0x80 + (t)) - -#define SIGTRAP 5 -#define SIGABRT 6 -#define SIGIOT 6 - -#define SIGEMT 7 -#define SUBSIG_TAG 10 - -#define SIGFPE 8 -#define SUBSIG_FPDISABLED 0x400 -#define SUBSIG_FPERROR 0x404 -#define SUBSIG_FPINTOVFL 0x001 -#define SUBSIG_FPSTSIG 0x002 -#define SUBSIG_IDIVZERO 0x014 -#define SUBSIG_FPINEXACT 0x0c4 -#define SUBSIG_FPDIVZERO 0x0c8 -#define SUBSIG_FPUNFLOW 0x0cc -#define SUBSIG_FPOPERROR 0x0d0 -#define SUBSIG_FPOVFLOW 0x0d4 - -#define SIGKILL 9 -#define SIGBUS 10 -#define SUBSIG_BUSTIMEOUT 1 -#define SUBSIG_ALIGNMENT 2 -#define SUBSIG_MISCERROR 5 - -#define SIGSEGV 11 -#define SUBSIG_NOMAPPING 3 -#define SUBSIG_PROTECTION 4 -#define SUBSIG_SEGERROR 5 - -#define SIGSYS 12 - -#define SIGPIPE 13 -#define SIGALRM 14 -#define SIGTERM 15 -#define SIGURG 16 - -/* SunOS values which deviate from the Linux/i386 ones */ -#define SIGSTOP 17 -#define SIGTSTP 18 -#define SIGCONT 19 -#define SIGCHLD 20 -#define SIGTTIN 21 -#define SIGTTOU 22 -#define SIGIO 23 -#define SIGPOLL SIGIO /* SysV name for SIGIO */ -#define SIGXCPU 24 -#define SIGXFSZ 25 -#define SIGVTALRM 26 -#define SIGPROF 27 -#define SIGWINCH 28 -#define SIGLOST 29 -#define SIGPWR SIGLOST -#define SIGUSR1 30 -#define SIGUSR2 31 - -/* Most things should be clean enough to redefine this at will, if care - is taken to make libc match. */ - -#define __OLD_NSIG 32 -#define __NEW_NSIG 64 -#define _NSIG_BPW 64 -#define _NSIG_WORDS (__NEW_NSIG / _NSIG_BPW) - -#define SIGRTMIN 32 -#define SIGRTMAX __NEW_NSIG - -#if defined(__KERNEL__) || defined(__WANT_POSIX1B_SIGNALS__) -#define _NSIG __NEW_NSIG -#define __new_sigset_t sigset_t -#define __new_sigaction sigaction -#define __new_sigaction32 sigaction32 -#define __old_sigset_t old_sigset_t -#define __old_sigaction old_sigaction -#define __old_sigaction32 old_sigaction32 -#else -#define _NSIG __OLD_NSIG -#define NSIG _NSIG -#define __old_sigset_t sigset_t -#define __old_sigaction sigaction -#define __old_sigaction32 sigaction32 -#endif - -#ifndef __ASSEMBLY__ - -typedef unsigned long __old_sigset_t; /* at least 32 bits */ - -typedef struct { - unsigned long sig[_NSIG_WORDS]; -} __new_sigset_t; - -/* A SunOS sigstack */ -struct sigstack { - /* XXX 32-bit pointers pinhead XXX */ - char *the_stack; - int cur_status; -}; - -/* Sigvec flags */ -#define _SV_SSTACK 1u /* This signal handler should use sig-stack */ -#define _SV_INTR 2u /* Sig return should not restart system call */ -#define _SV_RESET 4u /* Set handler to SIG_DFL upon taken signal */ -#define _SV_IGNCHILD 8u /* Do not send SIGCHLD */ - -/* - * sa_flags values: SA_STACK is not currently supported, but will allow the - * usage of signal stacks by using the (now obsolete) sa_restorer field in - * the sigaction structure as a stack pointer. This is now possible due to - * the changes in signal handling. LBT 010493. - * SA_RESTART flag to get restarting signals (which were the default long ago) - */ -#define SA_NOCLDSTOP _SV_IGNCHILD -#define SA_STACK _SV_SSTACK -#define SA_ONSTACK _SV_SSTACK -#define SA_RESTART _SV_INTR -#define SA_ONESHOT _SV_RESET -#define SA_NOMASK 0x20u -#define SA_NOCLDWAIT 0x100u -#define SA_SIGINFO 0x200u - - -#define SIG_BLOCK 0x01 /* for blocking signals */ -#define SIG_UNBLOCK 0x02 /* for unblocking signals */ -#define SIG_SETMASK 0x04 /* for setting the signal mask */ - -/* - * sigaltstack controls - */ -#define SS_ONSTACK 1 -#define SS_DISABLE 2 - -#define MINSIGSTKSZ 4096 -#define SIGSTKSZ 16384 - -#include <asm-generic/signal.h> - -struct __new_sigaction { - __sighandler_t sa_handler; - unsigned long sa_flags; - __sigrestore_t sa_restorer; /* not used by Linux/SPARC yet */ - __new_sigset_t sa_mask; -}; - -struct __old_sigaction { - __sighandler_t sa_handler; - __old_sigset_t sa_mask; - unsigned long sa_flags; - void (*sa_restorer)(void); /* not used by Linux/SPARC yet */ -}; - -typedef struct sigaltstack { - void __user *ss_sp; - int ss_flags; - size_t ss_size; -} stack_t; - -#ifdef __KERNEL__ - -struct k_sigaction { - struct __new_sigaction sa; - void __user *ka_restorer; -}; - -#define ptrace_signal_deliver(regs, cookie) do { } while (0) - -#endif /* !(__KERNEL__) */ - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(_ASMSPARC64_SIGNAL_H) */ +#include <asm-sparc/signal.h> diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h index cd0311b2e19..5095a2cbea5 100644 --- a/include/asm-sparc64/smp.h +++ b/include/asm-sparc64/smp.h @@ -1,64 +1 @@ -/* smp.h: Sparc64 specific SMP stuff. - * - * Copyright (C) 1996, 2008 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_SMP_H -#define _SPARC64_SMP_H - -#include <linux/threads.h> -#include <asm/asi.h> -#include <asm/starfire.h> -#include <asm/spitfire.h> - -#ifndef __ASSEMBLY__ - -#include <linux/cpumask.h> -#include <linux/cache.h> - -#endif /* !(__ASSEMBLY__) */ - -#ifdef CONFIG_SMP - -#ifndef __ASSEMBLY__ - -/* - * Private routines/data - */ - -#include <linux/bitops.h> -#include <asm/atomic.h> -#include <asm/percpu.h> - -DECLARE_PER_CPU(cpumask_t, cpu_sibling_map); -extern cpumask_t cpu_core_map[NR_CPUS]; -extern int sparc64_multi_core; - -/* - * General functions that each host system must provide. - */ - -extern int hard_smp_processor_id(void); -#define raw_smp_processor_id() (current_thread_info()->cpu) - -extern void smp_fill_in_sib_core_maps(void); -extern void cpu_play_dead(void); - -extern void smp_fetch_global_regs(void); - -#ifdef CONFIG_HOTPLUG_CPU -extern int __cpu_disable(void); -extern void __cpu_die(unsigned int cpu); -#endif - -#endif /* !(__ASSEMBLY__) */ - -#else - -#define hard_smp_processor_id() 0 -#define smp_fill_in_sib_core_maps() do { } while (0) -#define smp_fetch_global_regs() do { } while (0) - -#endif /* !(CONFIG_SMP) */ - -#endif /* !(_SPARC64_SMP_H) */ +#include <asm-sparc/smp.h> diff --git a/include/asm-sparc64/spinlock.h b/include/asm-sparc64/spinlock.h index 0006fe9f8c7..0115b8156eb 100644 --- a/include/asm-sparc64/spinlock.h +++ b/include/asm-sparc64/spinlock.h @@ -1,250 +1 @@ -/* spinlock.h: 64-bit Sparc spinlock support. - * - * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu) - */ - -#ifndef __SPARC64_SPINLOCK_H -#define __SPARC64_SPINLOCK_H - -#include <linux/threads.h> /* For NR_CPUS */ - -#ifndef __ASSEMBLY__ - -/* To get debugging spinlocks which detect and catch - * deadlock situations, set CONFIG_DEBUG_SPINLOCK - * and rebuild your kernel. - */ - -/* All of these locking primitives are expected to work properly - * even in an RMO memory model, which currently is what the kernel - * runs in. - * - * There is another issue. Because we play games to save cycles - * in the non-contention case, we need to be extra careful about - * branch targets into the "spinning" code. They live in their - * own section, but the newer V9 branches have a shorter range - * than the traditional 32-bit sparc branch variants. The rule - * is that the branches that go into and out of the spinner sections - * must be pre-V9 branches. - */ - -#define __raw_spin_is_locked(lp) ((lp)->lock != 0) - -#define __raw_spin_unlock_wait(lp) \ - do { rmb(); \ - } while((lp)->lock) - -static inline void __raw_spin_lock(raw_spinlock_t *lock) -{ - unsigned long tmp; - - __asm__ __volatile__( -"1: ldstub [%1], %0\n" -" membar #StoreLoad | #StoreStore\n" -" brnz,pn %0, 2f\n" -" nop\n" -" .subsection 2\n" -"2: ldub [%1], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 1b\n" -" .previous" - : "=&r" (tmp) - : "r" (lock) - : "memory"); -} - -static inline int __raw_spin_trylock(raw_spinlock_t *lock) -{ - unsigned long result; - - __asm__ __volatile__( -" ldstub [%1], %0\n" -" membar #StoreLoad | #StoreStore" - : "=r" (result) - : "r" (lock) - : "memory"); - - return (result == 0UL); -} - -static inline void __raw_spin_unlock(raw_spinlock_t *lock) -{ - __asm__ __volatile__( -" membar #StoreStore | #LoadStore\n" -" stb %%g0, [%0]" - : /* No outputs */ - : "r" (lock) - : "memory"); -} - -static inline void __raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long flags) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -"1: ldstub [%2], %0\n" -" membar #StoreLoad | #StoreStore\n" -" brnz,pn %0, 2f\n" -" nop\n" -" .subsection 2\n" -"2: rdpr %%pil, %1\n" -" wrpr %3, %%pil\n" -"3: ldub [%2], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 3b\n" -" nop\n" -" ba,pt %%xcc, 1b\n" -" wrpr %1, %%pil\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r"(lock), "r"(flags) - : "memory"); -} - -/* Multi-reader locks, these are much saner than the 32-bit Sparc ones... */ - -static void inline __read_lock(raw_rwlock_t *lock) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__ ( -"1: ldsw [%2], %0\n" -" brlz,pn %0, 2f\n" -"4: add %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" .subsection 2\n" -"2: ldsw [%2], %0\n" -" membar #LoadLoad\n" -" brlz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 4b\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); -} - -static int inline __read_trylock(raw_rwlock_t *lock) -{ - int tmp1, tmp2; - - __asm__ __volatile__ ( -"1: ldsw [%2], %0\n" -" brlz,a,pn %0, 2f\n" -" mov 0, %0\n" -" add %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" mov 1, %0\n" -"2:" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); - - return tmp1; -} - -static void inline __read_unlock(raw_rwlock_t *lock) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -"1: lduw [%2], %0\n" -" sub %0, 1, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" bne,pn %%xcc, 1b\n" -" nop" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock) - : "memory"); -} - -static void inline __write_lock(raw_rwlock_t *lock) -{ - unsigned long mask, tmp1, tmp2; - - mask = 0x80000000UL; - - __asm__ __volatile__( -"1: lduw [%2], %0\n" -" brnz,pn %0, 2f\n" -"4: or %0, %3, %1\n" -" cas [%2], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" .subsection 2\n" -"2: lduw [%2], %0\n" -" membar #LoadLoad\n" -" brnz,pt %0, 2b\n" -" nop\n" -" ba,a,pt %%xcc, 4b\n" -" .previous" - : "=&r" (tmp1), "=&r" (tmp2) - : "r" (lock), "r" (mask) - : "memory"); -} - -static void inline __write_unlock(raw_rwlock_t *lock) -{ - __asm__ __volatile__( -" membar #LoadStore | #StoreStore\n" -" stw %%g0, [%0]" - : /* no outputs */ - : "r" (lock) - : "memory"); -} - -static int inline __write_trylock(raw_rwlock_t *lock) -{ - unsigned long mask, tmp1, tmp2, result; - - mask = 0x80000000UL; - - __asm__ __volatile__( -" mov 0, %2\n" -"1: lduw [%3], %0\n" -" brnz,pn %0, 2f\n" -" or %0, %4, %1\n" -" cas [%3], %0, %1\n" -" cmp %0, %1\n" -" membar #StoreLoad | #StoreStore\n" -" bne,pn %%icc, 1b\n" -" nop\n" -" mov 1, %2\n" -"2:" - : "=&r" (tmp1), "=&r" (tmp2), "=&r" (result) - : "r" (lock), "r" (mask) - : "memory"); - - return result; -} - -#define __raw_read_lock(p) __read_lock(p) -#define __raw_read_trylock(p) __read_trylock(p) -#define __raw_read_unlock(p) __read_unlock(p) -#define __raw_write_lock(p) __write_lock(p) -#define __raw_write_unlock(p) __write_unlock(p) -#define __raw_write_trylock(p) __write_trylock(p) - -#define __raw_read_can_lock(rw) (!((rw)->lock & 0x80000000UL)) -#define __raw_write_can_lock(rw) (!(rw)->lock) - -#define _raw_spin_relax(lock) cpu_relax() -#define _raw_read_relax(lock) cpu_relax() -#define _raw_write_relax(lock) cpu_relax() - -#endif /* !(__ASSEMBLY__) */ - -#endif /* !(__SPARC64_SPINLOCK_H) */ +#include <asm-sparc/spinlock.h> diff --git a/include/asm-sparc64/stat.h b/include/asm-sparc64/stat.h index 9650fdea847..b108a866256 100644 --- a/include/asm-sparc64/stat.h +++ b/include/asm-sparc64/stat.h @@ -1,47 +1 @@ -#ifndef _SPARC64_STAT_H -#define _SPARC64_STAT_H - -#include <linux/types.h> - -struct stat { - unsigned st_dev; - ino_t st_ino; - mode_t st_mode; - short st_nlink; - uid_t st_uid; - gid_t st_gid; - unsigned st_rdev; - off_t st_size; - time_t st_atime; - time_t st_mtime; - time_t st_ctime; - off_t st_blksize; - off_t st_blocks; - unsigned long __unused4[2]; -}; - -struct stat64 { - unsigned long st_dev; - unsigned long st_ino; - unsigned long st_nlink; - - unsigned int st_mode; - unsigned int st_uid; - unsigned int st_gid; - unsigned int __pad0; - - unsigned long st_rdev; - long st_size; - long st_blksize; - long st_blocks; - - unsigned long st_atime; - unsigned long st_atime_nsec; - unsigned long st_mtime; - unsigned long st_mtime_nsec; - unsigned long st_ctime; - unsigned long st_ctime_nsec; - long __unused[3]; -}; - -#endif +#include <asm-sparc/stat.h> diff --git a/include/asm-sparc64/statfs.h b/include/asm-sparc64/statfs.h index 79b3c890a5f..5503d6a4c67 100644 --- a/include/asm-sparc64/statfs.h +++ b/include/asm-sparc64/statfs.h @@ -1,54 +1 @@ -#ifndef _SPARC64_STATFS_H -#define _SPARC64_STATFS_H - -#ifndef __KERNEL_STRICT_NAMES - -#include <linux/types.h> - -typedef __kernel_fsid_t fsid_t; - -#endif - -struct statfs { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct statfs64 { - long f_type; - long f_bsize; - long f_blocks; - long f_bfree; - long f_bavail; - long f_files; - long f_ffree; - __kernel_fsid_t f_fsid; - long f_namelen; - long f_frsize; - long f_spare[5]; -}; - -struct compat_statfs64 { - __u32 f_type; - __u32 f_bsize; - __u64 f_blocks; - __u64 f_bfree; - __u64 f_bavail; - __u64 f_files; - __u64 f_ffree; - __kernel_fsid_t f_fsid; - __u32 f_namelen; - __u32 f_frsize; - __u32 f_spare[5]; -}; - -#endif +#include <asm-sparc/statfs.h> diff --git a/include/asm-sparc64/string.h b/include/asm-sparc64/string.h index 43161f2d17e..5018cd8b6ad 100644 --- a/include/asm-sparc64/string.h +++ b/include/asm-sparc64/string.h @@ -1,83 +1 @@ -/* - * string.h: External definitions for optimized assembly string - * routines for the Linux Kernel. - * - * Copyright (C) 1995,1996 David S. Miller (davem@caip.rutgers.edu) - * Copyright (C) 1996,1997,1999 Jakub Jelinek (jakub@redhat.com) - */ - -#ifndef __SPARC64_STRING_H__ -#define __SPARC64_STRING_H__ - -/* Really, userland/ksyms should not see any of this stuff. */ - -#ifdef __KERNEL__ - -#include <asm/asi.h> - -extern void *__memset(void *,int,__kernel_size_t); - -#ifndef EXPORT_SYMTAB_STROPS - -/* First the mem*() things. */ -#define __HAVE_ARCH_MEMMOVE -extern void *memmove(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMCPY -extern void *memcpy(void *, const void *, __kernel_size_t); - -#define __HAVE_ARCH_MEMSET -extern void *__builtin_memset(void *,int,__kernel_size_t); - -static inline void *__constant_memset(void *s, int c, __kernel_size_t count) -{ - extern __kernel_size_t __bzero(void *, __kernel_size_t); - - if (!c) { - __bzero(s, count); - return s; - } else - return __memset(s, c, count); -} - -#undef memset -#define memset(s, c, count) \ -((__builtin_constant_p(count) && (count) <= 32) ? \ - __builtin_memset((s), (c), (count)) : \ - (__builtin_constant_p(c) ? \ - __constant_memset((s), (c), (count)) : \ - __memset((s), (c), (count)))) - -#define __HAVE_ARCH_MEMSCAN - -#undef memscan -#define memscan(__arg0, __char, __arg2) \ -({ \ - extern void *__memscan_zero(void *, size_t); \ - extern void *__memscan_generic(void *, int, size_t); \ - void *__retval, *__addr = (__arg0); \ - size_t __size = (__arg2); \ - \ - if(__builtin_constant_p(__char) && !(__char)) \ - __retval = __memscan_zero(__addr, __size); \ - else \ - __retval = __memscan_generic(__addr, (__char), __size); \ - \ - __retval; \ -}) - -#define __HAVE_ARCH_MEMCMP -extern int memcmp(const void *,const void *,__kernel_size_t); - -/* Now the str*() stuff... */ -#define __HAVE_ARCH_STRLEN -extern __kernel_size_t strlen(const char *); - -#define __HAVE_ARCH_STRNCMP -extern int strncmp(const char *, const char *, __kernel_size_t); - -#endif /* !EXPORT_SYMTAB_STROPS */ - -#endif /* __KERNEL__ */ - -#endif /* !(__SPARC64_STRING_H__) */ +#include <asm-sparc/string.h> diff --git a/include/asm-sparc64/system.h b/include/asm-sparc64/system.h index 6897ac31be4..be2603c2e52 100644 --- a/include/asm-sparc64/system.h +++ b/include/asm-sparc64/system.h @@ -1,355 +1 @@ -#ifndef __SPARC64_SYSTEM_H -#define __SPARC64_SYSTEM_H - -#include <asm/ptrace.h> -#include <asm/processor.h> -#include <asm/visasm.h> - -#ifndef __ASSEMBLY__ - -#include <linux/irqflags.h> -#include <asm-generic/cmpxchg-local.h> - -/* - * Sparc (general) CPU types - */ -enum sparc_cpu { - sun4 = 0x00, - sun4c = 0x01, - sun4m = 0x02, - sun4d = 0x03, - sun4e = 0x04, - sun4u = 0x05, /* V8 ploos ploos */ - sun_unknown = 0x06, - ap1000 = 0x07, /* almost a sun4m */ -}; - -#define sparc_cpu_model sun4u - -/* This cannot ever be a sun4c nor sun4 :) That's just history. */ -#define ARCH_SUN4C_SUN4 0 -#define ARCH_SUN4 0 - -extern char reboot_command[]; - -/* These are here in an effort to more fully work around Spitfire Errata - * #51. Essentially, if a memory barrier occurs soon after a mispredicted - * branch, the chip can stop executing instructions until a trap occurs. - * Therefore, if interrupts are disabled, the chip can hang forever. - * - * It used to be believed that the memory barrier had to be right in the - * delay slot, but a case has been traced recently wherein the memory barrier - * was one instruction after the branch delay slot and the chip still hung. - * The offending sequence was the following in sym_wakeup_done() of the - * sym53c8xx_2 driver: - * - * call sym_ccb_from_dsa, 0 - * movge %icc, 0, %l0 - * brz,pn %o0, .LL1303 - * mov %o0, %l2 - * membar #LoadLoad - * - * The branch has to be mispredicted for the bug to occur. Therefore, we put - * the memory barrier explicitly into a "branch always, predicted taken" - * delay slot to avoid the problem case. - */ -#define membar_safe(type) \ -do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \ - " membar " type "\n" \ - "1:\n" \ - : : : "memory"); \ -} while (0) - -#define mb() \ - membar_safe("#LoadLoad | #LoadStore | #StoreStore | #StoreLoad") -#define rmb() \ - membar_safe("#LoadLoad") -#define wmb() \ - membar_safe("#StoreStore") -#define membar_storeload() \ - membar_safe("#StoreLoad") -#define membar_storeload_storestore() \ - membar_safe("#StoreLoad | #StoreStore") -#define membar_storeload_loadload() \ - membar_safe("#StoreLoad | #LoadLoad") -#define membar_storestore_loadstore() \ - membar_safe("#StoreStore | #LoadStore") - -#endif - -#define nop() __asm__ __volatile__ ("nop") - -#define read_barrier_depends() do { } while(0) -#define set_mb(__var, __value) \ - do { __var = __value; membar_storeload_storestore(); } while(0) - -#ifdef CONFIG_SMP -#define smp_mb() mb() -#define smp_rmb() rmb() -#define smp_wmb() wmb() -#define smp_read_barrier_depends() read_barrier_depends() -#else -#define smp_mb() __asm__ __volatile__("":::"memory") -#define smp_rmb() __asm__ __volatile__("":::"memory") -#define smp_wmb() __asm__ __volatile__("":::"memory") -#define smp_read_barrier_depends() do { } while(0) -#endif - -#define flushi(addr) __asm__ __volatile__ ("flush %0" : : "r" (addr) : "memory") - -#define flushw_all() __asm__ __volatile__("flushw") - -/* Performance counter register access. */ -#define read_pcr(__p) __asm__ __volatile__("rd %%pcr, %0" : "=r" (__p)) -#define write_pcr(__p) __asm__ __volatile__("wr %0, 0x0, %%pcr" : : "r" (__p)) -#define read_pic(__p) __asm__ __volatile__("rd %%pic, %0" : "=r" (__p)) - -/* Blackbird errata workaround. See commentary in - * arch/sparc64/kernel/smp.c:smp_percpu_timer_interrupt() - * for more information. - */ -#define reset_pic() \ - __asm__ __volatile__("ba,pt %xcc, 99f\n\t" \ - ".align 64\n" \ - "99:wr %g0, 0x0, %pic\n\t" \ - "rd %pic, %g0") - -#ifndef __ASSEMBLY__ - -extern void sun_do_break(void); -extern int stop_a_enabled; - -extern void fault_in_user_windows(void); -extern void synchronize_user_stack(void); - -extern void __flushw_user(void); -#define flushw_user() __flushw_user() - -#define flush_user_windows flushw_user -#define flush_register_windows flushw_all - -/* Don't hold the runqueue lock over context switch */ -#define __ARCH_WANT_UNLOCKED_CTXSW -#define prepare_arch_switch(next) \ -do { \ - flushw_all(); \ -} while (0) - - /* See what happens when you design the chip correctly? - * - * We tell gcc we clobber all non-fixed-usage registers except - * for l0/l1. It will use one for 'next' and the other to hold - * the output value of 'last'. 'next' is not referenced again - * past the invocation of switch_to in the scheduler, so we need - * not preserve it's value. Hairy, but it lets us remove 2 loads - * and 2 stores in this critical code path. -DaveM - */ -#define switch_to(prev, next, last) \ -do { if (test_thread_flag(TIF_PERFCTR)) { \ - unsigned long __tmp; \ - read_pcr(__tmp); \ - current_thread_info()->pcr_reg = __tmp; \ - read_pic(__tmp); \ - current_thread_info()->kernel_cntd0 += (unsigned int)(__tmp);\ - current_thread_info()->kernel_cntd1 += ((__tmp) >> 32); \ - } \ - flush_tlb_pending(); \ - save_and_clear_fpu(); \ - /* If you are tempted to conditionalize the following */ \ - /* so that ASI is only written if it changes, think again. */ \ - __asm__ __volatile__("wr %%g0, %0, %%asi" \ - : : "r" (__thread_flag_byte_ptr(task_thread_info(next))[TI_FLAG_BYTE_CURRENT_DS]));\ - trap_block[current_thread_info()->cpu].thread = \ - task_thread_info(next); \ - __asm__ __volatile__( \ - "mov %%g4, %%g7\n\t" \ - "stx %%i6, [%%sp + 2047 + 0x70]\n\t" \ - "stx %%i7, [%%sp + 2047 + 0x78]\n\t" \ - "rdpr %%wstate, %%o5\n\t" \ - "stx %%o6, [%%g6 + %6]\n\t" \ - "stb %%o5, [%%g6 + %5]\n\t" \ - "rdpr %%cwp, %%o5\n\t" \ - "stb %%o5, [%%g6 + %8]\n\t" \ - "mov %4, %%g6\n\t" \ - "ldub [%4 + %8], %%g1\n\t" \ - "wrpr %%g1, %%cwp\n\t" \ - "ldx [%%g6 + %6], %%o6\n\t" \ - "ldub [%%g6 + %5], %%o5\n\t" \ - "ldub [%%g6 + %7], %%o7\n\t" \ - "wrpr %%o5, 0x0, %%wstate\n\t" \ - "ldx [%%sp + 2047 + 0x70], %%i6\n\t" \ - "ldx [%%sp + 2047 + 0x78], %%i7\n\t" \ - "ldx [%%g6 + %9], %%g4\n\t" \ - "brz,pt %%o7, switch_to_pc\n\t" \ - " mov %%g7, %0\n\t" \ - "sethi %%hi(ret_from_syscall), %%g1\n\t" \ - "jmpl %%g1 + %%lo(ret_from_syscall), %%g0\n\t" \ - " nop\n\t" \ - ".globl switch_to_pc\n\t" \ - "switch_to_pc:\n\t" \ - : "=&r" (last), "=r" (current), "=r" (current_thread_info_reg), \ - "=r" (__local_per_cpu_offset) \ - : "0" (task_thread_info(next)), \ - "i" (TI_WSTATE), "i" (TI_KSP), "i" (TI_NEW_CHILD), \ - "i" (TI_CWP), "i" (TI_TASK) \ - : "cc", \ - "g1", "g2", "g3", "g7", \ - "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ - "i0", "i1", "i2", "i3", "i4", "i5", \ - "o0", "o1", "o2", "o3", "o4", "o5", "o7"); \ - /* If you fuck with this, update ret_from_syscall code too. */ \ - if (test_thread_flag(TIF_PERFCTR)) { \ - write_pcr(current_thread_info()->pcr_reg); \ - reset_pic(); \ - } \ -} while(0) - -static inline unsigned long xchg32(__volatile__ unsigned int *m, unsigned int val) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -" mov %0, %1\n" -"1: lduw [%4], %2\n" -" cas [%4], %2, %0\n" -" cmp %2, %0\n" -" bne,a,pn %%icc, 1b\n" -" mov %1, %0\n" -" membar #StoreLoad | #StoreStore\n" - : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) - : "0" (val), "r" (m) - : "cc", "memory"); - return val; -} - -static inline unsigned long xchg64(__volatile__ unsigned long *m, unsigned long val) -{ - unsigned long tmp1, tmp2; - - __asm__ __volatile__( -" membar #StoreLoad | #LoadLoad\n" -" mov %0, %1\n" -"1: ldx [%4], %2\n" -" casx [%4], %2, %0\n" -" cmp %2, %0\n" -" bne,a,pn %%xcc, 1b\n" -" mov %1, %0\n" -" membar #StoreLoad | #StoreStore\n" - : "=&r" (val), "=&r" (tmp1), "=&r" (tmp2) - : "0" (val), "r" (m) - : "cc", "memory"); - return val; -} - -#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) - -extern void __xchg_called_with_bad_pointer(void); - -static inline unsigned long __xchg(unsigned long x, __volatile__ void * ptr, - int size) -{ - switch (size) { - case 4: - return xchg32(ptr, x); - case 8: - return xchg64(ptr, x); - }; - __xchg_called_with_bad_pointer(); - return x; -} - -extern void die_if_kernel(char *str, struct pt_regs *regs) __attribute__ ((noreturn)); - -/* - * Atomic compare and exchange. Compare OLD with MEM, if identical, - * store NEW in MEM. Return the initial value in MEM. Success is - * indicated by comparing RETURN with OLD. - */ - -#define __HAVE_ARCH_CMPXCHG 1 - -static inline unsigned long -__cmpxchg_u32(volatile int *m, int old, int new) -{ - __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" - "cas [%2], %3, %0\n\t" - "membar #StoreLoad | #StoreStore" - : "=&r" (new) - : "0" (new), "r" (m), "r" (old) - : "memory"); - - return new; -} - -static inline unsigned long -__cmpxchg_u64(volatile long *m, unsigned long old, unsigned long new) -{ - __asm__ __volatile__("membar #StoreLoad | #LoadLoad\n" - "casx [%2], %3, %0\n\t" - "membar #StoreLoad | #StoreStore" - : "=&r" (new) - : "0" (new), "r" (m), "r" (old) - : "memory"); - - return new; -} - -/* This function doesn't exist, so you'll get a linker error - if something tries to do an invalid cmpxchg(). */ -extern void __cmpxchg_called_with_bad_pointer(void); - -static inline unsigned long -__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size) -{ - switch (size) { - case 4: - return __cmpxchg_u32(ptr, old, new); - case 8: - return __cmpxchg_u64(ptr, old, new); - } - __cmpxchg_called_with_bad_pointer(); - return old; -} - -#define cmpxchg(ptr,o,n) \ - ({ \ - __typeof__(*(ptr)) _o_ = (o); \ - __typeof__(*(ptr)) _n_ = (n); \ - (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \ - (unsigned long)_n_, sizeof(*(ptr))); \ - }) - -/* - * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make - * them available. - */ - -static inline unsigned long __cmpxchg_local(volatile void *ptr, - unsigned long old, - unsigned long new, int size) -{ - switch (size) { - case 4: - case 8: return __cmpxchg(ptr, old, new, size); - default: - return __cmpxchg_local_generic(ptr, old, new, size); - } - - return old; -} - -#define cmpxchg_local(ptr, o, n) \ - ((__typeof__(*(ptr)))__cmpxchg_local((ptr), (unsigned long)(o), \ - (unsigned long)(n), sizeof(*(ptr)))) -#define cmpxchg64_local(ptr, o, n) \ - ({ \ - BUILD_BUG_ON(sizeof(*(ptr)) != 8); \ - cmpxchg_local((ptr), (o), (n)); \ - }) - -#endif /* !(__ASSEMBLY__) */ - -#define arch_align_stack(x) (x) - -#endif /* !(__SPARC64_SYSTEM_H) */ +#include <asm-sparc/system.h> diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h index e5873e38530..92bed791339 100644 --- a/include/asm-sparc64/thread_info.h +++ b/include/asm-sparc64/thread_info.h @@ -1,277 +1 @@ -/* thread_info.h: sparc64 low-level thread information - * - * Copyright (C) 2002 David S. Miller (davem@redhat.com) - */ - -#ifndef _ASM_THREAD_INFO_H -#define _ASM_THREAD_INFO_H - -#ifdef __KERNEL__ - -#define NSWINS 7 - -#define TI_FLAG_BYTE_FAULT_CODE 0 -#define TI_FLAG_FAULT_CODE_SHIFT 56 -#define TI_FLAG_BYTE_WSTATE 1 -#define TI_FLAG_WSTATE_SHIFT 48 -#define TI_FLAG_BYTE_CWP 2 -#define TI_FLAG_CWP_SHIFT 40 -#define TI_FLAG_BYTE_CURRENT_DS 3 -#define TI_FLAG_CURRENT_DS_SHIFT 32 -#define TI_FLAG_BYTE_FPDEPTH 4 -#define TI_FLAG_FPDEPTH_SHIFT 24 -#define TI_FLAG_BYTE_WSAVED 5 -#define TI_FLAG_WSAVED_SHIFT 16 - -#include <asm/page.h> - -#ifndef __ASSEMBLY__ - -#include <asm/ptrace.h> -#include <asm/types.h> - -struct task_struct; -struct exec_domain; - -struct thread_info { - /* D$ line 1 */ - struct task_struct *task; - unsigned long flags; - __u8 fpsaved[7]; - __u8 status; - unsigned long ksp; - - /* D$ line 2 */ - unsigned long fault_address; - struct pt_regs *kregs; - struct exec_domain *exec_domain; - int preempt_count; /* 0 => preemptable, <0 => BUG */ - __u8 new_child; - __u8 syscall_noerror; - __u16 cpu; - - unsigned long *utraps; - - struct reg_window reg_window[NSWINS]; - unsigned long rwbuf_stkptrs[NSWINS]; - - unsigned long gsr[7]; - unsigned long xfsr[7]; - - __u64 __user *user_cntd0; - __u64 __user *user_cntd1; - __u64 kernel_cntd0, kernel_cntd1; - __u64 pcr_reg; - - struct restart_block restart_block; - - struct pt_regs *kern_una_regs; - unsigned int kern_una_insn; - - unsigned long fpregs[0] __attribute__ ((aligned(64))); -}; - -#endif /* !(__ASSEMBLY__) */ - -/* offsets into the thread_info struct for assembly code access */ -#define TI_TASK 0x00000000 -#define TI_FLAGS 0x00000008 -#define TI_FAULT_CODE (TI_FLAGS + TI_FLAG_BYTE_FAULT_CODE) -#define TI_WSTATE (TI_FLAGS + TI_FLAG_BYTE_WSTATE) -#define TI_CWP (TI_FLAGS + TI_FLAG_BYTE_CWP) -#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) -#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) -#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) -#define TI_FPSAVED 0x00000010 -#define TI_KSP 0x00000018 -#define TI_FAULT_ADDR 0x00000020 -#define TI_KREGS 0x00000028 -#define TI_EXEC_DOMAIN 0x00000030 -#define TI_PRE_COUNT 0x00000038 -#define TI_NEW_CHILD 0x0000003c -#define TI_SYS_NOERROR 0x0000003d -#define TI_CPU 0x0000003e -#define TI_UTRAPS 0x00000040 -#define TI_REG_WINDOW 0x00000048 -#define TI_RWIN_SPTRS 0x000003c8 -#define TI_GSR 0x00000400 -#define TI_XFSR 0x00000438 -#define TI_USER_CNTD0 0x00000470 -#define TI_USER_CNTD1 0x00000478 -#define TI_KERN_CNTD0 0x00000480 -#define TI_KERN_CNTD1 0x00000488 -#define TI_PCR 0x00000490 -#define TI_RESTART_BLOCK 0x00000498 -#define TI_KUNA_REGS 0x000004c0 -#define TI_KUNA_INSN 0x000004c8 -#define TI_FPREGS 0x00000500 - -/* We embed this in the uppermost byte of thread_info->flags */ -#define FAULT_CODE_WRITE 0x01 /* Write access, implies D-TLB */ -#define FAULT_CODE_DTLB 0x02 /* Miss happened in D-TLB */ -#define FAULT_CODE_ITLB 0x04 /* Miss happened in I-TLB */ -#define FAULT_CODE_WINFIXUP 0x08 /* Miss happened during spill/fill */ -#define FAULT_CODE_BLKCOMMIT 0x10 /* Use blk-commit ASI in copy_page */ - -#if PAGE_SHIFT == 13 -#define THREAD_SIZE (2*PAGE_SIZE) -#define THREAD_SHIFT (PAGE_SHIFT + 1) -#else /* PAGE_SHIFT == 13 */ -#define THREAD_SIZE PAGE_SIZE -#define THREAD_SHIFT PAGE_SHIFT -#endif /* PAGE_SHIFT == 13 */ - -#define PREEMPT_ACTIVE 0x4000000 - -/* - * macros/functions for gaining access to the thread information structure - * - * preempt_count needs to be 1 initially, until the scheduler is functional. - */ -#ifndef __ASSEMBLY__ - -#define INIT_THREAD_INFO(tsk) \ -{ \ - .task = &tsk, \ - .flags = ((unsigned long)ASI_P) << TI_FLAG_CURRENT_DS_SHIFT, \ - .exec_domain = &default_exec_domain, \ - .preempt_count = 1, \ - .restart_block = { \ - .fn = do_no_restart_syscall, \ - }, \ -} - -#define init_thread_info (init_thread_union.thread_info) -#define init_stack (init_thread_union.stack) - -/* how to get the thread information struct from C */ -register struct thread_info *current_thread_info_reg asm("g6"); -#define current_thread_info() (current_thread_info_reg) - -/* thread information allocation */ -#if PAGE_SHIFT == 13 -#define __THREAD_INFO_ORDER 1 -#else /* PAGE_SHIFT == 13 */ -#define __THREAD_INFO_ORDER 0 -#endif /* PAGE_SHIFT == 13 */ - -#ifdef CONFIG_DEBUG_STACK_USAGE -#define alloc_thread_info(tsk) \ -({ \ - struct thread_info *ret; \ - \ - ret = (struct thread_info *) \ - __get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER); \ - if (ret) \ - memset(ret, 0, PAGE_SIZE<<__THREAD_INFO_ORDER); \ - ret; \ -}) -#else -#define alloc_thread_info(tsk) \ - ((struct thread_info *)__get_free_pages(GFP_KERNEL, __THREAD_INFO_ORDER)) -#endif - -#define free_thread_info(ti) \ - free_pages((unsigned long)(ti),__THREAD_INFO_ORDER) - -#define __thread_flag_byte_ptr(ti) \ - ((unsigned char *)(&((ti)->flags))) -#define __cur_thread_flag_byte_ptr __thread_flag_byte_ptr(current_thread_info()) - -#define get_thread_fault_code() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE]) -#define set_thread_fault_code(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FAULT_CODE] = (val)) -#define get_thread_wstate() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE]) -#define set_thread_wstate(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSTATE] = (val)) -#define get_thread_cwp() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP]) -#define set_thread_cwp(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CWP] = (val)) -#define get_thread_current_ds() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS]) -#define set_thread_current_ds(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_CURRENT_DS] = (val)) -#define get_thread_fpdepth() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH]) -#define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) -#define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) -#define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) - -#endif /* !(__ASSEMBLY__) */ - -/* - * Thread information flags, only 16 bits are available as we encode - * other values into the upper 6 bytes. - * - * On trap return we need to test several values: - * - * user: need_resched, notify_resume, sigpending, wsaved, perfctr - * kernel: fpdepth - * - * So to check for work in the kernel case we simply load the fpdepth - * byte out of the flags and test it. For the user case we encode the - * lower 3 bytes of flags as follows: - * ---------------------------------------- - * | wsaved | flags byte 1 | flags byte 2 | - * ---------------------------------------- - * This optimizes the user test into: - * ldx [%g6 + TI_FLAGS], REG1 - * sethi %hi(_TIF_USER_WORK_MASK), REG2 - * or REG2, %lo(_TIF_USER_WORK_MASK), REG2 - * andcc REG1, REG2, %g0 - * be,pt no_work_to_do - * nop - */ -#define TIF_SYSCALL_TRACE 0 /* syscall trace active */ -/* flags bit 1 is available */ -#define TIF_SIGPENDING 2 /* signal pending */ -#define TIF_NEED_RESCHED 3 /* rescheduling necessary */ -#define TIF_PERFCTR 4 /* performance counters active */ -#define TIF_UNALIGNED 5 /* allowed to do unaligned accesses */ -/* flag bit 6 is available */ -#define TIF_32BIT 7 /* 32-bit binary */ -/* flag bit 8 is available */ -#define TIF_SECCOMP 9 /* secure computing */ -#define TIF_SYSCALL_AUDIT 10 /* syscall auditing active */ -/* flag bit 11 is available */ -/* NOTE: Thread flags >= 12 should be ones we have no interest - * in using in assembly, else we can't use the mask as - * an immediate value in instructions such as andcc. - */ -#define TIF_ABI_PENDING 12 -#define TIF_MEMDIE 13 -#define TIF_POLLING_NRFLAG 14 - -#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) -#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) -#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) -#define _TIF_PERFCTR (1<<TIF_PERFCTR) -#define _TIF_UNALIGNED (1<<TIF_UNALIGNED) -#define _TIF_32BIT (1<<TIF_32BIT) -#define _TIF_SECCOMP (1<<TIF_SECCOMP) -#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT) -#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING) -#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) - -#define _TIF_USER_WORK_MASK ((0xff << TI_FLAG_WSAVED_SHIFT) | \ - (_TIF_SIGPENDING | \ - _TIF_NEED_RESCHED | _TIF_PERFCTR)) - -/* - * Thread-synchronous status. - * - * This is different from the flags in that nobody else - * ever touches our thread-synchronous status, so we don't - * have to worry about atomic accesses. - * - * Note that there are only 8 bits available. - */ -#define TS_RESTORE_SIGMASK 0x0001 /* restore signal mask in do_signal() */ - -#ifndef __ASSEMBLY__ -#define HAVE_SET_RESTORE_SIGMASK 1 -static inline void set_restore_sigmask(void) -{ - struct thread_info *ti = current_thread_info(); - ti->status |= TS_RESTORE_SIGMASK; - set_bit(TIF_SIGPENDING, &ti->flags); -} -#endif /* !__ASSEMBLY__ */ - -#endif /* __KERNEL__ */ - -#endif /* _ASM_THREAD_INFO_H */ +#include <asm-sparc/thread_info.h> diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h index 5b779fd1f78..88026d83cc9 100644 --- a/include/asm-sparc64/timer.h +++ b/include/asm-sparc64/timer.h @@ -1,30 +1 @@ -/* timer.h: System timer definitions for sun5. - * - * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) - */ - -#ifndef _SPARC64_TIMER_H -#define _SPARC64_TIMER_H - -#include <linux/types.h> -#include <linux/init.h> - -struct sparc64_tick_ops { - unsigned long (*get_tick)(void); - int (*add_compare)(unsigned long); - unsigned long softint_mask; - void (*disable_irq)(void); - - void (*init_tick)(void); - unsigned long (*add_tick)(unsigned long); - - char *name; -}; - -extern struct sparc64_tick_ops *tick_ops; - -extern unsigned long sparc64_get_clock_tick(unsigned int cpu); -extern void __devinit setup_sparc64_timer(void); -extern void __init time_init(void); - -#endif /* _SPARC64_TIMER_H */ +#include <asm-sparc/timer.h> diff --git a/include/asm-sparc64/timex.h b/include/asm-sparc64/timex.h index c622535c456..8dd59ee24b4 100644 --- a/include/asm-sparc64/timex.h +++ b/include/asm-sparc64/timex.h @@ -1,19 +1 @@ -/* - * linux/include/asm-sparc64/timex.h - * - * sparc64 architecture timex specifications - */ -#ifndef _ASMsparc64_TIMEX_H -#define _ASMsparc64_TIMEX_H - -#include <asm/timer.h> - -#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */ - -/* Getting on the cycle counter on sparc64. */ -typedef unsigned long cycles_t; -#define get_cycles() tick_ops->get_tick() - -#define ARCH_HAS_READ_CURRENT_TIMER - -#endif +#include <asm-sparc/timex.h> diff --git a/include/asm-sparc64/tlb.h b/include/asm-sparc64/tlb.h index ec81cdedef2..ae92fce1093 100644 --- a/include/asm-sparc64/tlb.h +++ b/include/asm-sparc64/tlb.h @@ -1,111 +1 @@ -#ifndef _SPARC64_TLB_H -#define _SPARC64_TLB_H - -#include <linux/swap.h> -#include <linux/pagemap.h> -#include <asm/pgalloc.h> -#include <asm/tlbflush.h> -#include <asm/mmu_context.h> - -#define TLB_BATCH_NR 192 - -/* - * For UP we don't need to worry about TLB flush - * and page free order so much.. - */ -#ifdef CONFIG_SMP - #define FREE_PTE_NR 506 - #define tlb_fast_mode(bp) ((bp)->pages_nr == ~0U) -#else - #define FREE_PTE_NR 1 - #define tlb_fast_mode(bp) 1 -#endif - -struct mmu_gather { - struct mm_struct *mm; - unsigned int pages_nr; - unsigned int need_flush; - unsigned int fullmm; - unsigned int tlb_nr; - unsigned long vaddrs[TLB_BATCH_NR]; - struct page *pages[FREE_PTE_NR]; -}; - -DECLARE_PER_CPU(struct mmu_gather, mmu_gathers); - -#ifdef CONFIG_SMP -extern void smp_flush_tlb_pending(struct mm_struct *, - unsigned long, unsigned long *); -#endif - -extern void __flush_tlb_pending(unsigned long, unsigned long, unsigned long *); -extern void flush_tlb_pending(void); - -static inline struct mmu_gather *tlb_gather_mmu(struct mm_struct *mm, unsigned int full_mm_flush) -{ - struct mmu_gather *mp = &get_cpu_var(mmu_gathers); - - BUG_ON(mp->tlb_nr); - - mp->mm = mm; - mp->pages_nr = num_online_cpus() > 1 ? 0U : ~0U; - mp->fullmm = full_mm_flush; - - return mp; -} - - -static inline void tlb_flush_mmu(struct mmu_gather *mp) -{ - if (mp->need_flush) { - free_pages_and_swap_cache(mp->pages, mp->pages_nr); - mp->pages_nr = 0; - mp->need_flush = 0; - } - -} - -#ifdef CONFIG_SMP -extern void smp_flush_tlb_mm(struct mm_struct *mm); -#define do_flush_tlb_mm(mm) smp_flush_tlb_mm(mm) -#else -#define do_flush_tlb_mm(mm) __flush_tlb_mm(CTX_HWBITS(mm->context), SECONDARY_CONTEXT) -#endif - -static inline void tlb_finish_mmu(struct mmu_gather *mp, unsigned long start, unsigned long end) -{ - tlb_flush_mmu(mp); - - if (mp->fullmm) - mp->fullmm = 0; - else - flush_tlb_pending(); - - /* keep the page table cache within bounds */ - check_pgt_cache(); - - put_cpu_var(mmu_gathers); -} - -static inline void tlb_remove_page(struct mmu_gather *mp, struct page *page) -{ - if (tlb_fast_mode(mp)) { - free_page_and_swap_cache(page); - return; - } - mp->need_flush = 1; - mp->pages[mp->pages_nr++] = page; - if (mp->pages_nr >= FREE_PTE_NR) - tlb_flush_mmu(mp); -} - -#define tlb_remove_tlb_entry(mp,ptep,addr) do { } while (0) -#define pte_free_tlb(mp, ptepage) pte_free((mp)->mm, ptepage) -#define pmd_free_tlb(mp, pmdp) pmd_free((mp)->mm, pmdp) -#define pud_free_tlb(tlb,pudp) __pud_free_tlb(tlb,pudp) - -#define tlb_migrate_finish(mm) do { } while (0) -#define tlb_start_vma(tlb, vma) do { } while (0) -#define tlb_end_vma(tlb, vma) do { } while (0) - -#endif /* _SPARC64_TLB_H */ +#include <asm-sparc/tlb.h> diff --git a/include/asm-sparc64/tlbflush.h b/include/asm-sparc64/tlbflush.h index fbb675dbe0c..a43979a06cd 100644 --- a/include/asm-sparc64/tlbflush.h +++ b/include/asm-sparc64/tlbflush.h @@ -1,44 +1 @@ -#ifndef _SPARC64_TLBFLUSH_H -#define _SPARC64_TLBFLUSH_H - -#include <linux/mm.h> -#include <asm/mmu_context.h> - -/* TSB flush operations. */ -struct mmu_gather; -extern void flush_tsb_kernel_range(unsigned long start, unsigned long end); -extern void flush_tsb_user(struct mmu_gather *mp); - -/* TLB flush operations. */ - -extern void flush_tlb_pending(void); - -#define flush_tlb_range(vma,start,end) \ - do { (void)(start); flush_tlb_pending(); } while (0) -#define flush_tlb_page(vma,addr) flush_tlb_pending() -#define flush_tlb_mm(mm) flush_tlb_pending() - -/* Local cpu only. */ -extern void __flush_tlb_all(void); - -extern void __flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#ifndef CONFIG_SMP - -#define flush_tlb_kernel_range(start,end) \ -do { flush_tsb_kernel_range(start,end); \ - __flush_tlb_kernel_range(start,end); \ -} while (0) - -#else /* CONFIG_SMP */ - -extern void smp_flush_tlb_kernel_range(unsigned long start, unsigned long end); - -#define flush_tlb_kernel_range(start, end) \ -do { flush_tsb_kernel_range(start,end); \ - smp_flush_tlb_kernel_range(start, end); \ -} while (0) - -#endif /* ! CONFIG_SMP */ - -#endif /* _SPARC64_TLBFLUSH_H */ +#include <asm-sparc/tlbflush.h> diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h index 001c04027c8..46999b60fbb 100644 --- a/include/asm-sparc64/topology.h +++ b/include/asm-sparc64/topology.h @@ -1,86 +1 @@ -#ifndef _ASM_SPARC64_TOPOLOGY_H -#define _ASM_SPARC64_TOPOLOGY_H - -#ifdef CONFIG_NUMA - -#include <asm/mmzone.h> - -static inline int cpu_to_node(int cpu) -{ - return numa_cpu_lookup_table[cpu]; -} - -#define parent_node(node) (node) - -static inline cpumask_t node_to_cpumask(int node) -{ - return numa_cpumask_lookup_table[node]; -} - -/* Returns a pointer to the cpumask of CPUs on Node 'node'. */ -#define node_to_cpumask_ptr(v, node) \ - cpumask_t *v = &(numa_cpumask_lookup_table[node]) - -#define node_to_cpumask_ptr_next(v, node) \ - v = &(numa_cpumask_lookup_table[node]) - -static inline int node_to_first_cpu(int node) -{ - cpumask_t tmp; - tmp = node_to_cpumask(node); - return first_cpu(tmp); -} - -struct pci_bus; -#ifdef CONFIG_PCI -extern int pcibus_to_node(struct pci_bus *pbus); -#else -static inline int pcibus_to_node(struct pci_bus *pbus) -{ - return -1; -} -#endif - -#define pcibus_to_cpumask(bus) \ - (pcibus_to_node(bus) == -1 ? \ - CPU_MASK_ALL : \ - node_to_cpumask(pcibus_to_node(bus))) - -#define SD_NODE_INIT (struct sched_domain) { \ - .min_interval = 8, \ - .max_interval = 32, \ - .busy_factor = 32, \ - .imbalance_pct = 125, \ - .cache_nice_tries = 2, \ - .busy_idx = 3, \ - .idle_idx = 2, \ - .newidle_idx = 0, \ - .wake_idx = 1, \ - .forkexec_idx = 1, \ - .flags = SD_LOAD_BALANCE \ - | SD_BALANCE_FORK \ - | SD_BALANCE_EXEC \ - | SD_SERIALIZE \ - | SD_WAKE_BALANCE, \ - .last_balance = jiffies, \ - .balance_interval = 1, \ -} - -#else /* CONFIG_NUMA */ - -#include <asm-generic/topology.h> - -#endif /* !(CONFIG_NUMA) */ - -#ifdef CONFIG_SMP -#define topology_physical_package_id(cpu) (cpu_data(cpu).proc_id) -#define topology_core_id(cpu) (cpu_data(cpu).core_id) -#define topology_core_siblings(cpu) (cpu_core_map[cpu]) -#define topology_thread_siblings(cpu) (per_cpu(cpu_sibling_map, cpu)) -#define mc_capable() (sparc64_multi_core) -#define smt_capable() (sparc64_multi_core) -#endif /* CONFIG_SMP */ - -#define cpu_coregroup_map(cpu) (cpu_core_map[cpu]) - -#endif /* _ASM_SPARC64_TOPOLOGY_H */ +#include <asm-sparc/topology.h> diff --git a/include/asm-sparc64/uaccess.h b/include/asm-sparc64/uaccess.h index 5fcbaf68c3f..2872d22844f 100644 --- a/include/asm-sparc64/uaccess.h +++ b/include/asm-sparc64/uaccess.h @@ -1,273 +1 @@ -#ifndef _ASM_UACCESS_H -#define _ASM_UACCESS_H - -/* - * User space memory access functions - */ - -#ifdef __KERNEL__ -#include <linux/compiler.h> -#include <linux/sched.h> -#include <linux/string.h> -#include <asm/asi.h> -#include <asm/system.h> -#include <asm/spitfire.h> -#include <asm-generic/uaccess.h> -#endif - -#ifndef __ASSEMBLY__ - -/* - * Sparc64 is segmented, though more like the M68K than the I386. - * We use the secondary ASI to address user memory, which references a - * completely different VM map, thus there is zero chance of the user - * doing something queer and tricking us into poking kernel memory. - * - * What is left here is basically what is needed for the other parts of - * the kernel that expect to be able to manipulate, erum, "segments". - * Or perhaps more properly, permissions. - * - * "For historical reasons, these macros are grossly misnamed." -Linus - */ - -#define KERNEL_DS ((mm_segment_t) { ASI_P }) -#define USER_DS ((mm_segment_t) { ASI_AIUS }) /* har har har */ - -#define VERIFY_READ 0 -#define VERIFY_WRITE 1 - -#define get_fs() ((mm_segment_t) { get_thread_current_ds() }) -#define get_ds() (KERNEL_DS) - -#define segment_eq(a,b) ((a).seg == (b).seg) - -#define set_fs(val) \ -do { \ - set_thread_current_ds((val).seg); \ - __asm__ __volatile__ ("wr %%g0, %0, %%asi" : : "r" ((val).seg)); \ -} while(0) - -static inline int __access_ok(const void __user * addr, unsigned long size) -{ - return 1; -} - -static inline int access_ok(int type, const void __user * addr, unsigned long size) -{ - return 1; -} - -/* - * The exception table consists of pairs of addresses: the first is the - * address of an instruction that is allowed to fault, and the second is - * the address at which the program should continue. No registers are - * modified, so it is entirely up to the continuation code to figure out - * what to do. - * - * All the routines below use bits of fixup code that are out of line - * with the main instruction path. This means when everything is well, - * we don't even have to jump over them. Further, they do not intrude - * on our cache or tlb entries. - */ - -struct exception_table_entry { - unsigned int insn, fixup; -}; - -extern void __ret_efault(void); -extern void __retl_efault(void); - -/* Uh, these should become the main single-value transfer routines.. - * They automatically use the right size if we just have the right - * pointer type.. - * - * This gets kind of ugly. We want to return _two_ values in "get_user()" - * and yet we don't want to do any pointers, because that is too much - * of a performance impact. Thus we have a few rather ugly macros here, - * and hide all the ugliness from the user. - */ -#define put_user(x,ptr) ({ \ -unsigned long __pu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__put_user_nocheck((__typeof__(*(ptr)))(x),__pu_addr,sizeof(*(ptr))); }) - -#define get_user(x,ptr) ({ \ -unsigned long __gu_addr = (unsigned long)(ptr); \ -__chk_user_ptr(ptr); \ -__get_user_nocheck((x),__gu_addr,sizeof(*(ptr)),__typeof__(*(ptr))); }) - -#define __put_user(x,ptr) put_user(x,ptr) -#define __get_user(x,ptr) get_user(x,ptr) - -struct __large_struct { unsigned long buf[100]; }; -#define __m(x) ((struct __large_struct *)(x)) - -#define __put_user_nocheck(data,addr,size) ({ \ -register int __pu_ret; \ -switch (size) { \ -case 1: __put_user_asm(data,b,addr,__pu_ret); break; \ -case 2: __put_user_asm(data,h,addr,__pu_ret); break; \ -case 4: __put_user_asm(data,w,addr,__pu_ret); break; \ -case 8: __put_user_asm(data,x,addr,__pu_ret); break; \ -default: __pu_ret = __put_user_bad(); break; \ -} __pu_ret; }) - -#define __put_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Put user asm, inline. */\n" \ -"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "sethi %%hi(2b), %0\n\t" \ - "jmpl %0 + %%lo(2b), %%g0\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\t" \ - ".previous\n\n\t" \ - : "=r" (ret) : "r" (x), "r" (__m(addr)), \ - "i" (-EFAULT)) - -extern int __put_user_bad(void); - -#define __get_user_nocheck(data,addr,size,type) ({ \ -register int __gu_ret; \ -register unsigned long __gu_val; \ -switch (size) { \ -case 1: __get_user_asm(__gu_val,ub,addr,__gu_ret); break; \ -case 2: __get_user_asm(__gu_val,uh,addr,__gu_ret); break; \ -case 4: __get_user_asm(__gu_val,uw,addr,__gu_ret); break; \ -case 8: __get_user_asm(__gu_val,x,addr,__gu_ret); break; \ -default: __gu_val = 0; __gu_ret = __get_user_bad(); break; \ -} data = (type) __gu_val; __gu_ret; }) - -#define __get_user_nocheck_ret(data,addr,size,type,retval) ({ \ -register unsigned long __gu_val __asm__ ("l1"); \ -switch (size) { \ -case 1: __get_user_asm_ret(__gu_val,ub,addr,retval); break; \ -case 2: __get_user_asm_ret(__gu_val,uh,addr,retval); break; \ -case 4: __get_user_asm_ret(__gu_val,uw,addr,retval); break; \ -case 8: __get_user_asm_ret(__gu_val,x,addr,retval); break; \ -default: if (__get_user_bad()) return retval; \ -} data = (type) __gu_val; }) - -#define __get_user_asm(x,size,addr,ret) \ -__asm__ __volatile__( \ - "/* Get user asm, inline. */\n" \ -"1:\t" "ld"#size "a [%2] %%asi, %1\n\t" \ - "clr %0\n" \ -"2:\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "sethi %%hi(2b), %0\n\t" \ - "clr %1\n\t" \ - "jmpl %0 + %%lo(2b), %%g0\n\t" \ - " mov %3, %0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=r" (ret), "=r" (x) : "r" (__m(addr)), \ - "i" (-EFAULT)) - -#define __get_user_asm_ret(x,size,addr,retval) \ -if (__builtin_constant_p(retval) && retval == -EFAULT) \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b,__ret_efault\n\n\t" \ - ".previous\n\t" \ - : "=r" (x) : "r" (__m(addr))); \ -else \ -__asm__ __volatile__( \ - "/* Get user asm ret, inline. */\n" \ -"1:\t" "ld"#size "a [%1] %%asi, %0\n\n\t" \ - ".section .fixup,#alloc,#execinstr\n\t" \ - ".align 4\n" \ -"3:\n\t" \ - "ret\n\t" \ - " restore %%g0, %2, %%o0\n\n\t" \ - ".previous\n\t" \ - ".section __ex_table,\"a\"\n\t" \ - ".align 4\n\t" \ - ".word 1b, 3b\n\n\t" \ - ".previous\n\t" \ - : "=r" (x) : "r" (__m(addr)), "i" (retval)) - -extern int __get_user_bad(void); - -extern unsigned long __must_check ___copy_from_user(void *to, - const void __user *from, - unsigned long size); -extern unsigned long copy_from_user_fixup(void *to, const void __user *from, - unsigned long size); -static inline unsigned long __must_check -copy_from_user(void *to, const void __user *from, unsigned long size) -{ - unsigned long ret = ___copy_from_user(to, from, size); - - if (unlikely(ret)) - ret = copy_from_user_fixup(to, from, size); - return ret; -} -#define __copy_from_user copy_from_user - -extern unsigned long __must_check ___copy_to_user(void __user *to, - const void *from, - unsigned long size); -extern unsigned long copy_to_user_fixup(void __user *to, const void *from, - unsigned long size); -static inline unsigned long __must_check -copy_to_user(void __user *to, const void *from, unsigned long size) -{ - unsigned long ret = ___copy_to_user(to, from, size); - - if (unlikely(ret)) - ret = copy_to_user_fixup(to, from, size); - return ret; -} -#define __copy_to_user copy_to_user - -extern unsigned long __must_check ___copy_in_user(void __user *to, - const void __user *from, - unsigned long size); -extern unsigned long copy_in_user_fixup(void __user *to, void __user *from, - unsigned long size); -static inline unsigned long __must_check -copy_in_user(void __user *to, void __user *from, unsigned long size) -{ - unsigned long ret = ___copy_in_user(to, from, size); - - if (unlikely(ret)) - ret = copy_in_user_fixup(to, from, size); - return ret; -} -#define __copy_in_user copy_in_user - -extern unsigned long __must_check __clear_user(void __user *, unsigned long); - -#define clear_user __clear_user - -extern long __must_check __strncpy_from_user(char *dest, const char __user *src, long count); - -#define strncpy_from_user __strncpy_from_user - -extern long __strlen_user(const char __user *); -extern long __strnlen_user(const char __user *, long len); - -#define strlen_user __strlen_user -#define strnlen_user __strnlen_user -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - -#endif /* __ASSEMBLY__ */ - -#endif /* _ASM_UACCESS_H */ +#include <asm-sparc/uaccess.h> diff --git a/include/asm-sparc64/unistd.h b/include/asm-sparc64/unistd.h index 13be4453a1f..ad86e0b7a45 100644 --- a/include/asm-sparc64/unistd.h +++ b/include/asm-sparc64/unistd.h @@ -1,373 +1 @@ -#ifndef _SPARC64_UNISTD_H -#define _SPARC64_UNISTD_H - -/* - * System calls under the Sparc. - * - * Don't be scared by the ugly clobbers, it is the only way I can - * think of right now to force the arguments into fixed registers - * before the trap into the system call with gcc 'asm' statements. - * - * Copyright (C) 1995, 2007 David S. Miller (davem@davemloft.net) - * - * SunOS compatibility based upon preliminary work which is: - * - * Copyright (C) 1995 Adrian M. Rodriguez (adrian@remus.rutgers.edu) - */ - -#define __NR_restart_syscall 0 /* Linux Specific */ -#define __NR_exit 1 /* Common */ -#define __NR_fork 2 /* Common */ -#define __NR_read 3 /* Common */ -#define __NR_write 4 /* Common */ -#define __NR_open 5 /* Common */ -#define __NR_close 6 /* Common */ -#define __NR_wait4 7 /* Common */ -#define __NR_creat 8 /* Common */ -#define __NR_link 9 /* Common */ -#define __NR_unlink 10 /* Common */ -#define __NR_execv 11 /* SunOS Specific */ -#define __NR_chdir 12 /* Common */ -#define __NR_chown 13 /* Common */ -#define __NR_mknod 14 /* Common */ -#define __NR_chmod 15 /* Common */ -#define __NR_lchown 16 /* Common */ -#define __NR_brk 17 /* Common */ -#define __NR_perfctr 18 /* Performance counter operations */ -#define __NR_lseek 19 /* Common */ -#define __NR_getpid 20 /* Common */ -#define __NR_capget 21 /* Linux Specific */ -#define __NR_capset 22 /* Linux Specific */ -#define __NR_setuid 23 /* Implemented via setreuid in SunOS */ -#define __NR_getuid 24 /* Common */ -#define __NR_vmsplice 25 /* ENOSYS under SunOS */ -#define __NR_ptrace 26 /* Common */ -#define __NR_alarm 27 /* Implemented via setitimer in SunOS */ -#define __NR_sigaltstack 28 /* Common */ -#define __NR_pause 29 /* Is sigblock(0)->sigpause() in SunOS */ -#define __NR_utime 30 /* Implemented via utimes() under SunOS */ -/* #define __NR_lchown32 31 Linux sparc32 specific */ -/* #define __NR_fchown32 32 Linux sparc32 specific */ -#define __NR_access 33 /* Common */ -#define __NR_nice 34 /* Implemented via get/setpriority() in SunOS */ -/* #define __NR_chown32 35 Linux sparc32 specific */ -#define __NR_sync 36 /* Common */ -#define __NR_kill 37 /* Common */ -#define __NR_stat 38 /* Common */ -#define __NR_sendfile 39 /* Linux Specific */ -#define __NR_lstat 40 /* Common */ -#define __NR_dup 41 /* Common */ -#define __NR_pipe 42 /* Common */ -#define __NR_times 43 /* Implemented via getrusage() in SunOS */ -/* #define __NR_getuid32 44 Linux sparc32 specific */ -#define __NR_umount2 45 /* Linux Specific */ -#define __NR_setgid 46 /* Implemented via setregid() in SunOS */ -#define __NR_getgid 47 /* Common */ -#define __NR_signal 48 /* Implemented via sigvec() in SunOS */ -#define __NR_geteuid 49 /* SunOS calls getuid() */ -#define __NR_getegid 50 /* SunOS calls getgid() */ -#define __NR_acct 51 /* Common */ -#define __NR_memory_ordering 52 /* Linux Specific */ -/* #define __NR_getgid32 53 Linux sparc32 specific */ -#define __NR_ioctl 54 /* Common */ -#define __NR_reboot 55 /* Common */ -/* #define __NR_mmap2 56 Linux sparc32 Specific */ -#define __NR_symlink 57 /* Common */ -#define __NR_readlink 58 /* Common */ -#define __NR_execve 59 /* Common */ -#define __NR_umask 60 /* Common */ -#define __NR_chroot 61 /* Common */ -#define __NR_fstat 62 /* Common */ -#define __NR_fstat64 63 /* Linux Specific */ -#define __NR_getpagesize 64 /* Common */ -#define __NR_msync 65 /* Common in newer 1.3.x revs... */ -#define __NR_vfork 66 /* Common */ -#define __NR_pread64 67 /* Linux Specific */ -#define __NR_pwrite64 68 /* Linux Specific */ -/* #define __NR_geteuid32 69 Linux sparc32, sbrk under SunOS */ -/* #define __NR_getegid32 70 Linux sparc32, sstk under SunOS */ -#define __NR_mmap 71 /* Common */ -/* #define __NR_setreuid32 72 Linux sparc32, vadvise under SunOS */ -#define __NR_munmap 73 /* Common */ -#define __NR_mprotect 74 /* Common */ -#define __NR_madvise 75 /* Common */ -#define __NR_vhangup 76 /* Common */ -/* #define __NR_truncate64 77 Linux sparc32 Specific */ -#define __NR_mincore 78 /* Common */ -#define __NR_getgroups 79 /* Common */ -#define __NR_setgroups 80 /* Common */ -#define __NR_getpgrp 81 /* Common */ -/* #define __NR_setgroups32 82 Linux sparc32, setpgrp under SunOS */ -#define __NR_setitimer 83 /* Common */ -/* #define __NR_ftruncate64 84 Linux sparc32 Specific */ -#define __NR_swapon 85 /* Common */ -#define __NR_getitimer 86 /* Common */ -/* #define __NR_setuid32 87 Linux sparc32, gethostname under SunOS */ -#define __NR_sethostname 88 /* Common */ -/* #define __NR_setgid32 89 Linux sparc32, getdtablesize under SunOS */ -#define __NR_dup2 90 /* Common */ -/* #define __NR_setfsuid32 91 Linux sparc32, getdopt under SunOS */ -#define __NR_fcntl 92 /* Common */ -#define __NR_select 93 /* Common */ -/* #define __NR_setfsgid32 94 Linux sparc32, setdopt under SunOS */ -#define __NR_fsync 95 /* Common */ -#define __NR_setpriority 96 /* Common */ -#define __NR_socket 97 /* Common */ -#define __NR_connect 98 /* Common */ -#define __NR_accept 99 /* Common */ -#define __NR_getpriority 100 /* Common */ -#define __NR_rt_sigreturn 101 /* Linux Specific */ -#define __NR_rt_sigaction 102 /* Linux Specific */ -#define __NR_rt_sigprocmask 103 /* Linux Specific */ -#define __NR_rt_sigpending 104 /* Linux Specific */ -#define __NR_rt_sigtimedwait 105 /* Linux Specific */ -#define __NR_rt_sigqueueinfo 106 /* Linux Specific */ -#define __NR_rt_sigsuspend 107 /* Linux Specific */ -#define __NR_setresuid 108 /* Linux Specific, sigvec under SunOS */ -#define __NR_getresuid 109 /* Linux Specific, sigblock under SunOS */ -#define __NR_setresgid 110 /* Linux Specific, sigsetmask under SunOS */ -#define __NR_getresgid 111 /* Linux Specific, sigpause under SunOS */ -/* #define __NR_setregid32 75 Linux sparc32, sigstack under SunOS */ -#define __NR_recvmsg 113 /* Common */ -#define __NR_sendmsg 114 /* Common */ -/* #define __NR_getgroups32 115 Linux sparc32, vtrace under SunOS */ -#define __NR_gettimeofday 116 /* Common */ -#define __NR_getrusage 117 /* Common */ -#define __NR_getsockopt 118 /* Common */ -#define __NR_getcwd 119 /* Linux Specific */ -#define __NR_readv 120 /* Common */ -#define __NR_writev 121 /* Common */ -#define __NR_settimeofday 122 /* Common */ -#define __NR_fchown 123 /* Common */ -#define __NR_fchmod 124 /* Common */ -#define __NR_recvfrom 125 /* Common */ -#define __NR_setreuid 126 /* Common */ -#define __NR_setregid 127 /* Common */ -#define __NR_rename 128 /* Common */ -#define __NR_truncate 129 /* Common */ -#define __NR_ftruncate 130 /* Common */ -#define __NR_flock 131 /* Common */ -#define __NR_lstat64 132 /* Linux Specific */ -#define __NR_sendto 133 /* Common */ -#define __NR_shutdown 134 /* Common */ -#define __NR_socketpair 135 /* Common */ -#define __NR_mkdir 136 /* Common */ -#define __NR_rmdir 137 /* Common */ -#define __NR_utimes 138 /* SunOS Specific */ -#define __NR_stat64 139 /* Linux Specific */ -#define __NR_sendfile64 140 /* adjtime under SunOS */ -#define __NR_getpeername 141 /* Common */ -#define __NR_futex 142 /* gethostid under SunOS */ -#define __NR_gettid 143 /* ENOSYS under SunOS */ -#define __NR_getrlimit 144 /* Common */ -#define __NR_setrlimit 145 /* Common */ -#define __NR_pivot_root 146 /* Linux Specific, killpg under SunOS */ -#define __NR_prctl 147 /* ENOSYS under SunOS */ -#define __NR_pciconfig_read 148 /* ENOSYS under SunOS */ -#define __NR_pciconfig_write 149 /* ENOSYS under SunOS */ -#define __NR_getsockname 150 /* Common */ -#define __NR_inotify_init 151 /* Linux specific */ -#define __NR_inotify_add_watch 152 /* Linux specific */ -#define __NR_poll 153 /* Common */ -#define __NR_getdents64 154 /* Linux specific */ -/* #define __NR_fcntl64 155 Linux sparc32 Specific */ -#define __NR_inotify_rm_watch 156 /* Linux specific */ -#define __NR_statfs 157 /* Common */ -#define __NR_fstatfs 158 /* Common */ -#define __NR_umount 159 /* Common */ -#define __NR_sched_set_affinity 160 /* Linux specific, async_daemon under SunOS */ -#define __NR_sched_get_affinity 161 /* Linux specific, getfh under SunOS */ -#define __NR_getdomainname 162 /* SunOS Specific */ -#define __NR_setdomainname 163 /* Common */ -#define __NR_utrap_install 164 /* SYSV ABI/v9 required */ -#define __NR_quotactl 165 /* Common */ -#define __NR_set_tid_address 166 /* Linux specific, exportfs under SunOS */ -#define __NR_mount 167 /* Common */ -#define __NR_ustat 168 /* Common */ -#define __NR_setxattr 169 /* SunOS: semsys */ -#define __NR_lsetxattr 170 /* SunOS: msgsys */ -#define __NR_fsetxattr 171 /* SunOS: shmsys */ -#define __NR_getxattr 172 /* SunOS: auditsys */ -#define __NR_lgetxattr 173 /* SunOS: rfssys */ -#define __NR_getdents 174 /* Common */ -#define __NR_setsid 175 /* Common */ -#define __NR_fchdir 176 /* Common */ -#define __NR_fgetxattr 177 /* SunOS: fchroot */ -#define __NR_listxattr 178 /* SunOS: vpixsys */ -#define __NR_llistxattr 179 /* SunOS: aioread */ -#define __NR_flistxattr 180 /* SunOS: aiowrite */ -#define __NR_removexattr 181 /* SunOS: aiowait */ -#define __NR_lremovexattr 182 /* SunOS: aiocancel */ -#define __NR_sigpending 183 /* Common */ -#define __NR_query_module 184 /* Linux Specific */ -#define __NR_setpgid 185 /* Common */ -#define __NR_fremovexattr 186 /* SunOS: pathconf */ -#define __NR_tkill 187 /* SunOS: fpathconf */ -#define __NR_exit_group 188 /* Linux specific, sysconf undef SunOS */ -#define __NR_uname 189 /* Linux Specific */ -#define __NR_init_module 190 /* Linux Specific */ -#define __NR_personality 191 /* Linux Specific */ -#define __NR_remap_file_pages 192 /* Linux Specific */ -#define __NR_epoll_create 193 /* Linux Specific */ -#define __NR_epoll_ctl 194 /* Linux Specific */ -#define __NR_epoll_wait 195 /* Linux Specific */ -#define __NR_ioprio_set 196 /* Linux Specific */ -#define __NR_getppid 197 /* Linux Specific */ -#define __NR_sigaction 198 /* Linux Specific */ -#define __NR_sgetmask 199 /* Linux Specific */ -#define __NR_ssetmask 200 /* Linux Specific */ -#define __NR_sigsuspend 201 /* Linux Specific */ -#define __NR_oldlstat 202 /* Linux Specific */ -#define __NR_uselib 203 /* Linux Specific */ -#define __NR_readdir 204 /* Linux Specific */ -#define __NR_readahead 205 /* Linux Specific */ -#define __NR_socketcall 206 /* Linux Specific */ -#define __NR_syslog 207 /* Linux Specific */ -#define __NR_lookup_dcookie 208 /* Linux Specific */ -#define __NR_fadvise64 209 /* Linux Specific */ -#define __NR_fadvise64_64 210 /* Linux Specific */ -#define __NR_tgkill 211 /* Linux Specific */ -#define __NR_waitpid 212 /* Linux Specific */ -#define __NR_swapoff 213 /* Linux Specific */ -#define __NR_sysinfo 214 /* Linux Specific */ -#define __NR_ipc 215 /* Linux Specific */ -#define __NR_sigreturn 216 /* Linux Specific */ -#define __NR_clone 217 /* Linux Specific */ -#define __NR_ioprio_get 218 /* Linux Specific */ -#define __NR_adjtimex 219 /* Linux Specific */ -#define __NR_sigprocmask 220 /* Linux Specific */ -#define __NR_create_module 221 /* Linux Specific */ -#define __NR_delete_module 222 /* Linux Specific */ -#define __NR_get_kernel_syms 223 /* Linux Specific */ -#define __NR_getpgid 224 /* Linux Specific */ -#define __NR_bdflush 225 /* Linux Specific */ -#define __NR_sysfs 226 /* Linux Specific */ -#define __NR_afs_syscall 227 /* Linux Specific */ -#define __NR_setfsuid 228 /* Linux Specific */ -#define __NR_setfsgid 229 /* Linux Specific */ -#define __NR__newselect 230 /* Linux Specific */ -#ifdef __KERNEL__ -#define __NR_time 231 /* Linux sparc32 */ -#endif -#define __NR_splice 232 /* Linux Specific */ -#define __NR_stime 233 /* Linux Specific */ -#define __NR_statfs64 234 /* Linux Specific */ -#define __NR_fstatfs64 235 /* Linux Specific */ -#define __NR__llseek 236 /* Linux Specific */ -#define __NR_mlock 237 -#define __NR_munlock 238 -#define __NR_mlockall 239 -#define __NR_munlockall 240 -#define __NR_sched_setparam 241 -#define __NR_sched_getparam 242 -#define __NR_sched_setscheduler 243 -#define __NR_sched_getscheduler 244 -#define __NR_sched_yield 245 -#define __NR_sched_get_priority_max 246 -#define __NR_sched_get_priority_min 247 -#define __NR_sched_rr_get_interval 248 -#define __NR_nanosleep 249 -#define __NR_mremap 250 -#define __NR__sysctl 251 -#define __NR_getsid 252 -#define __NR_fdatasync 253 -#define __NR_nfsservctl 254 -#define __NR_sync_file_range 255 -#define __NR_clock_settime 256 -#define __NR_clock_gettime 257 -#define __NR_clock_getres 258 -#define __NR_clock_nanosleep 259 -#define __NR_sched_getaffinity 260 -#define __NR_sched_setaffinity 261 -#define __NR_timer_settime 262 -#define __NR_timer_gettime 263 -#define __NR_timer_getoverrun 264 -#define __NR_timer_delete 265 -#define __NR_timer_create 266 -/* #define __NR_vserver 267 Reserved for VSERVER */ -#define __NR_io_setup 268 -#define __NR_io_destroy 269 -#define __NR_io_submit 270 -#define __NR_io_cancel 271 -#define __NR_io_getevents 272 -#define __NR_mq_open 273 -#define __NR_mq_unlink 274 -#define __NR_mq_timedsend 275 -#define __NR_mq_timedreceive 276 -#define __NR_mq_notify 277 -#define __NR_mq_getsetattr 278 -#define __NR_waitid 279 -#define __NR_tee 280 -#define __NR_add_key 281 -#define __NR_request_key 282 -#define __NR_keyctl 283 -#define __NR_openat 284 -#define __NR_mkdirat 285 -#define __NR_mknodat 286 -#define __NR_fchownat 287 -#define __NR_futimesat 288 -#define __NR_fstatat64 289 -#define __NR_unlinkat 290 -#define __NR_renameat 291 -#define __NR_linkat 292 -#define __NR_symlinkat 293 -#define __NR_readlinkat 294 -#define __NR_fchmodat 295 -#define __NR_faccessat 296 -#define __NR_pselect6 297 -#define __NR_ppoll 298 -#define __NR_unshare 299 -#define __NR_set_robust_list 300 -#define __NR_get_robust_list 301 -#define __NR_migrate_pages 302 -#define __NR_mbind 303 -#define __NR_get_mempolicy 304 -#define __NR_set_mempolicy 305 -#define __NR_kexec_load 306 -#define __NR_move_pages 307 -#define __NR_getcpu 308 -#define __NR_epoll_pwait 309 -#define __NR_utimensat 310 -#define __NR_signalfd 311 -#define __NR_timerfd_create 312 -#define __NR_eventfd 313 -#define __NR_fallocate 314 -#define __NR_timerfd_settime 315 -#define __NR_timerfd_gettime 316 - -#define NR_SYSCALLS 317 - -#ifdef __KERNEL__ -#define __ARCH_WANT_IPC_PARSE_VERSION -#define __ARCH_WANT_OLD_READDIR -#define __ARCH_WANT_STAT64 -#define __ARCH_WANT_SYS_ALARM -#define __ARCH_WANT_SYS_GETHOSTNAME -#define __ARCH_WANT_SYS_PAUSE -#define __ARCH_WANT_SYS_SGETMASK -#define __ARCH_WANT_SYS_SIGNAL -#define __ARCH_WANT_SYS_TIME -#define __ARCH_WANT_COMPAT_SYS_TIME -#define __ARCH_WANT_SYS_UTIME -#define __ARCH_WANT_SYS_WAITPID -#define __ARCH_WANT_SYS_SOCKETCALL -#define __ARCH_WANT_SYS_FADVISE64 -#define __ARCH_WANT_SYS_GETPGRP -#define __ARCH_WANT_SYS_LLSEEK -#define __ARCH_WANT_SYS_NICE -#define __ARCH_WANT_SYS_OLDUMOUNT -#define __ARCH_WANT_SYS_SIGPENDING -#define __ARCH_WANT_SYS_SIGPROCMASK -#define __ARCH_WANT_SYS_RT_SIGSUSPEND -#define __ARCH_WANT_COMPAT_SYS_RT_SIGSUSPEND - -/* - * "Conditional" syscalls - * - * What we want is __attribute__((weak,alias("sys_ni_syscall"))), - * but it doesn't work on all toolchains, so we just do it by hand - */ -#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall") - -#endif /* __KERNEL__ */ -#endif /* _SPARC64_UNISTD_H */ +#include <asm-sparc/unistd.h> diff --git a/include/asm-sparc64/xor.h b/include/asm-sparc64/xor.h index a0233884fc9..ef187cc07ed 100644 --- a/include/asm-sparc64/xor.h +++ b/include/asm-sparc64/xor.h @@ -1,70 +1 @@ -/* - * include/asm-sparc64/xor.h - * - * High speed xor_block operation for RAID4/5 utilizing the - * UltraSparc Visual Instruction Set and Niagara block-init - * twin-load instructions. - * - * Copyright (C) 1997, 1999 Jakub Jelinek (jj@ultra.linux.cz) - * Copyright (C) 2006 David S. Miller <davem@davemloft.net> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2, or (at your option) - * any later version. - * - * You should have received a copy of the GNU General Public License - * (for example /usr/src/linux/COPYING); if not, write to the Free - * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#include <asm/spitfire.h> - -extern void xor_vis_2(unsigned long, unsigned long *, unsigned long *); -extern void xor_vis_3(unsigned long, unsigned long *, unsigned long *, - unsigned long *); -extern void xor_vis_4(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *); -extern void xor_vis_5(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *, unsigned long *); - -/* XXX Ugh, write cheetah versions... -DaveM */ - -static struct xor_block_template xor_block_VIS = { - .name = "VIS", - .do_2 = xor_vis_2, - .do_3 = xor_vis_3, - .do_4 = xor_vis_4, - .do_5 = xor_vis_5, -}; - -extern void xor_niagara_2(unsigned long, unsigned long *, unsigned long *); -extern void xor_niagara_3(unsigned long, unsigned long *, unsigned long *, - unsigned long *); -extern void xor_niagara_4(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *); -extern void xor_niagara_5(unsigned long, unsigned long *, unsigned long *, - unsigned long *, unsigned long *, unsigned long *); - -static struct xor_block_template xor_block_niagara = { - .name = "Niagara", - .do_2 = xor_niagara_2, - .do_3 = xor_niagara_3, - .do_4 = xor_niagara_4, - .do_5 = xor_niagara_5, -}; - -#undef XOR_TRY_TEMPLATES -#define XOR_TRY_TEMPLATES \ - do { \ - xor_speed(&xor_block_VIS); \ - xor_speed(&xor_block_niagara); \ - } while (0) - -/* For VIS for everything except Niagara. */ -#define XOR_SELECT_TEMPLATE(FASTEST) \ - ((tlb_type == hypervisor && \ - (sun4v_chip_type == SUN4V_CHIP_NIAGARA1 || \ - sun4v_chip_type == SUN4V_CHIP_NIAGARA2)) ? \ - &xor_block_niagara : \ - &xor_block_VIS) +#include <asm-sparc/xor.h> |