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authorMatt Carlson <mcarlson@broadcom.com>2007-10-21 16:17:55 -0700
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-22 02:59:51 -0700
commit8a6eac90e21633e054e17d21454a2c26824aeb18 (patch)
tree0d9bce8b6c5f359d6532f854467c71eb83356d90
parent9c8a620e7f85fff050a54697da44bbd1a66e8e0b (diff)
[TG3]: PCI command adjustment
This patch changes the way the driver works with the PCI command register. It adjusts the access size from dwords to words. This patch is done both as a PCI configuration space cleanup and as preparatory work for PCI error recovery. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/tg3.c7
-rw-r--r--drivers/net/tg3.h2
2 files changed, 3 insertions, 6 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 98f46582811..328eb4adc10 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -5029,10 +5029,7 @@ static int tg3_poll_fw(struct tg3 *tp)
/* Save PCI command register before chip reset */
static void tg3_save_pci_state(struct tg3 *tp)
{
- u32 val;
-
- pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val);
- tp->pci_cmd = val;
+ pci_read_config_word(tp->pdev, PCI_COMMAND, &tp->pci_cmd);
}
/* Restore PCI state after chip reset */
@@ -5055,7 +5052,7 @@ static void tg3_restore_pci_state(struct tg3 *tp)
PCISTATE_ALLOW_APE_SHMEM_WR;
pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
- pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd);
+ pci_write_config_word(tp->pdev, PCI_COMMAND, tp->pci_cmd);
if (!(tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS)) {
pci_write_config_byte(tp->pdev, PCI_CACHE_LINE_SIZE,
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 495a1dfaba5..1d5b2a3dd29 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2421,7 +2421,7 @@ struct tg3 {
#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */
u32 led_ctrl;
- u32 pci_cmd;
+ u16 pci_cmd;
char board_part_number[24];
#define TG3_VER_SIZE 32