diff options
| author | Jeremy Fitzhardinge <jeremy@goop.org> | 2008-02-04 16:48:02 +0100 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-02-04 16:48:02 +0100 |
| commit | a67ad9c9f82342a9b320fdad204a490727ef4a18 (patch) | |
| tree | 47117746d64a3255e35fda69e8127d64e35fe122 | |
| parent | e618c9579c745742c422b7c3de1f802aa67e6110 (diff) | |
x86: revert "defer cr3 reload when doing pud_clear()"
Revert "defer cr3 reload when doing pud_clear()" since I'm going to
replace it.
Signed-off-by: Jeremy Fitzhardinge <jeremy@xensource.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| -rw-r--r-- | arch/x86/mm/pgtable_32.c | 7 | ||||
| -rw-r--r-- | include/asm-x86/pgtable-3level.h | 21 |
2 files changed, 6 insertions, 22 deletions
diff --git a/arch/x86/mm/pgtable_32.c b/arch/x86/mm/pgtable_32.c index f34e33d1844..c7db504be1e 100644 --- a/arch/x86/mm/pgtable_32.c +++ b/arch/x86/mm/pgtable_32.c @@ -373,13 +373,6 @@ void __pte_free_tlb(struct mmu_gather *tlb, struct page *pte) void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd) { - /* This is called just after the pmd has been detached from - the pgd, which requires a full tlb flush to be recognized - by the CPU. Rather than incurring multiple tlb flushes - while the address space is being pulled down, make the tlb - gathering machinery do a full flush when we're done. */ - tlb->fullmm = 1; - paravirt_release_pd(__pa(pmd) >> PAGE_SHIFT); tlb_remove_page(tlb, virt_to_page(pmd)); } diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h index a195c3e757b..ed4c6f0e57e 100644 --- a/include/asm-x86/pgtable-3level.h +++ b/include/asm-x86/pgtable-3level.h @@ -96,23 +96,14 @@ static inline void pud_clear(pud_t *pudp) set_pud(pudp, __pud(0)); /* - * In principle we need to do a cr3 reload here to make sure - * the processor recognizes the changed pgd. In practice, all - * the places where pud_clear() gets called are followed by - * full tlb flushes anyway, so we can defer the cost here. + * Pentium-II erratum A13: in PAE mode we explicitly have to flush + * the TLB via cr3 if the top-level pgd is changed... * - * Specifically: - * - * mm/memory.c:free_pmd_range() - immediately after the - * pud_clear() it does a pmd_free_tlb(). We change the - * mmu_gather structure to do a full tlb flush (which has the - * effect of reloading cr3) when the pagetable free is - * complete. - * - * arch/x86/mm/hugetlbpage.c:huge_pmd_unshare() - the call to - * this is followed by a flush_tlb_range, which on x86 does a - * full tlb flush. + * XXX I don't think we need to worry about this here, since + * when clearing the pud, the calling code needs to flush the + * tlb anyway. But do it now for safety's sake. - jsgf */ + write_cr3(read_cr3()); } #define pud_page(pud) \ |