aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMatt Carlson <mcarlson@broadcom.com>2008-05-02 16:48:59 -0700
committerDavid S. Miller <davem@davemloft.net>2008-05-02 16:48:59 -0700
commit109115e1991824b88306b374b763d6857b292aeb (patch)
tree2ecbe856fd030ffb6b9a34fca80924bdfddb3713
parentfd1122a2593d0bbe19856e3943c859ebfe563583 (diff)
tg3: Fix ethtool loopback test for 5761 BX devices
A CPMU related loopback test bug existed for AX revisions of the 5761. While that errata has been fixed, the CPMU still slows down the core clock too far to run the loopback test successfully. This patch disables the CPMU LINK_SPEED mode just like we do with the AX revisions of the 5761 and all revisions of the 5784. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/tg3.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index b17812491b8..bf376b32450 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -9570,14 +9570,9 @@ static int tg3_test_loopback(struct tg3 *tp)
/* Turn off link-based power management. */
cpmuctrl = tr32(TG3_CPMU_CTRL);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
- GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5761_AX)
- tw32(TG3_CPMU_CTRL,
- cpmuctrl & ~(CPMU_CTRL_LINK_SPEED_MODE |
- CPMU_CTRL_LINK_AWARE_MODE));
- else
- tw32(TG3_CPMU_CTRL,
- cpmuctrl & ~CPMU_CTRL_LINK_AWARE_MODE);
+ tw32(TG3_CPMU_CTRL,
+ cpmuctrl & ~(CPMU_CTRL_LINK_SPEED_MODE |
+ CPMU_CTRL_LINK_AWARE_MODE));
}
if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK))