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authorLennert Buytenhek <buytenh@wantstofly.org>2008-05-23 08:34:42 +0200
committerLennert Buytenhek <buytenh@marvell.com>2008-06-22 22:44:41 +0200
commit4fc338e38f08f0a91e35ab386abae48eb033dbb2 (patch)
tree9f7c87c87bcff36eb14bfe0a96df585f4589b9bd
parenta18b658449e6677aba2bf8dcd3593adecff6fe4d (diff)
[ARM] Orion: DRAM mapping granularity is 64KiB, not 16MiB
The DRAM base address and size fields in the CPU's MBUS bridge have 64KiB granularity, instead of the currently used 16MiB. Since all of the currently supported MBUS peripherals support 64KiB granularity as well, this patch changes the Orion address map code to stop rounding base addresses down and sizes up to multiples of 16MiB. Found by Ke Wei <kewei@marvell.com>. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Acked-by: Russell King <linux@arm.linux.org.uk>
-rw-r--r--arch/arm/mach-orion5x/addr-map.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c
index 5ffbac9e157..267e9f960a5 100644
--- a/arch/arm/mach-orion5x/addr-map.c
+++ b/arch/arm/mach-orion5x/addr-map.c
@@ -155,8 +155,8 @@ void __init orion5x_setup_cpu_mbus_bridge(void)
w = &orion5x_mbus_dram_info.cs[cs++];
w->cs_index = i;
w->mbus_attr = 0xf & ~(1 << i);
- w->base = base & 0xff000000;
- w->size = (size | 0x00ffffff) + 1;
+ w->base = base & 0xffff0000;
+ w->size = (size | 0x0000ffff) + 1;
}
}
orion5x_mbus_dram_info.num_cs = cs;