diff options
| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-08-13 16:24:01 +0200 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-08-15 16:36:56 +0200 |
| commit | cca67164bbdb083df9adb6480822518b0f4b358f (patch) | |
| tree | a4b951950a6f9dfb880d25d57a932760aa2032f1 | |
| parent | 6f834197a79d34d65ca44e9c77f2571edbcfb64b (diff) | |
[AVR32] Define mmiowb()
Add empty definition of mmiowb() since some drivers need it. Uncached
writes are strongly ordered on AVR32. They may be delayed if the
dcache is busy doing a writeback, but AFAICT that's not what this
macro is supposed to deal with, at least on UP systems.
We might have to revisit this definition when a SMP-capable AVR32 CPU
comes along, depending on how the busses and cache coherency stuff
end up being implemented.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
| -rw-r--r-- | include/asm-avr32/io.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h index e30d4b3bd83..64bb92bb677 100644 --- a/include/asm-avr32/io.h +++ b/include/asm-avr32/io.h @@ -255,6 +255,8 @@ static inline void memset_io(volatile void __iomem *addr, unsigned char val, memset((void __force *)addr, val, count); } +#define mmiowb() + #define IO_SPACE_LIMIT 0xffffffff extern void __iomem *__ioremap(unsigned long offset, size_t size, |