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authorDavid S. Miller <davem@davemloft.net>2006-01-31 18:32:44 -0800
committerDavid S. Miller <davem@sunset.davemloft.net>2006-03-20 01:11:21 -0800
commit4753eb2ac7022b999e5e484f1a5dc001dba22bd3 (patch)
tree138321ebd3b3c3aeb99517ec5158a65f556da774
parent96c6e0d8e2a0eb1338751598be47fa1ffed91704 (diff)
[SPARC64]: Fix incorrect TSB lock bit handling.
The TSB_LOCK_BIT define is actually a special value shifted down by 32-bits for the assembler code macros. In C code, this isn't what we want. Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--arch/sparc64/mm/tsb.c2
-rw-r--r--include/asm-sparc64/tsb.h5
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/sparc64/mm/tsb.c b/arch/sparc64/mm/tsb.c
index 707af4b84a0..e605478217c 100644
--- a/arch/sparc64/mm/tsb.c
+++ b/arch/sparc64/mm/tsb.c
@@ -184,7 +184,7 @@ static void copy_tsb(struct tsb *old_tsb, unsigned long old_size,
: "=r" (tag), "=r" (pte)
: "r" (&old_tsb[i]), "i" (ASI_NUCLEUS_QUAD_LDD));
- if (!tag || (tag & TSB_TAG_LOCK))
+ if (!tag || (tag & (1UL << TSB_TAG_LOCK_BIT)))
continue;
/* We only put base page size PTEs into the TSB,
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index 1f93b7d8cdb..09ab3aaa8d2 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -47,13 +47,14 @@
* possible solution is to use RCU for the freeing of the TSB.
*/
-#define TSB_TAG_LOCK (1 << (47 - 32))
+#define TSB_TAG_LOCK_BIT 47
+#define TSB_TAG_LOCK_HIGH (1 << (TSB_TAG_LOCK_BIT - 32))
#define TSB_MEMBAR membar #StoreStore
#define TSB_LOCK_TAG(TSB, REG1, REG2) \
99: lduwa [TSB] ASI_N, REG1; \
- sethi %hi(TSB_TAG_LOCK), REG2;\
+ sethi %hi(TSB_TAG_LOCK_HIGH), REG2;\
andcc REG1, REG2, %g0; \
bne,pn %icc, 99b; \
nop; \