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authorAndre Przywara <andre.przywara@amd.com>2009-06-24 15:37:05 +0200
committerAvi Kivity <avi@redhat.com>2009-09-10 08:33:06 +0300
commitc323c0e5f06150cc000e09e8e3b22356099e7bde (patch)
treeade33cadd2944bb7f81a5ab26f02d103e2d6d112
parentae8c1c4025c2b780616586c3f86a3374a154ef90 (diff)
KVM: Ignore PCI ECS I/O enablement
Linux guests will try to enable access to the extended PCI config space via the I/O ports 0xCF8/0xCFC on AMD Fam10h CPU. Since we (currently?) don't use ECS, simply ignore write and read attempts. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Avi Kivity <avi@redhat.com>
-rw-r--r--arch/x86/kvm/x86.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 96f0ae7d97b..af40e23df25 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -844,6 +844,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
return 1;
}
break;
+ case MSR_AMD64_NB_CFG:
+ break;
case MSR_IA32_DEBUGCTLMSR:
if (!data) {
/* We support the non-activated case already */
@@ -1049,6 +1051,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
case MSR_P6_EVNTSEL1:
case MSR_K7_EVNTSEL0:
case MSR_K8_INT_PENDING_MSG:
+ case MSR_AMD64_NB_CFG:
data = 0;
break;
case MSR_MTRRcap: