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authorHemant Pedanekar <hemantp@ti.com>2009-07-17 23:30:36 +0530
committerKevin Hilman <khilman@deeprootsystems.com>2009-08-26 11:55:47 +0300
commit548197bdf02882db39b7563d26975e7549e6af03 (patch)
tree91eb24de0050eadc8ababbbb0124eb7b9cbeba3e
parent10a1af384e8157fa2e3275d68346cceff1ad06ca (diff)
davinci: dm646x-evm: Add support for IDE
Controls ATA_RSTn and ATA_PWD through CPLD register 0 to enable ATA. An I2C driver is added for the same. Calls ide init if enabled in configuration. Signed-off-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-davinci/board-dm646x-evm.c59
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 0aa18df4110..fa91520532a 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -48,6 +48,17 @@
#include <mach/mmc.h>
#include <mach/emac.h>
+#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
+ defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
+#define HAS_ATA 1
+#else
+#define HAS_ATA 0
+#endif
+
+/* CPLD Register 0 bits to control ATA */
+#define DM646X_EVM_ATA_RST BIT(0)
+#define DM646X_EVM_ATA_PWD BIT(1)
+
#define DM646X_EVM_PHY_MASK (0x2)
#define DM646X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
@@ -55,6 +66,47 @@ static struct davinci_uart_config uart_config __initdata = {
.enabled_uarts = (1 << 0),
};
+/* CPLD Register 0 Client: used for I/O Control */
+static int cpld_reg0_probe(struct i2c_client *client,
+ const struct i2c_device_id *id)
+{
+ if (HAS_ATA) {
+ u8 data;
+ struct i2c_msg msg[2] = {
+ {
+ .addr = client->addr,
+ .flags = I2C_M_RD,
+ .len = 1,
+ .buf = &data,
+ },
+ {
+ .addr = client->addr,
+ .flags = 0,
+ .len = 1,
+ .buf = &data,
+ },
+ };
+
+ /* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
+ i2c_transfer(client->adapter, msg, 1);
+ data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
+ i2c_transfer(client->adapter, msg + 1, 1);
+ }
+
+ return 0;
+}
+
+static const struct i2c_device_id cpld_reg_ids[] = {
+ { "cpld_reg0", 0, },
+ { },
+};
+
+static struct i2c_driver dm6467evm_cpld_driver = {
+ .driver.name = "cpld_reg0",
+ .id_table = cpld_reg_ids,
+ .probe = cpld_reg0_probe,
+};
+
/* LEDS */
static struct gpio_led evm_leds[] = {
@@ -246,6 +298,9 @@ static struct i2c_board_info __initdata i2c_info[] = {
I2C_BOARD_INFO("pcf8574a", 0x38),
.platform_data = &pcf_data,
},
+ {
+ I2C_BOARD_INFO("cpld_reg0", 0x3a),
+ },
};
static struct davinci_i2c_platform_data i2c_pdata = {
@@ -256,6 +311,7 @@ static struct davinci_i2c_platform_data i2c_pdata = {
static void __init evm_init_i2c(void)
{
davinci_init_i2c(&i2c_pdata);
+ i2c_add_driver(&dm6467evm_cpld_driver);
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
}
@@ -273,6 +329,9 @@ static __init void evm_init(void)
dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
+ if (HAS_ATA)
+ dm646x_init_ide();
+
soc_info->emac_pdata->phy_mask = DM646X_EVM_PHY_MASK;
soc_info->emac_pdata->mdio_max_freq = DM646X_EVM_MDIO_FREQUENCY;
}