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authorBen Dooks <ben-linux@fluff.org>2008-10-21 14:07:06 +0100
committerBen Dooks <ben-linux@fluff.org>2008-12-15 23:03:10 +0000
commita801cd619215a9e8c4968352cf8698ea5235f0f4 (patch)
tree40eb77d9d1a3b246f4140ea0402042bf04543a0a
parent3e694d4bc633a5e6192e63a644a628e7bbab3e64 (diff)
[ARM] VIC: Update asm/hardware/vic.h with PL192 information
The original arch/arm/include/asm/hardware/vic.h was written for the PL190 ARM VIC implementation, and as such does not have any information about the PL192 version. Add details about the PL192 and PL190 specific registers and any changes between the two units. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r--arch/arm/common/vic.c8
-rw-r--r--arch/arm/include/asm/hardware/vic.h10
2 files changed, 10 insertions, 8 deletions
diff --git a/arch/arm/common/vic.c b/arch/arm/common/vic.c
index f1e4b8f60ca..ecf0bfbab10 100644
--- a/arch/arm/common/vic.c
+++ b/arch/arm/common/vic.c
@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
/*
* Make sure we clear all existing interrupts
*/
- writel(0, base + VIC_VECT_ADDR);
+ writel(0, base + VIC_PL190_VECT_ADDR);
for (i = 0; i < 19; i++) {
unsigned int value;
- value = readl(base + VIC_VECT_ADDR);
- writel(value, base + VIC_VECT_ADDR);
+ value = readl(base + VIC_PL190_VECT_ADDR);
+ writel(value, base + VIC_PL190_VECT_ADDR);
}
for (i = 0; i < 16; i++) {
@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
writel(VIC_VECT_CNTL_ENABLE | i, reg);
}
- writel(32, base + VIC_DEF_VECT_ADDR);
+ writel(32, base + VIC_PL190_DEF_VECT_ADDR);
for (i = 0; i < 32; i++) {
unsigned int irq = irq_start + i;
diff --git a/arch/arm/include/asm/hardware/vic.h b/arch/arm/include/asm/hardware/vic.h
index 263f2c362a3..f87328d4a18 100644
--- a/arch/arm/include/asm/hardware/vic.h
+++ b/arch/arm/include/asm/hardware/vic.h
@@ -29,15 +29,17 @@
#define VIC_INT_SOFT 0x18
#define VIC_INT_SOFT_CLEAR 0x1c
#define VIC_PROTECT 0x20
-#define VIC_VECT_ADDR 0x30
-#define VIC_DEF_VECT_ADDR 0x34
+#define VIC_PL190_VECT_ADDR 0x30 /* PL190 only */
+#define VIC_PL190_DEF_VECT_ADDR 0x34 /* PL190 only */
-#define VIC_VECT_ADDR0 0x100 /* 0 to 15 */
-#define VIC_VECT_CNTL0 0x200 /* 0 to 15 */
+#define VIC_VECT_ADDR0 0x100 /* 0 to 15 (0..31 PL192) */
+#define VIC_VECT_CNTL0 0x200 /* 0 to 15 (0..31 PL192) */
#define VIC_ITCR 0x300 /* VIC test control register */
#define VIC_VECT_CNTL_ENABLE (1 << 5)
+#define VIC_PL192_VECT_ADDR 0xF00
+
#ifndef __ASSEMBLY__
void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources);
#endif