diff options
| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-01-29 02:27:51 +0900 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-02-07 13:30:25 +0000 |
| commit | d4264f183967db9c2dae4275abb98eb1f79facb2 (patch) | |
| tree | 8fdbc5254428255171665c18bfedcb00222b9d43 | |
| parent | 2caf190002770b53fdb263ed744802a1b5e81649 (diff) | |
[MIPS] Remove wrong __user tags.
This fixes sparse warnings 'dereference of noderef expression'.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 7 | ||||
| -rw-r--r-- | arch/mips/mm/cache.c | 5 | ||||
| -rw-r--r-- | include/asm-mips/cacheflush.h | 3 |
3 files changed, 6 insertions, 9 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 422b55fab07..e51c38cef88 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -464,8 +464,8 @@ static void r4k_flush_data_cache_page(unsigned long addr) } struct flush_icache_range_args { - unsigned long __user start; - unsigned long __user end; + unsigned long start; + unsigned long end; }; static inline void local_r4k_flush_icache_range(void *args) @@ -528,8 +528,7 @@ static inline void local_r4k_flush_icache_range(void *args) } } -static void r4k_flush_icache_range(unsigned long __user start, - unsigned long __user end) +static void r4k_flush_icache_range(unsigned long start, unsigned long end) { struct flush_icache_range_args args; diff --git a/arch/mips/mm/cache.c b/arch/mips/mm/cache.c index 314701a66b1..591c22b080e 100644 --- a/arch/mips/mm/cache.c +++ b/arch/mips/mm/cache.c @@ -25,8 +25,7 @@ void (*flush_cache_range)(struct vm_area_struct *vma, unsigned long start, unsigned long end); void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); -void (*flush_icache_range)(unsigned long __user start, - unsigned long __user end); +void (*flush_icache_range)(unsigned long start, unsigned long end); void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); /* MIPS specific cache operations */ @@ -53,7 +52,7 @@ EXPORT_SYMBOL(_dma_cache_inv); * We could optimize the case where the cache argument is not BCACHE but * that seems very atypical use ... */ -asmlinkage int sys_cacheflush(unsigned long __user addr, +asmlinkage int sys_cacheflush(unsigned long addr, unsigned long bytes, unsigned int cache) { if (bytes == 0) diff --git a/include/asm-mips/cacheflush.h b/include/asm-mips/cacheflush.h index a18ba2edc0b..aeae9fabf4a 100644 --- a/include/asm-mips/cacheflush.h +++ b/include/asm-mips/cacheflush.h @@ -49,8 +49,7 @@ static inline void flush_dcache_page(struct page *page) extern void (*flush_icache_page)(struct vm_area_struct *vma, struct page *page); -extern void (*flush_icache_range)(unsigned long __user start, - unsigned long __user end); +extern void (*flush_icache_range)(unsigned long start, unsigned long end); #define flush_cache_vmap(start, end) flush_cache_all() #define flush_cache_vunmap(start, end) flush_cache_all() |