diff options
author | Lennert Buytenhek <buytenh@wantstofly.org> | 2009-11-07 14:50:00 +0100 |
---|---|---|
committer | Nicolas Pitre <nico@fluxnic.net> | 2009-11-07 20:18:24 -0500 |
commit | a1897fa67cb964cc6b5a9048a31eb6ef3dcc2dda (patch) | |
tree | d6aade1f087af0d2a89f1f8056edcd29f098cf51 | |
parent | 35f029e2514be209eb0e88c7d927f3bcc42a5cc2 (diff) |
[ARM] Kirkwood: clarify PCIe MEM bus/physical address distinction
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
-rw-r--r-- | arch/arm/mach-kirkwood/addr-map.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/kirkwood.h | 1 | ||||
-rw-r--r-- | arch/arm/mach-kirkwood/pcie.c | 2 |
3 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c index 1da5d1c18ec..2e69168fc69 100644 --- a/arch/arm/mach-kirkwood/addr-map.c +++ b/arch/arm/mach-kirkwood/addr-map.c @@ -105,7 +105,7 @@ void __init kirkwood_setup_cpu_mbus(void) setup_cpu_win(0, KIRKWOOD_PCIE_IO_PHYS_BASE, KIRKWOOD_PCIE_IO_SIZE, TARGET_PCIE, ATTR_PCIE_IO, KIRKWOOD_PCIE_IO_BUS_BASE); setup_cpu_win(1, KIRKWOOD_PCIE_MEM_PHYS_BASE, KIRKWOOD_PCIE_MEM_SIZE, - TARGET_PCIE, ATTR_PCIE_MEM, -1); + TARGET_PCIE, ATTR_PCIE_MEM, KIRKWOOD_PCIE_MEM_BUS_BASE); /* * Setup window for NAND controller. diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index 54c132731d2..a15cf0ee22b 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -43,6 +43,7 @@ #define KIRKWOOD_REGS_SIZE SZ_1M #define KIRKWOOD_PCIE_MEM_PHYS_BASE 0xe0000000 +#define KIRKWOOD_PCIE_MEM_BUS_BASE 0xe0000000 #define KIRKWOOD_PCIE_MEM_SIZE SZ_128M /* diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c index 0660e78641e..a604b2a701a 100644 --- a/arch/arm/mach-kirkwood/pcie.c +++ b/arch/arm/mach-kirkwood/pcie.c @@ -126,7 +126,7 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys) */ res[1].name = "PCIe Memory Space"; res[1].flags = IORESOURCE_MEM; - res[1].start = KIRKWOOD_PCIE_MEM_PHYS_BASE; + res[1].start = KIRKWOOD_PCIE_MEM_BUS_BASE; res[1].end = res[1].start + KIRKWOOD_PCIE_MEM_SIZE - 1; if (request_resource(&iomem_resource, &res[1])) panic("Request PCIe Memory resource failed\n"); |