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authorChris Wilson <chris@chris-wilson.co.uk>2009-10-14 20:12:46 +0100
committerEric Anholt <eric@anholt.net>2009-10-15 09:20:58 -0700
commit0d9c778978ff268228c095ae737c282c03a5986d (patch)
treee20e4c63530b8b25cd582cf3602fa2da143003a8 /Documentation/mca.txt
parent0eb96d6ed38430b72897adde58f5477a6b71757a (diff)
drm/i915: Install a fence register for fbc on g4x
To enable framebuffer compression on a g4x, we not only need the buffer to tiled (X only), we also need to hold a fence register for the buffer. Currently we only install a fence register for pre-i965s when setting up the scanout buffer. Rather than adding some convoluted logic to g4x_enable_fbc() to acquire a fence register, and perhaps to g4x_disable_fbc() to release it again, we can extend the acquisition during setup to all chipsets. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'Documentation/mca.txt')
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