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authorChris Wilson <chris@chris-wilson.co.uk>2009-06-17 22:08:52 +0100
committerEric Anholt <eric@anholt.net>2009-06-18 11:47:04 -0700
commit8c4b8c3f34de4e2da20df042bba173fe557f8b45 (patch)
tree665c717af9a0b630303294bcbe48d9cafb10f186 /Documentation/s390/3270.ChangeLog
parentd78b47b9a527bf46cb6081555847facd6efd5f81 (diff)
drm/i915: Install fence register for tiled scanout on i915
With the work by Jesse Barnes to eliminate allocation of fences during execbuffer, it becomes possible to write to the scan-out buffer with it never acquiring a fence (simply by only ever writing to the object using tiled GPU commands and never writing to it via the GTT). So for pre-i965 chipsets which require fenced access for tiled scan-out buffers, we need to obtain a fence register. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
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