diff options
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2009-11-02 07:52:29 +0000 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2009-11-05 14:00:32 -0800 |
| commit | 4bfe6b6876a036d26a960320f1ab0bbd752c19bf (patch) | |
| tree | a148753cbfea2eee98989d253b9ca572a7873023 /Documentation/scsi/sym53c500_cs.txt | |
| parent | ba86bf8bfc1add5f515db8cf1d6042bb9396a299 (diff) | |
drm/i915: Fix and cleanup DPLL calculation for Ironlake
When the ideal error range can't be reached, this will safely use
a most closed one. Clean up some dumb codes in DPLL function too.
This fixes DPLL clock issue against one monitor at 1680x1050@60hz.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'Documentation/scsi/sym53c500_cs.txt')
0 files changed, 0 insertions, 0 deletions