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authorSekhar Nori <nsekhar@ti.com>2009-11-16 17:21:36 +0530
committerKevin Hilman <khilman@deeprootsystems.com>2010-02-04 13:29:37 -0800
commite2da3aaa4254d9e79d9524190fc7e5f0cbdc3c33 (patch)
tree42d3637d038179ef69056713482bf4186d12c8a1 /arch/arm/mach-davinci/clock.h
parentc94fa15ba2d736af786ac1e56686d41987b1aba0 (diff)
davinci: make it possible to include clock.h and psc.h in assembly code
psc.h contains register defines for PSC module which need to be accessed in assembly code which helps the DA850/OMAP-L138 SoC go to sleep. Shutting down DDR clock using PSC is a part of the sleep procedure. Also, the PLL related hardware definitions in clock.h are needed in assembly code to bypass the DDR2 PLL. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/clock.h')
-rw-r--r--arch/arm/mach-davinci/clock.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index eca4d997222..31fb6eac712 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -12,9 +12,6 @@
#ifndef __ARCH_ARM_DAVINCI_CLOCK_H
#define __ARCH_ARM_DAVINCI_CLOCK_H
-#include <linux/list.h>
-#include <asm/clkdev.h>
-
#define DAVINCI_PLL1_BASE 0x01c40800
#define DAVINCI_PLL2_BASE 0x01c40c00
#define MAX_PLL 2
@@ -68,6 +65,11 @@
*/
#define PLL_LOCK_TIME 20
+#ifndef __ASSEMBLER__
+
+#include <linux/list.h>
+#include <asm/clkdev.h>
+
struct pll_data {
u32 phys_base;
void __iomem *base;
@@ -124,3 +126,5 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
extern struct platform_device davinci_wdt_device;
#endif
+
+#endif