diff options
author | David Brownell <dbrownell@users.sourceforge.net> | 2009-03-04 12:01:36 -0800 |
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committer | David Woodhouse <David.Woodhouse@intel.com> | 2009-03-20 12:27:43 +0000 |
commit | 52ff49df7fab18e56fa31b43143c4150c2547836 (patch) | |
tree | d796944bf50cec952789ae384f7ea3247d691634 /arch/arm/mach-davinci | |
parent | c6d59cdd412e1ae34ad9c8dc69eaabada792f7ae (diff) |
[MTD] [NAND] fix "raw" reads with ECC syndrome layouts
The syndrome based page read/write routines store ECC, and possibly other
"OOB" data, right after each chunk of ECC'd data. With ECC chunk size of
512 bytes and a large page (2KiB) NAND, the layout is:
data-0 OOB-0 data-1 OOB-1 data-2 OOB-2 data-3 OOB-3 OOB-leftover
Where OOBx is (prepad, ECC, postpad). However, the current "raw" routines
use a traditional layout -- data OOB, disregarding the prepad and postpad
values -- so when they're used with that type of ECC hardware, those calls
mix up the data and OOB. Which means, in particular, that bad block
tables won't be found on startup, with data corruption and related chaos
ensuing.
The current syndrome-based drivers in mainline all seem to use one chunk
per page; presumably they haven't noticed such bugs.
Fix this, by adding read/write page_raw_syndrome() routines as siblings of
the existing non-raw routines; "raw" just means to bypass the ECC
computations, not change data and OOB layout.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'arch/arm/mach-davinci')
0 files changed, 0 insertions, 0 deletions