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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-12 12:31:43 -0700
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-03-12 12:31:43 -0700
commit529284a0b649499351495949d05fa3359121cbae (patch)
tree9b33459a8f720313eeee469bfe18eeb5052246d2 /arch/arm/mach-imx/cpufreq.c
parentbe521466feb3bb1cd89de82a2b1d080e9ebd3cb6 (diff)
parent1dee79087c8b0f3239a2979f61ed92c7a5361b08 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: [ARM] 4263/1: fix IXP4XX_NPE[ABC]_BASE_VIRT address [ARM] 4256/1: i.MX/MX1 SDHC fix/workaround of SD card recognition problems [ARM] 4255/1: i.MX/MX1 Correct MPU PLL reference clock value. [ARM] 4254/1: i.MX/MX1 CPU Frequency scaling honor boot loader set BCLK_DIV. [ARM] 4251/1: Fix sharpsl_pm dependency [ARM] 4250/1: Fix locomo backlight conversion error/compile failure [ARM] 4249/1: Fix tosa compile failure [ARM] 4248/1: lh7a40x: fix missing definitions for get_irqnr_preamble [ARM] 4247/1: Fix long name for cc9p9360dev ARM: OMAP: Fix OMAP2 dss2 so clk_set_parent works ARM: OMAP: Fix missing workqueue include in board-h2.c ARM: OMAP: Include missing header
Diffstat (limited to 'arch/arm/mach-imx/cpufreq.c')
-rw-r--r--arch/arm/mach-imx/cpufreq.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/cpufreq.c b/arch/arm/mach-imx/cpufreq.c
index 4f66e90db74..7e70e0b0b98 100644
--- a/arch/arm/mach-imx/cpufreq.c
+++ b/arch/arm/mach-imx/cpufreq.c
@@ -50,6 +50,7 @@
#define CR_920T_ASYNC_MODE 0xC0000000
static u32 mpctl0_at_boot;
+static u32 bclk_div_at_boot;
static void imx_set_async_mode(void)
{
@@ -82,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0)
* imx_compute_mpctl - compute new PLL parameters
* @new_mpctl: pointer to location assigned by new PLL control register value
* @cur_mpctl: current PLL control register parameters
+ * @f_ref: reference source frequency Hz
* @freq: required frequency in Hz
* @relation: is one of %CPUFREQ_RELATION_L (supremum)
* and %CPUFREQ_RELATION_H (infimum)
*/
-long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation)
+long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation)
{
- u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
u32 mfi;
u32 mfn;
u32 mfd;
@@ -182,7 +183,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
unsigned long flags;
long freq;
long sysclk;
- unsigned int bclk_div = 1;
+ unsigned int bclk_div = bclk_div_at_boot;
/*
* Some governors do not respects CPU and policy lower limits
@@ -202,8 +203,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
sysclk = imx_get_system_clk();
- if (freq > sysclk + 1000000) {
- freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation);
+ if (freq > sysclk / bclk_div_at_boot + 1000000) {
+ freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);
if (freq < 0) {
printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq);
return -EINVAL;
@@ -217,6 +218,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
if(bclk_div > 16)
bclk_div = 16;
+ if(bclk_div < bclk_div_at_boot)
+ bclk_div = bclk_div_at_boot;
}
freq = (sysclk + bclk_div / 2) / bclk_div;
}
@@ -285,7 +288,7 @@ static struct cpufreq_driver imx_driver = {
static int __init imx_cpufreq_init(void)
{
-
+ bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;
mpctl0_at_boot = 0;
if((CSCR & CSCR_MPEN) &&