diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-07 10:45:22 -0800 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-07 10:45:22 -0800 |
commit | 8995b161eb142b843094dd614b80e4cce1d66352 (patch) | |
tree | ffd9988879441d5ec45ab96b2e06f4fcb1210158 /arch/arm/mach-ixp4xx | |
parent | cc918c7ab7da017bfaf9661420bb5c462e057cfb (diff) | |
parent | fe5dd7c73d328b255286b6b65ca19dd34447f709 (diff) |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r-- | arch/arm/mach-ixp4xx/Kconfig | 8 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/Makefile | 1 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/common-pci.c | 23 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/common.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/coyote-pci.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/coyote-setup.c | 10 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/gtwx5715-setup.c | 15 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/ixdp425-pci.c | 5 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/ixdp425-setup.c | 13 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/ixdpg425-pci.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nas100d-pci.c | 71 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nas100d-power.c | 67 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nas100d-setup.c | 135 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nslu2-pci.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-ixp4xx/nslu2-power.c | 3 |
15 files changed, 345 insertions, 40 deletions
diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 385285851cb..daadc78e271 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -71,6 +71,14 @@ config ARCH_PRPMC1100 PrPCM1100 Processor Mezanine Module. For more information on this platform, see <file:Documentation/arm/IXP4xx>. +config MACH_NAS100D + bool + prompt "NAS100D" + help + Say 'Y' here if you want your kernel to support Iomega's + NAS 100d device. For more information on this platform, + see http://www.nslu2-linux.org/wiki/NAS100d/HomePage + # # Avila and IXDP share the same source for now. Will change in future # diff --git a/arch/arm/mach-ixp4xx/Makefile b/arch/arm/mach-ixp4xx/Makefile index 7a15629c18d..0471044fa17 100644 --- a/arch/arm/mach-ixp4xx/Makefile +++ b/arch/arm/mach-ixp4xx/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o +obj-$(CONFIG_MACH_NAS100D) += nas100d-pci.o nas100d-setup.o nas100d-power.o diff --git a/arch/arm/mach-ixp4xx/common-pci.c b/arch/arm/mach-ixp4xx/common-pci.c index 9795da270e3..6e3462ed530 100644 --- a/arch/arm/mach-ixp4xx/common-pci.c +++ b/arch/arm/mach-ixp4xx/common-pci.c @@ -341,6 +341,29 @@ int dma_needs_bounce(struct device *dev, dma_addr_t dma_addr, size_t size) return (dev->bus == &pci_bus_type ) && ((dma_addr + size) >= SZ_64M); } +/* + * Only first 64MB of memory can be accessed via PCI. + * We use GFP_DMA to allocate safe buffers to do map/unmap. + * This is really ugly and we need a better way of specifying + * DMA-capable regions of memory. + */ +void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size, + unsigned long *zhole_size) +{ + unsigned int sz = SZ_64M >> PAGE_SHIFT; + + /* + * Only adjust if > 64M on current system + */ + if (node || (zone_size[0] <= sz)) + return; + + zone_size[1] = zone_size[0] - sz; + zone_size[0] = sz; + zhole_size[1] = zhole_size[0]; + zhole_size[0] = 0; +} + void __init ixp4xx_pci_preinit(void) { unsigned long processor_id; diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index f3c687cf007..6b393691d0e 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c @@ -142,6 +142,8 @@ static int ixp4xx_set_irq_type(unsigned int irq, unsigned int type) *int_reg &= ~(IXP4XX_GPIO_STYLE_CLEAR << (line * IXP4XX_GPIO_STYLE_SIZE)); + *IXP4XX_GPIO_GPISR = (1 << line); + /* Set the new style */ *int_reg |= (int_style << (line * IXP4XX_GPIO_STYLE_SIZE)); @@ -169,7 +171,7 @@ static void ixp4xx_irq_ack(unsigned int irq) int line = (irq < 32) ? irq2gpio[irq] : -1; if (line >= 0) - gpio_line_isr_clear(line); + *IXP4XX_GPIO_GPISR = (1 << line); } /* @@ -330,11 +332,27 @@ static struct platform_device *ixp46x_devices[] __initdata = { &ixp46x_i2c_controller }; +unsigned long ixp4xx_exp_bus_size; + void __init ixp4xx_sys_init(void) { + ixp4xx_exp_bus_size = SZ_16M; + if (cpu_is_ixp46x()) { + int region; + platform_add_devices(ixp46x_devices, ARRAY_SIZE(ixp46x_devices)); + + for (region = 0; region < 7; region++) { + if((*(IXP4XX_EXP_REG(0x4 * region)) & 0x200)) { + ixp4xx_exp_bus_size = SZ_32M; + break; + } + } } + + printk("IXP4xx: Using %uMiB expansion bus window size\n", + ixp4xx_exp_bus_size >> 20); } diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c index 60de8a94cff..e6b7fcd923f 100644 --- a/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/arch/arm/mach-ixp4xx/coyote-pci.c @@ -33,9 +33,6 @@ void __init coyote_pci_preinit(void) set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQT_LOW); set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQT_LOW); - gpio_line_isr_clear(COYOTE_PCI_SLOT0_PIN); - gpio_line_isr_clear(COYOTE_PCI_SLOT1_PIN); - ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/coyote-setup.c b/arch/arm/mach-ixp4xx/coyote-setup.c index 050c9276891..679594a7398 100644 --- a/arch/arm/mach-ixp4xx/coyote-setup.c +++ b/arch/arm/mach-ixp4xx/coyote-setup.c @@ -14,6 +14,7 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/serial_8250.h> +#include <linux/slab.h> #include <asm/types.h> #include <asm/setup.h> @@ -30,8 +31,6 @@ static struct flash_platform_data coyote_flash_data = { }; static struct resource coyote_flash_resource = { - .start = COYOTE_FLASH_BASE, - .end = COYOTE_FLASH_BASE + COYOTE_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }; @@ -81,6 +80,11 @@ static struct platform_device *coyote_devices[] __initdata = { static void __init coyote_init(void) { + ixp4xx_sys_init(); + + coyote_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + coyote_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; + *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; @@ -91,8 +95,6 @@ static void __init coyote_init(void) coyote_uart_data[0].irq = IRQ_IXP4XX_UART1; } - - ixp4xx_sys_init(); platform_add_devices(coyote_devices, ARRAY_SIZE(coyote_devices)); } diff --git a/arch/arm/mach-ixp4xx/gtwx5715-setup.c b/arch/arm/mach-ixp4xx/gtwx5715-setup.c index 29a6d02fa85..03867048997 100644 --- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c +++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c @@ -27,6 +27,7 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/serial_8250.h> +#include <linux/slab.h> #include <asm/types.h> #include <asm/setup.h> @@ -106,11 +107,9 @@ static struct flash_platform_data gtwx5715_flash_data = { .width = 2, }; -static struct resource gtwx5715_flash_resource = { - .start = GTWX5715_FLASH_BASE, - .end = GTWX5715_FLASH_BASE + GTWX5715_FLASH_SIZE - 1, +static struct gtw5715_flash_resource = { .flags = IORESOURCE_MEM, -}; +} static struct platform_device gtwx5715_flash = { .name = "IXP4XX-Flash", @@ -129,6 +128,14 @@ static struct platform_device *gtwx5715_devices[] __initdata = { static void __init gtwx5715_init(void) { + ixp4xx_sys_init(); + + if (!flash_resource) + printk(KERN_ERR "Could not allocate flash resource\n"); + + gtwx5715_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + gtwx5715_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_8M - 1; + platform_add_devices(gtwx5715_devices, ARRAY_SIZE(gtwx5715_devices)); } diff --git a/arch/arm/mach-ixp4xx/ixdp425-pci.c b/arch/arm/mach-ixp4xx/ixdp425-pci.c index f9a1d3e7d69..da415d5d7f3 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -32,11 +32,6 @@ void __init ixdp425_pci_preinit(void) set_irq_type(IRQ_IXDP425_PCI_INTC, IRQT_LOW); set_irq_type(IRQ_IXDP425_PCI_INTD, IRQT_LOW); - gpio_line_isr_clear(IXDP425_PCI_INTA_PIN); - gpio_line_isr_clear(IXDP425_PCI_INTB_PIN); - gpio_line_isr_clear(IXDP425_PCI_INTC_PIN); - gpio_line_isr_clear(IXDP425_PCI_INTD_PIN); - ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 3a22d84e104..c2e105c89c9 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -14,6 +14,7 @@ #include <linux/serial.h> #include <linux/tty.h> #include <linux/serial_8250.h> +#include <linux/slab.h> #include <asm/types.h> #include <asm/setup.h> @@ -30,8 +31,6 @@ static struct flash_platform_data ixdp425_flash_data = { }; static struct resource ixdp425_flash_resource = { - .start = IXDP425_FLASH_BASE, - .end = IXDP425_FLASH_BASE + IXDP425_FLASH_SIZE - 1, .flags = IORESOURCE_MEM, }; @@ -108,17 +107,13 @@ static struct platform_device *ixdp425_devices[] __initdata = { &ixdp425_uart }; - static void __init ixdp425_init(void) { ixp4xx_sys_init(); - /* - * IXP465 has 32MB window - */ - if (machine_is_ixdp465()) { - ixdp425_flash_resource.end += IXDP425_FLASH_SIZE; - } + ixdp425_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + ixdp425_flash_resource.end = + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; platform_add_devices(ixdp425_devices, ARRAY_SIZE(ixdp425_devices)); } diff --git a/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/arch/arm/mach-ixp4xx/ixdpg425-pci.c index fe5e7660de1..526fb6175bc 100644 --- a/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/arch/arm/mach-ixp4xx/ixdpg425-pci.c @@ -32,9 +32,6 @@ void __init ixdpg425_pci_preinit(void) set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW); set_irq_type(IRQ_IXP4XX_GPIO7, IRQT_LOW); - gpio_line_isr_clear(6); - gpio_line_isr_clear(7); - ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/nas100d-pci.c b/arch/arm/mach-ixp4xx/nas100d-pci.c new file mode 100644 index 00000000000..26b7c001ff6 --- /dev/null +++ b/arch/arm/mach-ixp4xx/nas100d-pci.c @@ -0,0 +1,71 @@ +/* + * arch/arm/mach-ixp4xx/nas100d-pci.c + * + * NAS 100d board-level PCI initialization + * + * based on ixdp425-pci.c: + * Copyright (C) 2002 Intel Corporation. + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * Maintainer: http://www.nslu2-linux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/config.h> +#include <linux/pci.h> +#include <linux/init.h> + +#include <asm/mach/pci.h> +#include <asm/mach-types.h> + +void __init nas100d_pci_preinit(void) +{ + set_irq_type(IRQ_NAS100D_PCI_INTA, IRQT_LOW); + set_irq_type(IRQ_NAS100D_PCI_INTB, IRQT_LOW); + set_irq_type(IRQ_NAS100D_PCI_INTC, IRQT_LOW); + set_irq_type(IRQ_NAS100D_PCI_INTD, IRQT_LOW); + set_irq_type(IRQ_NAS100D_PCI_INTE, IRQT_LOW); + + ixp4xx_pci_preinit(); +} + +static int __init nas100d_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + static int pci_irq_table[NAS100D_PCI_MAX_DEV][NAS100D_PCI_IRQ_LINES] = + { + { IRQ_NAS100D_PCI_INTA, -1, -1 }, + { IRQ_NAS100D_PCI_INTB, -1, -1 }, + { IRQ_NAS100D_PCI_INTC, IRQ_NAS100D_PCI_INTD, IRQ_NAS100D_PCI_INTE }, + }; + + int irq = -1; + + if (slot >= 1 && slot <= NAS100D_PCI_MAX_DEV && + pin >= 1 && pin <= NAS100D_PCI_IRQ_LINES) + irq = pci_irq_table[slot-1][pin-1]; + + return irq; +} + +struct hw_pci __initdata nas100d_pci = { + .nr_controllers = 1, + .preinit = nas100d_pci_preinit, + .swizzle = pci_std_swizzle, + .setup = ixp4xx_setup, + .scan = ixp4xx_scan_bus, + .map_irq = nas100d_map_irq, +}; + +int __init nas100d_pci_init(void) +{ + if (machine_is_nas100d()) + pci_common_init(&nas100d_pci); + + return 0; +} + +subsys_initcall(nas100d_pci_init); diff --git a/arch/arm/mach-ixp4xx/nas100d-power.c b/arch/arm/mach-ixp4xx/nas100d-power.c new file mode 100644 index 00000000000..2bec69bfa71 --- /dev/null +++ b/arch/arm/mach-ixp4xx/nas100d-power.c @@ -0,0 +1,67 @@ +/* + * arch/arm/mach-ixp4xx/nas100d-power.c + * + * NAS 100d Power/Reset driver + * + * Copyright (C) 2005 Tower Technologies + * + * based on nas100d-io.c + * Copyright (C) 2004 Karen Spearel + * + * Author: Alessandro Zummo <a.zummo@towertech.it> + * Maintainers: http://www.nslu2-linux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#include <linux/module.h> +#include <linux/reboot.h> +#include <linux/interrupt.h> + +#include <asm/mach-types.h> + +extern void ctrl_alt_del(void); + +static irqreturn_t nas100d_reset_handler(int irq, void *dev_id, struct pt_regs *regs) +{ + /* Signal init to do the ctrlaltdel action, this will bypass init if + * it hasn't started and do a kernel_restart. + */ + ctrl_alt_del(); + + return IRQ_HANDLED; +} + +static int __init nas100d_power_init(void) +{ + if (!(machine_is_nas100d())) + return 0; + + set_irq_type(NAS100D_RB_IRQ, IRQT_LOW); + + if (request_irq(NAS100D_RB_IRQ, &nas100d_reset_handler, + SA_INTERRUPT, "NAS100D reset button", NULL) < 0) { + + printk(KERN_DEBUG "Reset Button IRQ %d not available\n", + NAS100D_RB_IRQ); + + return -EIO; + } + + return 0; +} + +static void __exit nas100d_power_exit(void) +{ + free_irq(NAS100D_RB_IRQ, NULL); +} + +module_init(nas100d_power_init); +module_exit(nas100d_power_exit); + +MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>"); +MODULE_DESCRIPTION("NAS100D Power/Reset driver"); +MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-ixp4xx/nas100d-setup.c b/arch/arm/mach-ixp4xx/nas100d-setup.c new file mode 100644 index 00000000000..49998a8bd4e --- /dev/null +++ b/arch/arm/mach-ixp4xx/nas100d-setup.c @@ -0,0 +1,135 @@ +/* + * arch/arm/mach-ixp4xx/nas100d-setup.c + * + * NAS 100d board-setup + * + * based ixdp425-setup.c: + * Copyright (C) 2003-2004 MontaVista Software, Inc. + * + * Author: Alessandro Zummo <a.zummo@towertech.it> + * Author: Rod Whitby <rod@whitby.id.au> + * Maintainers: http://www.nslu2-linux.org/ + * + */ + +#include <linux/kernel.h> +#include <linux/serial.h> +#include <linux/serial_8250.h> + +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/flash.h> + +static struct flash_platform_data nas100d_flash_data = { + .map_name = "cfi_probe", + .width = 2, +}; + +static struct resource nas100d_flash_resource = { + .flags = IORESOURCE_MEM, +}; + +static struct platform_device nas100d_flash = { + .name = "IXP4XX-Flash", + .id = 0, + .dev.platform_data = &nas100d_flash_data, + .num_resources = 1, + .resource = &nas100d_flash_resource, +}; + +static struct ixp4xx_i2c_pins nas100d_i2c_gpio_pins = { + .sda_pin = NAS100D_SDA_PIN, + .scl_pin = NAS100D_SCL_PIN, +}; + +static struct platform_device nas100d_i2c_controller = { + .name = "IXP4XX-I2C", + .id = 0, + .dev.platform_data = &nas100d_i2c_gpio_pins, + .num_resources = 0, +}; + +static struct resource nas100d_uart_resources[] = { + { + .start = IXP4XX_UART1_BASE_PHYS, + .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + }, + { + .start = IXP4XX_UART2_BASE_PHYS, + .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM, + } +}; + +static struct plat_serial8250_port nas100d_uart_data[] = { + { + .mapbase = IXP4XX_UART1_BASE_PHYS, + .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART1, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { + .mapbase = IXP4XX_UART2_BASE_PHYS, + .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, + .irq = IRQ_IXP4XX_UART2, + .flags = UPF_BOOT_AUTOCONF, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { } +}; + +static struct platform_device nas100d_uart = { + .name = "serial8250", + .id = PLAT8250_DEV_PLATFORM, + .dev.platform_data = nas100d_uart_data, + .num_resources = 2, + .resource = nas100d_uart_resources, +}; + +static struct platform_device *nas100d_devices[] __initdata = { + &nas100d_i2c_controller, + &nas100d_flash, + &nas100d_uart, +}; + +static void nas100d_power_off(void) +{ + /* This causes the box to drop the power and go dead. */ + + /* enable the pwr cntl gpio */ + gpio_line_config(NAS100D_PO_GPIO, IXP4XX_GPIO_OUT); + + /* do the deed */ + gpio_line_set(NAS100D_PO_GPIO, IXP4XX_GPIO_HIGH); +} + +static void __init nas100d_init(void) +{ + ixp4xx_sys_init(); + + nas100d_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); + nas100d_flash_resource.end = + IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1; + + pm_power_off = nas100d_power_off; + + platform_add_devices(nas100d_devices, ARRAY_SIZE(nas100d_devices)); +} + +MACHINE_START(NAS100D, "Iomega NAS 100d") + /* Maintainer: www.nslu2-linux.org */ + .phys_ram = PHYS_OFFSET, + .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS, + .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC, + .boot_params = 0x00000100, + .map_io = ixp4xx_map_io, + .init_irq = ixp4xx_init_irq, + .timer = &ixp4xx_timer, + .init_machine = nas100d_init, +MACHINE_END diff --git a/arch/arm/mach-ixp4xx/nslu2-pci.c b/arch/arm/mach-ixp4xx/nslu2-pci.c index a575f2e0b2c..ece860444d5 100644 --- a/arch/arm/mach-ixp4xx/nslu2-pci.c +++ b/arch/arm/mach-ixp4xx/nslu2-pci.c @@ -28,14 +28,6 @@ void __init nslu2_pci_preinit(void) set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW); set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW); - gpio_line_isr_clear(NSLU2_PCI_INTA_PIN); - gpio_line_isr_clear(NSLU2_PCI_INTB_PIN); - gpio_line_isr_clear(NSLU2_PCI_INTC_PIN); - - /* INTD is not configured as GPIO is used - * for the power input button. - */ - ixp4xx_pci_preinit(); } diff --git a/arch/arm/mach-ixp4xx/nslu2-power.c b/arch/arm/mach-ixp4xx/nslu2-power.c index 18fbc8c0fb3..b0ad9e901f6 100644 --- a/arch/arm/mach-ixp4xx/nslu2-power.c +++ b/arch/arm/mach-ixp4xx/nslu2-power.c @@ -54,9 +54,6 @@ static int __init nslu2_power_init(void) set_irq_type(NSLU2_RB_IRQ, IRQT_LOW); set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH); - gpio_line_isr_clear(NSLU2_RB_GPIO); - gpio_line_isr_clear(NSLU2_PB_GPIO); - if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler, SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) { |