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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-06-10 22:38:27 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-06-10 22:38:27 +0100 |
| commit | 1ee73784b656386a8c4c261282716c3b9019aea0 (patch) | |
| tree | d1356e7ed9123ec941910645250fe5c9eec9a6d6 /arch/arm/mach-omap2/omap-headsmp.S | |
| parent | 7698fdedcfa3cab3dd40c9b685590b23be02e267 (diff) | |
| parent | b5495610669984af931055e49c1c1d2957950335 (diff) | |
Merge branch 'for_rmk' of git://dev.omapzoom.org/pub/scm/santosh/kernel-omap4-base into devel
Diffstat (limited to 'arch/arm/mach-omap2/omap-headsmp.S')
| -rw-r--r-- | arch/arm/mach-omap2/omap-headsmp.S | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap-headsmp.S b/arch/arm/mach-omap2/omap-headsmp.S new file mode 100644 index 00000000000..4afadba0947 --- /dev/null +++ b/arch/arm/mach-omap2/omap-headsmp.S @@ -0,0 +1,46 @@ +/* + * Secondary CPU startup routine source file. + * + * Copyright (C) 2009 Texas Instruments, Inc. + * + * Author: + * Santosh Shilimkar <santosh.shilimkar@ti.com> + * + * Interface functions needed for the SMP. This file is based on arm + * realview smp platform. + * Copyright (c) 2003 ARM Limited. + * + * This program is free software,you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/linkage.h> +#include <linux/init.h> + +/* Physical address needed since MMU not enabled yet on secondary core */ +#define OMAP4_AUX_CORE_BOOT1_PA 0x48281804 + + __INIT + +/* + * OMAP4 specific entry point for secondary CPU to jump from ROM + * code. This routine also provides a holding flag into which + * secondary core is held until we're ready for it to initialise. + * The primary core will update the this flag using a hardware + * register AuxCoreBoot1. + */ +ENTRY(omap_secondary_startup) + mrc p15, 0, r0, c0, c0, 5 + and r0, r0, #0x0f +hold: ldr r1, =OMAP4_AUX_CORE_BOOT1_PA @ read from AuxCoreBoot1 + ldr r2, [r1] + cmp r2, r0 + bne hold + + /* + * we've been released from the cpu_release,secondary_stack + * should now contain the SVC stack for this core + */ + b secondary_startup + |